1 // SPDX-License-Identifier: ISC
2 /* Copyright (C) 2020 MediaTek Inc.
3 *
4 * Author: Felix Fietkau <[email protected]>
5 * Lorenzo Bianconi <[email protected]>
6 * Sean Wang <[email protected]>
7 */
8
9 #include <linux/kernel.h>
10 #include <linux/iopoll.h>
11 #include <linux/module.h>
12
13 #include <linux/mmc/host.h>
14 #include <linux/mmc/sdio_ids.h>
15 #include <linux/mmc/sdio_func.h>
16
17 #include "trace.h"
18 #include "sdio.h"
19 #include "mt76.h"
20
mt76s_refill_sched_quota(struct mt76_dev * dev,u32 * data)21 static int mt76s_refill_sched_quota(struct mt76_dev *dev, u32 *data)
22 {
23 u32 ple_ac_data_quota[] = {
24 FIELD_GET(TXQ_CNT_L, data[4]), /* VO */
25 FIELD_GET(TXQ_CNT_H, data[3]), /* VI */
26 FIELD_GET(TXQ_CNT_L, data[3]), /* BE */
27 FIELD_GET(TXQ_CNT_H, data[2]), /* BK */
28 };
29 u32 pse_ac_data_quota[] = {
30 FIELD_GET(TXQ_CNT_H, data[1]), /* VO */
31 FIELD_GET(TXQ_CNT_L, data[1]), /* VI */
32 FIELD_GET(TXQ_CNT_H, data[0]), /* BE */
33 FIELD_GET(TXQ_CNT_L, data[0]), /* BK */
34 };
35 u32 pse_mcu_quota = FIELD_GET(TXQ_CNT_L, data[2]);
36 u32 pse_data_quota = 0, ple_data_quota = 0;
37 struct mt76_sdio *sdio = &dev->sdio;
38 int i;
39
40 for (i = 0; i < ARRAY_SIZE(pse_ac_data_quota); i++) {
41 pse_data_quota += pse_ac_data_quota[i];
42 ple_data_quota += ple_ac_data_quota[i];
43 }
44
45 if (!pse_data_quota && !ple_data_quota && !pse_mcu_quota)
46 return 0;
47
48 sdio->sched.pse_mcu_quota += pse_mcu_quota;
49 if (sdio->pse_mcu_quota_max &&
50 sdio->sched.pse_mcu_quota > sdio->pse_mcu_quota_max) {
51 sdio->sched.pse_mcu_quota = sdio->pse_mcu_quota_max;
52 }
53 sdio->sched.pse_data_quota += pse_data_quota;
54 sdio->sched.ple_data_quota += ple_data_quota;
55
56 return pse_data_quota + ple_data_quota + pse_mcu_quota;
57 }
58
59 static struct sk_buff *
mt76s_build_rx_skb(void * data,int data_len,int buf_len)60 mt76s_build_rx_skb(void *data, int data_len, int buf_len)
61 {
62 int len = min_t(int, data_len, MT_SKB_HEAD_LEN);
63 struct sk_buff *skb;
64
65 skb = alloc_skb(len, GFP_KERNEL);
66 if (!skb)
67 return NULL;
68
69 skb_put_data(skb, data, len);
70 if (data_len > len) {
71 struct page *page;
72
73 data += len;
74 page = virt_to_head_page(data);
75 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
76 page, data - page_address(page),
77 data_len - len, buf_len);
78 get_page(page);
79 }
80
81 return skb;
82 }
83
84 static int
mt76s_rx_run_queue(struct mt76_dev * dev,enum mt76_rxq_id qid,struct mt76s_intr * intr)85 mt76s_rx_run_queue(struct mt76_dev *dev, enum mt76_rxq_id qid,
86 struct mt76s_intr *intr)
87 {
88 struct mt76_queue *q = &dev->q_rx[qid];
89 struct mt76_sdio *sdio = &dev->sdio;
90 int len = 0, err, i;
91 struct page *page;
92 u8 *buf, *end;
93
94 for (i = 0; i < intr->rx.num[qid]; i++)
95 len += round_up(intr->rx.len[qid][i] + 4, 4);
96
97 if (!len)
98 return 0;
99
100 if (len > sdio->func->cur_blksize)
101 len = roundup(len, sdio->func->cur_blksize);
102
103 page = __dev_alloc_pages(GFP_KERNEL, get_order(len));
104 if (!page)
105 return -ENOMEM;
106
107 buf = page_address(page);
108
109 sdio_claim_host(sdio->func);
110 err = sdio_readsb(sdio->func, buf, MCR_WRDR(qid), len);
111 sdio_release_host(sdio->func);
112
113 if (err < 0) {
114 dev_err(dev->dev, "sdio read data failed:%d\n", err);
115 put_page(page);
116 return err;
117 }
118
119 end = buf + len;
120 i = 0;
121
122 while (i < intr->rx.num[qid] && buf < end) {
123 int index = (q->head + i) % q->ndesc;
124 struct mt76_queue_entry *e = &q->entry[index];
125 __le32 *rxd = (__le32 *)buf;
126
127 /* parse rxd to get the actual packet length */
128 len = le32_get_bits(rxd[0], GENMASK(15, 0));
129
130 /* Optimized path for TXS */
131 if (!dev->drv->rx_check || dev->drv->rx_check(dev, buf, len)) {
132 e->skb = mt76s_build_rx_skb(buf, len,
133 round_up(len + 4, 4));
134 if (!e->skb)
135 break;
136
137 if (q->queued + i + 1 == q->ndesc)
138 break;
139 i++;
140 }
141 buf += round_up(len + 4, 4);
142 }
143 put_page(page);
144
145 spin_lock_bh(&q->lock);
146 q->head = (q->head + i) % q->ndesc;
147 q->queued += i;
148 spin_unlock_bh(&q->lock);
149
150 return i;
151 }
152
mt76s_rx_handler(struct mt76_dev * dev)153 static int mt76s_rx_handler(struct mt76_dev *dev)
154 {
155 struct mt76_sdio *sdio = &dev->sdio;
156 struct mt76s_intr intr;
157 int nframes = 0, ret;
158
159 ret = sdio->parse_irq(dev, &intr);
160 if (ret)
161 return ret;
162
163 trace_dev_irq(dev, intr.isr, 0);
164
165 if (intr.isr & WHIER_RX0_DONE_INT_EN) {
166 ret = mt76s_rx_run_queue(dev, 0, &intr);
167 if (ret > 0) {
168 mt76_worker_schedule(&sdio->net_worker);
169 nframes += ret;
170 }
171 }
172
173 if (intr.isr & WHIER_RX1_DONE_INT_EN) {
174 ret = mt76s_rx_run_queue(dev, 1, &intr);
175 if (ret > 0) {
176 mt76_worker_schedule(&sdio->net_worker);
177 nframes += ret;
178 }
179 }
180
181 nframes += !!mt76s_refill_sched_quota(dev, intr.tx.wtqcr);
182
183 return nframes;
184 }
185
186 static int
mt76s_tx_pick_quota(struct mt76_sdio * sdio,bool mcu,int buf_sz,int * pse_size,int * ple_size)187 mt76s_tx_pick_quota(struct mt76_sdio *sdio, bool mcu, int buf_sz,
188 int *pse_size, int *ple_size)
189 {
190 int pse_sz;
191
192 pse_sz = DIV_ROUND_UP(buf_sz + sdio->sched.deficit,
193 sdio->sched.pse_page_size);
194
195 if (mcu && sdio->hw_ver == MT76_CONNAC2_SDIO)
196 pse_sz = 1;
197
198 if (mcu) {
199 if (sdio->sched.pse_mcu_quota < *pse_size + pse_sz)
200 return -EBUSY;
201 } else {
202 if (sdio->sched.pse_data_quota < *pse_size + pse_sz ||
203 sdio->sched.ple_data_quota < *ple_size + 1)
204 return -EBUSY;
205
206 *ple_size = *ple_size + 1;
207 }
208 *pse_size = *pse_size + pse_sz;
209
210 return 0;
211 }
212
213 static void
mt76s_tx_update_quota(struct mt76_sdio * sdio,bool mcu,int pse_size,int ple_size)214 mt76s_tx_update_quota(struct mt76_sdio *sdio, bool mcu, int pse_size,
215 int ple_size)
216 {
217 if (mcu) {
218 sdio->sched.pse_mcu_quota -= pse_size;
219 } else {
220 sdio->sched.pse_data_quota -= pse_size;
221 sdio->sched.ple_data_quota -= ple_size;
222 }
223 }
224
__mt76s_xmit_queue(struct mt76_dev * dev,u8 * data,int len)225 static int __mt76s_xmit_queue(struct mt76_dev *dev, u8 *data, int len)
226 {
227 struct mt76_sdio *sdio = &dev->sdio;
228 int err;
229
230 if (len > sdio->func->cur_blksize)
231 len = roundup(len, sdio->func->cur_blksize);
232
233 sdio_claim_host(sdio->func);
234 err = sdio_writesb(sdio->func, MCR_WTDR1, data, len);
235 sdio_release_host(sdio->func);
236
237 if (err)
238 dev_err(dev->dev, "sdio write failed: %d\n", err);
239
240 return err;
241 }
242
mt76s_tx_run_queue(struct mt76_dev * dev,struct mt76_queue * q)243 static int mt76s_tx_run_queue(struct mt76_dev *dev, struct mt76_queue *q)
244 {
245 int err, nframes = 0, len = 0, pse_sz = 0, ple_sz = 0;
246 bool mcu = q == dev->q_mcu[MT_MCUQ_WM];
247 struct mt76_sdio *sdio = &dev->sdio;
248 u8 pad;
249
250 while (q->first != q->head) {
251 struct mt76_queue_entry *e = &q->entry[q->first];
252 struct sk_buff *iter;
253
254 smp_rmb();
255
256 if (test_bit(MT76_MCU_RESET, &dev->phy.state))
257 goto next;
258
259 if (!test_bit(MT76_STATE_MCU_RUNNING, &dev->phy.state)) {
260 __skb_put_zero(e->skb, 4);
261 err = __skb_grow(e->skb, roundup(e->skb->len,
262 sdio->func->cur_blksize));
263 if (err)
264 return err;
265 err = __mt76s_xmit_queue(dev, e->skb->data,
266 e->skb->len);
267 if (err)
268 return err;
269
270 goto next;
271 }
272
273 pad = roundup(e->skb->len, 4) - e->skb->len;
274 if (len + e->skb->len + pad + 4 > dev->sdio.xmit_buf_sz)
275 break;
276
277 if (mt76s_tx_pick_quota(sdio, mcu, e->buf_sz, &pse_sz,
278 &ple_sz))
279 break;
280
281 memcpy(sdio->xmit_buf + len, e->skb->data, skb_headlen(e->skb));
282 len += skb_headlen(e->skb);
283 nframes++;
284
285 skb_walk_frags(e->skb, iter) {
286 memcpy(sdio->xmit_buf + len, iter->data, iter->len);
287 len += iter->len;
288 nframes++;
289 }
290
291 if (unlikely(pad)) {
292 memset(sdio->xmit_buf + len, 0, pad);
293 len += pad;
294 }
295 next:
296 q->first = (q->first + 1) % q->ndesc;
297 e->done = true;
298 }
299
300 if (nframes) {
301 memset(sdio->xmit_buf + len, 0, 4);
302 err = __mt76s_xmit_queue(dev, sdio->xmit_buf, len + 4);
303 if (err)
304 return err;
305 }
306 mt76s_tx_update_quota(sdio, mcu, pse_sz, ple_sz);
307
308 mt76_worker_schedule(&sdio->status_worker);
309
310 return nframes;
311 }
312
mt76s_txrx_worker(struct mt76_sdio * sdio)313 void mt76s_txrx_worker(struct mt76_sdio *sdio)
314 {
315 struct mt76_dev *dev = container_of(sdio, struct mt76_dev, sdio);
316 int i, nframes, ret;
317
318 /* disable interrupt */
319 sdio_claim_host(sdio->func);
320 sdio_writel(sdio->func, WHLPCR_INT_EN_CLR, MCR_WHLPCR, NULL);
321 sdio_release_host(sdio->func);
322
323 do {
324 nframes = 0;
325
326 /* tx */
327 for (i = 0; i <= MT_TXQ_PSD; i++) {
328 ret = mt76s_tx_run_queue(dev, dev->phy.q_tx[i]);
329 if (ret > 0)
330 nframes += ret;
331 }
332 ret = mt76s_tx_run_queue(dev, dev->q_mcu[MT_MCUQ_WM]);
333 if (ret > 0)
334 nframes += ret;
335
336 /* rx */
337 ret = mt76s_rx_handler(dev);
338 if (ret > 0)
339 nframes += ret;
340
341 if (test_bit(MT76_MCU_RESET, &dev->phy.state) ||
342 test_bit(MT76_STATE_SUSPEND, &dev->phy.state)) {
343 if (!mt76s_txqs_empty(dev))
344 continue;
345 else
346 wake_up(&sdio->wait);
347 }
348 } while (nframes > 0);
349
350 /* enable interrupt */
351 sdio_claim_host(sdio->func);
352 sdio_writel(sdio->func, WHLPCR_INT_EN_SET, MCR_WHLPCR, NULL);
353 sdio_release_host(sdio->func);
354 }
355 EXPORT_SYMBOL_GPL(mt76s_txrx_worker);
356
mt76s_sdio_irq(struct sdio_func * func)357 void mt76s_sdio_irq(struct sdio_func *func)
358 {
359 struct mt76_dev *dev = sdio_get_drvdata(func);
360 struct mt76_sdio *sdio = &dev->sdio;
361
362 if (!test_bit(MT76_STATE_INITIALIZED, &dev->phy.state) ||
363 test_bit(MT76_MCU_RESET, &dev->phy.state))
364 return;
365
366 sdio_writel(sdio->func, WHLPCR_INT_EN_CLR, MCR_WHLPCR, NULL);
367 mt76_worker_schedule(&sdio->txrx_worker);
368 }
369 EXPORT_SYMBOL_GPL(mt76s_sdio_irq);
370
mt76s_txqs_empty(struct mt76_dev * dev)371 bool mt76s_txqs_empty(struct mt76_dev *dev)
372 {
373 struct mt76_queue *q;
374 int i;
375
376 for (i = 0; i <= MT_TXQ_PSD + 1; i++) {
377 if (i <= MT_TXQ_PSD)
378 q = dev->phy.q_tx[i];
379 else
380 q = dev->q_mcu[MT_MCUQ_WM];
381
382 if (q->first != q->head)
383 return false;
384 }
385
386 return true;
387 }
388 EXPORT_SYMBOL_GPL(mt76s_txqs_empty);
389