1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Marvell 88E6352 family SERDES PCS support
4 *
5 * Copyright (c) 2008 Marvell Semiconductor
6 *
7 * Copyright (c) 2017 Andrew Lunn <[email protected]>
8 */
9 #include <linux/phylink.h>
10
11 #include "global2.h"
12 #include "port.h"
13 #include "serdes.h"
14
15 /* Definitions from drivers/net/phy/marvell.c, which would be good to reuse. */
16 #define MII_M1011_PHY_STATUS 17
17 #define MII_M1011_IMASK 18
18 #define MII_M1011_IMASK_LINK_CHANGE BIT(10)
19 #define MII_M1011_IEVENT 19
20 #define MII_M1011_IEVENT_LINK_CHANGE BIT(10)
21 #define MII_MARVELL_PHY_PAGE 22
22 #define MII_MARVELL_FIBER_PAGE 1
23
24 struct marvell_c22_pcs {
25 struct mdio_device mdio;
26 struct phylink_pcs phylink_pcs;
27 unsigned int irq;
28 char name[64];
29 bool (*link_check)(struct marvell_c22_pcs *mpcs);
30 struct mv88e6xxx_port *port;
31 };
32
pcs_to_marvell_c22_pcs(struct phylink_pcs * pcs)33 static struct marvell_c22_pcs *pcs_to_marvell_c22_pcs(struct phylink_pcs *pcs)
34 {
35 return container_of(pcs, struct marvell_c22_pcs, phylink_pcs);
36 }
37
marvell_c22_pcs_set_fiber_page(struct marvell_c22_pcs * mpcs)38 static int marvell_c22_pcs_set_fiber_page(struct marvell_c22_pcs *mpcs)
39 {
40 u16 page;
41 int err;
42
43 mutex_lock(&mpcs->mdio.bus->mdio_lock);
44
45 err = __mdiodev_read(&mpcs->mdio, MII_MARVELL_PHY_PAGE);
46 if (err < 0) {
47 dev_err(mpcs->mdio.dev.parent,
48 "%s: can't read Serdes page register: %pe\n",
49 mpcs->name, ERR_PTR(err));
50 return err;
51 }
52
53 page = err;
54
55 err = __mdiodev_write(&mpcs->mdio, MII_MARVELL_PHY_PAGE,
56 MII_MARVELL_FIBER_PAGE);
57 if (err) {
58 dev_err(mpcs->mdio.dev.parent,
59 "%s: can't set Serdes page register: %pe\n",
60 mpcs->name, ERR_PTR(err));
61 return err;
62 }
63
64 return page;
65 }
66
marvell_c22_pcs_restore_page(struct marvell_c22_pcs * mpcs,int oldpage,int ret)67 static int marvell_c22_pcs_restore_page(struct marvell_c22_pcs *mpcs,
68 int oldpage, int ret)
69 {
70 int err;
71
72 if (oldpage >= 0) {
73 err = __mdiodev_write(&mpcs->mdio, MII_MARVELL_PHY_PAGE,
74 oldpage);
75 if (err)
76 dev_err(mpcs->mdio.dev.parent,
77 "%s: can't restore Serdes page register: %pe\n",
78 mpcs->name, ERR_PTR(err));
79 if (!err || ret < 0)
80 err = ret;
81 } else {
82 err = oldpage;
83 }
84 mutex_unlock(&mpcs->mdio.bus->mdio_lock);
85
86 return err;
87 }
88
marvell_c22_pcs_handle_irq(int irq,void * dev_id)89 static irqreturn_t marvell_c22_pcs_handle_irq(int irq, void *dev_id)
90 {
91 struct marvell_c22_pcs *mpcs = dev_id;
92 irqreturn_t status = IRQ_NONE;
93 int err, oldpage;
94
95 oldpage = marvell_c22_pcs_set_fiber_page(mpcs);
96 if (oldpage < 0)
97 goto fail;
98
99 err = __mdiodev_read(&mpcs->mdio, MII_M1011_IEVENT);
100 if (err >= 0 && err & MII_M1011_IEVENT_LINK_CHANGE) {
101 phylink_pcs_change(&mpcs->phylink_pcs, true);
102 status = IRQ_HANDLED;
103 }
104
105 fail:
106 marvell_c22_pcs_restore_page(mpcs, oldpage, 0);
107
108 return status;
109 }
110
marvell_c22_pcs_modify(struct marvell_c22_pcs * mpcs,u8 reg,u16 mask,u16 val)111 static int marvell_c22_pcs_modify(struct marvell_c22_pcs *mpcs, u8 reg,
112 u16 mask, u16 val)
113 {
114 int oldpage, err = 0;
115
116 oldpage = marvell_c22_pcs_set_fiber_page(mpcs);
117 if (oldpage >= 0)
118 err = __mdiodev_modify(&mpcs->mdio, reg, mask, val);
119
120 return marvell_c22_pcs_restore_page(mpcs, oldpage, err);
121 }
122
marvell_c22_pcs_power(struct marvell_c22_pcs * mpcs,bool on)123 static int marvell_c22_pcs_power(struct marvell_c22_pcs *mpcs,
124 bool on)
125 {
126 u16 val = on ? 0 : BMCR_PDOWN;
127
128 return marvell_c22_pcs_modify(mpcs, MII_BMCR, BMCR_PDOWN, val);
129 }
130
marvell_c22_pcs_control_irq(struct marvell_c22_pcs * mpcs,bool enable)131 static int marvell_c22_pcs_control_irq(struct marvell_c22_pcs *mpcs,
132 bool enable)
133 {
134 u16 val = enable ? MII_M1011_IMASK_LINK_CHANGE : 0;
135
136 return marvell_c22_pcs_modify(mpcs, MII_M1011_IMASK,
137 MII_M1011_IMASK_LINK_CHANGE, val);
138 }
139
marvell_c22_pcs_enable(struct phylink_pcs * pcs)140 static int marvell_c22_pcs_enable(struct phylink_pcs *pcs)
141 {
142 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);
143 int err;
144
145 err = marvell_c22_pcs_power(mpcs, true);
146 if (err)
147 return err;
148
149 return marvell_c22_pcs_control_irq(mpcs, !!mpcs->irq);
150 }
151
marvell_c22_pcs_disable(struct phylink_pcs * pcs)152 static void marvell_c22_pcs_disable(struct phylink_pcs *pcs)
153 {
154 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);
155
156 marvell_c22_pcs_control_irq(mpcs, false);
157 marvell_c22_pcs_power(mpcs, false);
158 }
159
marvell_c22_pcs_get_state(struct phylink_pcs * pcs,unsigned int neg_mode,struct phylink_link_state * state)160 static void marvell_c22_pcs_get_state(struct phylink_pcs *pcs,
161 unsigned int neg_mode,
162 struct phylink_link_state *state)
163 {
164 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);
165 int oldpage, bmsr, lpa, status;
166
167 state->link = false;
168
169 if (mpcs->link_check && !mpcs->link_check(mpcs))
170 return;
171
172 oldpage = marvell_c22_pcs_set_fiber_page(mpcs);
173 if (oldpage >= 0) {
174 bmsr = __mdiodev_read(&mpcs->mdio, MII_BMSR);
175 lpa = __mdiodev_read(&mpcs->mdio, MII_LPA);
176 status = __mdiodev_read(&mpcs->mdio, MII_M1011_PHY_STATUS);
177 }
178
179 if (marvell_c22_pcs_restore_page(mpcs, oldpage, 0) >= 0 &&
180 bmsr >= 0 && lpa >= 0 && status >= 0)
181 mv88e6xxx_pcs_decode_state(mpcs->mdio.dev.parent, bmsr, lpa,
182 status, state);
183 }
184
marvell_c22_pcs_config(struct phylink_pcs * pcs,unsigned int neg_mode,phy_interface_t interface,const unsigned long * advertising,bool permit_pause_to_mac)185 static int marvell_c22_pcs_config(struct phylink_pcs *pcs,
186 unsigned int neg_mode,
187 phy_interface_t interface,
188 const unsigned long *advertising,
189 bool permit_pause_to_mac)
190 {
191 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);
192 int oldpage, adv, err, ret = 0;
193 u16 bmcr;
194
195 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
196 if (adv < 0)
197 return 0;
198
199 bmcr = neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED ? BMCR_ANENABLE : 0;
200
201 oldpage = marvell_c22_pcs_set_fiber_page(mpcs);
202 if (oldpage < 0)
203 goto restore;
204
205 err = __mdiodev_modify_changed(&mpcs->mdio, MII_ADVERTISE, 0xffff, adv);
206 ret = err;
207 if (err < 0)
208 goto restore;
209
210 err = __mdiodev_modify_changed(&mpcs->mdio, MII_BMCR, BMCR_ANENABLE,
211 bmcr);
212 if (err < 0) {
213 ret = err;
214 goto restore;
215 }
216
217 /* If the ANENABLE bit was changed, the PHY will restart negotiation,
218 * so we don't need to flag a change to trigger its own restart.
219 */
220 if (err)
221 ret = 0;
222
223 restore:
224 return marvell_c22_pcs_restore_page(mpcs, oldpage, ret);
225 }
226
marvell_c22_pcs_an_restart(struct phylink_pcs * pcs)227 static void marvell_c22_pcs_an_restart(struct phylink_pcs *pcs)
228 {
229 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);
230
231 marvell_c22_pcs_modify(mpcs, MII_BMCR, BMCR_ANRESTART, BMCR_ANRESTART);
232 }
233
marvell_c22_pcs_link_up(struct phylink_pcs * pcs,unsigned int mode,phy_interface_t interface,int speed,int duplex)234 static void marvell_c22_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode,
235 phy_interface_t interface, int speed,
236 int duplex)
237 {
238 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);
239 u16 bmcr;
240 int err;
241
242 if (phylink_autoneg_inband(mode))
243 return;
244
245 bmcr = mii_bmcr_encode_fixed(speed, duplex);
246
247 err = marvell_c22_pcs_modify(mpcs, MII_BMCR, BMCR_SPEED100 |
248 BMCR_FULLDPLX | BMCR_SPEED1000, bmcr);
249 if (err)
250 dev_err(mpcs->mdio.dev.parent,
251 "%s: failed to configure mpcs: %pe\n", mpcs->name,
252 ERR_PTR(err));
253 }
254
255 static const struct phylink_pcs_ops marvell_c22_pcs_ops = {
256 .pcs_enable = marvell_c22_pcs_enable,
257 .pcs_disable = marvell_c22_pcs_disable,
258 .pcs_get_state = marvell_c22_pcs_get_state,
259 .pcs_config = marvell_c22_pcs_config,
260 .pcs_an_restart = marvell_c22_pcs_an_restart,
261 .pcs_link_up = marvell_c22_pcs_link_up,
262 };
263
marvell_c22_pcs_alloc(struct device * dev,struct mii_bus * bus,unsigned int addr)264 static struct marvell_c22_pcs *marvell_c22_pcs_alloc(struct device *dev,
265 struct mii_bus *bus,
266 unsigned int addr)
267 {
268 struct marvell_c22_pcs *mpcs;
269
270 mpcs = kzalloc(sizeof(*mpcs), GFP_KERNEL);
271 if (!mpcs)
272 return NULL;
273
274 mpcs->mdio.dev.parent = dev;
275 mpcs->mdio.bus = bus;
276 mpcs->mdio.addr = addr;
277 mpcs->phylink_pcs.ops = &marvell_c22_pcs_ops;
278 mpcs->phylink_pcs.neg_mode = true;
279
280 return mpcs;
281 }
282
marvell_c22_pcs_setup_irq(struct marvell_c22_pcs * mpcs,unsigned int irq)283 static int marvell_c22_pcs_setup_irq(struct marvell_c22_pcs *mpcs,
284 unsigned int irq)
285 {
286 int err;
287
288 mpcs->phylink_pcs.poll = !irq;
289 mpcs->irq = irq;
290
291 if (irq) {
292 err = request_threaded_irq(irq, NULL,
293 marvell_c22_pcs_handle_irq,
294 IRQF_ONESHOT, mpcs->name, mpcs);
295 if (err)
296 return err;
297 }
298
299 return 0;
300 }
301
302 /* mv88e6352 specifics */
303
mv88e6352_pcs_link_check(struct marvell_c22_pcs * mpcs)304 static bool mv88e6352_pcs_link_check(struct marvell_c22_pcs *mpcs)
305 {
306 struct mv88e6xxx_port *port = mpcs->port;
307 struct mv88e6xxx_chip *chip = port->chip;
308 u8 cmode;
309
310 /* Port 4 can be in auto-media mode. Check that the port is
311 * associated with the mpcs.
312 */
313 mv88e6xxx_reg_lock(chip);
314 chip->info->ops->port_get_cmode(chip, port->port, &cmode);
315 mv88e6xxx_reg_unlock(chip);
316
317 return cmode == MV88E6XXX_PORT_STS_CMODE_100BASEX ||
318 cmode == MV88E6XXX_PORT_STS_CMODE_1000BASEX ||
319 cmode == MV88E6XXX_PORT_STS_CMODE_SGMII;
320 }
321
mv88e6352_pcs_init(struct mv88e6xxx_chip * chip,int port)322 static int mv88e6352_pcs_init(struct mv88e6xxx_chip *chip, int port)
323 {
324 struct marvell_c22_pcs *mpcs;
325 struct mii_bus *bus;
326 struct device *dev;
327 unsigned int irq;
328 int err;
329
330 mv88e6xxx_reg_lock(chip);
331 err = mv88e6352_g2_scratch_port_has_serdes(chip, port);
332 mv88e6xxx_reg_unlock(chip);
333 if (err <= 0)
334 return err;
335
336 irq = mv88e6xxx_serdes_irq_mapping(chip, port);
337 bus = mv88e6xxx_default_mdio_bus(chip);
338 dev = chip->dev;
339
340 mpcs = marvell_c22_pcs_alloc(dev, bus, MV88E6352_ADDR_SERDES);
341 if (!mpcs)
342 return -ENOMEM;
343
344 snprintf(mpcs->name, sizeof(mpcs->name),
345 "mv88e6xxx-%s-serdes-%d", dev_name(dev), port);
346
347 mpcs->link_check = mv88e6352_pcs_link_check;
348 mpcs->port = &chip->ports[port];
349
350 err = marvell_c22_pcs_setup_irq(mpcs, irq);
351 if (err) {
352 kfree(mpcs);
353 return err;
354 }
355
356 chip->ports[port].pcs_private = &mpcs->phylink_pcs;
357
358 return 0;
359 }
360
mv88e6352_pcs_teardown(struct mv88e6xxx_chip * chip,int port)361 static void mv88e6352_pcs_teardown(struct mv88e6xxx_chip *chip, int port)
362 {
363 struct marvell_c22_pcs *mpcs;
364 struct phylink_pcs *pcs;
365
366 pcs = chip->ports[port].pcs_private;
367 if (!pcs)
368 return;
369
370 mpcs = pcs_to_marvell_c22_pcs(pcs);
371
372 if (mpcs->irq)
373 free_irq(mpcs->irq, mpcs);
374
375 kfree(mpcs);
376
377 chip->ports[port].pcs_private = NULL;
378 }
379
mv88e6352_pcs_select(struct mv88e6xxx_chip * chip,int port,phy_interface_t interface)380 static struct phylink_pcs *mv88e6352_pcs_select(struct mv88e6xxx_chip *chip,
381 int port,
382 phy_interface_t interface)
383 {
384 return chip->ports[port].pcs_private;
385 }
386
387 const struct mv88e6xxx_pcs_ops mv88e6352_pcs_ops = {
388 .pcs_init = mv88e6352_pcs_init,
389 .pcs_teardown = mv88e6352_pcs_teardown,
390 .pcs_select = mv88e6352_pcs_select,
391 };
392