1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6
7 #ifndef ATH12K_CORE_H
8 #define ATH12K_CORE_H
9
10 #include <linux/types.h>
11 #include <linux/interrupt.h>
12 #include <linux/irq.h>
13 #include <linux/bitfield.h>
14 #include <linux/dmi.h>
15 #include <linux/ctype.h>
16 #include <linux/firmware.h>
17 #include <linux/panic_notifier.h>
18 #include "qmi.h"
19 #include "htc.h"
20 #include "wmi.h"
21 #include "hal.h"
22 #include "dp.h"
23 #include "ce.h"
24 #include "mac.h"
25 #include "hw.h"
26 #include "hal_rx.h"
27 #include "reg.h"
28 #include "dbring.h"
29 #include "fw.h"
30 #include "acpi.h"
31 #include "wow.h"
32 #include "debugfs_htt_stats.h"
33 #include "coredump.h"
34
35 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
36
37 #define ATH12K_TX_MGMT_NUM_PENDING_MAX 512
38
39 #define ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
40
41 /* Pending management packets threshold for dropping probe responses */
42 #define ATH12K_PRB_RSP_DROP_THRESHOLD ((ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
43
44 /* SMBIOS type containing Board Data File Name Extension */
45 #define ATH12K_SMBIOS_BDF_EXT_TYPE 0xF8
46
47 /* SMBIOS type structure length (excluding strings-set) */
48 #define ATH12K_SMBIOS_BDF_EXT_LENGTH 0x9
49
50 /* The magic used by QCA spec */
51 #define ATH12K_SMBIOS_BDF_EXT_MAGIC "BDF_"
52
53 #define ATH12K_INVALID_HW_MAC_ID 0xFF
54 #define ATH12K_CONNECTION_LOSS_HZ (3 * HZ)
55 #define ATH12K_RX_RATE_TABLE_NUM 320
56 #define ATH12K_RX_RATE_TABLE_11AX_NUM 576
57
58 #define ATH12K_MON_TIMER_INTERVAL 10
59 #define ATH12K_RESET_TIMEOUT_HZ (20 * HZ)
60 #define ATH12K_RESET_MAX_FAIL_COUNT_FIRST 3
61 #define ATH12K_RESET_MAX_FAIL_COUNT_FINAL 5
62 #define ATH12K_RESET_FAIL_TIMEOUT_HZ (20 * HZ)
63 #define ATH12K_RECONFIGURE_TIMEOUT_HZ (10 * HZ)
64 #define ATH12K_RECOVER_START_TIMEOUT_HZ (20 * HZ)
65
66 #define ATH12K_MAX_SOCS 3
67 #define ATH12K_GROUP_MAX_RADIO (ATH12K_MAX_SOCS * MAX_RADIOS)
68 #define ATH12K_INVALID_GROUP_ID 0xFF
69 #define ATH12K_INVALID_DEVICE_ID 0xFF
70
71 #define ATH12K_MAX_MLO_PEERS 256
72 #define ATH12K_MLO_PEER_ID_INVALID 0xFFFF
73
74 enum ath12k_bdf_search {
75 ATH12K_BDF_SEARCH_DEFAULT,
76 ATH12K_BDF_SEARCH_BUS_AND_BOARD,
77 };
78
79 enum wme_ac {
80 WME_AC_BE,
81 WME_AC_BK,
82 WME_AC_VI,
83 WME_AC_VO,
84 WME_NUM_AC
85 };
86
87 #define ATH12K_HT_MCS_MAX 7
88 #define ATH12K_VHT_MCS_MAX 9
89 #define ATH12K_HE_MCS_MAX 11
90
91 enum ath12k_crypt_mode {
92 /* Only use hardware crypto engine */
93 ATH12K_CRYPT_MODE_HW,
94 /* Only use software crypto */
95 ATH12K_CRYPT_MODE_SW,
96 };
97
ath12k_tid_to_ac(u32 tid)98 static inline enum wme_ac ath12k_tid_to_ac(u32 tid)
99 {
100 return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
101 ((tid == 1) || (tid == 2)) ? WME_AC_BK :
102 ((tid == 4) || (tid == 5)) ? WME_AC_VI :
103 WME_AC_VO);
104 }
105
ath12k_le32hilo_to_u64(__le32 hi,__le32 lo)106 static inline u64 ath12k_le32hilo_to_u64(__le32 hi, __le32 lo)
107 {
108 u64 hi64 = le32_to_cpu(hi);
109 u64 lo64 = le32_to_cpu(lo);
110
111 return (hi64 << 32) | lo64;
112 }
113
114 enum ath12k_skb_flags {
115 ATH12K_SKB_HW_80211_ENCAP = BIT(0),
116 ATH12K_SKB_CIPHER_SET = BIT(1),
117 };
118
119 struct ath12k_skb_cb {
120 dma_addr_t paddr;
121 struct ath12k *ar;
122 struct ieee80211_vif *vif;
123 dma_addr_t paddr_ext_desc;
124 u32 cipher;
125 u8 flags;
126 u8 link_id;
127 };
128
129 struct ath12k_skb_rxcb {
130 dma_addr_t paddr;
131 bool is_first_msdu;
132 bool is_last_msdu;
133 bool is_continuation;
134 bool is_mcbc;
135 bool is_eapol;
136 struct hal_rx_desc *rx_desc;
137 u8 err_rel_src;
138 u8 err_code;
139 u8 hw_link_id;
140 u8 unmapped;
141 u8 is_frag;
142 u8 tid;
143 u16 peer_id;
144 };
145
146 enum ath12k_hw_rev {
147 ATH12K_HW_QCN9274_HW10,
148 ATH12K_HW_QCN9274_HW20,
149 ATH12K_HW_WCN7850_HW20
150 };
151
152 enum ath12k_firmware_mode {
153 /* the default mode, standard 802.11 functionality */
154 ATH12K_FIRMWARE_MODE_NORMAL,
155
156 /* factory tests etc */
157 ATH12K_FIRMWARE_MODE_FTM,
158 };
159
160 #define ATH12K_IRQ_NUM_MAX 57
161 #define ATH12K_EXT_IRQ_NUM_MAX 16
162
163 struct ath12k_ext_irq_grp {
164 struct ath12k_base *ab;
165 u32 irqs[ATH12K_EXT_IRQ_NUM_MAX];
166 u32 num_irq;
167 u32 grp_id;
168 u64 timestamp;
169 struct napi_struct napi;
170 struct net_device *napi_ndev;
171 };
172
173 struct ath12k_smbios_bdf {
174 struct dmi_header hdr;
175 u32 padding;
176 u8 bdf_enabled;
177 u8 bdf_ext[];
178 } __packed;
179
180 #define HEHANDLE_CAP_PHYINFO_SIZE 3
181 #define HECAP_PHYINFO_SIZE 9
182 #define HECAP_MACINFO_SIZE 5
183 #define HECAP_TXRX_MCS_NSS_SIZE 2
184 #define HECAP_PPET16_PPET8_MAX_SIZE 25
185
186 #define HE_PPET16_PPET8_SIZE 8
187
188 /* 802.11ax PPE (PPDU packet Extension) threshold */
189 struct he_ppe_threshold {
190 u32 numss_m1;
191 u32 ru_mask;
192 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
193 };
194
195 struct ath12k_he {
196 u8 hecap_macinfo[HECAP_MACINFO_SIZE];
197 u32 hecap_rxmcsnssmap;
198 u32 hecap_txmcsnssmap;
199 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
200 struct he_ppe_threshold hecap_ppet;
201 u32 heop_param;
202 };
203
204 enum {
205 WMI_HOST_TP_SCALE_MAX = 0,
206 WMI_HOST_TP_SCALE_50 = 1,
207 WMI_HOST_TP_SCALE_25 = 2,
208 WMI_HOST_TP_SCALE_12 = 3,
209 WMI_HOST_TP_SCALE_MIN = 4,
210 WMI_HOST_TP_SCALE_SIZE = 5,
211 };
212
213 enum ath12k_scan_state {
214 ATH12K_SCAN_IDLE,
215 ATH12K_SCAN_STARTING,
216 ATH12K_SCAN_RUNNING,
217 ATH12K_SCAN_ABORTING,
218 };
219
220 enum ath12k_hw_group_flags {
221 ATH12K_GROUP_FLAG_REGISTERED,
222 ATH12K_GROUP_FLAG_UNREGISTER,
223 };
224
225 enum ath12k_dev_flags {
226 ATH12K_FLAG_CAC_RUNNING,
227 ATH12K_FLAG_CRASH_FLUSH,
228 ATH12K_FLAG_RAW_MODE,
229 ATH12K_FLAG_HW_CRYPTO_DISABLED,
230 ATH12K_FLAG_RECOVERY,
231 ATH12K_FLAG_UNREGISTERING,
232 ATH12K_FLAG_REGISTERED,
233 ATH12K_FLAG_QMI_FAIL,
234 ATH12K_FLAG_HTC_SUSPEND_COMPLETE,
235 ATH12K_FLAG_CE_IRQ_ENABLED,
236 ATH12K_FLAG_EXT_IRQ_ENABLED,
237 ATH12K_FLAG_QMI_FW_READY_COMPLETE,
238 };
239
240 struct ath12k_tx_conf {
241 bool changed;
242 u16 ac;
243 struct ieee80211_tx_queue_params tx_queue_params;
244 };
245
246 struct ath12k_key_conf {
247 enum set_key_cmd cmd;
248 struct list_head list;
249 struct ieee80211_sta *sta;
250 struct ieee80211_key_conf *key;
251 };
252
253 struct ath12k_vif_cache {
254 struct ath12k_tx_conf tx_conf;
255 struct ath12k_key_conf key_conf;
256 u32 bss_conf_changed;
257 };
258
259 struct ath12k_rekey_data {
260 u8 kck[NL80211_KCK_LEN];
261 u8 kek[NL80211_KCK_LEN];
262 u64 replay_ctr;
263 bool enable_offload;
264 };
265
266 struct ath12k_link_vif {
267 u32 vdev_id;
268 u32 beacon_interval;
269 u32 dtim_period;
270 u16 ast_hash;
271 u16 ast_idx;
272 u16 tcl_metadata;
273 u8 hal_addr_search_flags;
274 u8 search_type;
275
276 struct ath12k *ar;
277
278 int bank_id;
279 u8 vdev_id_check_en;
280
281 struct wmi_wmm_params_all_arg wmm_params;
282 struct list_head list;
283
284 bool is_created;
285 bool is_started;
286 bool is_up;
287 u8 bssid[ETH_ALEN];
288 struct cfg80211_bitrate_mask bitrate_mask;
289 struct delayed_work connection_loss_work;
290 int num_legacy_stations;
291 int rtscts_prot_mode;
292 int txpower;
293 bool rsnie_present;
294 bool wpaie_present;
295 struct ieee80211_chanctx_conf chanctx;
296 u8 vdev_stats_id;
297 u32 punct_bitmap;
298 u8 link_id;
299 struct ath12k_vif *ahvif;
300 struct ath12k_rekey_data rekey_data;
301 };
302
303 struct ath12k_vif {
304 enum wmi_vdev_type vdev_type;
305 enum wmi_vdev_subtype vdev_subtype;
306 struct ieee80211_vif *vif;
307 struct ath12k_hw *ah;
308
309 union {
310 struct {
311 u32 uapsd;
312 } sta;
313 struct {
314 /* 127 stations; wmi limit */
315 u8 tim_bitmap[16];
316 u8 tim_len;
317 u32 ssid_len;
318 u8 ssid[IEEE80211_MAX_SSID_LEN];
319 bool hidden_ssid;
320 /* P2P_IE with NoA attribute for P2P_GO case */
321 u32 noa_len;
322 u8 *noa_data;
323 } ap;
324 } u;
325
326 u32 aid;
327 u32 key_cipher;
328 u8 tx_encap_type;
329 bool ps;
330
331 struct ath12k_link_vif deflink;
332 struct ath12k_link_vif __rcu *link[ATH12K_NUM_MAX_LINKS];
333 struct ath12k_vif_cache *cache[IEEE80211_MLD_MAX_NUM_LINKS];
334 /* indicates bitmap of link vif created in FW */
335 u16 links_map;
336 u8 last_scan_link;
337
338 /* Must be last - ends in a flexible-array member.
339 *
340 * FIXME: Driver should not copy struct ieee80211_chanctx_conf,
341 * especially because it has a flexible array. Find a better way.
342 */
343 struct ieee80211_chanctx_conf chanctx;
344 };
345
346 struct ath12k_vif_iter {
347 u32 vdev_id;
348 struct ath12k *ar;
349 struct ath12k_link_vif *arvif;
350 };
351
352 #define HAL_AST_IDX_INVALID 0xFFFF
353 #define HAL_RX_MAX_MCS 12
354 #define HAL_RX_MAX_MCS_HT 31
355 #define HAL_RX_MAX_MCS_VHT 9
356 #define HAL_RX_MAX_MCS_HE 11
357 #define HAL_RX_MAX_NSS 8
358 #define HAL_RX_MAX_NUM_LEGACY_RATES 12
359 #define ATH12K_RX_RATE_TABLE_11AX_NUM 576
360 #define ATH12K_RX_RATE_TABLE_NUM 320
361
362 struct ath12k_rx_peer_rate_stats {
363 u64 ht_mcs_count[HAL_RX_MAX_MCS_HT + 1];
364 u64 vht_mcs_count[HAL_RX_MAX_MCS_VHT + 1];
365 u64 he_mcs_count[HAL_RX_MAX_MCS_HE + 1];
366 u64 nss_count[HAL_RX_MAX_NSS];
367 u64 bw_count[HAL_RX_BW_MAX];
368 u64 gi_count[HAL_RX_GI_MAX];
369 u64 legacy_count[HAL_RX_MAX_NUM_LEGACY_RATES];
370 u64 rx_rate[ATH12K_RX_RATE_TABLE_11AX_NUM];
371 };
372
373 struct ath12k_rx_peer_stats {
374 u64 num_msdu;
375 u64 num_mpdu_fcs_ok;
376 u64 num_mpdu_fcs_err;
377 u64 tcp_msdu_count;
378 u64 udp_msdu_count;
379 u64 other_msdu_count;
380 u64 ampdu_msdu_count;
381 u64 non_ampdu_msdu_count;
382 u64 stbc_count;
383 u64 beamformed_count;
384 u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
385 u64 tid_count[IEEE80211_NUM_TIDS + 1];
386 u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
387 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
388 u64 rx_duration;
389 u64 dcm_count;
390 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
391 struct ath12k_rx_peer_rate_stats pkt_stats;
392 struct ath12k_rx_peer_rate_stats byte_stats;
393 };
394
395 #define ATH12K_HE_MCS_NUM 12
396 #define ATH12K_VHT_MCS_NUM 10
397 #define ATH12K_BW_NUM 5
398 #define ATH12K_NSS_NUM 4
399 #define ATH12K_LEGACY_NUM 12
400 #define ATH12K_GI_NUM 4
401 #define ATH12K_HT_MCS_NUM 32
402
403 enum ath12k_pkt_rx_err {
404 ATH12K_PKT_RX_ERR_FCS,
405 ATH12K_PKT_RX_ERR_TKIP,
406 ATH12K_PKT_RX_ERR_CRYPT,
407 ATH12K_PKT_RX_ERR_PEER_IDX_INVAL,
408 ATH12K_PKT_RX_ERR_MAX,
409 };
410
411 enum ath12k_ampdu_subfrm_num {
412 ATH12K_AMPDU_SUBFRM_NUM_10,
413 ATH12K_AMPDU_SUBFRM_NUM_20,
414 ATH12K_AMPDU_SUBFRM_NUM_30,
415 ATH12K_AMPDU_SUBFRM_NUM_40,
416 ATH12K_AMPDU_SUBFRM_NUM_50,
417 ATH12K_AMPDU_SUBFRM_NUM_60,
418 ATH12K_AMPDU_SUBFRM_NUM_MORE,
419 ATH12K_AMPDU_SUBFRM_NUM_MAX,
420 };
421
422 enum ath12k_amsdu_subfrm_num {
423 ATH12K_AMSDU_SUBFRM_NUM_1,
424 ATH12K_AMSDU_SUBFRM_NUM_2,
425 ATH12K_AMSDU_SUBFRM_NUM_3,
426 ATH12K_AMSDU_SUBFRM_NUM_4,
427 ATH12K_AMSDU_SUBFRM_NUM_MORE,
428 ATH12K_AMSDU_SUBFRM_NUM_MAX,
429 };
430
431 enum ath12k_counter_type {
432 ATH12K_COUNTER_TYPE_BYTES,
433 ATH12K_COUNTER_TYPE_PKTS,
434 ATH12K_COUNTER_TYPE_MAX,
435 };
436
437 enum ath12k_stats_type {
438 ATH12K_STATS_TYPE_SUCC,
439 ATH12K_STATS_TYPE_FAIL,
440 ATH12K_STATS_TYPE_RETRY,
441 ATH12K_STATS_TYPE_AMPDU,
442 ATH12K_STATS_TYPE_MAX,
443 };
444
445 struct ath12k_htt_data_stats {
446 u64 legacy[ATH12K_COUNTER_TYPE_MAX][ATH12K_LEGACY_NUM];
447 u64 ht[ATH12K_COUNTER_TYPE_MAX][ATH12K_HT_MCS_NUM];
448 u64 vht[ATH12K_COUNTER_TYPE_MAX][ATH12K_VHT_MCS_NUM];
449 u64 he[ATH12K_COUNTER_TYPE_MAX][ATH12K_HE_MCS_NUM];
450 u64 bw[ATH12K_COUNTER_TYPE_MAX][ATH12K_BW_NUM];
451 u64 nss[ATH12K_COUNTER_TYPE_MAX][ATH12K_NSS_NUM];
452 u64 gi[ATH12K_COUNTER_TYPE_MAX][ATH12K_GI_NUM];
453 u64 transmit_type[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RECEPTION_TYPE_MAX];
454 u64 ru_loc[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RU_ALLOC_TYPE_MAX];
455 };
456
457 struct ath12k_htt_tx_stats {
458 struct ath12k_htt_data_stats stats[ATH12K_STATS_TYPE_MAX];
459 u64 tx_duration;
460 u64 ba_fails;
461 u64 ack_fails;
462 u16 ru_start;
463 u16 ru_tones;
464 u32 mu_group[MAX_MU_GROUP_ID];
465 };
466
467 struct ath12k_per_ppdu_tx_stats {
468 u16 succ_pkts;
469 u16 failed_pkts;
470 u16 retry_pkts;
471 u32 succ_bytes;
472 u32 failed_bytes;
473 u32 retry_bytes;
474 };
475
476 struct ath12k_wbm_tx_stats {
477 u64 wbm_tx_comp_stats[HAL_WBM_REL_HTT_TX_COMP_STATUS_MAX];
478 };
479
480 struct ath12k_link_sta {
481 struct ath12k_link_vif *arvif;
482 struct ath12k_sta *ahsta;
483
484 /* link address similar to ieee80211_link_sta */
485 u8 addr[ETH_ALEN];
486
487 /* the following are protected by ar->data_lock */
488 u32 changed; /* IEEE80211_RC_* */
489 u32 bw;
490 u32 nss;
491 u32 smps;
492
493 struct wiphy_work update_wk;
494 struct rate_info txrate;
495 struct rate_info last_txrate;
496 u64 rx_duration;
497 u64 tx_duration;
498 u8 rssi_comb;
499 u8 link_id;
500 struct ath12k_rx_peer_stats *rx_stats;
501 struct ath12k_wbm_tx_stats *wbm_tx_stats;
502 u32 bw_prev;
503
504 /* For now the assoc link will be considered primary */
505 bool is_assoc_link;
506
507 /* for firmware use only */
508 u8 link_idx;
509 };
510
511 struct ath12k_sta {
512 struct ath12k_vif *ahvif;
513 enum hal_pn_type pn_type;
514 struct ath12k_link_sta deflink;
515 struct ath12k_link_sta __rcu *link[IEEE80211_MLD_MAX_NUM_LINKS];
516 /* indicates bitmap of link sta created in FW */
517 u16 links_map;
518 u8 assoc_link_id;
519 u16 ml_peer_id;
520 u8 num_peer;
521
522 enum ieee80211_sta_state state;
523 };
524
525 #define ATH12K_MIN_5G_FREQ 4150
526 #define ATH12K_MIN_6G_FREQ 5925
527 #define ATH12K_MAX_6G_FREQ 7115
528 #define ATH12K_NUM_CHANS 101
529 #define ATH12K_MAX_5G_CHAN 173
530
531 enum ath12k_hw_state {
532 ATH12K_HW_STATE_OFF,
533 ATH12K_HW_STATE_ON,
534 ATH12K_HW_STATE_RESTARTING,
535 ATH12K_HW_STATE_RESTARTED,
536 ATH12K_HW_STATE_WEDGED,
537 /* Add other states as required */
538 };
539
540 /* Antenna noise floor */
541 #define ATH12K_DEFAULT_NOISE_FLOOR -95
542
543 struct ath12k_fw_stats {
544 u32 pdev_id;
545 u32 stats_id;
546 struct list_head pdevs;
547 struct list_head vdevs;
548 struct list_head bcn;
549 };
550
551 struct ath12k_dbg_htt_stats {
552 enum ath12k_dbg_htt_ext_stats_type type;
553 u32 cfg_param[4];
554 u8 reset;
555 struct debug_htt_stats_req *stats_req;
556 };
557
558 struct ath12k_debug {
559 struct dentry *debugfs_pdev;
560 struct dentry *debugfs_pdev_symlink;
561 struct ath12k_dbg_htt_stats htt_stats;
562 };
563
564 struct ath12k_per_peer_tx_stats {
565 u32 succ_bytes;
566 u32 retry_bytes;
567 u32 failed_bytes;
568 u32 duration;
569 u16 succ_pkts;
570 u16 retry_pkts;
571 u16 failed_pkts;
572 u16 ru_start;
573 u16 ru_tones;
574 u8 ba_fails;
575 u8 ppdu_type;
576 u32 mu_grpid;
577 u32 mu_pos;
578 bool is_ampdu;
579 };
580
581 #define ATH12K_FLUSH_TIMEOUT (5 * HZ)
582 #define ATH12K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
583
584 struct ath12k {
585 struct ath12k_base *ab;
586 struct ath12k_pdev *pdev;
587 struct ath12k_hw *ah;
588 struct ath12k_wmi_pdev *wmi;
589 struct ath12k_pdev_dp dp;
590 u8 mac_addr[ETH_ALEN];
591 u32 ht_cap_info;
592 u32 vht_cap_info;
593 struct ath12k_he ar_he;
594 bool supports_6ghz;
595 struct {
596 struct completion started;
597 struct completion completed;
598 struct completion on_channel;
599 struct delayed_work timeout;
600 enum ath12k_scan_state state;
601 bool is_roc;
602 int roc_freq;
603 bool roc_notify;
604 struct wiphy_work vdev_clean_wk;
605 struct ath12k_link_vif *arvif;
606 } scan;
607
608 struct {
609 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
610 struct ieee80211_sband_iftype_data
611 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
612 } mac;
613
614 unsigned long dev_flags;
615 unsigned int filter_flags;
616 u32 min_tx_power;
617 u32 max_tx_power;
618 u32 txpower_limit_2g;
619 u32 txpower_limit_5g;
620 u32 txpower_scale;
621 u32 power_scale;
622 u32 chan_tx_pwr;
623 u32 num_stations;
624 u32 max_num_stations;
625
626 /* protects the radio specific data like debug stats, ppdu_stats_info stats,
627 * vdev_stop_status info, scan data, ath12k_sta info, ath12k_link_vif info,
628 * channel context data, survey info, test mode data.
629 */
630 spinlock_t data_lock;
631
632 struct list_head arvifs;
633 /* should never be NULL; needed for regular htt rx */
634 struct ieee80211_channel *rx_channel;
635
636 /* valid during scan; needed for mgmt rx during scan */
637 struct ieee80211_channel *scan_channel;
638
639 u8 cfg_tx_chainmask;
640 u8 cfg_rx_chainmask;
641 u8 num_rx_chains;
642 u8 num_tx_chains;
643 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
644 u8 pdev_idx;
645 u8 lmac_id;
646 u8 hw_link_id;
647
648 struct completion peer_assoc_done;
649 struct completion peer_delete_done;
650
651 int install_key_status;
652 struct completion install_key_done;
653
654 int last_wmi_vdev_start_status;
655 struct completion vdev_setup_done;
656 struct completion vdev_delete_done;
657
658 int num_peers;
659 int max_num_peers;
660 u32 num_started_vdevs;
661 u32 num_created_vdevs;
662 unsigned long long allocated_vdev_map;
663
664 struct idr txmgmt_idr;
665 /* protects txmgmt_idr data */
666 spinlock_t txmgmt_idr_lock;
667 atomic_t num_pending_mgmt_tx;
668 wait_queue_head_t txmgmt_empty_waitq;
669
670 /* cycle count is reported twice for each visited channel during scan.
671 * access protected by data_lock
672 */
673 u32 survey_last_rx_clear_count;
674 u32 survey_last_cycle_count;
675
676 /* Channel info events are expected to come in pairs without and with
677 * COMPLETE flag set respectively for each channel visit during scan.
678 *
679 * However there are deviations from this rule. This flag is used to
680 * avoid reporting garbage data.
681 */
682 bool ch_info_can_report_survey;
683 struct survey_info survey[ATH12K_NUM_CHANS];
684 struct completion bss_survey_done;
685
686 struct work_struct regd_update_work;
687
688 struct wiphy_work wmi_mgmt_tx_work;
689 struct sk_buff_head wmi_mgmt_tx_queue;
690
691 struct ath12k_wow wow;
692 struct completion target_suspend;
693 bool target_suspend_ack;
694 struct ath12k_per_peer_tx_stats peer_tx_stats;
695 struct list_head ppdu_stats_info;
696 u32 ppdu_stat_list_depth;
697
698 struct ath12k_per_peer_tx_stats cached_stats;
699 u32 last_ppdu_id;
700 u32 cached_ppdu_id;
701 #ifdef CONFIG_ATH12K_DEBUGFS
702 struct ath12k_debug debug;
703 #endif
704
705 bool dfs_block_radar_events;
706 bool monitor_conf_enabled;
707 bool monitor_vdev_created;
708 bool monitor_started;
709 int monitor_vdev_id;
710
711 struct wiphy_radio_freq_range freq_range;
712
713 bool nlo_enabled;
714
715 struct completion mlo_setup_done;
716 u32 mlo_setup_status;
717 };
718
719 struct ath12k_hw {
720 struct ieee80211_hw *hw;
721 struct device *dev;
722
723 /* Protect the write operation of the hardware state ath12k_hw::state
724 * between hardware start<=>reconfigure<=>stop transitions.
725 */
726 struct mutex hw_mutex;
727 enum ath12k_hw_state state;
728 bool regd_updated;
729 bool use_6ghz_regd;
730
731 u8 num_radio;
732
733 DECLARE_BITMAP(free_ml_peer_id_map, ATH12K_MAX_MLO_PEERS);
734
735 /* protected by wiphy_lock() */
736 struct list_head ml_peers;
737
738 /* Keep last */
739 struct ath12k radio[] __aligned(sizeof(void *));
740 };
741
742 struct ath12k_band_cap {
743 u32 phy_id;
744 u32 max_bw_supported;
745 u32 ht_cap_info;
746 u32 he_cap_info[2];
747 u32 he_mcs;
748 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
749 struct ath12k_wmi_ppe_threshold_arg he_ppet;
750 u16 he_6ghz_capa;
751 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE];
752 u32 eht_cap_phy_info[WMI_MAX_EHTCAP_PHY_SIZE];
753 u32 eht_mcs_20_only;
754 u32 eht_mcs_80;
755 u32 eht_mcs_160;
756 u32 eht_mcs_320;
757 struct ath12k_wmi_ppe_threshold_arg eht_ppet;
758 u32 eht_cap_info_internal;
759 };
760
761 struct ath12k_pdev_cap {
762 u32 supported_bands;
763 u32 ampdu_density;
764 u32 vht_cap;
765 u32 vht_mcs;
766 u32 he_mcs;
767 u32 tx_chain_mask;
768 u32 rx_chain_mask;
769 u32 tx_chain_mask_shift;
770 u32 rx_chain_mask_shift;
771 struct ath12k_band_cap band[NUM_NL80211_BANDS];
772 u32 eml_cap;
773 u32 mld_cap;
774 };
775
776 struct mlo_timestamp {
777 u32 info;
778 u32 sync_timestamp_lo_us;
779 u32 sync_timestamp_hi_us;
780 u32 mlo_offset_lo;
781 u32 mlo_offset_hi;
782 u32 mlo_offset_clks;
783 u32 mlo_comp_clks;
784 u32 mlo_comp_timer;
785 };
786
787 struct ath12k_pdev {
788 struct ath12k *ar;
789 u32 pdev_id;
790 u32 hw_link_id;
791 struct ath12k_pdev_cap cap;
792 u8 mac_addr[ETH_ALEN];
793 struct mlo_timestamp timestamp;
794 };
795
796 struct ath12k_fw_pdev {
797 u32 pdev_id;
798 u32 phy_id;
799 u32 supported_bands;
800 };
801
802 struct ath12k_board_data {
803 const struct firmware *fw;
804 const void *data;
805 size_t len;
806 };
807
808 struct ath12k_soc_dp_tx_err_stats {
809 /* TCL Ring Descriptor unavailable */
810 u32 desc_na[DP_TCL_NUM_RING_MAX];
811 /* Other failures during dp_tx due to mem allocation failure
812 * idr unavailable etc.
813 */
814 atomic_t misc_fail;
815 };
816
817 struct ath12k_soc_dp_stats {
818 u32 err_ring_pkts;
819 u32 invalid_rbm;
820 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
821 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
822 u32 hal_reo_error[DP_REO_DST_RING_MAX];
823 struct ath12k_soc_dp_tx_err_stats tx_err;
824 };
825
826 struct ath12k_mlo_memory {
827 struct target_mem_chunk chunk[ATH12K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01];
828 int mlo_mem_size;
829 bool init_done;
830 };
831
832 struct ath12k_hw_link {
833 u8 device_id;
834 u8 pdev_idx;
835 };
836
837 /* Holds info on the group of devices that are registered as a single
838 * wiphy, protected with struct ath12k_hw_group::mutex.
839 */
840 struct ath12k_hw_group {
841 struct list_head list;
842 u8 id;
843 u8 num_devices;
844 u8 num_probed;
845 u8 num_started;
846 unsigned long flags;
847 struct ath12k_base *ab[ATH12K_MAX_SOCS];
848
849 /* protects access to this struct */
850 struct mutex mutex;
851
852 /* Holds information of wiphy (hw) registration.
853 *
854 * In Multi/Single Link Operation case, all pdevs are registered as
855 * a single wiphy. In other (legacy/Non-MLO) cases, each pdev is
856 * registered as separate wiphys.
857 */
858 struct ath12k_hw *ah[ATH12K_GROUP_MAX_RADIO];
859 u8 num_hw;
860 bool mlo_capable;
861 struct device_node *wsi_node[ATH12K_MAX_SOCS];
862 struct ath12k_mlo_memory mlo_mem;
863 struct ath12k_hw_link hw_links[ATH12K_GROUP_MAX_RADIO];
864 bool hw_link_id_init_done;
865 };
866
867 /* Holds WSI info specific to each device, excluding WSI group info */
868 struct ath12k_wsi_info {
869 u32 index;
870 u32 hw_link_id_base;
871 };
872
873 /* Master structure to hold the hw data which may be used in core module */
874 struct ath12k_base {
875 enum ath12k_hw_rev hw_rev;
876 struct platform_device *pdev;
877 struct device *dev;
878 struct ath12k_qmi qmi;
879 struct ath12k_wmi_base wmi_ab;
880 struct completion fw_ready;
881 u8 device_id;
882 int num_radios;
883 /* HW channel counters frequency value in hertz common to all MACs */
884 u32 cc_freq_hz;
885
886 struct ath12k_dump_file_data *dump_data;
887 size_t ath12k_coredump_len;
888 struct work_struct dump_work;
889
890 struct ath12k_htc htc;
891
892 struct ath12k_dp dp;
893
894 void __iomem *mem;
895 unsigned long mem_len;
896
897 struct {
898 enum ath12k_bus bus;
899 const struct ath12k_hif_ops *ops;
900 } hif;
901
902 struct {
903 struct completion wakeup_completed;
904 u32 wmi_conf_rx_decap_mode;
905 } wow;
906
907 struct ath12k_ce ce;
908 struct timer_list rx_replenish_retry;
909 struct ath12k_hal hal;
910 /* To synchronize core_start/core_stop */
911 struct mutex core_lock;
912 /* Protects data like peers */
913 spinlock_t base_lock;
914
915 /* Single pdev device (struct ath12k_hw_params::single_pdev_only):
916 *
917 * Firmware maintains data for all bands but advertises a single
918 * phy to the host which is stored as a single element in this
919 * array.
920 *
921 * Other devices:
922 *
923 * This array will contain as many elements as the number of
924 * radios.
925 */
926 struct ath12k_pdev pdevs[MAX_RADIOS];
927
928 /* struct ath12k_hw_params::single_pdev_only devices use this to
929 * store phy specific data
930 */
931 struct ath12k_fw_pdev fw_pdev[MAX_RADIOS];
932 u8 fw_pdev_count;
933
934 struct ath12k_pdev __rcu *pdevs_active[MAX_RADIOS];
935
936 struct ath12k_wmi_hal_reg_capabilities_ext_arg hal_reg_cap[MAX_RADIOS];
937 unsigned long long free_vdev_map;
938 unsigned long long free_vdev_stats_id_map;
939 struct list_head peers;
940 wait_queue_head_t peer_mapping_wq;
941 u8 mac_addr[ETH_ALEN];
942 bool wmi_ready;
943 u32 wlan_init_status;
944 int irq_num[ATH12K_IRQ_NUM_MAX];
945 struct ath12k_ext_irq_grp ext_irq_grp[ATH12K_EXT_IRQ_GRP_NUM_MAX];
946 struct napi_struct *napi;
947 struct ath12k_wmi_target_cap_arg target_caps;
948 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
949 bool pdevs_macaddr_valid;
950
951 const struct ath12k_hw_params *hw_params;
952
953 const struct firmware *cal_file;
954
955 /* Below regd's are protected by ab->data_lock */
956 /* This is the regd set for every radio
957 * by the firmware during initialization
958 */
959 struct ieee80211_regdomain *default_regd[MAX_RADIOS];
960 /* This regd is set during dynamic country setting
961 * This may or may not be used during the runtime
962 */
963 struct ieee80211_regdomain *new_regd[MAX_RADIOS];
964
965 /* Current DFS Regulatory */
966 enum ath12k_dfs_region dfs_region;
967 struct ath12k_soc_dp_stats soc_stats;
968 #ifdef CONFIG_ATH12K_DEBUGFS
969 struct dentry *debugfs_soc;
970 #endif
971
972 unsigned long dev_flags;
973 struct completion driver_recovery;
974 struct workqueue_struct *workqueue;
975 struct work_struct restart_work;
976 struct workqueue_struct *workqueue_aux;
977 struct work_struct reset_work;
978 atomic_t reset_count;
979 atomic_t recovery_count;
980 bool is_reset;
981 struct completion reset_complete;
982 /* continuous recovery fail count */
983 atomic_t fail_cont_count;
984 unsigned long reset_fail_timeout;
985 struct {
986 /* protected by data_lock */
987 u32 fw_crash_counter;
988 } stats;
989 u32 pktlog_defs_checksum;
990
991 struct ath12k_dbring_cap *db_caps;
992 u32 num_db_cap;
993
994 struct timer_list mon_reap_timer;
995
996 struct completion htc_suspend;
997
998 u64 fw_soc_drop_count;
999 bool static_window_map;
1000
1001 struct work_struct rfkill_work;
1002 /* true means radio is on */
1003 bool rfkill_radio_on;
1004
1005 struct {
1006 enum ath12k_bdf_search bdf_search;
1007 u32 vendor;
1008 u32 device;
1009 u32 subsystem_vendor;
1010 u32 subsystem_device;
1011 } id;
1012
1013 struct {
1014 u32 api_version;
1015
1016 const struct firmware *fw;
1017 const u8 *amss_data;
1018 size_t amss_len;
1019 const u8 *amss_dualmac_data;
1020 size_t amss_dualmac_len;
1021 const u8 *m3_data;
1022 size_t m3_len;
1023
1024 DECLARE_BITMAP(fw_features, ATH12K_FW_FEATURE_COUNT);
1025 } fw;
1026
1027 const struct hal_rx_ops *hal_rx_ops;
1028
1029 /* Denotes the whether MLO is possible within the chip */
1030 bool single_chip_mlo_supp;
1031
1032 struct completion restart_completed;
1033
1034 #ifdef CONFIG_ACPI
1035
1036 struct {
1037 bool started;
1038 u32 func_bit;
1039 bool acpi_tas_enable;
1040 bool acpi_bios_sar_enable;
1041 u8 tas_cfg[ATH12K_ACPI_DSM_TAS_CFG_SIZE];
1042 u8 tas_sar_power_table[ATH12K_ACPI_DSM_TAS_DATA_SIZE];
1043 u8 bios_sar_data[ATH12K_ACPI_DSM_BIOS_SAR_DATA_SIZE];
1044 u8 geo_offset_data[ATH12K_ACPI_DSM_GEO_OFFSET_DATA_SIZE];
1045 u8 cca_data[ATH12K_ACPI_DSM_CCA_DATA_SIZE];
1046 u8 band_edge_power[ATH12K_ACPI_DSM_BAND_EDGE_DATA_SIZE];
1047 } acpi;
1048
1049 #endif /* CONFIG_ACPI */
1050
1051 struct notifier_block panic_nb;
1052
1053 struct ath12k_hw_group *ag;
1054 struct ath12k_wsi_info wsi_info;
1055
1056 /* must be last */
1057 u8 drv_priv[] __aligned(sizeof(void *));
1058 };
1059
1060 struct ath12k_pdev_map {
1061 struct ath12k_base *ab;
1062 u8 pdev_idx;
1063 };
1064
1065 int ath12k_core_qmi_firmware_ready(struct ath12k_base *ab);
1066 int ath12k_core_pre_init(struct ath12k_base *ab);
1067 int ath12k_core_init(struct ath12k_base *ath12k);
1068 void ath12k_core_deinit(struct ath12k_base *ath12k);
1069 struct ath12k_base *ath12k_core_alloc(struct device *dev, size_t priv_size,
1070 enum ath12k_bus bus);
1071 void ath12k_core_free(struct ath12k_base *ath12k);
1072 int ath12k_core_fetch_board_data_api_1(struct ath12k_base *ab,
1073 struct ath12k_board_data *bd,
1074 char *filename);
1075 int ath12k_core_fetch_bdf(struct ath12k_base *ath12k,
1076 struct ath12k_board_data *bd);
1077 void ath12k_core_free_bdf(struct ath12k_base *ab, struct ath12k_board_data *bd);
1078 int ath12k_core_fetch_regdb(struct ath12k_base *ab, struct ath12k_board_data *bd);
1079 int ath12k_core_check_dt(struct ath12k_base *ath12k);
1080 int ath12k_core_check_smbios(struct ath12k_base *ab);
1081 void ath12k_core_halt(struct ath12k *ar);
1082 int ath12k_core_resume_early(struct ath12k_base *ab);
1083 int ath12k_core_resume(struct ath12k_base *ab);
1084 int ath12k_core_suspend(struct ath12k_base *ab);
1085 int ath12k_core_suspend_late(struct ath12k_base *ab);
1086 void ath12k_core_hw_group_unassign(struct ath12k_base *ab);
1087
1088 const struct firmware *ath12k_core_firmware_request(struct ath12k_base *ab,
1089 const char *filename);
1090 u32 ath12k_core_get_max_station_per_radio(struct ath12k_base *ab);
1091 u32 ath12k_core_get_max_peers_per_radio(struct ath12k_base *ab);
1092 u32 ath12k_core_get_max_num_tids(struct ath12k_base *ab);
1093
1094 void ath12k_core_hw_group_set_mlo_capable(struct ath12k_hw_group *ag);
1095
ath12k_scan_state_str(enum ath12k_scan_state state)1096 static inline const char *ath12k_scan_state_str(enum ath12k_scan_state state)
1097 {
1098 switch (state) {
1099 case ATH12K_SCAN_IDLE:
1100 return "idle";
1101 case ATH12K_SCAN_STARTING:
1102 return "starting";
1103 case ATH12K_SCAN_RUNNING:
1104 return "running";
1105 case ATH12K_SCAN_ABORTING:
1106 return "aborting";
1107 }
1108
1109 return "unknown";
1110 }
1111
ATH12K_SKB_CB(struct sk_buff * skb)1112 static inline struct ath12k_skb_cb *ATH12K_SKB_CB(struct sk_buff *skb)
1113 {
1114 BUILD_BUG_ON(sizeof(struct ath12k_skb_cb) >
1115 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
1116 return (struct ath12k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
1117 }
1118
ATH12K_SKB_RXCB(struct sk_buff * skb)1119 static inline struct ath12k_skb_rxcb *ATH12K_SKB_RXCB(struct sk_buff *skb)
1120 {
1121 BUILD_BUG_ON(sizeof(struct ath12k_skb_rxcb) > sizeof(skb->cb));
1122 return (struct ath12k_skb_rxcb *)skb->cb;
1123 }
1124
ath12k_vif_to_ahvif(struct ieee80211_vif * vif)1125 static inline struct ath12k_vif *ath12k_vif_to_ahvif(struct ieee80211_vif *vif)
1126 {
1127 return (struct ath12k_vif *)vif->drv_priv;
1128 }
1129
ath12k_sta_to_ahsta(struct ieee80211_sta * sta)1130 static inline struct ath12k_sta *ath12k_sta_to_ahsta(struct ieee80211_sta *sta)
1131 {
1132 return (struct ath12k_sta *)sta->drv_priv;
1133 }
1134
ath12k_ahsta_to_sta(struct ath12k_sta * ahsta)1135 static inline struct ieee80211_sta *ath12k_ahsta_to_sta(struct ath12k_sta *ahsta)
1136 {
1137 return container_of((void *)ahsta, struct ieee80211_sta, drv_priv);
1138 }
1139
ath12k_ahvif_to_vif(struct ath12k_vif * ahvif)1140 static inline struct ieee80211_vif *ath12k_ahvif_to_vif(struct ath12k_vif *ahvif)
1141 {
1142 return container_of((void *)ahvif, struct ieee80211_vif, drv_priv);
1143 }
1144
ath12k_ab_to_ar(struct ath12k_base * ab,int mac_id)1145 static inline struct ath12k *ath12k_ab_to_ar(struct ath12k_base *ab,
1146 int mac_id)
1147 {
1148 return ab->pdevs[ath12k_hw_mac_id_to_pdev_id(ab->hw_params, mac_id)].ar;
1149 }
1150
ath12k_core_create_firmware_path(struct ath12k_base * ab,const char * filename,void * buf,size_t buf_len)1151 static inline void ath12k_core_create_firmware_path(struct ath12k_base *ab,
1152 const char *filename,
1153 void *buf, size_t buf_len)
1154 {
1155 snprintf(buf, buf_len, "%s/%s/%s", ATH12K_FW_DIR,
1156 ab->hw_params->fw.dir, filename);
1157 }
1158
ath12k_bus_str(enum ath12k_bus bus)1159 static inline const char *ath12k_bus_str(enum ath12k_bus bus)
1160 {
1161 switch (bus) {
1162 case ATH12K_BUS_PCI:
1163 return "pci";
1164 }
1165
1166 return "unknown";
1167 }
1168
ath12k_hw_to_ah(struct ieee80211_hw * hw)1169 static inline struct ath12k_hw *ath12k_hw_to_ah(struct ieee80211_hw *hw)
1170 {
1171 return hw->priv;
1172 }
1173
ath12k_ah_to_ar(struct ath12k_hw * ah,u8 hw_link_id)1174 static inline struct ath12k *ath12k_ah_to_ar(struct ath12k_hw *ah, u8 hw_link_id)
1175 {
1176 if (WARN(hw_link_id >= ah->num_radio,
1177 "bad hw link id %d, so switch to default link\n", hw_link_id))
1178 hw_link_id = 0;
1179
1180 return &ah->radio[hw_link_id];
1181 }
1182
ath12k_ar_to_ah(struct ath12k * ar)1183 static inline struct ath12k_hw *ath12k_ar_to_ah(struct ath12k *ar)
1184 {
1185 return ar->ah;
1186 }
1187
ath12k_ar_to_hw(struct ath12k * ar)1188 static inline struct ieee80211_hw *ath12k_ar_to_hw(struct ath12k *ar)
1189 {
1190 return ar->ah->hw;
1191 }
1192
1193 #define for_each_ar(ah, ar, index) \
1194 for ((index) = 0; ((index) < (ah)->num_radio && \
1195 ((ar) = &(ah)->radio[(index)])); (index)++)
1196
ath12k_ag_to_ah(struct ath12k_hw_group * ag,int idx)1197 static inline struct ath12k_hw *ath12k_ag_to_ah(struct ath12k_hw_group *ag, int idx)
1198 {
1199 return ag->ah[idx];
1200 }
1201
ath12k_ag_set_ah(struct ath12k_hw_group * ag,int idx,struct ath12k_hw * ah)1202 static inline void ath12k_ag_set_ah(struct ath12k_hw_group *ag, int idx,
1203 struct ath12k_hw *ah)
1204 {
1205 ag->ah[idx] = ah;
1206 }
1207
ath12k_ab_to_ag(struct ath12k_base * ab)1208 static inline struct ath12k_hw_group *ath12k_ab_to_ag(struct ath12k_base *ab)
1209 {
1210 return ab->ag;
1211 }
1212
ath12k_core_started(struct ath12k_base * ab)1213 static inline void ath12k_core_started(struct ath12k_base *ab)
1214 {
1215 lockdep_assert_held(&ab->ag->mutex);
1216
1217 ab->ag->num_started++;
1218 }
1219
ath12k_core_stopped(struct ath12k_base * ab)1220 static inline void ath12k_core_stopped(struct ath12k_base *ab)
1221 {
1222 lockdep_assert_held(&ab->ag->mutex);
1223
1224 ab->ag->num_started--;
1225 }
1226
ath12k_ag_to_ab(struct ath12k_hw_group * ag,u8 device_id)1227 static inline struct ath12k_base *ath12k_ag_to_ab(struct ath12k_hw_group *ag,
1228 u8 device_id)
1229 {
1230 return ag->ab[device_id];
1231 }
1232
1233 #endif /* _CORE_H_ */
1234