xref: /aosp_15_r20/external/mesa3d/src/gallium/drivers/nouveau/nvc0/nvc0_video_bsp.c (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /*
2  * Copyright 2011-2013 Maarten Lankhorst
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 
23 #include "nvc0/nvc0_video.h"
24 
25 #if NOUVEAU_VP3_DEBUG_FENCE
dump_comm_bsp(struct comm * comm)26 static void dump_comm_bsp(struct comm *comm)
27 {
28    unsigned idx = comm->bsp_cur_index & 0xf;
29    debug_printf("Cur seq: %x, bsp byte ofs: %x\n", comm->bsp_cur_index, comm->byte_ofs);
30    debug_printf("Status: %08x, pos: %08x\n", comm->status[idx], comm->pos[idx]);
31 }
32 #endif
33 
34 unsigned
nvc0_decoder_bsp_begin(struct nouveau_vp3_decoder * dec,unsigned comm_seq)35 nvc0_decoder_bsp_begin(struct nouveau_vp3_decoder *dec, unsigned comm_seq)
36 {
37    struct nouveau_screen *screen = nouveau_screen(dec->base.context->screen);
38    struct nouveau_bo *bsp_bo = dec->bsp_bo[comm_seq % NOUVEAU_VP3_VIDEO_QDEPTH];
39    unsigned ret = 0;
40 
41    ret = BO_MAP(screen, bsp_bo, NOUVEAU_BO_WR, dec->client);
42    if (ret) {
43       debug_printf("map failed: %i %s\n", ret, strerror(-ret));
44       return -1;
45    }
46 
47    nouveau_vp3_bsp_begin(dec);
48 
49    return 2;
50 }
51 
52 unsigned
nvc0_decoder_bsp_next(struct nouveau_vp3_decoder * dec,unsigned comm_seq,unsigned num_buffers,const void * const * data,const unsigned * num_bytes)53 nvc0_decoder_bsp_next(struct nouveau_vp3_decoder *dec,
54                       unsigned comm_seq, unsigned num_buffers,
55                       const void *const *data, const unsigned *num_bytes)
56 {
57    struct nouveau_screen *screen = nouveau_screen(dec->base.context->screen);
58    struct nouveau_bo *bsp_bo = dec->bsp_bo[comm_seq % NOUVEAU_VP3_VIDEO_QDEPTH];
59    struct nouveau_bo *inter_bo = dec->inter_bo[comm_seq & 1];
60    uint32_t bsp_size = 0;
61    uint32_t i = 0;
62    unsigned ret = 0;
63 
64    bsp_size = dec->bsp_ptr - (char *)bsp_bo->map;
65    for (i = 0; i < num_buffers; i++)
66       bsp_size += num_bytes[i];
67    bsp_size += 256; /* the 4 end markers */
68 
69    if (bsp_size > bsp_bo->size) {
70       union nouveau_bo_config cfg;
71       struct nouveau_bo *tmp_bo = NULL;
72 
73       cfg.nvc0.tile_mode = 0x10;
74       cfg.nvc0.memtype = 0xfe;
75 
76       /* round up to the nearest mb */
77       bsp_size += (1 << 20) - 1;
78       bsp_size &= ~((1 << 20) - 1);
79 
80       ret = nouveau_bo_new(dec->client->device, NOUVEAU_BO_VRAM, 0, bsp_size, &cfg, &tmp_bo);
81       if (ret) {
82          debug_printf("reallocating bsp %u -> %u failed with %i\n",
83                       (unsigned)bsp_bo->size, bsp_size, ret);
84          return -1;
85       }
86 
87       ret = BO_MAP(screen, tmp_bo, NOUVEAU_BO_WR, dec->client);
88       if (ret) {
89          debug_printf("map failed: %i %s\n", ret, strerror(-ret));
90          return -1;
91       }
92 
93       /* Preserve previous buffer. */
94       /* TODO: offload this copy to the GPU, as otherwise we're reading and
95        * writing to VRAM. */
96       memcpy(tmp_bo->map, bsp_bo->map, bsp_bo->size);
97 
98       /* update position to current chunk */
99       dec->bsp_ptr = tmp_bo->map + (dec->bsp_ptr - (char *)bsp_bo->map);
100 
101       nouveau_bo_ref(NULL, &bsp_bo);
102       dec->bsp_bo[comm_seq % NOUVEAU_VP3_VIDEO_QDEPTH] = bsp_bo = tmp_bo;
103    }
104 
105    if (!inter_bo || bsp_bo->size * 4 > inter_bo->size) {
106       union nouveau_bo_config cfg;
107       struct nouveau_bo *tmp_bo = NULL;
108 
109       cfg.nvc0.tile_mode = 0x10;
110       cfg.nvc0.memtype = 0xfe;
111 
112       ret = nouveau_bo_new(dec->client->device, NOUVEAU_BO_VRAM, 0, bsp_bo->size * 4, &cfg, &tmp_bo);
113       if (ret) {
114          debug_printf("reallocating inter %u -> %u failed with %i\n",
115                       inter_bo ? (unsigned)inter_bo->size : 0, (unsigned)bsp_bo->size * 4, ret);
116          return -1;
117       }
118 
119       ret = BO_MAP(screen, tmp_bo, NOUVEAU_BO_WR, dec->client);
120       if (ret) {
121          debug_printf("map failed: %i %s\n", ret, strerror(-ret));
122          return -1;
123       }
124 
125       nouveau_bo_ref(NULL, &inter_bo);
126       dec->inter_bo[comm_seq & 1] = inter_bo = tmp_bo;
127    }
128 
129    nouveau_vp3_bsp_next(dec, num_buffers, data, num_bytes);
130 
131    return 2;
132 }
133 
134 
135 unsigned
nvc0_decoder_bsp_end(struct nouveau_vp3_decoder * dec,union pipe_desc desc,struct nouveau_vp3_video_buffer * target,unsigned comm_seq,unsigned * vp_caps,unsigned * is_ref,struct nouveau_vp3_video_buffer * refs[16])136 nvc0_decoder_bsp_end(struct nouveau_vp3_decoder *dec, union pipe_desc desc,
137                      struct nouveau_vp3_video_buffer *target, unsigned comm_seq,
138                      unsigned *vp_caps, unsigned *is_ref,
139                      struct nouveau_vp3_video_buffer *refs[16])
140 {
141    struct nouveau_pushbuf *push = dec->pushbuf[0];
142    enum pipe_video_format codec = u_reduce_video_profile(dec->base.profile);
143    uint32_t bsp_addr, comm_addr, inter_addr;
144    uint32_t slice_size, bucket_size, ring_size;
145    uint32_t caps;
146    struct nouveau_bo *bsp_bo = dec->bsp_bo[comm_seq % NOUVEAU_VP3_VIDEO_QDEPTH];
147    struct nouveau_bo *inter_bo = dec->inter_bo[comm_seq & 1];
148    struct nouveau_pushbuf_refn bo_refs[] = {
149       { bsp_bo, NOUVEAU_BO_RD | NOUVEAU_BO_VRAM },
150       { inter_bo, NOUVEAU_BO_WR | NOUVEAU_BO_VRAM },
151 #if NOUVEAU_VP3_DEBUG_FENCE
152       { dec->fence_bo, NOUVEAU_BO_WR | NOUVEAU_BO_GART },
153 #endif
154       { dec->bitplane_bo, NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM },
155    };
156    int num_refs = ARRAY_SIZE(bo_refs);
157 
158    if (!dec->bitplane_bo)
159       num_refs--;
160 
161    caps = nouveau_vp3_bsp_end(dec, desc);
162 
163    nouveau_vp3_vp_caps(dec, desc, target, comm_seq, vp_caps, is_ref, refs);
164 
165    PUSH_SPACE_EX(push, 32, num_refs, 0);
166    PUSH_REFN(push, bo_refs, num_refs);
167 
168    bsp_addr = bsp_bo->offset >> 8;
169    inter_addr = inter_bo->offset >> 8;
170 
171 #if NOUVEAU_VP3_DEBUG_FENCE
172    memset(dec->comm, 0, 0x200);
173    comm_addr = (dec->fence_bo->offset + COMM_OFFSET) >> 8;
174 #else
175    comm_addr = bsp_addr + (COMM_OFFSET>>8);
176 #endif
177 
178    BEGIN_NVC0(push, SUBC_BSP(0x700), 5);
179    PUSH_DATA (push, caps); // 700 cmd
180    PUSH_DATA (push, bsp_addr + 1); // 704 strparm_bsp
181    PUSH_DATA (push, bsp_addr + 7); // 708 str addr
182    PUSH_DATA (push, comm_addr); // 70c comm
183    PUSH_DATA (push, comm_seq); // 710 seq
184 
185    if (codec != PIPE_VIDEO_FORMAT_MPEG4_AVC) {
186       u32 bitplane_addr;
187 
188       bitplane_addr = dec->bitplane_bo->offset >> 8;
189 
190       nouveau_vp3_inter_sizes(dec, 1, &slice_size, &bucket_size, &ring_size);
191       BEGIN_NVC0(push, SUBC_BSP(0x400), 6);
192       PUSH_DATA (push, bsp_addr); // 400 picparm addr
193       PUSH_DATA (push, inter_addr); // 404 interparm addr
194       PUSH_DATA (push, inter_addr + slice_size + bucket_size); // 408 interdata addr
195       PUSH_DATA (push, ring_size << 8); // 40c interdata_size
196       PUSH_DATA (push, bitplane_addr); // 410 BITPLANE_DATA
197       PUSH_DATA (push, 0x400); // 414 BITPLANE_DATA_SIZE
198    } else {
199       nouveau_vp3_inter_sizes(dec, desc.h264->slice_count, &slice_size, &bucket_size, &ring_size);
200       BEGIN_NVC0(push, SUBC_BSP(0x400), 8);
201       PUSH_DATA (push, bsp_addr); // 400 picparm addr
202       PUSH_DATA (push, inter_addr); // 404 interparm addr
203       PUSH_DATA (push, slice_size << 8); // 408 interparm size?
204       PUSH_DATA (push, inter_addr + slice_size + bucket_size); // 40c interdata addr
205       PUSH_DATA (push, ring_size << 8); // 410 interdata size
206       PUSH_DATA (push, inter_addr + slice_size); // 414 bucket?
207       PUSH_DATA (push, bucket_size << 8); // 418 bucket size? unshifted..
208       PUSH_DATA (push, 0); // 41c targets
209       // TODO: Double check 414 / 418 with nvidia trace
210    }
211 
212 #if NOUVEAU_VP3_DEBUG_FENCE
213    BEGIN_NVC0(push, SUBC_BSP(0x240), 3);
214    PUSH_DATAh(push, dec->fence_bo->offset);
215    PUSH_DATA (push, dec->fence_bo->offset);
216    PUSH_DATA (push, dec->fence_seq);
217 
218    BEGIN_NVC0(push, SUBC_BSP(0x300), 1);
219    PUSH_DATA (push, 1);
220    PUSH_KICK (push);
221 
222    {
223       unsigned spin = 0;
224       do {
225          usleep(100);
226          if ((spin++ & 0xff) == 0xff) {
227             debug_printf("b%u: %u\n", dec->fence_seq, dec->fence_map[0]);
228             dump_comm_bsp(dec->comm);
229          }
230       } while (dec->fence_seq > dec->fence_map[0]);
231    }
232 
233    dump_comm_bsp(dec->comm);
234    return dec->comm->status[comm_seq & 0xf];
235 #else
236    BEGIN_NVC0(push, SUBC_BSP(0x300), 1);
237    PUSH_DATA (push, 0);
238    PUSH_KICK (push);
239    return 2;
240 #endif
241 }
242