/aosp_15_r20/external/mesa3d/src/freedreno/ir3/ |
H A D | instr-a3xx.h | 38 #define _OPC(cat, opc) (((cat) << NOPC_BITS) | opc) argument 400 #define opc_cat(opc) ((int)((opc) >> NOPC_BITS)) argument 401 #define opc_op(opc) ((unsigned)((opc) & ((1 << NOPC_BITS) - 1))) argument 588 is_sat_compatible(opc_t opc) in is_sat_compatible() 612 is_mad(opc_t opc) in is_mad() 628 is_madsh(opc_t opc) in is_madsh() 640 is_local_atomic(opc_t opc) in is_local_atomic() 661 is_global_a3xx_atomic(opc_t opc) in is_global_a3xx_atomic() 682 is_global_a6xx_atomic(opc_t opc) in is_global_a6xx_atomic() 703 is_bindless_atomic(opc_t opc) in is_bindless_atomic() [all …]
|
H A D | ir3_lower_subgroups.c | 77 binop(struct ir3_block *block, opc_t opc, struct ir3_register *dst, in binop() 94 triop(struct ir3_block *block, opc_t opc, struct ir3_register *dst, in triop() 114 do_reduce(struct ir3_block *block, reduce_op_t opc, in do_reduce() 210 struct ir3_block *fallthrough, unsigned opc, unsigned flags, in link_blocks_branch() 234 struct ir3_block *after_block, unsigned opc, unsigned flags, in create_if()
|
H A D | ir3.c | 611 instr_create(struct ir3_block *block, opc_t opc, int ndst, int nsrc) in instr_create() 668 ir3_instr_create_at(struct ir3_cursor cursor, opc_t opc, int ndst, int nsrc) in ir3_instr_create_at() 679 ir3_build_instr(struct ir3_builder *builder, opc_t opc, int ndst, int nsrc) in ir3_build_instr() 688 ir3_instr_create(struct ir3_block *block, opc_t opc, int ndst, int nsrc) in ir3_instr_create() 694 ir3_instr_create_at_end(struct ir3_block *block, opc_t opc, int ndst, int nsrc) in ir3_instr_create_at_end() 1496 ir3_supports_rpt(struct ir3_compiler *compiler, unsigned opc) in ir3_supports_rpt()
|
H A D | ir3.h | 358 opc_t opc; member 1266 cat3_half_opc(opc_t opc) in cat3_half_opc() 1285 cat3_full_opc(opc_t opc) in cat3_full_opc() 1304 cat4_half_opc(opc_t opc) in cat4_half_opc() 1319 cat4_full_opc(opc_t opc) in cat4_full_opc() 1586 ir3_cat2_int(opc_t opc) in ir3_cat2_int() 1629 ir3_cat2_absneg(opc_t opc) in ir3_cat2_absneg() 1690 ir3_cat3_absneg(opc_t opc) in ir3_cat3_absneg() 1848 ir3_try_swap_signedness(opc_t opc, bool *can_swap) in ir3_try_swap_signedness() 2537 #define __INSTR0(flag, name, opc) \ argument [all …]
|
H A D | disasm-a3xx.c | 134 #define OPC(cat, opc, name) [(opc)] = {#name} argument 404 disasm_a3xx_instr_name(opc_t opc) in disasm_a3xx_instr_name() 542 unsigned opc = (val >> 57) & 0x3; in disasm_instr_cb() local
|
H A D | ir3_cf.c | 71 opc_t opc = conv_src->opc; in all_uses_safe_conv() local
|
H A D | ir3_rpt.c | 94 supports_imm_r(unsigned opc) in supports_imm_r()
|
/aosp_15_r20/external/wpa_supplicant_8/src/crypto/ |
H A D | milenage.c | 36 int milenage_f1(const u8 *opc, const u8 *k, const u8 *_rand, in milenage_f1() 88 int milenage_f2345(const u8 *opc, const u8 *k, const u8 *_rand, in milenage_f2345() 173 void milenage_generate(const u8 *opc, const u8 *amf, const u8 *k, in milenage_generate() 208 int milenage_auts(const u8 *opc, const u8 *k, const u8 *_rand, const u8 *auts, in milenage_auts() 235 int gsm_milenage(const u8 *opc, const u8 *k, const u8 *_rand, u8 *sres, u8 *kc) in gsm_milenage() 270 int milenage_check(const u8 *opc, const u8 *k, const u8 *sqn, const u8 *_rand, in milenage_check()
|
/aosp_15_r20/external/mesa3d/src/gallium/drivers/r600/ |
H A D | r600_isa.c | 546 int opc; in r600_isa_init() local 559 int opc = op->opcode[isa->hw_class]; in r600_isa_init() local 567 int opc = op->opcode[isa->hw_class]; in r600_isa_init() local
|
/aosp_15_r20/external/mesa3d/src/nouveau/codegen/ |
H A D | nv50_ir_emit_nvc0.cpp | 394 CodeEmitterNVC0::emitForm_A(const Instruction *i, uint64_t opc) in emitForm_A() 439 CodeEmitterNVC0::emitForm_B(const Instruction *i, uint64_t opc) in emitForm_B() 468 CodeEmitterNVC0::emitForm_S(const Instruction *i, uint32_t opc, bool pred) in emitForm_S() 1874 uint32_t opc; in emitSTORE() local 1921 uint32_t opc; in emitLOAD() local 2057 uint64_t opc; in emitMOV() local 2265 uint64_t opc; in emitSUCalc() local 2520 uint64_t opc = 0x4; in emitVSHL() local
|
/aosp_15_r20/external/mesa3d/src/freedreno/ir2/ |
H A D | instr-a2xx.h | 203 instr_cf_opc_t opc : 4; member 212 instr_cf_opc_t opc : 4; member 225 instr_cf_opc_t opc : 4; member 234 instr_cf_opc_t opc : 4; member 244 instr_cf_opc_t opc : 4; member 301 instr_fetch_opc_t opc : 5; member 335 instr_fetch_opc_t opc : 5; member 368 instr_fetch_opc_t opc : 5; member
|
H A D | disasm-a2xx.c | 126 #define INSTR(opc, num_srcs) [opc] = {num_srcs, #opc} argument 442 #define INSTR(opc, name, fxn) [opc] = {name, fxn} argument 561 #define INSTR(opc, fxn) [opc] = {#opc, fxn} argument
|
/aosp_15_r20/external/pcre/src/sljit/ |
H A D | sljitNativeLOONGARCH_64.c | 97 #define OPC_I26(opc) ((sljit_ins)(opc) << 26) argument 98 #define OPC_1RI21(opc) ((sljit_ins)(opc) << 26) argument 99 #define OPC_2RI16(opc) ((sljit_ins)(opc) << 26) argument 100 #define OPC_2RI14(opc) ((sljit_ins)(opc) << 24) argument 101 #define OPC_2RI12(opc) ((sljit_ins)(opc) << 22) argument 102 #define OPC_2RI8(opc) ((sljit_ins)(opc) << 18) argument 103 #define OPC_4R(opc) ((sljit_ins)(opc) << 20) argument 104 #define OPC_3R(opc) ((sljit_ins)(opc) << 15) argument 105 #define OPC_2R(opc) ((sljit_ins)(opc) << 10) argument 106 #define OPC_1RI20(opc) ((sljit_ins)(opc) << 25) argument
|
/aosp_15_r20/external/mesa3d/src/gallium/auxiliary/tgsi/ |
H A D | tgsi_info.c | 43 #define OPCODE_GAP(opc) { .opcode = opc }, argument 77 #define OPCODE_GAP(opc) "UNK" #opc, argument
|
/aosp_15_r20/prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ |
D | evntprov.h | 154 …ENT_DESCRIPTOR ev, USHORT Id, UCHAR ver, UCHAR ch, UCHAR lvl, USHORT t, UCHAR opc, ULONGLONG keyw)… in EventDescCreate() 217 FORCEINLINE PEVENT_DESCRIPTOR EventDescSetOpcode (PEVENT_DESCRIPTOR ev, UCHAR opc) { in EventDescSetOpcode()
|
/aosp_15_r20/external/mesa3d/src/panfrost/compiler/valhall/ |
H A D | disasm.py | 286 opc = ins.opcode variable
|
/aosp_15_r20/external/capstone/arch/ARM/ |
H A D | ARMInstPrinter.c | 475 unsigned int opc; in ARM_printInst() local 538 unsigned int opc; in ARM_printInst() local 801 MCOperand *opc = MCInst_getOperand(MI, 0); in ARM_printInst() local 849 unsigned int opc = MCInst_getOpcode(MI); in printOperand() local
|
/aosp_15_r20/external/mesa3d/src/freedreno/afuc/ |
H A D | isa.h | 15 static inline struct afuc_instr *__instruction_create(afuc_opc opc) in __instruction_create()
|
H A D | parser.y | 56 new_instr(afuc_opc opc) in new_instr()
|
H A D | asm.c | 81 next_instr(afuc_opc opc) in next_instr()
|
/aosp_15_r20/external/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMAsmBackend.cpp | 431 unsigned opc = 4; // bits {24-21}. Default to add: 0b0100 in adjustFixupValue() local 446 unsigned opc = 0; in adjustFixupValue() local
|
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMAsmBackend.cpp | 522 unsigned opc = 4; // bits {24-21}. Default to add: 0b0100 in adjustFixupValue() local 537 unsigned opc = 0; in adjustFixupValue() local
|
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMAsmBackend.cpp | 506 unsigned opc = 4; // bits {24-21}. Default to add: 0b0100 in adjustFixupValue() local 521 unsigned opc = 0; in adjustFixupValue() local
|
/aosp_15_r20/external/autotest/client/cros/cellular/ |
H A D | prologix_scpi_driver_test_noautorun.py | 185 def _get_idns_and_verify(self, instruments, opc=False): argument
|
/aosp_15_r20/packages/apps/Gallery2/src/com/android/gallery3d/filtershow/colorpicker/ |
D | ColorSVRectView.java | 183 double opc = mHSVO[3]; in updateDot() local
|