1 /***********************************************************************************************************************
2 * Copyright [2015-2017] Renesas Electronics Corporation and/or its licensors. All Rights Reserved.
3 *
4 * This file is part of Renesas SynergyTM Software Package (SSP)
5 *
6 * The contents of this file (the "contents") are proprietary and confidential to Renesas Electronics Corporation
7 * and/or its licensors ("Renesas") and subject to statutory and contractual protections.
8 *
9 * This file is subject to a Renesas SSP license agreement. Unless otherwise agreed in an SSP license agreement with
10 * Renesas: 1) you may not use, copy, modify, distribute, display, or perform the contents; 2) you may not use any name
11 * or mark of Renesas for advertising or publicity purposes or in connection with your use of the contents; 3) RENESAS
12 * MAKES NO WARRANTY OR REPRESENTATIONS ABOUT THE SUITABILITY OF THE CONTENTS FOR ANY PURPOSE; THE CONTENTS ARE PROVIDED
13 * "AS IS" WITHOUT ANY EXPRESS OR IMPLIED WARRANTY, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
14 * PARTICULAR PURPOSE, AND NON-INFRINGEMENT; AND 4) RENESAS SHALL NOT BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, OR
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17 * included in this file may be subject to different terms.
18 **********************************************************************************************************************/
19 /***********************************************************************************************************************
20 * File Name : bsp_feature.c
21 * Description : Provides query functions for MCU specific features.
22 ***********************************************************************************************************************/
23
24 /***********************************************************************************************************************
25 Includes <System Includes> , "Project Includes"
26 ***********************************************************************************************************************/
27 #include "../all/bsp_feature.h"
28 #include "r_cgc.h"
29
30 #if defined(BSP_MCU_GROUP_S1JA)
31
32 /***********************************************************************************************************************
33 Macro definitions
34 ***********************************************************************************************************************/
35 /** The main oscillator drive value is based upon the oscillator frequency selected in the configuration */
36 #if (BSP_CFG_XTAL_HZ > (9999999))
37 #define CGC_MAINCLOCK_DRIVE (0x00U)
38 #else
39 #define CGC_MAINCLOCK_DRIVE (0x01U)
40 #endif
41
42 /***********************************************************************************************************************
43 Typedef definitions
44 ***********************************************************************************************************************/
45
46 /***********************************************************************************************************************
47 Exported global variables (to be accessed by other files)
48 ***********************************************************************************************************************/
49
50 /***********************************************************************************************************************
51 Private global variables and functions
52 ***********************************************************************************************************************/
53 static const bsp_feature_cgc_t g_cgc_feature =
54 {
55 .hoco_freq_hz = BSP_HOCO_HZ,
56 .main_osc_freq_hz = BSP_CFG_XTAL_HZ,
57 .high_speed_freq_hz = 4000000U, ///< Max ICLK frequency while in Low Voltage Mode
58 .modrv_mask = 0x08U,
59 .modrv_shift = 0x3U,
60 .sodrv_mask = 0x03U,
61 .sodrv_shift = 0x0U,
62 .pll_div_max = CGC_PLL_DIV_1, // No PLL
63 .pll_mul_min = 0xFFU, // No PLL
64 .pll_mul_max = 0x0U, // No PLL
65 .mainclock_drive = CGC_MAINCLOCK_DRIVE,
66 .pll_src_configurable = 0U,
67 .pllccr_type = 0U,
68 .iclk_div = BSP_CFG_ICK_DIV,
69 .has_lcd_clock = 0U,
70 .has_sdram_clock = 0U,
71 .has_usb_clock_div = 0U,
72 .has_pclka = 0U,
73 .has_pclkb = 1U,
74 .has_pclkc = 0U,
75 .has_pclkd = 1U,
76 .has_fclk = 1U,
77 .has_bclk = 0U,
78 .has_sdadc_clock = 1U,
79 .middle_speed_max_freq_hz = 8000000U, ///< This MCU does have Middle Speed Mode, up to 8MHz
80 .low_speed_max_freq_hz = 1000000U, ///< This MCU does have Low Speed Mode, up to 1MHz
81 .low_voltage_max_freq_hz = 4000000U, ///< This MCU does have Low Voltage Mode, up to 4MHz
82 .has_subosc_speed = 1U, ///< This MCU does have Subosc Speed Mode
83 .low_speed_pclk_div_min = 0x04U, ///< Minimum divisor for peripheral clocks when using oscillator stop detect
84 .low_voltage_pclk_div_min = 0x02U, ///< Minimum divisor for peripheral clocks when using oscillator stop detect
85 };
86
R_BSP_FeatureSciGet(bsp_feature_sci_t * p_sci_feature)87 void R_BSP_FeatureSciGet(bsp_feature_sci_t * p_sci_feature)
88 {
89 p_sci_feature->clock = (uint8_t) CGC_SYSTEM_CLOCKS_PCLKB;
90 }
91
R_BSP_FeatureRspiGet(bsp_feature_rspi_t * p_rspi_feature)92 void R_BSP_FeatureRspiGet(bsp_feature_rspi_t * p_rspi_feature)
93 {
94 p_rspi_feature->clock = (uint8_t) CGC_SYSTEM_CLOCKS_PCLKB;
95 p_rspi_feature->has_ssl_level_keep = 0U;
96 p_rspi_feature->swap = 0U;
97 }
98
R_BSP_FeatureLvdGet(bsp_feature_lvd_t * p_lvd_feature)99 void R_BSP_FeatureLvdGet(bsp_feature_lvd_t * p_lvd_feature)
100 {
101 p_lvd_feature->has_digital_filter = 0U;
102 p_lvd_feature->monitor_1_low_threshold = 0x0FU; // LVD_THRESHOLD_MONITOR_1_LEVEL_F, 1.65V (Vdet1_F)
103 p_lvd_feature->monitor_1_hi_threshold = 0x00U; // LVD_THRESHOLD_MONITOR_1_LEVEL_0, 4.29V (Vdet1_0)
104 p_lvd_feature->monitor_2_low_threshold = 0x03U; // LVD_THRESHOLD_MONITOR_2_LEVEL_3, 3.84V (Vdet2_3)
105 p_lvd_feature->monitor_2_hi_threshold = 0x00U; // LVD_THRESHOLD_MONITOR_2_LEVEL_0, 4.29V (Vdet1_0)
106 p_lvd_feature->negation_delay_clock = CGC_CLOCK_LOCO; // LOCO required for LVD signal negation delay after reset
107 }
108
R_BSP_FeatureAcmphsGet(bsp_feature_acmphs_t * p_acmphs_feature)109 void R_BSP_FeatureAcmphsGet(bsp_feature_acmphs_t * p_acmphs_feature)
110 {
111 /* This comes from the Electrical Characteristics in the hardware manual. Can be 1 us if AVCC0 >= 3.3V. Using the
112 * largest minimum in this API. */
113 p_acmphs_feature->min_wait_time_us = 3U;
114 }
115
R_BSP_FeatureAdcGet(bsp_feature_adc_t * p_adc_feature)116 void R_BSP_FeatureAdcGet(bsp_feature_adc_t * p_adc_feature)
117 {
118 p_adc_feature->has_sample_hold_reg = 0U;
119 p_adc_feature->group_b_sensors_allowed = 0U;
120 p_adc_feature->sensors_exclusive = 1U;
121 p_adc_feature->sensor_min_sampling_time = 5000U;
122 p_adc_feature->clock_source = CGC_SYSTEM_CLOCKS_PCLKD;
123 p_adc_feature->tsn_calibration_available = 1U;
124 p_adc_feature->tsn_control_available = 0U;
125 p_adc_feature->tsn_slope = -3650;
126 p_adc_feature->addition_supported = 0U;
127 p_adc_feature->calibration_reg_available = 1U;
128 p_adc_feature->reference_voltage = 1U;
129 }
130
R_BSP_FeatureCanGet(bsp_feature_can_t * p_can_feature)131 void R_BSP_FeatureCanGet(bsp_feature_can_t * p_can_feature)
132 {
133 p_can_feature->mclock_only = 1U;
134 p_can_feature->check_pclkb_ratio = 1U;
135 p_can_feature->clock = CGC_SYSTEM_CLOCKS_ICLK;
136 }
137
R_BSP_FeatureDacGet(bsp_feature_dac_t * p_dac_feature)138 void R_BSP_FeatureDacGet(bsp_feature_dac_t * p_dac_feature)
139 {
140 p_dac_feature->has_davrefcr = 1U;
141 p_dac_feature->has_chargepump = 1U;
142 }
143
R_BSP_FeatureFlashLpGet(bsp_feature_flash_lp * p_flash_lp_feature)144 void R_BSP_FeatureFlashLpGet(bsp_feature_flash_lp * p_flash_lp_feature)
145 {
146 p_flash_lp_feature->flash_clock_src = (uint8_t)CGC_SYSTEM_CLOCKS_FCLK; // S1JA Flash uses FCLK
147 /** S1JA uses 2 macros of 128K and double access for Code Flash. It can therefore access 256K as a single macro
148 * and it's Code Flash memory is effectively organized as 1 macro of 256K each, yielding a total of 256K
149 * Code Flash.
150 */
151 p_flash_lp_feature->flash_cf_macros = 1U; // S1JA has 1 code flash HW macro
152 p_flash_lp_feature->cf_macro_size = 0x40000U; // S1JA uses double access and 1 Code Flash macro of 256K for a total of 256K
153
154 }
155
R_BSP_FeatureCtsuGet(bsp_feature_ctsu_t * p_ctsu_feature)156 void R_BSP_FeatureCtsuGet(bsp_feature_ctsu_t * p_ctsu_feature)
157 {
158 p_ctsu_feature->ctsucr0_mask = 0x17U;
159 p_ctsu_feature->ctsucr1_mask = 0xFFU;
160 p_ctsu_feature->ctsumch0_mask = 0x3FU;
161 p_ctsu_feature->ctsumch1_mask = 0x3FU;
162 p_ctsu_feature->ctsuchac_register_count = 4U;
163 p_ctsu_feature->ctsuchtrc_register_count = 4U;
164 }
165
R_BSP_FeatureIoportGet(bsp_feature_ioport_t * p_ioport_feature)166 void R_BSP_FeatureIoportGet(bsp_feature_ioport_t * p_ioport_feature)
167 {
168 p_ioport_feature->has_ethernet = 0U;
169 p_ioport_feature->has_vbatt_pins = 0U;
170 }
171
R_BSP_FeatureCgcGet(bsp_feature_cgc_t const ** pp_cgc_feature)172 void R_BSP_FeatureCgcGet(bsp_feature_cgc_t const ** pp_cgc_feature)
173 {
174 *pp_cgc_feature = &g_cgc_feature;
175 }
176
R_BSP_FeatureOpampGet(bsp_feature_opamp_t * const p_opamp_feature)177 void R_BSP_FeatureOpampGet(bsp_feature_opamp_t * const p_opamp_feature)
178 {
179 /* This information comes from the Electrical Characteristics chapter of the hardware manual. */
180 p_opamp_feature->min_wait_time_lp_us = 220U;
181 p_opamp_feature->min_wait_time_ms_us = 10U;
182 p_opamp_feature->min_wait_time_hs_us = 4U;
183 }
184
R_BSP_FeatureLPMV2Get(bsp_feature_lpmv2_t * p_lpmv2_feature)185 void R_BSP_FeatureLPMV2Get(bsp_feature_lpmv2_t * p_lpmv2_feature)
186 {
187 p_lpmv2_feature->has_dssby = 0U;
188 }
189 #endif
190