1 /******************************************************************************
2 *
3 * Copyright (C) 2023 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20 #include <string.h>
21 #include "ixheaac_type_def.h"
22 #include "ixheaacd_mps_struct_def.h"
23 #include "ixheaacd_error_codes.h"
24 #include "ixheaacd_bitbuffer.h"
25 #include "ixheaacd_mps_res_rom.h"
26 #include "ixheaacd_mps_aac_struct.h"
27 #include "ixheaacd_mps_res_channel.h"
28 #include "ixheaac_constants.h"
29 #include "ixheaacd_cnst.h"
30 #include "ixheaacd_common_rom.h"
31 #include "ixheaacd_sbrdecsettings.h"
32 #include "ixheaacd_sbr_scale.h"
33 #include "ixheaacd_env_extr_part.h"
34 #include "ixheaacd_sbr_rom.h"
35 #include "ixheaacd_hybrid.h"
36 #include "ixheaacd_ps_dec.h"
37 #include "ixheaacd_mps_polyphase.h"
38 #include "ixheaac_error_standards.h"
39 #include "ixheaacd_config.h"
40 #include "ixheaacd_qmf_dec.h"
41 #include "ixheaacd_mps_dec.h"
42 #include "ixheaacd_mps_interface.h"
43 #include "ixheaacd_mps_macro_def.h"
44 #include "ixheaacd_mps_nlc_dec.h"
45 #include "ixheaacd_mps_bitdec.h"
46 #include "ixheaacd_mps_res_tns.h"
47 #include "ixheaacd_mps_mdct_2_qmf.h"
48 #include "ixheaac_sbr_const.h"
49
50 static const WORD32 ixheaacd_freq_res_table[] = {0, 28, 20, 14, 10, 7, 5, 4};
51
ixheaacd_bound_check(WORD32 var,WORD32 lower_bound,WORD32 upper_bound)52 static WORD32 ixheaacd_bound_check(WORD32 var, WORD32 lower_bound, WORD32 upper_bound) {
53 var = min(var, upper_bound);
54 var = max(var, lower_bound);
55 return var;
56 }
57
ixheaacd_mps_check_index_bounds(WORD32 output_idx_data[][MAX_PARAMETER_SETS][MAX_PARAMETER_BANDS],WORD32 num_parameter_sets,WORD32 start_band,WORD32 stop_band,WORD32 param_type,WORD32 xtt_idx)58 static VOID ixheaacd_mps_check_index_bounds(
59 WORD32 output_idx_data[][MAX_PARAMETER_SETS][MAX_PARAMETER_BANDS],
60 WORD32 num_parameter_sets, WORD32 start_band, WORD32 stop_band,
61 WORD32 param_type, WORD32 xtt_idx) {
62 WORD32 i, band;
63 for (i = 0; i < num_parameter_sets; i++) {
64 for (band = start_band; band < stop_band; band++) {
65 if (param_type == CLD) {
66 output_idx_data[xtt_idx][i][band] =
67 ixheaacd_bound_check(output_idx_data[xtt_idx][i][band], -15, 15);
68 } else if (param_type == ICC) {
69 output_idx_data[xtt_idx][i][band] =
70 ixheaacd_bound_check(output_idx_data[xtt_idx][i][band], 0, 7);
71 }
72 }
73 }
74 }
75
ixheaacd_parse_extension_config(ia_mps_spatial_bs_config_struct * config,WORD32 num_ott_boxes,WORD32 num_ttt_boxes,WORD32 num_out_chan,WORD32 bits_available,ia_bit_buf_struct * it_bit_buff,ia_mps_dec_bitdec_tables_struct * ixheaacd_mps_dec_bitdec_tables)76 static IA_ERRORCODE ixheaacd_parse_extension_config(
77 ia_mps_spatial_bs_config_struct *config, WORD32 num_ott_boxes, WORD32 num_ttt_boxes,
78 WORD32 num_out_chan, WORD32 bits_available, ia_bit_buf_struct *it_bit_buff,
79 ia_mps_dec_bitdec_tables_struct *ixheaacd_mps_dec_bitdec_tables) {
80 WORD32 i, ch, idx, tmp, tmp_open, sac_ext_len, bits_read, n_fill_bits, temp;
81 WORD32 ba = bits_available;
82
83 config->sac_ext_cnt = 0;
84
85 while (ba >= 8) {
86 ba -= 8;
87 temp = ixheaacd_read_bits_buf(it_bit_buff, 8);
88 config->bs_sac_ext_type[config->sac_ext_cnt] = (temp >> 4) & FOUR_BIT_MASK;
89 sac_ext_len = temp & FOUR_BIT_MASK;
90 if (sac_ext_len == 15) {
91 sac_ext_len += ixheaacd_read_bits_buf(it_bit_buff, 8);
92 ba -= 8;
93 if (sac_ext_len == 15 + 255) {
94 sac_ext_len += ixheaacd_read_bits_buf(it_bit_buff, 16);
95 ba -= 16;
96 }
97 }
98
99 tmp = (WORD32)(((it_bit_buff->ptr_read_next - it_bit_buff->ptr_bit_buf_base + 1) << 3) -
100 (it_bit_buff->bit_pos + 1));
101
102 switch (config->bs_sac_ext_type[config->sac_ext_cnt]) {
103 case EXT_TYPE_0:
104 config->bs_residual_coding = 1;
105 temp = ixheaacd_read_bits_buf(it_bit_buff, 6);
106 config->bs_residual_sampling_freq_index = (temp >> 2) & FOUR_BIT_MASK;
107 if (config->bs_residual_sampling_freq_index > MAX_RES_SAMP_FREQ_IDX) {
108 return IA_FATAL_ERROR;
109 }
110 config->bs_residual_frames_per_spatial_frame = temp & TWO_BIT_MASK;
111
112 for (i = 0; i < num_ott_boxes + num_ttt_boxes; i++) {
113 config->bs_residual_present[i] = ixheaacd_read_bits_buf(it_bit_buff, 1);
114 if (config->bs_residual_present[i]) {
115 config->bs_residual_bands[i] = ixheaacd_read_bits_buf(it_bit_buff, 5);
116 if (config->bs_residual_bands[i] > MAX_PARAMETER_BANDS)
117 {
118 return IA_FATAL_ERROR;
119 }
120 }
121 }
122 break;
123
124 case EXT_TYPE_1:
125 config->bs_arbitrary_downmix = 2;
126
127 temp = ixheaacd_read_bits_buf(it_bit_buff, 11);
128 config->bs_arbitrary_downmix_residual_sampling_freq_index = (temp >> 7) & FOUR_BIT_MASK;
129 if (config->bs_arbitrary_downmix_residual_sampling_freq_index > MAX_RES_SAMP_FREQ_IDX) {
130 return IA_FATAL_ERROR;
131 }
132 config->bs_arbitrary_downmix_residual_frames_per_spatial_frame =
133 (temp >> 5) & TWO_BIT_MASK;
134 config->bs_arbitrary_downmix_residual_bands = temp & FIVE_BIT_MASK;
135 if (config->bs_arbitrary_downmix_residual_bands >=
136 ixheaacd_freq_res_table[config->bs_freq_res]) {
137 return IA_FATAL_ERROR;
138 }
139
140 break;
141
142 case EXT_TYPE_2:
143 config->arbitrary_tree = 1;
144 config->num_out_chan_at = 0;
145 config->num_ott_boxes_at = 0;
146 for (ch = 0; ch < num_out_chan; ch++) {
147 tmp_open = 1;
148 idx = 0;
149 while (tmp_open > 0) {
150 config->bs_ott_box_present_at[ch][idx] = ixheaacd_read_bits_buf(it_bit_buff, 1);
151 if (config->bs_ott_box_present_at[ch][idx]) {
152 config->num_ott_boxes_at++;
153 tmp_open++;
154 } else {
155 config->num_out_chan_at++;
156 tmp_open--;
157 }
158 if (config->num_ott_boxes_at >= 56) return IA_FATAL_ERROR;
159 if (config->num_out_chan_at > MAX_OUTPUT_CHANNELS_AT_MPS) return IA_FATAL_ERROR;
160 idx++;
161 if (idx >= MAX_ARBITRARY_TREE_INDEX) return IA_FATAL_ERROR;
162 }
163 }
164
165 for (i = 0; i < config->num_ott_boxes_at; i++) {
166 temp = ixheaacd_read_bits_buf(it_bit_buff, 2);
167 config->bs_ott_default_cld_at[i] = (temp >> 1) & ONE_BIT_MASK;
168 config->bs_ott_mode_lfe_at[i] = temp & ONE_BIT_MASK;
169 if (config->bs_ott_mode_lfe_at[i]) {
170 config->bs_ott_bands_at[i] = ixheaacd_read_bits_buf(it_bit_buff, 5);
171 if (config->bs_ott_bands_at[i] > MAX_PARAMETER_BANDS) return IA_FATAL_ERROR;
172 } else {
173 config->bs_ott_bands_at[i] =
174 ixheaacd_mps_dec_bitdec_tables->freq_res_table[config->bs_freq_res];
175 }
176 }
177
178 for (i = 0; i < config->num_out_chan_at; i++) {
179 config->bs_output_channel_pos_at[i] = ixheaacd_read_bits_buf(it_bit_buff, 5);
180 }
181
182 break;
183
184 default:
185 return IA_XHEAAC_MPS_DEC_EXE_NONFATAL_INVALID_EXTENSION_TYPE;
186 }
187
188 bits_read = (WORD32)(((it_bit_buff->ptr_read_next - it_bit_buff->ptr_bit_buf_base + 1) << 3) -
189 (it_bit_buff->bit_pos + 1) - tmp);
190 n_fill_bits = 8 * sac_ext_len - bits_read;
191
192 while (n_fill_bits > 7) {
193 ixheaacd_read_bits_buf(it_bit_buff, 8);
194 n_fill_bits -= 8;
195 }
196 if (n_fill_bits > 0) {
197 ixheaacd_read_bits_buf(it_bit_buff, n_fill_bits);
198 }
199
200 ba -= 8 * sac_ext_len;
201 config->sac_ext_cnt++;
202 if (config->sac_ext_cnt >= MAX_NUM_EXT_TYPES) {
203 return IA_FATAL_ERROR;
204 }
205 }
206
207 return IA_NO_ERROR;
208 }
209
ixheaacd_parse_specific_config(ia_heaac_mps_state_struct * pstr_mps_state,WORD32 sac_header_len)210 IA_ERRORCODE ixheaacd_parse_specific_config(ia_heaac_mps_state_struct *pstr_mps_state,
211 WORD32 sac_header_len) {
212 IA_ERRORCODE err_code = IA_NO_ERROR;
213 ia_mps_spatial_bs_config_struct *config = &(pstr_mps_state->bs_config);
214 ia_heaac_mps_state_struct *curr_state = pstr_mps_state;
215 const ia_mps_dec_tree_properties_struct *p_tree_property_table =
216 pstr_mps_state->ia_mps_dec_mps_table.bitdec_table_ptr->tree_property_table;
217 ia_bit_buf_struct *mps_bit_buf = pstr_mps_state->ptr_mps_bit_buff;
218
219 WORD32 i, hc, hb, num_header_bits, ott_mode_lfe[MAX_NUM_OTT];
220
221 WORD32 tmp = (WORD32)(((mps_bit_buf->ptr_read_next - mps_bit_buf->ptr_bit_buf_base + 1) << 3) -
222 (mps_bit_buf->bit_pos + 1));
223 WORD32 bits_available = (sac_header_len << 3);
224 WORD32 temp, alignment_bits = 0;
225
226 config->bs_sampling_freq_index = ixheaacd_read_bits_buf(mps_bit_buf, 4);
227 if (config->bs_sampling_freq_index == 15) {
228 config->bs_sampling_frequency = ixheaacd_read_bits_buf(mps_bit_buf, 24);
229 }
230 temp = ixheaacd_read_bits_buf(mps_bit_buf, 14);
231 config->bs_frame_length = (temp >> 7) & SEVEN_BIT_MASK;
232 if (config->bs_frame_length >= (MAX_QMF_BUF_LEN - 1)) {
233 return IA_FATAL_ERROR;
234 }
235 config->bs_freq_res = (temp >> 4) & THREE_BIT_MASK;
236 if (config->bs_freq_res == 0) {
237 return IA_XHEAAC_MPS_DEC_EXE_FATAL_INVALID_PARAMETER_BANDS;
238 }
239 config->bs_tree_config = (temp)&FOUR_BIT_MASK;
240
241 if (config->bs_tree_config >= 7) {
242 return IA_FATAL_ERROR;
243 }
244
245 if (config->bs_tree_config != 15) {
246 curr_state->num_ott_boxes = p_tree_property_table[config->bs_tree_config].num_ott_boxes;
247 curr_state->num_ttt_boxes = p_tree_property_table[config->bs_tree_config].num_ttt_boxes;
248 curr_state->num_input_channels =
249 p_tree_property_table[config->bs_tree_config].num_input_channels;
250 curr_state->num_output_channels =
251 p_tree_property_table[config->bs_tree_config].num_output_channels;
252 for (i = 0; i < MAX_NUM_OTT; i++) {
253 ott_mode_lfe[i] = p_tree_property_table[config->bs_tree_config].ott_mode_lfe[i];
254 }
255 }
256 temp = ixheaacd_read_bits_buf(mps_bit_buf, 19);
257 config->bs_quant_mode = (temp >> 17) & TWO_BIT_MASK;
258 config->bs_one_icc = (temp >> 16) & ONE_BIT_MASK;
259 config->bs_arbitrary_downmix = (temp >> 15) & ONE_BIT_MASK;
260 config->bs_fixed_gain_sur = (temp >> 12) & THREE_BIT_MASK;
261 if (config->bs_fixed_gain_sur >= 5) {
262 return IA_FATAL_ERROR;
263 }
264 config->bs_fixed_gain_lfe = (temp >> 9) & THREE_BIT_MASK;
265
266 if (config->bs_fixed_gain_lfe >= 5) return IA_FATAL_ERROR;
267 config->bs_fixed_gain_dmx = (temp >> 6) & THREE_BIT_MASK;
268 config->bs_matrix_mode = (temp >> 5) & ONE_BIT_MASK;
269 config->bs_temp_shape_config = (temp >> 3) & TWO_BIT_MASK;
270 if (config->bs_temp_shape_config == 3)
271 return IA_FATAL_ERROR;
272
273 config->bs_decorr_config = (temp >> 1) & TWO_BIT_MASK;
274 config->bs_3d_audio_mode = (temp)&ONE_BIT_MASK;
275
276 for (i = 0; i < curr_state->num_ott_boxes; i++) {
277 if (ott_mode_lfe[i]) {
278 config->bs_ott_bands[i] = ixheaacd_read_bits_buf(mps_bit_buf, 5);
279 if (config->bs_ott_bands[i] > MAX_PARAMETER_BANDS) return IA_FATAL_ERROR;
280 }
281 }
282
283 for (i = 0; i < curr_state->num_ttt_boxes; i++) {
284 temp = ixheaacd_read_bits_buf(mps_bit_buf, 4);
285 config->bs_ttt_dual_mode[i] = (temp >> 3) & ONE_BIT_MASK;
286 config->bs_ttt_mode_low[i] = (temp)&THREE_BIT_MASK;
287 if (config->bs_ttt_dual_mode[i]) {
288 temp = ixheaacd_read_bits_buf(mps_bit_buf, 8);
289 config->bs_ttt_mode_high[i] = (temp >> 5) & THREE_BIT_MASK;
290 config->bs_ttt_bands_low[i] = (temp)&FIVE_BIT_MASK;
291 if (config->bs_ttt_bands_low[i] > MAX_PARAMETER_BANDS) return IA_FATAL_ERROR;
292 }
293 }
294
295 if (config->bs_temp_shape_config == 2) {
296 config->bs_env_quant_mode = ixheaacd_read_bits_buf(mps_bit_buf, 1);
297 }
298
299 if (config->bs_3d_audio_mode) {
300 config->bs_3d_audio_hrtf_set = ixheaacd_read_bits_buf(mps_bit_buf, 2);
301 if (config->bs_3d_audio_hrtf_set == 0) {
302 temp = ixheaacd_read_bits_buf(mps_bit_buf, 4);
303 config->bs_hrtf_freq_res = (temp >> 1) & THREE_BIT_MASK;
304 config->bs_hrtf_num_chan = 5;
305 config->bs_hrtf_asymmetric = (temp)&ONE_BIT_MASK;
306
307 config->hrtf_num_band = pstr_mps_state->ia_mps_dec_mps_table.bitdec_table_ptr
308 ->freq_res_table[config->bs_hrtf_freq_res];
309
310 for (hc = 0; hc < config->bs_hrtf_num_chan; hc++) {
311 for (hb = 0; hb < config->hrtf_num_band; hb++) {
312 config->bs_hrtf_level_left[hc][hb] = ixheaacd_read_bits_buf(mps_bit_buf, 6);
313 }
314 for (hb = 0; hb < config->hrtf_num_band; hb++) {
315 config->bs_hrtf_level_right[hc][hb] = config->bs_hrtf_asymmetric
316 ? ixheaacd_read_bits_buf(mps_bit_buf, 6)
317 : config->bs_hrtf_level_left[hc][hb];
318 }
319 config->bs_hrtf_phase[hc] = ixheaacd_read_bits_buf(mps_bit_buf, 1);
320 for (hb = 0; hb < config->hrtf_num_band; hb++) {
321 config->bs_hrtf_phase_lr[hc][hb] =
322 config->bs_hrtf_phase[hc] ? ixheaacd_read_bits_buf(mps_bit_buf, 6) : 0;
323 }
324 }
325 }
326 }
327
328 ixheaacd_byte_align(mps_bit_buf, &alignment_bits);
329
330 num_header_bits =
331 (WORD32)(((mps_bit_buf->ptr_read_next - mps_bit_buf->ptr_bit_buf_base + 1) << 3) -
332 (mps_bit_buf->bit_pos + 1) - tmp);
333 bits_available -= num_header_bits;
334
335 err_code = ixheaacd_parse_extension_config(
336 config, curr_state->num_ott_boxes, curr_state->num_ttt_boxes,
337 curr_state->num_output_channels, bits_available, mps_bit_buf,
338 pstr_mps_state->ia_mps_dec_mps_table.bitdec_table_ptr);
339 if (err_code != IA_NO_ERROR) return err_code;
340
341 return IA_NO_ERROR;
342 }
343
ixheaacd_default_specific_config(ia_heaac_mps_state_struct * pstr_mps_state,WORD32 sampling_freq)344 IA_ERRORCODE ixheaacd_default_specific_config(ia_heaac_mps_state_struct *pstr_mps_state,
345 WORD32 sampling_freq) {
346 ia_mps_spatial_bs_config_struct *config = &(pstr_mps_state->bs_config);
347 ia_heaac_mps_state_struct *curr_state = pstr_mps_state;
348 const ia_mps_dec_tree_properties_struct *p_tree_property_table =
349 pstr_mps_state->ia_mps_dec_mps_table.bitdec_table_ptr->tree_property_table;
350 WORD32 i, ott_mode_lfe[MAX_NUM_OTT];
351
352 config->bs_sampling_freq_index = 15;
353 for (i = 0; i < 15; i++) {
354 if (sampling_freq ==
355 pstr_mps_state->ia_mps_dec_mps_table.bitdec_table_ptr->sampling_freq_table[i]) {
356 config->bs_sampling_freq_index = i;
357 }
358 }
359 if (config->bs_sampling_freq_index == 15) {
360 config->bs_sampling_frequency = sampling_freq;
361 }
362 config->bs_frame_length = 31;
363 config->bs_freq_res = 1;
364 config->bs_tree_config = 2;
365 if (config->bs_tree_config > 5) return IA_XHEAAC_MPS_DEC_EXE_FATAL_UNSUPPRORTED_TREE_CONFIG;
366 if (config->bs_tree_config != 15) {
367 curr_state->num_ott_boxes = p_tree_property_table[config->bs_tree_config].num_ott_boxes;
368 curr_state->num_ttt_boxes = p_tree_property_table[config->bs_tree_config].num_ttt_boxes;
369 curr_state->num_input_channels =
370 p_tree_property_table[config->bs_tree_config].num_input_channels;
371 curr_state->num_output_channels =
372 p_tree_property_table[config->bs_tree_config].num_output_channels;
373 memcpy(ott_mode_lfe, p_tree_property_table[config->bs_tree_config].ott_mode_lfe,
374 MAX_NUM_OTT * sizeof(ott_mode_lfe[0]));
375 }
376 config->bs_quant_mode = 0;
377 config->bs_one_icc = 0;
378 config->bs_arbitrary_downmix = 0;
379 config->bs_residual_coding = 0;
380 config->bs_smooth_config = 0;
381 config->bs_fixed_gain_sur = 2;
382 config->bs_fixed_gain_lfe = 1;
383 config->bs_fixed_gain_dmx = 0;
384 config->bs_matrix_mode = 1;
385 config->bs_temp_shape_config = 0;
386 config->bs_decorr_config = 0;
387 if (config->bs_tree_config == 15) {
388 return IA_XHEAAC_MPS_DEC_EXE_FATAL_UNSUPPRORTED_TREE_CONFIG;
389 }
390 for (i = 0; i < curr_state->num_ott_boxes; i++) {
391 if (ott_mode_lfe[i]) {
392 config->bs_ott_bands[i] = 28;
393 }
394 }
395 for (i = 0; i < curr_state->num_ttt_boxes; i++) {
396 config->bs_ttt_dual_mode[i] = 0;
397 config->bs_ttt_mode_low[i] = 1;
398 if (config->bs_ttt_dual_mode[i]) {
399 config->bs_ttt_mode_high[i] = 1;
400 config->bs_ttt_bands_low[i] = 28;
401 }
402 }
403 return IA_NO_ERROR;
404 }
405
ixheaacd_coarse_2_fine(WORD32 * data,WORD32 data_type,WORD32 start_band,WORD32 num_bands)406 static VOID ixheaacd_coarse_2_fine(WORD32 *data, WORD32 data_type, WORD32 start_band,
407 WORD32 num_bands) {
408 WORD32 i;
409
410 for (i = start_band; i < start_band + num_bands; i++) {
411 data[i] <<= 1;
412 }
413
414 if (data_type == CLD) {
415 for (i = start_band; i < start_band + num_bands; i++) {
416 if (data[i] == -14)
417 data[i] = -15;
418 else if (data[i] == 14)
419 data[i] = 15;
420 }
421 }
422 }
423
ixheaacd_fine_2_coarse(WORD32 * data,WORD32 start_band,WORD32 num_bands)424 static VOID ixheaacd_fine_2_coarse(WORD32 *data, WORD32 start_band, WORD32 num_bands) {
425 WORD32 i;
426
427 for (i = start_band; i < start_band + num_bands; i++) {
428 data[i] >>= 1;
429 }
430 }
431
ixheaacd_get_stride_map(WORD32 freq_res_stride,WORD32 start_band,WORD32 stop_band,WORD32 * a_strides,ia_mps_dec_bitdec_tables_struct * ixheaacd_mps_dec_bitdec_tables)432 static WORD32 ixheaacd_get_stride_map(
433 WORD32 freq_res_stride, WORD32 start_band, WORD32 stop_band, WORD32 *a_strides,
434 ia_mps_dec_bitdec_tables_struct *ixheaacd_mps_dec_bitdec_tables) {
435 WORD32 i, pb, pb_stride, data_bands, str_offset;
436
437 pb_stride = ixheaacd_mps_dec_bitdec_tables->pb_stride_table[freq_res_stride];
438 data_bands = (stop_band - start_band - 1) / pb_stride + 1;
439
440 a_strides[0] = start_band;
441 for (pb = 1; pb <= data_bands; pb++) {
442 a_strides[pb] = a_strides[pb - 1] + pb_stride;
443 }
444 str_offset = 0;
445 while (a_strides[data_bands] > stop_band) {
446 if (str_offset < data_bands) str_offset++;
447 for (i = str_offset; i <= data_bands; i++) {
448 a_strides[i]--;
449 }
450 }
451
452 return data_bands;
453 }
454
ixheaacd_ec_data_dec(ia_heaac_mps_state_struct * pstr_mps_state,ia_mps_dec_lossless_data_struct * ll_data,WORD32 data[][MAX_PARAMETER_SETS][MAX_PARAMETER_BANDS],WORD32 lastdata[][MAX_PARAMETER_BANDS],WORD32 datatype,WORD32 box_idx,WORD32 param_idx,WORD32 start_band,WORD32 stop_band)455 static IA_ERRORCODE ixheaacd_ec_data_dec(ia_heaac_mps_state_struct *pstr_mps_state,
456 ia_mps_dec_lossless_data_struct *ll_data,
457 WORD32 data[][MAX_PARAMETER_SETS][MAX_PARAMETER_BANDS],
458 WORD32 lastdata[][MAX_PARAMETER_BANDS], WORD32 datatype,
459 WORD32 box_idx, WORD32 param_idx, WORD32 start_band,
460 WORD32 stop_band) {
461 IA_ERRORCODE error_code = IA_NO_ERROR;
462 WORD32 i, pb, data_sets, set_idx, bs_data_pair, data_bands, old_quant_coarse_xxx, temp;
463 WORD32 a_strides[MAX_PARAMETER_BANDS + 1] = {0};
464
465 ia_mps_dec_spatial_bs_frame_struct *frame = pstr_mps_state->bs_frame;
466 ia_bit_buf_struct *mps_bit_buf = pstr_mps_state->ptr_mps_bit_buff;
467
468 data_sets = 0;
469 for (i = 0; i < pstr_mps_state->num_parameter_sets; i++) {
470 ll_data->bs_xxx_data_mode[param_idx][i] = ixheaacd_read_bits_buf(mps_bit_buf, 2);
471 if (ll_data->bs_xxx_data_mode[param_idx][i] == 3) {
472 data_sets++;
473 }
474 }
475 set_idx = 0;
476 old_quant_coarse_xxx = ll_data->bs_quant_coarse_xxx_prev[param_idx];
477
478 while (set_idx < data_sets) {
479 temp = ixheaacd_read_bits_buf(mps_bit_buf, 4);
480 bs_data_pair = (temp >> 3) & ONE_BIT_MASK;
481 ll_data->bs_quant_coarse_xxx[param_idx][set_idx] = (temp >> 2) & ONE_BIT_MASK;
482 ll_data->bs_freq_res_stride_xxx[param_idx][set_idx] = temp & TWO_BIT_MASK;
483
484 if (set_idx == 7 && bs_data_pair == 1) {
485 if (pstr_mps_state->ec_flag) {
486 bs_data_pair = 0;
487 } else {
488 return IA_FATAL_ERROR;
489 }
490 }
491
492 if (ll_data->bs_quant_coarse_xxx[param_idx][set_idx] != old_quant_coarse_xxx) {
493 if (old_quant_coarse_xxx) {
494 ixheaacd_coarse_2_fine(lastdata[box_idx], datatype, start_band, stop_band - start_band);
495 } else {
496 ixheaacd_fine_2_coarse(lastdata[box_idx], start_band, stop_band - start_band);
497 }
498 }
499
500 data_bands = ixheaacd_get_stride_map(ll_data->bs_freq_res_stride_xxx[param_idx][set_idx],
501 start_band, stop_band, a_strides,
502 pstr_mps_state->ia_mps_dec_mps_table.bitdec_table_ptr);
503
504 for (pb = 0; pb < data_bands; pb++) {
505 lastdata[box_idx][start_band + pb] = lastdata[box_idx][a_strides[pb]];
506 }
507
508 error_code = ixheaacd_mps_ecdatapairdec(
509 mps_bit_buf, data[box_idx], lastdata[box_idx], datatype, set_idx, start_band, data_bands,
510 bs_data_pair, ll_data->bs_quant_coarse_xxx[param_idx][set_idx],
511 (!frame->bs_independency_flag || (set_idx > 0)), 0, 1, pstr_mps_state->ec_flag);
512 if (error_code != IA_NO_ERROR) return error_code;
513
514 if (datatype == CLD) {
515 WORD32 band;
516 for (i = 0; i < pstr_mps_state->num_parameter_sets; i++) {
517 for (band = start_band; band < stop_band; band++) {
518 if (data[box_idx][i][band] > 15 || data[box_idx][i][band] < -15) {
519 return IA_FATAL_ERROR;
520 }
521 }
522 }
523 } else if (datatype == ICC) {
524 WORD32 band;
525 for (i = 0; i < pstr_mps_state->num_parameter_sets; i++) {
526 for (band = start_band; band < stop_band; band++) {
527 if (data[box_idx][i][band] > 7 || data[box_idx][i][band] < 0) {
528 return IA_FATAL_ERROR;
529 }
530 }
531 }
532 }
533
534 for (pb = 0; pb < data_bands; pb++) {
535 for (i = a_strides[pb]; i < a_strides[pb + 1]; i++) {
536 lastdata[box_idx][i] = data[box_idx][set_idx + bs_data_pair][start_band + pb];
537 }
538 }
539
540 old_quant_coarse_xxx = ll_data->bs_quant_coarse_xxx[param_idx][set_idx];
541
542 if (bs_data_pair) {
543 ll_data->bs_quant_coarse_xxx[param_idx][set_idx + 1] =
544 ll_data->bs_quant_coarse_xxx[param_idx][set_idx];
545 ll_data->bs_freq_res_stride_xxx[param_idx][set_idx + 1] =
546 ll_data->bs_freq_res_stride_xxx[param_idx][set_idx];
547 }
548 set_idx += bs_data_pair + 1;
549 }
550 return error_code;
551 }
552
ixheaacd_parse_arbitrary_downmix_data(ia_heaac_mps_state_struct * pstr_mps_state)553 static IA_ERRORCODE ixheaacd_parse_arbitrary_downmix_data(
554 ia_heaac_mps_state_struct *pstr_mps_state) {
555 ia_mps_dec_spatial_bs_frame_struct *frame = pstr_mps_state->bs_frame;
556 IA_ERRORCODE error_code = IA_NO_ERROR;
557 WORD32 offset = pstr_mps_state->num_ott_boxes + 4 * pstr_mps_state->num_ttt_boxes;
558 WORD32 num_input_channels = pstr_mps_state->num_input_channels;
559 WORD32 bitstream_parameter_bands = pstr_mps_state->bitstream_parameter_bands;
560 WORD32 ch;
561
562 for (ch = 0; ch < num_input_channels; ch++) {
563 error_code = ixheaacd_ec_data_dec(pstr_mps_state, &frame->cld_lossless_data,
564 frame->cmp_arbdmx_gain_idx, frame->cmp_arbdmx_gain_idx_prev,
565 CLD, ch, offset + ch, 0, bitstream_parameter_bands);
566 if (error_code != IA_NO_ERROR) return error_code;
567 }
568 return error_code;
569 }
570
ixheaacd_decode_icc_diff_code(ia_bit_buf_struct * it_bit_buff)571 static WORD32 ixheaacd_decode_icc_diff_code(ia_bit_buf_struct *it_bit_buff) {
572 WORD32 value = 0;
573 WORD32 count = 0;
574 while ((ixheaacd_read_bits_buf(it_bit_buff, 1) == 0) && (count++ < 7)) {
575 value++;
576 }
577
578 return value;
579 }
580
ixheaacd_parse_residual_data(ia_heaac_mps_state_struct * pstr_mps_state)581 static IA_ERRORCODE ixheaacd_parse_residual_data(ia_heaac_mps_state_struct *pstr_mps_state) {
582 WORD32 ich, ch;
583 WORD32 rfpsf;
584 WORD32 ps;
585 WORD32 pb;
586
587 ia_mps_dec_residual_aac_tables_struct *aac_tables_ptr =
588 pstr_mps_state->ia_mps_dec_mps_table.aac_tab;
589 WORD32 i;
590
591 ia_mps_dec_spatial_bs_frame_struct *frame = pstr_mps_state->bs_frame;
592 ia_mps_spatial_bs_config_struct *config = &(pstr_mps_state->bs_config);
593
594 WORD32 num_ott_boxes = pstr_mps_state->num_ott_boxes;
595 WORD32 num_parameter_sets = pstr_mps_state->num_parameter_sets;
596 WORD32 residual_frames_per_spatial_frame = pstr_mps_state->residual_frames_per_spatial_frame;
597 WORD32 upd_qmf = pstr_mps_state->upd_qmf;
598
599 WORD32 loop_counter = num_ott_boxes + pstr_mps_state->num_ttt_boxes;
600 WORD32 *p_mdct_res;
601
602 WORD32 *p_res_mdct = pstr_mps_state->array_struct->res_mdct;
603 ia_bit_buf_struct *mps_bit_buf = pstr_mps_state->ptr_mps_bit_buff;
604 WORD16 error_code = IA_NO_ERROR;
605
606 for (ich = 0; ich < loop_counter; ich++) {
607 ch = ich;
608
609 p_mdct_res = p_res_mdct;
610 if (config->bs_residual_bands[ch] > 0) {
611 if (ch < num_ott_boxes) {
612 for (ps = 0; ps < num_parameter_sets; ps++) {
613 frame->res_data.bs_icc_diff_present[ch][ps] = ixheaacd_read_bits_buf(mps_bit_buf, 1);
614 if (frame->res_data.bs_icc_diff_present[ch][ps]) {
615 for (pb = 0; pb < config->bs_residual_bands[ch]; pb++) {
616 frame->res_data.bs_icc_diff[ch][ps][pb] =
617 ixheaacd_decode_icc_diff_code(mps_bit_buf);
618 frame->ott_icc_diff_idx[ch][ps][pb] = frame->res_data.bs_icc_diff[ch][ps][pb];
619 }
620 }
621 }
622 }
623 p_mdct_res = p_res_mdct;
624 for (rfpsf = 0; rfpsf < residual_frames_per_spatial_frame; rfpsf++) {
625 error_code =
626 ixheaacd_res_read_ics(mps_bit_buf, pstr_mps_state->p_aac_decoder_channel_info, 1,
627 aac_tables_ptr, pstr_mps_state->tot_sf_bands_ls);
628 if (error_code) {
629 if (pstr_mps_state->ec_flag) {
630 pstr_mps_state->frame_ok = 0;
631 } else
632 return error_code;
633 }
634 if (1 == pstr_mps_state->p_aac_decoder_channel_info[0]->tns_data.tns_data_present)
635 ixheaacd_res_ctns_apply(
636 pstr_mps_state->p_aac_decoder_channel_info[0],
637 pstr_mps_state->p_aac_decoder_channel_info[0]->ics_info.max_sf_bands,
638 aac_tables_ptr);
639 pstr_mps_state->res_block_type[ch][rfpsf] =
640 pstr_mps_state->p_aac_decoder_channel_info[0]->ics_info.window_sequence;
641 for (i = 0; i < AAC_FRAME_LENGTH; i++) {
642 *p_mdct_res++ =
643 (pstr_mps_state->p_aac_decoder_channel_info[0]->p_spectral_coefficient[i]);
644 }
645
646 if ((pstr_mps_state->p_aac_decoder_channel_info[0]->ics_info.window_sequence ==
647 EIGHT_SHORT_SEQUENCE) &&
648 ((upd_qmf == UPD_QMF_18) || (upd_qmf == UPD_QMF_24) || (upd_qmf == UPD_QMF_30))) {
649 error_code =
650 ixheaacd_res_read_ics(mps_bit_buf, pstr_mps_state->p_aac_decoder_channel_info, 1,
651 aac_tables_ptr, pstr_mps_state->tot_sf_bands_ls);
652 if (error_code) {
653 if (pstr_mps_state->ec_flag) {
654 pstr_mps_state->frame_ok = 0;
655 } else
656 return error_code;
657 }
658 if (1 == pstr_mps_state->p_aac_decoder_channel_info[0]->tns_data.tns_data_present)
659 ixheaacd_res_ctns_apply(
660 pstr_mps_state->p_aac_decoder_channel_info[0],
661 pstr_mps_state->p_aac_decoder_channel_info[0]->ics_info.max_sf_bands,
662 aac_tables_ptr);
663 for (i = 0; i < AAC_FRAME_LENGTH; i++) {
664 *p_mdct_res++ =
665 (pstr_mps_state->p_aac_decoder_channel_info[0]->p_spectral_coefficient[i]);
666 }
667 }
668 }
669 }
670
671 p_res_mdct += RFX2XMDCTCOEF;
672 }
673 return IA_NO_ERROR;
674 }
675
ixheaacd_parse_extension_frame(ia_heaac_mps_state_struct * pstr_mps_state)676 static IA_ERRORCODE ixheaacd_parse_extension_frame(ia_heaac_mps_state_struct *pstr_mps_state) {
677 WORD32 i, fr, gr, offset, ch;
678 WORD32 ext_num, sac_ext_type, sac_ext_len, tmp, bits_read, n_fill_bits, temp;
679 WORD32 channel_grouping[MAX_INPUT_CHANNELS_MPS];
680
681 ia_mps_dec_spatial_bs_frame_struct *frame = pstr_mps_state->bs_frame;
682 ia_mps_spatial_bs_config_struct *p_bs_config = &pstr_mps_state->bs_config;
683
684 ia_mps_dec_residual_aac_tables_struct *aac_tables_ptr =
685 pstr_mps_state->ia_mps_dec_mps_table.aac_tab;
686
687 WORD32 arbdmx_upd_qmf = pstr_mps_state->arbdmx_upd_qmf;
688 WORD32 num_ott_boxes = pstr_mps_state->num_ott_boxes;
689 WORD32 num_input_channels = pstr_mps_state->num_input_channels;
690 WORD32 num_ttt_boxes = pstr_mps_state->num_ttt_boxes;
691 WORD32 arbdmx_frames_per_spatial_frame = pstr_mps_state->arbdmx_frames_per_spatial_frame;
692 WORD32 *p_res_mdct, *p_mdct_res;
693
694 WORD32 sfidx;
695 VOID *free_scratch = pstr_mps_state->mps_scratch_mem_v;
696 ia_mps_dec_residual_sfband_info_struct *p_sfband_info_tab = &pstr_mps_state->sfband_info_tab;
697 ia_bit_buf_struct *mps_bit_buf = pstr_mps_state->ptr_mps_bit_buff;
698 IA_ERRORCODE error_code = IA_NO_ERROR;
699
700 for (ch = 0; ch < 2; ch++) {
701 pstr_mps_state->p_aac_decoder_channel_info[ch] = free_scratch;
702 free_scratch =
703 (WORD8 *)free_scratch +
704 IXHEAAC_GET_SIZE_ALIGNED(sizeof(ia_mps_dec_residual_channel_info_struct), BYTE_ALIGN_8);
705 pstr_mps_state->p_aac_decoder_dynamic_data_init[ch] = free_scratch;
706 free_scratch =
707 (WORD8 *)free_scratch +
708 IXHEAAC_GET_SIZE_ALIGNED(sizeof(ia_mps_dec_residual_dynamic_data_struct), BYTE_ALIGN_8);
709 pstr_mps_state->p_aac_decoder_channel_info[ch]->p_scale_factor =
710 pstr_mps_state->p_aac_decoder_dynamic_data_init[ch]->a_scale_factor;
711 pstr_mps_state->p_aac_decoder_channel_info[ch]->p_code_book =
712 pstr_mps_state->p_aac_decoder_dynamic_data_init[ch]->a_code_book;
713 pstr_mps_state->p_aac_decoder_channel_info[ch]->p_spectral_coefficient = free_scratch;
714 free_scratch = (WORD8 *)free_scratch + IXHEAAC_GET_SIZE_ALIGNED(4096, BYTE_ALIGN_8);
715 pstr_mps_state->p_aac_decoder_channel_info[ch]->p_tns_scratch = free_scratch;
716 free_scratch = (WORD8 *)free_scratch + IXHEAAC_GET_SIZE_ALIGNED(4096, BYTE_ALIGN_8);
717 pstr_mps_state->p_aac_decoder_channel_info[ch]->ics_info.frame_length = AAC_FRAME_LENGTH;
718 pstr_mps_state->p_aac_decoder_channel_info[ch]->common_window = 0;
719 }
720 if (pstr_mps_state->arbitrary_downmix == 2)
721 sfidx = p_bs_config->bs_arbitrary_downmix_residual_sampling_freq_index;
722 else
723 sfidx = p_bs_config->bs_residual_sampling_freq_index;
724 {
725 WORD16 *psfb_idx[2];
726 const WORD8 *psfb_width[2];
727 WORD width_idx;
728 WORD32 j;
729
730 pstr_mps_state->p_aac_decoder_channel_info[0]->ics_info.sampling_rate_index = sfidx;
731 psfb_idx[0] = p_sfband_info_tab->sfb_long_idx;
732 psfb_idx[1] = p_sfband_info_tab->sfb_short_idx;
733 psfb_width[0] = aac_tables_ptr->scale_factor_bands_long[sfidx];
734 psfb_width[1] = aac_tables_ptr->scale_factor_bands_short[sfidx];
735
736 for (j = 1; j >= 0; j--) {
737 const WORD8 *ptr_w = psfb_width[j];
738 WORD16 *ptr_i = psfb_idx[j];
739 width_idx = 0;
740 *ptr_i++ = width_idx;
741 do {
742 width_idx += (*ptr_w++);
743 *ptr_i++ = width_idx;
744 } while (*ptr_w != -1);
745
746 pstr_mps_state->tot_sf_bands_ls[j] = (WORD8)(ptr_w - psfb_width[j]);
747 }
748
749 {
750 aac_tables_ptr->sfb_index_long = p_sfband_info_tab->sfb_long_idx;
751 aac_tables_ptr->sfb_index_short = p_sfband_info_tab->sfb_short_idx;
752 aac_tables_ptr->sfb_index_long_width = (WORD8 *)psfb_width[0];
753 aac_tables_ptr->sfb_index_short_width = (WORD8 *)psfb_width[1];
754 }
755 }
756
757 for (ext_num = 0; ext_num < p_bs_config->sac_ext_cnt; ext_num++) {
758 sac_ext_type = p_bs_config->bs_sac_ext_type[ext_num];
759
760 if (sac_ext_type < 12) {
761 sac_ext_len = ixheaacd_read_bits_buf(mps_bit_buf, 8);
762 if (sac_ext_len == 255) {
763 sac_ext_len += ixheaacd_read_bits_buf(mps_bit_buf, 16);
764 }
765
766 tmp = (WORD32)(((mps_bit_buf->ptr_read_next - mps_bit_buf->ptr_bit_buf_base + 1) << 3) -
767 (mps_bit_buf->bit_pos + 1));
768
769 switch (sac_ext_type) {
770 case EXT_TYPE_0:
771 error_code = ixheaacd_parse_residual_data(pstr_mps_state);
772 if (error_code) {
773 if (pstr_mps_state->ec_flag) {
774 pstr_mps_state->frame_ok = 0;
775 } else
776 return error_code;
777 }
778 break;
779
780 case EXT_TYPE_1:
781 switch (num_input_channels) {
782 case IN_CH_1:
783 channel_grouping[0] = 1;
784 break;
785 case IN_CH_2:
786 channel_grouping[0] = 2;
787 break;
788 case IN_CH_6:
789 channel_grouping[0] = 2;
790 channel_grouping[1] = 2;
791 channel_grouping[2] = 2;
792 break;
793 default:
794 return IA_XHEAAC_MPS_DEC_EXE_FATAL_INVALID_INPUT_CHANNEL;
795 break;
796 }
797
798 offset = num_ott_boxes + num_ttt_boxes;
799
800 p_res_mdct = pstr_mps_state->array_struct->res_mdct + offset * RFX2XMDCTCOEF;
801
802 for (ch = 0, gr = 0; ch < num_input_channels; ch += channel_grouping[gr++]) {
803 p_mdct_res = p_res_mdct;
804
805 temp = ixheaacd_read_bits_buf(mps_bit_buf, 2);
806 frame->bs_arbitrary_downmix_residual_abs[ch] = (temp >> 1) & ONE_BIT_MASK;
807 frame->bs_arbitrary_downmix_residual_alpha_update_set[ch] = temp & ONE_BIT_MASK;
808
809 if (channel_grouping[gr] == 1) {
810 for (fr = 0; fr < arbdmx_frames_per_spatial_frame; fr++) {
811 error_code =
812 ixheaacd_res_read_ics(mps_bit_buf, pstr_mps_state->p_aac_decoder_channel_info,
813 1, aac_tables_ptr, pstr_mps_state->tot_sf_bands_ls);
814 if (error_code) {
815 if (pstr_mps_state->ec_flag) {
816 pstr_mps_state->frame_ok = 0;
817 } else
818 return error_code;
819 }
820 if (1 == pstr_mps_state->p_aac_decoder_channel_info[0]->tns_data.tns_data_present)
821 ixheaacd_res_ctns_apply(
822 pstr_mps_state->p_aac_decoder_channel_info[0],
823 pstr_mps_state->p_aac_decoder_channel_info[0]->ics_info.max_sf_bands,
824 aac_tables_ptr);
825
826 pstr_mps_state->res_block_type[offset + ch][fr] =
827 pstr_mps_state->p_aac_decoder_channel_info[0]->ics_info.window_sequence;
828 for (i = 0; i < AAC_FRAME_LENGTH; i++) {
829 *p_mdct_res++ =
830 (pstr_mps_state->p_aac_decoder_channel_info[0]->p_spectral_coefficient[i]);
831 }
832
833 if ((pstr_mps_state->p_aac_decoder_channel_info[0]->ics_info.window_sequence ==
834 EIGHT_SHORT_SEQUENCE) &&
835 ((arbdmx_upd_qmf == UPD_QMF_18) || (arbdmx_upd_qmf == UPD_QMF_24) ||
836 (arbdmx_upd_qmf == UPD_QMF_30))) {
837 error_code = ixheaacd_res_read_ics(
838 mps_bit_buf, pstr_mps_state->p_aac_decoder_channel_info, 1, aac_tables_ptr,
839 pstr_mps_state->tot_sf_bands_ls);
840 if (error_code) {
841 if (pstr_mps_state->ec_flag) {
842 pstr_mps_state->frame_ok = 0;
843 } else
844 return error_code;
845 }
846 if (1 ==
847 pstr_mps_state->p_aac_decoder_channel_info[0]->tns_data.tns_data_present)
848 ixheaacd_res_ctns_apply(
849 pstr_mps_state->p_aac_decoder_channel_info[0],
850 pstr_mps_state->p_aac_decoder_channel_info[0]->ics_info.max_sf_bands,
851 aac_tables_ptr);
852 for (i = 0; i < AAC_FRAME_LENGTH; i++) {
853 *p_mdct_res++ = (pstr_mps_state->p_aac_decoder_channel_info[0]
854 ->p_spectral_coefficient[i]);
855 }
856 }
857 }
858 p_res_mdct += RFX2XMDCTCOEF;
859 } else {
860 frame->bs_arbitrary_downmix_residual_abs[ch + 1] =
861 frame->bs_arbitrary_downmix_residual_abs[ch];
862 frame->bs_arbitrary_downmix_residual_alpha_update_set[ch + 1] =
863 frame->bs_arbitrary_downmix_residual_alpha_update_set[ch];
864
865 for (fr = 0; fr < arbdmx_frames_per_spatial_frame; fr++) {
866 WORD32 *res_mdct_1 = p_mdct_res + RFX2XMDCTCOEF;
867 WORD32 temp, win1, win2;
868 temp = ixheaacd_read_bits_buf(mps_bit_buf, 4);
869 temp = ixheaacd_read_bits_buf(mps_bit_buf, 1);
870
871 if (temp != 0) {
872 return IA_XHEAAC_MPS_DEC_EXE_FATAL_NONZERO_BIT;
873 }
874
875 error_code =
876 ixheaacd_res_read_ics(mps_bit_buf, pstr_mps_state->p_aac_decoder_channel_info,
877 1, aac_tables_ptr, pstr_mps_state->tot_sf_bands_ls);
878 if (error_code) {
879 if (pstr_mps_state->ec_flag) {
880 pstr_mps_state->frame_ok = 0;
881 } else
882 return error_code;
883 }
884
885 if (1 == pstr_mps_state->p_aac_decoder_channel_info[0]->tns_data.tns_data_present)
886 ixheaacd_res_ctns_apply(
887 pstr_mps_state->p_aac_decoder_channel_info[0],
888 pstr_mps_state->p_aac_decoder_channel_info[0]->ics_info.max_sf_bands,
889 aac_tables_ptr);
890 win1 = pstr_mps_state->p_aac_decoder_channel_info[0]->ics_info.window_sequence;
891 pstr_mps_state->res_block_type[offset + ch][fr] =
892 pstr_mps_state->p_aac_decoder_channel_info[0]->ics_info.window_sequence;
893
894 for (i = 0; i < AAC_FRAME_LENGTH; i++) {
895 *p_mdct_res++ =
896 (pstr_mps_state->p_aac_decoder_channel_info[0]->p_spectral_coefficient[i]);
897 }
898
899 error_code =
900 ixheaacd_res_read_ics(mps_bit_buf, pstr_mps_state->p_aac_decoder_channel_info,
901 1, aac_tables_ptr, pstr_mps_state->tot_sf_bands_ls);
902 if (error_code) {
903 if (pstr_mps_state->ec_flag) {
904 pstr_mps_state->frame_ok = 0;
905 } else
906 return error_code;
907 }
908
909 if (1 == pstr_mps_state->p_aac_decoder_channel_info[0]->tns_data.tns_data_present)
910 ixheaacd_res_ctns_apply(
911 pstr_mps_state->p_aac_decoder_channel_info[0],
912 pstr_mps_state->p_aac_decoder_channel_info[0]->ics_info.max_sf_bands,
913 aac_tables_ptr);
914 win2 = pstr_mps_state->p_aac_decoder_channel_info[0]->ics_info.window_sequence;
915 for (i = 0; i < AAC_FRAME_LENGTH; i++) {
916 *res_mdct_1++ =
917 (pstr_mps_state->p_aac_decoder_channel_info[0]->p_spectral_coefficient[i]);
918 }
919
920 if (win1 != win2) return IA_XHEAAC_MPS_DEC_EXE_FATAL_INVALID_WINDOW_SEQUENCE;
921
922 if ((win1 == EIGHT_SHORT_SEQUENCE) &&
923 ((arbdmx_upd_qmf == UPD_QMF_18) || (arbdmx_upd_qmf == UPD_QMF_24) ||
924 (arbdmx_upd_qmf == UPD_QMF_30))) {
925 temp = ixheaacd_read_bits_buf(mps_bit_buf, 4);
926 temp = ixheaacd_read_bits_buf(mps_bit_buf, 1);
927
928 if (temp != 0) {
929 return IA_XHEAAC_MPS_DEC_EXE_FATAL_NONZERO_BIT;
930 }
931
932 error_code = ixheaacd_res_read_ics(
933 mps_bit_buf, pstr_mps_state->p_aac_decoder_channel_info, 1, aac_tables_ptr,
934 pstr_mps_state->tot_sf_bands_ls);
935 if (error_code) {
936 if (pstr_mps_state->ec_flag) {
937 pstr_mps_state->frame_ok = 0;
938 } else
939 return error_code;
940 }
941
942 if (1 ==
943 pstr_mps_state->p_aac_decoder_channel_info[0]->tns_data.tns_data_present)
944 ixheaacd_res_ctns_apply(
945 pstr_mps_state->p_aac_decoder_channel_info[0],
946 pstr_mps_state->p_aac_decoder_channel_info[0]->ics_info.max_sf_bands,
947 aac_tables_ptr);
948 win1 = pstr_mps_state->p_aac_decoder_channel_info[0]->ics_info.window_sequence;
949
950 for (i = 0; i < AAC_FRAME_LENGTH; i++) {
951 *p_mdct_res++ = (pstr_mps_state->p_aac_decoder_channel_info[0]
952 ->p_spectral_coefficient[i]);
953 }
954
955 error_code = ixheaacd_res_read_ics(
956 mps_bit_buf, pstr_mps_state->p_aac_decoder_channel_info, 1, aac_tables_ptr,
957 pstr_mps_state->tot_sf_bands_ls);
958 if (error_code) {
959 if (pstr_mps_state->ec_flag) {
960 pstr_mps_state->frame_ok = 0;
961 } else
962 return error_code;
963 }
964
965 if (1 ==
966 pstr_mps_state->p_aac_decoder_channel_info[0]->tns_data.tns_data_present)
967 ixheaacd_res_ctns_apply(
968 pstr_mps_state->p_aac_decoder_channel_info[0],
969 pstr_mps_state->p_aac_decoder_channel_info[0]->ics_info.max_sf_bands,
970 aac_tables_ptr);
971 win2 = pstr_mps_state->p_aac_decoder_channel_info[0]->ics_info.window_sequence;
972 for (i = 0; i < AAC_FRAME_LENGTH; i++) {
973 *res_mdct_1++ = (pstr_mps_state->p_aac_decoder_channel_info[0]
974 ->p_spectral_coefficient[i]);
975 }
976
977 if (win1 != win2) return IA_XHEAAC_MPS_DEC_EXE_FATAL_INVALID_WINDOW_SEQUENCE;
978 }
979 }
980 p_res_mdct += RFX2XMDCTCOEF;
981 }
982 }
983
984 break;
985
986 case EXT_TYPE_2:
987 for (i = 0; i < p_bs_config->num_ott_boxes_at; i++) {
988 error_code = ixheaacd_ec_data_dec(pstr_mps_state, &frame->cld_lossless_data,
989 frame->cmp_ott_cld_idx, frame->cmp_ott_cld_idx_prev,
990 CLD, num_ott_boxes + i, num_ott_boxes + i, 0,
991 p_bs_config->bs_ott_bands_at[i]);
992 if (error_code != IA_NO_ERROR) return error_code;
993 }
994
995 break;
996
997 default:
998 return IA_XHEAAC_MPS_DEC_EXE_NONFATAL_INVALID_EXTENSION_TYPE;
999 }
1000
1001 bits_read =
1002 (WORD32)(((mps_bit_buf->ptr_read_next - mps_bit_buf->ptr_bit_buf_base + 1) << 3) -
1003 (mps_bit_buf->bit_pos + 1) - tmp);
1004 n_fill_bits = (sac_ext_len << 3) - bits_read;
1005
1006 while (n_fill_bits > 7) {
1007 ixheaacd_read_bits_buf(mps_bit_buf, 8);
1008 n_fill_bits -= 8;
1009 }
1010 if (n_fill_bits > 0) {
1011 ixheaacd_read_bits_buf(mps_bit_buf, n_fill_bits);
1012 }
1013 }
1014 }
1015 return IA_NO_ERROR;
1016 }
1017
ixheaacd_parse_frame(ia_heaac_mps_state_struct * pstr_mps_state)1018 IA_ERRORCODE ixheaacd_parse_frame(ia_heaac_mps_state_struct *pstr_mps_state) {
1019 ia_mps_spatial_bs_config_struct *p_bs_config = &pstr_mps_state->bs_config;
1020
1021 ia_mps_dec_auxilary_struct *p_aux_struct = pstr_mps_state->aux_struct;
1022 WORD32 i, bs_framing_type, prev_param_slot, data_bands, bs_temp_shape_enable,
1023 num_temp_shape_chan;
1024 WORD32 ttt_off, ps, pg, ts, pb, temp;
1025 WORD32 *bs_env_shape_data = pstr_mps_state->mps_scratch_mem_v;
1026 WORD32 const *reciprocal_tab = pstr_mps_state->ia_mps_dec_mps_table.m1_m2_table_ptr->reciprocal;
1027 WORD32 num_parameter_sets;
1028
1029 ia_mps_dec_spatial_bs_frame_struct *frame = pstr_mps_state->bs_frame;
1030 ia_mps_dec_bitdec_tables_struct *bitdec_table =
1031 pstr_mps_state->ia_mps_dec_mps_table.bitdec_table_ptr;
1032 WORD32 bs_num_output_channels =
1033 bitdec_table->tree_property_table[pstr_mps_state->tree_config].num_output_channels;
1034
1035 WORD32 time_slots = pstr_mps_state->time_slots;
1036 WORD32 bitstream_parameter_bands = pstr_mps_state->bitstream_parameter_bands;
1037 WORD32 *b_ott_bands = pstr_mps_state->bitstream_ott_bands;
1038 WORD32 *param_slot = pstr_mps_state->aux_struct->param_slot;
1039
1040 WORD32 num_ott_boxes = pstr_mps_state->num_ott_boxes;
1041
1042 WORD32 reciprocal, alignment_bits = 0;
1043 ia_bit_buf_struct *mps_bit_buf = pstr_mps_state->ptr_mps_bit_buff;
1044 IA_ERRORCODE error_code = IA_NO_ERROR;
1045
1046 if (pstr_mps_state->parse_next_bitstream_frame == 0) return IA_NO_ERROR;
1047
1048 temp = ixheaacd_read_bits_buf(mps_bit_buf, 4);
1049 bs_framing_type = (temp >> 3) & ONE_BIT_MASK;
1050 num_parameter_sets = (temp & THREE_BIT_MASK) + 1;
1051 pstr_mps_state->num_parameter_sets = num_parameter_sets;
1052
1053 reciprocal = reciprocal_tab[num_parameter_sets - 1];
1054
1055 prev_param_slot = -1;
1056 for (i = 0; i < num_parameter_sets; i++) {
1057 if (bs_framing_type) {
1058 WORD32 bits_param_slot = 0;
1059 while ((1 << bits_param_slot) < (time_slots - num_parameter_sets + i - prev_param_slot))
1060 bits_param_slot++;
1061 param_slot[i] =
1062 bits_param_slot
1063 ? prev_param_slot + 1 + ixheaacd_read_bits_buf(mps_bit_buf, bits_param_slot)
1064 : prev_param_slot + 1;
1065 prev_param_slot = param_slot[i];
1066 } else {
1067 WORD64 temp = (WORD64)(
1068 ((WORD64)((time_slots * (i + 1)) + num_parameter_sets - 1) * (WORD64)reciprocal) >> 28);
1069 param_slot[i] = (WORD32)(temp - 1);
1070 }
1071 }
1072 frame->bs_independency_flag = ixheaacd_read_bits_buf(mps_bit_buf, 1);
1073
1074 for (i = 0; i < num_ott_boxes; i++) {
1075 error_code =
1076 ixheaacd_ec_data_dec(pstr_mps_state, &frame->cld_lossless_data, frame->cmp_ott_cld_idx,
1077 frame->cmp_ott_cld_idx_prev, CLD, i, i, 0, b_ott_bands[i]);
1078 if (error_code != IA_NO_ERROR) return error_code;
1079 }
1080 if (pstr_mps_state->one_icc) {
1081 error_code = ixheaacd_ec_data_dec(pstr_mps_state, &frame->icc_lossless_data,
1082 frame->cmp_ott_icc_idx, frame->cmp_ott_icc_idx_prev, ICC, 0,
1083 0, 0, bitstream_parameter_bands);
1084 if (error_code != IA_NO_ERROR) return error_code;
1085 } else {
1086 for (i = 0; i < num_ott_boxes; i++) {
1087 if (!pstr_mps_state->ott_mode_lfe[i]) {
1088 error_code = ixheaacd_ec_data_dec(pstr_mps_state, &frame->icc_lossless_data,
1089 frame->cmp_ott_icc_idx, frame->cmp_ott_icc_idx_prev,
1090 ICC, i, i, 0, b_ott_bands[i]);
1091 if (error_code != IA_NO_ERROR) return error_code;
1092 }
1093 }
1094 }
1095
1096 ttt_off = num_ott_boxes;
1097 for (i = 0; i < pstr_mps_state->num_ttt_boxes; i++) {
1098 if (p_aux_struct->ttt_config[0][i].mode < 2) {
1099 error_code = ixheaacd_ec_data_dec(pstr_mps_state, &frame->cpc_lossless_data,
1100 frame->cmp_ttt_cpc_1_idx, frame->cmp_ttt_cpc_1_idx_prev,
1101 CPC, i, ttt_off + 4 * i,
1102 p_aux_struct->ttt_config[0][i].bitstream_start_band,
1103 p_aux_struct->ttt_config[0][i].bitstream_stop_band);
1104 if (error_code != IA_NO_ERROR) return error_code;
1105
1106 error_code = ixheaacd_ec_data_dec(pstr_mps_state, &frame->cpc_lossless_data,
1107 frame->cmp_ttt_cpc_2_idx, frame->cmp_ttt_cpc_2_idx_prev,
1108 CPC, i, ttt_off + 4 * i + 1,
1109 p_aux_struct->ttt_config[0][i].bitstream_start_band,
1110 p_aux_struct->ttt_config[0][i].bitstream_stop_band);
1111 if (error_code != IA_NO_ERROR) return error_code;
1112
1113 error_code =
1114 ixheaacd_ec_data_dec(pstr_mps_state, &frame->icc_lossless_data, frame->cmp_ttt_icc_idx,
1115 frame->cmp_ttt_icc_idx_prev, ICC, i, ttt_off + 4 * i,
1116 p_aux_struct->ttt_config[0][i].bitstream_start_band,
1117 p_aux_struct->ttt_config[0][i].bitstream_stop_band);
1118 if (error_code != IA_NO_ERROR) return error_code;
1119 } else {
1120 error_code = ixheaacd_ec_data_dec(pstr_mps_state, &frame->cld_lossless_data,
1121 frame->cmp_ttt_cld_1_idx, frame->cmp_ttt_cld_1_idx_prev,
1122 CLD, i, ttt_off + 4 * i,
1123 p_aux_struct->ttt_config[0][i].bitstream_start_band,
1124 p_aux_struct->ttt_config[0][i].bitstream_stop_band);
1125 if (error_code != IA_NO_ERROR) return error_code;
1126
1127 error_code = ixheaacd_ec_data_dec(pstr_mps_state, &frame->cld_lossless_data,
1128 frame->cmp_ttt_cld_2_idx, frame->cmp_ttt_cld_2_idx_prev,
1129 CLD, i, ttt_off + 4 * i + 1,
1130 p_aux_struct->ttt_config[0][i].bitstream_start_band,
1131 p_aux_struct->ttt_config[0][i].bitstream_stop_band);
1132 if (error_code != IA_NO_ERROR) return error_code;
1133 }
1134
1135 if (p_aux_struct->ttt_config[1][i].bitstream_start_band <
1136 p_aux_struct->ttt_config[1][i].bitstream_stop_band) {
1137 if (p_aux_struct->ttt_config[1][i].mode < 2) {
1138 error_code = ixheaacd_ec_data_dec(pstr_mps_state, &frame->cpc_lossless_data,
1139 frame->cmp_ttt_cpc_1_idx, frame->cmp_ttt_cpc_1_idx_prev,
1140 CPC, i, ttt_off + 4 * i + 2,
1141 p_aux_struct->ttt_config[1][i].bitstream_start_band,
1142 p_aux_struct->ttt_config[1][i].bitstream_stop_band);
1143 if (error_code != IA_NO_ERROR) return error_code;
1144
1145 error_code = ixheaacd_ec_data_dec(pstr_mps_state, &frame->cpc_lossless_data,
1146 frame->cmp_ttt_cpc_2_idx, frame->cmp_ttt_cpc_2_idx_prev,
1147 CPC, i, ttt_off + 4 * i + 3,
1148 p_aux_struct->ttt_config[1][i].bitstream_start_band,
1149 p_aux_struct->ttt_config[1][i].bitstream_stop_band);
1150 if (error_code != IA_NO_ERROR) return error_code;
1151
1152 error_code = ixheaacd_ec_data_dec(pstr_mps_state, &frame->icc_lossless_data,
1153 frame->cmp_ttt_icc_idx, frame->cmp_ttt_icc_idx_prev,
1154 ICC, i, ttt_off + 4 * i + 2,
1155 p_aux_struct->ttt_config[1][i].bitstream_start_band,
1156 p_aux_struct->ttt_config[1][i].bitstream_stop_band);
1157 if (error_code != IA_NO_ERROR) return error_code;
1158 } else {
1159 error_code = ixheaacd_ec_data_dec(pstr_mps_state, &frame->cld_lossless_data,
1160 frame->cmp_ttt_cld_1_idx, frame->cmp_ttt_cld_1_idx_prev,
1161 CLD, i, ttt_off + 4 * i + 2,
1162 p_aux_struct->ttt_config[1][i].bitstream_start_band,
1163 p_aux_struct->ttt_config[1][i].bitstream_stop_band);
1164 if (error_code != IA_NO_ERROR) return error_code;
1165
1166 error_code = ixheaacd_ec_data_dec(pstr_mps_state, &frame->cld_lossless_data,
1167 frame->cmp_ttt_cld_2_idx, frame->cmp_ttt_cld_2_idx_prev,
1168 CLD, i, ttt_off + 4 * i + 3,
1169 p_aux_struct->ttt_config[1][i].bitstream_start_band,
1170 p_aux_struct->ttt_config[1][i].bitstream_stop_band);
1171 if (error_code != IA_NO_ERROR) return error_code;
1172 }
1173 }
1174 }
1175
1176 frame->bs_smooth_control = 1;
1177
1178 if (frame->bs_smooth_control) {
1179 for (ps = 0; ps < num_parameter_sets; ps++) {
1180 frame->bs_smooth_mode[ps] = ixheaacd_read_bits_buf(mps_bit_buf, 2);
1181 if (frame->bs_smooth_mode[ps] > 3 || frame->bs_smooth_mode[ps] < 0) {
1182 return IA_XHEAAC_MPS_DEC_EXE_NONFATAL_INVALID_SMOOTH_MODE;
1183 }
1184 if (frame->bs_smooth_mode[ps] >= 2) {
1185 frame->bs_smooth_time[ps] = ixheaacd_read_bits_buf(mps_bit_buf, 2);
1186 }
1187 if (frame->bs_smooth_mode[ps] == 3) {
1188 frame->bs_freq_res_stride_smg[ps] = ixheaacd_read_bits_buf(mps_bit_buf, 2);
1189 data_bands = (bitstream_parameter_bands - 1) /
1190 bitdec_table->pb_stride_table[frame->bs_freq_res_stride_smg[ps]] +
1191 1;
1192 for (pg = 0; pg < data_bands; pg++) {
1193 frame->bs_smg_data[ps][pg] = ixheaacd_read_bits_buf(mps_bit_buf, 1);
1194 }
1195 }
1196 }
1197 }
1198
1199 for (i = 0; i < bs_num_output_channels; i++) {
1200 p_aux_struct->temp_shape_enable_channel_stp[i] = 0;
1201 p_aux_struct->temp_shape_enable_channel_ges[i] = 0;
1202 }
1203
1204 if (p_bs_config->bs_temp_shape_config != 0) {
1205 bs_temp_shape_enable = ixheaacd_read_bits_buf(mps_bit_buf, 1);
1206 if (bs_temp_shape_enable) {
1207 num_temp_shape_chan =
1208 bitdec_table->temp_shape_chan_table[p_bs_config->bs_temp_shape_config - 1]
1209 [p_bs_config->bs_tree_config];
1210 switch (pstr_mps_state->temp_shape_config) {
1211 case 1:
1212 for (i = 0; i < num_temp_shape_chan; i++) {
1213 p_aux_struct->temp_shape_enable_channel_stp[i] =
1214 ixheaacd_read_bits_buf(mps_bit_buf, 1);
1215 }
1216 break;
1217 case 2:
1218 for (i = 0; i < num_temp_shape_chan; i++) {
1219 p_aux_struct->temp_shape_enable_channel_ges[i] =
1220 ixheaacd_read_bits_buf(mps_bit_buf, 1);
1221 }
1222 for (i = 0; i < num_temp_shape_chan; i++) {
1223 if (p_aux_struct->temp_shape_enable_channel_ges[i]) {
1224 WORD32 const *envshape_data =
1225 &bitdec_table->envshape_data[pstr_mps_state->env_quant_mode][0];
1226 ixheaacd_mps_huff_decode(mps_bit_buf, bs_env_shape_data, time_slots);
1227 for (ts = 0; ts < time_slots; ts++) {
1228 p_aux_struct->env_shape_data[i][ts] = envshape_data[bs_env_shape_data[ts]];
1229 }
1230 }
1231 }
1232 break;
1233 default:
1234 return IA_XHEAAC_MPS_DEC_EXE_FATAL_INVALID_TEMPORAL_SHAPING_CONFIG;
1235 }
1236 }
1237 }
1238
1239 if (pstr_mps_state->up_mix_type == 2) {
1240 for (i = 0; i < bs_num_output_channels; i++) {
1241 p_aux_struct->temp_shape_enable_channel_stp[i] = 0;
1242 p_aux_struct->temp_shape_enable_channel_ges[i] = 0;
1243 }
1244 }
1245
1246 if (pstr_mps_state->arbitrary_downmix != 0) {
1247 ixheaacd_parse_arbitrary_downmix_data(pstr_mps_state);
1248 }
1249
1250 ixheaacd_byte_align(mps_bit_buf, &alignment_bits);
1251 error_code = ixheaacd_parse_extension_frame(pstr_mps_state);
1252 if (error_code) {
1253 if (pstr_mps_state->ec_flag) {
1254 pstr_mps_state->frame_ok = 0;
1255 }
1256 else
1257 return error_code;
1258 }
1259
1260 for (i = 0; i < num_ott_boxes; i++) {
1261 for (ps = 0; ps < num_parameter_sets; ps++) {
1262 if (!frame->res_data.bs_icc_diff_present[i][ps] || (pstr_mps_state->up_mix_type == 2) ||
1263 (pstr_mps_state->up_mix_type == 3)) {
1264 for (pb = 0; pb < bitstream_parameter_bands; pb++) {
1265 pstr_mps_state->bs_frame->ott_icc_diff_idx[i][ps][pb] = 0;
1266 }
1267 }
1268 }
1269 }
1270
1271 pstr_mps_state->parse_next_bitstream_frame = 1;
1272
1273 return IA_NO_ERROR;
1274 }
1275
ixheaacd_create_mapping(WORD32 a_map[MAX_PARAMETER_BANDS+1],WORD32 start_band,WORD32 stop_band,WORD32 stride,VOID * scratch)1276 static VOID ixheaacd_create_mapping(WORD32 a_map[MAX_PARAMETER_BANDS + 1], WORD32 start_band,
1277 WORD32 stop_band, WORD32 stride, VOID *scratch) {
1278 WORD32 in_bands, out_bands, bands_achived, bands_diff, incr, k, i;
1279 WORD32 *v_dk;
1280 in_bands = stop_band - start_band;
1281 out_bands = (in_bands - 1) / stride + 1;
1282 v_dk = scratch;
1283 if (out_bands < 1) {
1284 out_bands = 1;
1285 }
1286
1287 bands_achived = out_bands * stride;
1288 bands_diff = in_bands - bands_achived;
1289 for (i = 0; i < out_bands; i++) {
1290 v_dk[i] = stride;
1291 }
1292
1293 if (bands_diff > 0) {
1294 incr = -1;
1295 k = out_bands - 1;
1296 } else {
1297 incr = 1;
1298 k = 0;
1299 }
1300
1301 while (bands_diff != 0) {
1302 v_dk[k] = v_dk[k] - incr;
1303 k = k + incr;
1304 bands_diff = bands_diff + incr;
1305 if (k >= out_bands) {
1306 if (bands_diff > 0) {
1307 k = out_bands - 1;
1308 } else if (bands_diff < 0) {
1309 k = 0;
1310 }
1311 }
1312 }
1313 a_map[0] = start_band;
1314 for (i = 0; i < out_bands; i++) {
1315 a_map[i + 1] = a_map[i] + v_dk[i];
1316 }
1317 }
1318
ixheaacd_map_frequency(WORD32 * p_input,WORD32 * p_output,WORD32 * p_map,WORD32 data_bands)1319 static VOID ixheaacd_map_frequency(WORD32 *p_input, WORD32 *p_output, WORD32 *p_map,
1320 WORD32 data_bands) {
1321 WORD32 i, j, start_band, stop_band, value;
1322 WORD32 start_band_0 = p_map[0];
1323
1324 for (i = 0; i < data_bands; i++) {
1325 value = p_input[i + start_band_0];
1326
1327 start_band = p_map[i];
1328 stop_band = p_map[i + 1];
1329 for (j = start_band; j < stop_band; j++) {
1330 p_output[j] = value;
1331 }
1332 }
1333 }
1334
ixheaacd_deq_coarse(WORD32 value,WORD32 param_type,WORD32 * dequant,ia_mps_dec_bitdec_tables_struct * ixheaacd_mps_dec_bitdec_tables)1335 static IA_ERRORCODE ixheaacd_deq_coarse(
1336 WORD32 value, WORD32 param_type, WORD32 *dequant,
1337 ia_mps_dec_bitdec_tables_struct *ixheaacd_mps_dec_bitdec_tables) {
1338 switch (param_type) {
1339 case CLD:
1340 if (value >= 8 || value < -7) return IA_FATAL_ERROR;
1341 *dequant = ixheaacd_mps_dec_bitdec_tables->dequant_cld_coarse[value + 7];
1342 break;
1343
1344 case ICC:
1345 if (value >= 8 || value < 0) return IA_FATAL_ERROR;
1346 *dequant = ixheaacd_mps_dec_bitdec_tables->dequant_icc[value];
1347 break;
1348
1349 case CPC:
1350 if (value >= 16 || value < -10) return IA_FATAL_ERROR;
1351 *dequant = ixheaacd_mps_dec_bitdec_tables->dequant_cpc_coarse[value + 10];
1352 break;
1353 default:
1354 return IA_XHEAAC_MPS_DEC_EXE_FATAL_INVALID_DEQUANT_PARAM;
1355 }
1356 return IA_NO_ERROR;
1357 }
1358
ia_mps_dec_deq(WORD32 value,WORD32 param_type,WORD32 * dequant,ia_mps_dec_bitdec_tables_struct * ixheaacd_mps_dec_bitdec_tables)1359 static IA_ERRORCODE ia_mps_dec_deq(
1360 WORD32 value, WORD32 param_type, WORD32 *dequant,
1361 ia_mps_dec_bitdec_tables_struct *ixheaacd_mps_dec_bitdec_tables) {
1362 switch (param_type) {
1363 case CLD:
1364 if (value >= 16 || value < -15) return IA_FATAL_ERROR;
1365 *dequant = ixheaacd_mps_dec_bitdec_tables->dequant_cld[value + 15];
1366 break;
1367
1368 case ICC:
1369 if (value >= 8 || value < 0) return IA_FATAL_ERROR;
1370 *dequant = ixheaacd_mps_dec_bitdec_tables->dequant_icc[value];
1371 break;
1372
1373 case CPC:
1374 if (value >= 32 || value < -20) return IA_FATAL_ERROR;
1375 *dequant = ixheaacd_mps_dec_bitdec_tables->dequant_cpc[value + 20];
1376 break;
1377
1378 default:
1379 return IA_XHEAAC_MPS_DEC_EXE_FATAL_INVALID_DEQUANT_PARAM;
1380 }
1381 return IA_NO_ERROR;
1382 }
1383
ixheaacd_factor_funct(WORD32 ott_vs_tot_db,WORD32 quant_mode,WORD32 * factor)1384 static IA_ERRORCODE ixheaacd_factor_funct(WORD32 ott_vs_tot_db, WORD32 quant_mode,
1385 WORD32 *factor) {
1386 WORD32 db_diff;
1387 WORD32 x_linear = 0;
1388
1389 WORD32 maxfactor = 0;
1390 WORD32 constfact;
1391
1392 if (ott_vs_tot_db > 0) return IA_XHEAAC_MPS_DEC_EXE_FATAL_INVALID_MPS_PARAM;
1393 db_diff = -ott_vs_tot_db;
1394
1395 switch (quant_mode) {
1396 case QUANT_MODE_0:
1397 return (ONE_IN_Q25);
1398 break;
1399 case QUANT_MODE_1:
1400 x_linear = 1024;
1401
1402 maxfactor = 167772160;
1403 constfact = 6554;
1404 break;
1405 case QUANT_MODE_2:
1406 x_linear = 1024;
1407
1408 maxfactor = ONE_IN_Q28;
1409 constfact = 9557;
1410 break;
1411 default:
1412 return IA_XHEAAC_MPS_DEC_EXE_FATAL_INVALID_QUANT_MODE;
1413 }
1414
1415 if (db_diff > (x_linear << 5)) {
1416 WORD32 db_diff_fix = db_diff >> 5;
1417 *factor = (db_diff_fix - (WORD32)x_linear) * constfact + ONE_IN_Q25;
1418 } else {
1419 *factor = ONE_IN_Q25;
1420 }
1421
1422 *factor = min(maxfactor, *factor);
1423 return IA_NO_ERROR;
1424 }
1425
ixheaacd_factor_cld(WORD32 * idx,WORD32 ott_vs_tot_db,WORD32 * ott_vs_tot_db_1,WORD32 * ott_vs_tot_db_2,WORD32 quant_mode,ia_mps_dec_bitdec_tables_struct * ixheaacd_mps_dec_bitdec_tables)1426 static VOID ixheaacd_factor_cld(WORD32 *idx, WORD32 ott_vs_tot_db, WORD32 *ott_vs_tot_db_1,
1427 WORD32 *ott_vs_tot_db_2, WORD32 quant_mode,
1428 ia_mps_dec_bitdec_tables_struct *ixheaacd_mps_dec_bitdec_tables) {
1429 WORD32 factor = 0;
1430 WORD32 c1;
1431 WORD32 c2;
1432 WORD32 cld_idx;
1433
1434 ixheaacd_factor_funct(ott_vs_tot_db, quant_mode, &factor);
1435
1436 cld_idx = (((*idx * factor) + THIRTYONE_BY_TWO_IN_Q25) >> 25);
1437 cld_idx -= 15;
1438
1439 cld_idx = min(cld_idx, 15);
1440 cld_idx = max(cld_idx, -15);
1441
1442 *idx = cld_idx;
1443
1444 c1 = ixheaacd_mps_dec_bitdec_tables->factor_cld_tab_1[*idx + 15];
1445 c2 = ixheaacd_mps_dec_bitdec_tables->factor_cld_tab_1[15 - *idx];
1446
1447 *ott_vs_tot_db_1 = c1 + ott_vs_tot_db;
1448 *ott_vs_tot_db_2 = c2 + ott_vs_tot_db;
1449 }
1450
ixheaacd_map_index_data(ia_mps_dec_lossless_data_struct * ll_data,WORD32 output_data[][MAX_PARAMETER_SETS][MAX_PARAMETER_BANDS],WORD32 output_idx_data[][MAX_PARAMETER_SETS][MAX_PARAMETER_BANDS],WORD32 cmp_idx_data[][MAX_PARAMETER_SETS][MAX_PARAMETER_BANDS],WORD32 diff_idx_data[][MAX_PARAMETER_SETS][MAX_PARAMETER_BANDS],WORD32 xtt_idx,WORD32 idx_prev[MAX_NUM_OTT][MAX_PARAMETER_BANDS],WORD32 param_idx,WORD32 param_type,WORD32 start_band,WORD32 stop_band,WORD32 default_value,WORD32 num_parameter_sets,WORD32 * param_slot,WORD32 extend_frame,WORD32 quant_mode,WORD32 * ott_vs_tot_db_in,WORD32 * ott_vs_tot_db_1,WORD32 * ott_vs_tot_db_2,ia_mps_dec_bitdec_tables_struct * ixheaacd_mps_dec_bitdec_tables,VOID * scratch)1451 static IA_ERRORCODE ixheaacd_map_index_data(
1452 ia_mps_dec_lossless_data_struct *ll_data,
1453 WORD32 output_data[][MAX_PARAMETER_SETS][MAX_PARAMETER_BANDS],
1454 WORD32 output_idx_data[][MAX_PARAMETER_SETS][MAX_PARAMETER_BANDS],
1455 WORD32 cmp_idx_data[][MAX_PARAMETER_SETS][MAX_PARAMETER_BANDS],
1456 WORD32 diff_idx_data[][MAX_PARAMETER_SETS][MAX_PARAMETER_BANDS], WORD32 xtt_idx,
1457 WORD32 idx_prev[MAX_NUM_OTT][MAX_PARAMETER_BANDS], WORD32 param_idx, WORD32 param_type,
1458 WORD32 start_band, WORD32 stop_band, WORD32 default_value, WORD32 num_parameter_sets,
1459 WORD32 *param_slot, WORD32 extend_frame, WORD32 quant_mode, WORD32 *ott_vs_tot_db_in,
1460 WORD32 *ott_vs_tot_db_1, WORD32 *ott_vs_tot_db_2,
1461 ia_mps_dec_bitdec_tables_struct *ixheaacd_mps_dec_bitdec_tables, VOID *scratch) {
1462 WORD32 *a_param_slots;
1463 WORD32 *a_interpolate;
1464
1465 WORD32 data_sets;
1466 WORD32 *a_map;
1467 VOID *free_scratch;
1468
1469 WORD32 set_idx, i, band, parm_slot;
1470 WORD32 data_bands, stride;
1471 WORD32 ps, pb;
1472
1473 WORD32 i1, i2, x1, xi, x2;
1474 WORD32 *db_in;
1475 WORD32 *db_1, *db_2;
1476 db_in = ott_vs_tot_db_in;
1477 db_1 = ott_vs_tot_db_1;
1478 db_2 = ott_vs_tot_db_2;
1479 a_param_slots = scratch;
1480 a_interpolate = a_param_slots + IXHEAAC_GET_SIZE_ALIGNED_TYPE(
1481 MAX_PARAMETER_SETS, sizeof(*a_interpolate), BYTE_ALIGN_8);
1482 a_map = a_interpolate +
1483 IXHEAAC_GET_SIZE_ALIGNED_TYPE(MAX_PARAMETER_SETS, sizeof(*a_map), BYTE_ALIGN_8);
1484 free_scratch = a_map + IXHEAAC_GET_SIZE_ALIGNED_TYPE(MAX_PARAMETER_BANDS_PLUS_1, sizeof(*a_map),
1485 BYTE_ALIGN_8);
1486
1487 data_sets = 0;
1488 for (i = 0; i < num_parameter_sets; i++) {
1489 if (ll_data->bs_xxx_data_mode[param_idx][i] == 3) {
1490 a_param_slots[data_sets] = i;
1491 data_sets++;
1492 }
1493 }
1494
1495 set_idx = 0;
1496
1497 for (i = 0; i < num_parameter_sets; i++) {
1498 if (ll_data->bs_xxx_data_mode[param_idx][i] == 0) {
1499 ll_data->no_cmp_quant_coarse_xxx[param_idx][i] = 0;
1500 for (band = start_band; band < stop_band; band++) {
1501 output_idx_data[xtt_idx][i][band] = default_value;
1502 }
1503 for (band = start_band; band < stop_band; band++) {
1504 idx_prev[xtt_idx][band] = output_idx_data[xtt_idx][i][band];
1505 }
1506 }
1507
1508 if (ll_data->bs_xxx_data_mode[param_idx][i] == 1) {
1509 for (band = start_band; band < stop_band; band++) {
1510 output_idx_data[xtt_idx][i][band] = idx_prev[xtt_idx][band];
1511 }
1512 ll_data->no_cmp_quant_coarse_xxx[param_idx][i] =
1513 ll_data->bs_quant_coarse_xxx_prev[param_idx];
1514 }
1515
1516 if (ll_data->bs_xxx_data_mode[param_idx][i] == 2) {
1517 for (band = start_band; band < stop_band; band++) {
1518 output_idx_data[xtt_idx][i][band] = idx_prev[xtt_idx][band];
1519 }
1520 a_interpolate[i] = 1;
1521 } else {
1522 a_interpolate[i] = 0;
1523 }
1524
1525 if (ll_data->bs_xxx_data_mode[param_idx][i] == 3) {
1526 parm_slot = a_param_slots[set_idx];
1527 stride = ixheaacd_mps_dec_bitdec_tables
1528 ->pb_stride_table[ll_data->bs_freq_res_stride_xxx[param_idx][set_idx]];
1529 data_bands = (stop_band - start_band - 1) / stride + 1;
1530 ixheaacd_create_mapping(a_map, start_band, stop_band, stride, free_scratch);
1531 ixheaacd_map_frequency(&cmp_idx_data[xtt_idx][set_idx][0],
1532 &output_idx_data[xtt_idx][parm_slot][0], a_map, data_bands);
1533
1534 for (band = start_band; band < stop_band; band++) {
1535 idx_prev[xtt_idx][band] = output_idx_data[xtt_idx][parm_slot][band];
1536 }
1537
1538 ll_data->bs_quant_coarse_xxx_prev[param_idx] =
1539 ll_data->bs_quant_coarse_xxx[param_idx][set_idx];
1540 ll_data->no_cmp_quant_coarse_xxx[param_idx][i] =
1541 ll_data->bs_quant_coarse_xxx[param_idx][set_idx];
1542
1543 set_idx++;
1544 }
1545
1546 if (diff_idx_data != NULL) {
1547 for (band = start_band; band < stop_band; band++) {
1548 output_idx_data[xtt_idx][i][band] += diff_idx_data[xtt_idx][i][band];
1549 }
1550 }
1551 }
1552
1553 for (i = 0; i < num_parameter_sets; i++) {
1554 if (a_interpolate[i] != 1) {
1555 if (ll_data->no_cmp_quant_coarse_xxx[param_idx][i] == 1) {
1556 for (band = start_band; band < stop_band; band++) {
1557 ixheaacd_deq_coarse(output_idx_data[xtt_idx][i][band], param_type,
1558 &(output_data[xtt_idx][i][band]), ixheaacd_mps_dec_bitdec_tables);
1559 }
1560 } else {
1561 for (band = start_band; band < stop_band; band++) {
1562 ia_mps_dec_deq(output_idx_data[xtt_idx][i][band], param_type,
1563 &(output_data[xtt_idx][i][band]), ixheaacd_mps_dec_bitdec_tables);
1564 }
1565 }
1566 }
1567 }
1568
1569 if (quant_mode && (param_type == CLD)) {
1570 if (db_in == 0 || db_1 == 0 || db_2 == 0)
1571 return IA_XHEAAC_MPS_DEC_EXE_FATAL_INVALID_MPS_PARAM;
1572
1573 for (ps = 0; ps < num_parameter_sets; ps++) {
1574 if (a_interpolate[ps] != 1) {
1575 if (ll_data->no_cmp_quant_coarse_xxx[param_idx][ps]) {
1576 ixheaacd_coarse_2_fine(output_idx_data[xtt_idx][ps], param_type, start_band,
1577 stop_band - start_band);
1578 }
1579 for (pb = start_band; pb < stop_band; pb++) {
1580 ll_data->no_cmp_quant_coarse_xxx[param_idx][ps] = 1;
1581 ixheaacd_factor_cld(&(output_idx_data[xtt_idx][ps][pb]), *db_in++, &(*db_1++),
1582 &(*db_2++), quant_mode, ixheaacd_mps_dec_bitdec_tables);
1583 ia_mps_dec_deq(output_idx_data[xtt_idx][ps][pb], param_type,
1584 &(output_data[xtt_idx][ps][pb]), ixheaacd_mps_dec_bitdec_tables);
1585 }
1586 }
1587 }
1588 }
1589
1590 i1 = 0;
1591 x1 = 0;
1592 i2 = 0;
1593 for (i = 0; i < num_parameter_sets; i++) {
1594 if (a_interpolate[i] != 1) {
1595 i1 = i;
1596 }
1597 i2 = i;
1598 while (a_interpolate[i2] == 1) {
1599 i2++;
1600 }
1601 x1 = param_slot[i1];
1602 xi = param_slot[i];
1603 x2 = param_slot[i2];
1604
1605 if (a_interpolate[i] == 1) {
1606 if (i2 >= num_parameter_sets) return IA_XHEAAC_MPS_DEC_EXE_FATAL_INVALID_PARAMETER_SETS;
1607 if (ll_data->no_cmp_quant_coarse_xxx[param_idx][i1]) {
1608 ixheaacd_coarse_2_fine(output_idx_data[xtt_idx][i1], param_type, start_band,
1609 stop_band - start_band);
1610 }
1611 if (ll_data->no_cmp_quant_coarse_xxx[param_idx][i2]) {
1612 ixheaacd_coarse_2_fine(output_idx_data[xtt_idx][i2], param_type, start_band,
1613 stop_band - start_band);
1614 }
1615 for (band = start_band; band < stop_band; band++) {
1616 WORD32 yi = 0, y1, y2;
1617 y1 = output_idx_data[xtt_idx][i1][band];
1618 y2 = output_idx_data[xtt_idx][i2][band];
1619
1620 if (x2 != x1) {
1621 yi = y1 + (xi - x1) * (y2 - y1) / (x2 - x1);
1622 }
1623 output_idx_data[xtt_idx][i][band] = yi;
1624 ia_mps_dec_deq(output_idx_data[xtt_idx][i][band], param_type,
1625 &(output_data[xtt_idx][i][band]), ixheaacd_mps_dec_bitdec_tables);
1626 }
1627 }
1628 }
1629
1630 ixheaacd_mps_check_index_bounds(output_idx_data, num_parameter_sets, start_band,
1631 stop_band, param_type, xtt_idx);
1632
1633 if (extend_frame) {
1634 for (band = start_band; band < stop_band; band++) {
1635 output_data[xtt_idx][num_parameter_sets][band] =
1636 output_data[xtt_idx][num_parameter_sets - 1][band];
1637 output_idx_data[xtt_idx][num_parameter_sets][band] =
1638 output_idx_data[xtt_idx][num_parameter_sets - 1][band];
1639 }
1640 }
1641 return IA_NO_ERROR;
1642 }
1643
ixheaacd_get_parameters_mapping(WORD32 bs_parameter_bands,WORD32 * mapping,ia_mps_dec_bitdec_tables_struct * ixheaacd_mps_dec_bitdec_tables)1644 static VOID ixheaacd_get_parameters_mapping(
1645 WORD32 bs_parameter_bands, WORD32 *mapping,
1646 ia_mps_dec_bitdec_tables_struct *ixheaacd_mps_dec_bitdec_tables) {
1647 switch (bs_parameter_bands) {
1648 case PARAMETER_BANDS_4:
1649 mapping = ixheaacd_mps_dec_bitdec_tables->map_table.mapping_4_to_28;
1650 break;
1651 case PARAMETER_BANDS_5:
1652 mapping = ixheaacd_mps_dec_bitdec_tables->map_table.mapping_5_to_28;
1653 break;
1654 case PARAMETER_BANDS_7:
1655 mapping = ixheaacd_mps_dec_bitdec_tables->map_table.mapping_7_to_28;
1656 break;
1657 case PARAMETER_BANDS_10:
1658 mapping = ixheaacd_mps_dec_bitdec_tables->map_table.mapping_10_to_28;
1659 break;
1660 case PARAMETER_BANDS_14:
1661 mapping = ixheaacd_mps_dec_bitdec_tables->map_table.mapping_14_to_28;
1662 break;
1663 case PARAMETER_BANDS_20:
1664 mapping = ixheaacd_mps_dec_bitdec_tables->map_table.mapping_20_to_28;
1665 break;
1666 case PARAMETER_BANDS_28:
1667 break;
1668 default:
1669 break;
1670 }
1671 return;
1672 }
1673
ixheaacd_map_number_of_bands_to_28_bands(WORD32 bands,WORD32 bs_parameter_bands,WORD32 * bands28,ia_mps_dec_bitdec_tables_struct * ixheaacd_mps_dec_bitdec_tables)1674 static VOID ixheaacd_map_number_of_bands_to_28_bands(
1675 WORD32 bands, WORD32 bs_parameter_bands, WORD32 *bands28,
1676 ia_mps_dec_bitdec_tables_struct *ixheaacd_mps_dec_bitdec_tables) {
1677 WORD32 *mapping = NULL;
1678 WORD32 pb;
1679
1680 *bands28 = bands;
1681
1682 ixheaacd_get_parameters_mapping(bs_parameter_bands, mapping, ixheaacd_mps_dec_bitdec_tables);
1683
1684 if (mapping != NULL) {
1685 for (pb = 0; pb < MAX_PARAMETER_BANDS; pb++) {
1686 if (mapping[pb] == bands) {
1687 break;
1688 }
1689 }
1690 *bands28 = pb;
1691 }
1692 return;
1693 }
1694
ixheaacd_map_data_to_28_bands(WORD32 * data,WORD32 bs_parameter_bands,ia_mps_dec_bitdec_tables_struct * ixheaacd_mps_dec_bitdec_tables)1695 static VOID ixheaacd_map_data_to_28_bands(
1696 WORD32 *data, WORD32 bs_parameter_bands,
1697 ia_mps_dec_bitdec_tables_struct *ixheaacd_mps_dec_bitdec_tables) {
1698 WORD32 *mapping = NULL;
1699 WORD32 pb;
1700
1701 ixheaacd_get_parameters_mapping(bs_parameter_bands, mapping, ixheaacd_mps_dec_bitdec_tables);
1702
1703 if (mapping != NULL) {
1704 for (pb = MAX_PARAMETER_BANDS - 1; pb >= 0; pb--) {
1705 data[pb] = data[mapping[pb]];
1706 }
1707 }
1708 return;
1709 }
1710
ixheaacd_decode_and_map_frame_ott(ia_heaac_mps_state_struct * pstr_mps_state)1711 static IA_ERRORCODE ixheaacd_decode_and_map_frame_ott(ia_heaac_mps_state_struct *pstr_mps_state)
1712 {
1713 IA_ERRORCODE error_code = IA_NO_ERROR;
1714 ia_mps_dec_spatial_bs_frame_struct *p_cur_bs;
1715 ia_heaac_mps_state_struct *curr_state = pstr_mps_state;
1716 ia_mps_dec_auxilary_struct *p_aux_struct = pstr_mps_state->aux_struct;
1717 ia_mps_dec_bitdec_tables_struct *bitdec_table =
1718 pstr_mps_state->ia_mps_dec_mps_table.bitdec_table_ptr;
1719 WORD32 *param_slot = pstr_mps_state->aux_struct->param_slot;
1720
1721 WORD32 i, num_parameter_sets, ott_idx, band;
1722 WORD32 num_ott_boxes;
1723 VOID *free_scratch;
1724
1725 WORD32 ps, pb;
1726
1727 WORD32 *tot_db;
1728 WORD32 *ott_vs_tot_db_fc;
1729 WORD32 *ott_vs_tot_db_s;
1730 WORD32 *ott_vs_tot_db_f;
1731 WORD32 *ott_vs_tot_db_c;
1732 WORD32 *ott_vs_tot_db_lr;
1733 WORD32 *ott_vs_tot_db_l;
1734 WORD32 *ott_vs_tot_db_r;
1735 WORD32 *tmp1;
1736 WORD32 *tmp2;
1737
1738 WORD32 bitstream_parameter_bands = curr_state->bitstream_parameter_bands;
1739 WORD32 *b_ott_bands = curr_state->bitstream_ott_bands;
1740 WORD32 *ott_cld_default = curr_state->ott_cld_default;
1741 WORD32 parameter_sets = curr_state->num_parameter_sets;
1742 WORD32 extend_frame = curr_state->extend_frame;
1743 WORD32 quant_mode = curr_state->quant_mode;
1744
1745 tot_db = pstr_mps_state->mps_scratch_mem_v;
1746 ott_vs_tot_db_fc =
1747 tot_db + IXHEAAC_GET_SIZE_ALIGNED_TYPE(MAX_PSXPB, sizeof(*ott_vs_tot_db_fc), BYTE_ALIGN_8);
1748 ott_vs_tot_db_s = ott_vs_tot_db_fc + IXHEAAC_GET_SIZE_ALIGNED_TYPE(
1749 MAX_PSXPB, sizeof(*ott_vs_tot_db_s), BYTE_ALIGN_8);
1750 ott_vs_tot_db_f = ott_vs_tot_db_s + IXHEAAC_GET_SIZE_ALIGNED_TYPE(
1751 MAX_PSXPB, sizeof(*ott_vs_tot_db_f), BYTE_ALIGN_8);
1752 ott_vs_tot_db_c = ott_vs_tot_db_f + IXHEAAC_GET_SIZE_ALIGNED_TYPE(
1753 MAX_PSXPB, sizeof(*ott_vs_tot_db_c), BYTE_ALIGN_8);
1754 ott_vs_tot_db_lr = ott_vs_tot_db_c + IXHEAAC_GET_SIZE_ALIGNED_TYPE(
1755 MAX_PSXPB, sizeof(*ott_vs_tot_db_lr), BYTE_ALIGN_8);
1756 ott_vs_tot_db_l = ott_vs_tot_db_lr + IXHEAAC_GET_SIZE_ALIGNED_TYPE(
1757 MAX_PSXPB, sizeof(*ott_vs_tot_db_l), BYTE_ALIGN_8);
1758 ott_vs_tot_db_r = ott_vs_tot_db_l + IXHEAAC_GET_SIZE_ALIGNED_TYPE(
1759 MAX_PSXPB, sizeof(*ott_vs_tot_db_r), BYTE_ALIGN_8);
1760 tmp1 = ott_vs_tot_db_r + IXHEAAC_GET_SIZE_ALIGNED_TYPE(MAX_PSXPB, sizeof(*tmp1), BYTE_ALIGN_8);
1761 tmp2 = tmp1 + IXHEAAC_GET_SIZE_ALIGNED_TYPE(MAX_PSXPB, sizeof(*tmp2), BYTE_ALIGN_8);
1762 free_scratch = tmp2 + IXHEAAC_GET_SIZE_ALIGNED_TYPE(MAX_PSXPB, sizeof(*tmp2), BYTE_ALIGN_8);
1763
1764 p_cur_bs = pstr_mps_state->bs_frame;
1765 num_ott_boxes = curr_state->num_ott_boxes;
1766
1767 pb = MAX_PSXPB;
1768 for (i = 0; i < pb; i++) tot_db[i] = 0;
1769
1770 switch (curr_state->tree_config) {
1771 case TREE_5151:
1772 i = 0;
1773 error_code = ixheaacd_map_index_data(
1774 &p_cur_bs->cld_lossless_data, p_aux_struct->ott_cld, p_cur_bs->ott_cld_idx,
1775 p_cur_bs->cmp_ott_cld_idx, NULL, i, p_cur_bs->ott_cld_idx_prev, i, CLD, 0,
1776 b_ott_bands[i], ott_cld_default[i], parameter_sets, param_slot, extend_frame,
1777 quant_mode, tot_db, ott_vs_tot_db_fc, ott_vs_tot_db_s, bitdec_table, free_scratch);
1778 if (error_code) return error_code;
1779
1780 i = 1;
1781 error_code = ixheaacd_map_index_data(&p_cur_bs->cld_lossless_data, p_aux_struct->ott_cld,
1782 p_cur_bs->ott_cld_idx, p_cur_bs->cmp_ott_cld_idx, NULL, i,
1783 p_cur_bs->ott_cld_idx_prev, i, CLD, 0, b_ott_bands[i],
1784 ott_cld_default[i], parameter_sets, param_slot, extend_frame,
1785 quant_mode, ott_vs_tot_db_fc, ott_vs_tot_db_f, ott_vs_tot_db_c,
1786 bitdec_table, free_scratch);
1787 if (error_code) return error_code;
1788
1789 i = 2;
1790 error_code = ixheaacd_map_index_data(
1791 &p_cur_bs->cld_lossless_data, p_aux_struct->ott_cld, p_cur_bs->ott_cld_idx,
1792 p_cur_bs->cmp_ott_cld_idx, NULL, i, p_cur_bs->ott_cld_idx_prev, i, CLD, 0,
1793 b_ott_bands[i], ott_cld_default[i], parameter_sets, param_slot, extend_frame,
1794 quant_mode, ott_vs_tot_db_s, tmp1, tmp2, bitdec_table, free_scratch);
1795 if (error_code) return error_code;
1796
1797 i = 3;
1798 error_code = ixheaacd_map_index_data(
1799 &p_cur_bs->cld_lossless_data, p_aux_struct->ott_cld, p_cur_bs->ott_cld_idx,
1800 p_cur_bs->cmp_ott_cld_idx, NULL, i, p_cur_bs->ott_cld_idx_prev, i, CLD, 0,
1801 b_ott_bands[i], ott_cld_default[i], parameter_sets, param_slot, extend_frame,
1802 quant_mode, ott_vs_tot_db_f, tmp1, tmp2, bitdec_table, free_scratch);
1803 if (error_code) return error_code;
1804
1805 i = 4;
1806 error_code = ixheaacd_map_index_data(&p_cur_bs->cld_lossless_data, p_aux_struct->ott_cld,
1807 p_cur_bs->ott_cld_idx, p_cur_bs->cmp_ott_cld_idx, NULL, i,
1808 p_cur_bs->ott_cld_idx_prev, i, CLD, 0, b_ott_bands[i],
1809 ott_cld_default[i], parameter_sets, param_slot, extend_frame,
1810 quant_mode, tot_db, tmp1, tmp2, bitdec_table, free_scratch);
1811 if (error_code) return error_code;
1812
1813 break;
1814
1815 case TREE_5152:
1816 i = 0;
1817 error_code = ixheaacd_map_index_data(
1818 &p_cur_bs->cld_lossless_data, p_aux_struct->ott_cld, p_cur_bs->ott_cld_idx,
1819 p_cur_bs->cmp_ott_cld_idx, NULL, i, p_cur_bs->ott_cld_idx_prev, i, CLD, 0,
1820 b_ott_bands[i], ott_cld_default[i], parameter_sets, param_slot, extend_frame,
1821 quant_mode, tot_db, ott_vs_tot_db_lr, ott_vs_tot_db_c, bitdec_table, free_scratch);
1822 if (error_code) return error_code;
1823
1824 i = 1;
1825 error_code = ixheaacd_map_index_data(&p_cur_bs->cld_lossless_data, p_aux_struct->ott_cld,
1826 p_cur_bs->ott_cld_idx, p_cur_bs->cmp_ott_cld_idx, NULL, i,
1827 p_cur_bs->ott_cld_idx_prev, i, CLD, 0, b_ott_bands[i],
1828 ott_cld_default[i], parameter_sets, param_slot, extend_frame,
1829 quant_mode, ott_vs_tot_db_lr, ott_vs_tot_db_l, ott_vs_tot_db_r,
1830 bitdec_table, free_scratch);
1831 if (error_code) return error_code;
1832
1833 i = 2;
1834 error_code = ixheaacd_map_index_data(&p_cur_bs->cld_lossless_data, p_aux_struct->ott_cld,
1835 p_cur_bs->ott_cld_idx, p_cur_bs->cmp_ott_cld_idx, NULL, i,
1836 p_cur_bs->ott_cld_idx_prev, i, CLD, 0, b_ott_bands[i],
1837 ott_cld_default[i], parameter_sets, param_slot, extend_frame,
1838 quant_mode, tot_db, tmp1, tmp2, bitdec_table, free_scratch);
1839 if (error_code) return error_code;
1840
1841 i = 3;
1842 error_code = ixheaacd_map_index_data(
1843 &p_cur_bs->cld_lossless_data, p_aux_struct->ott_cld, p_cur_bs->ott_cld_idx,
1844 p_cur_bs->cmp_ott_cld_idx, NULL, i, p_cur_bs->ott_cld_idx_prev, i, CLD, 0,
1845 b_ott_bands[i], ott_cld_default[i], parameter_sets, param_slot, extend_frame,
1846 quant_mode, ott_vs_tot_db_l, tmp1, tmp2, bitdec_table, free_scratch);
1847 if (error_code) return error_code;
1848
1849 i = 4;
1850 error_code = ixheaacd_map_index_data(
1851 &p_cur_bs->cld_lossless_data, p_aux_struct->ott_cld, p_cur_bs->ott_cld_idx,
1852 p_cur_bs->cmp_ott_cld_idx, NULL, i, p_cur_bs->ott_cld_idx_prev, i, CLD, 0,
1853 b_ott_bands[i], ott_cld_default[i], parameter_sets, param_slot, extend_frame,
1854 quant_mode, ott_vs_tot_db_r, tmp1, tmp2, bitdec_table, free_scratch);
1855 if (error_code) return error_code;
1856 break;
1857
1858 default:
1859 for (i = 0; i < num_ott_boxes; i++) {
1860 error_code = ixheaacd_map_index_data(&p_cur_bs->cld_lossless_data, p_aux_struct->ott_cld,
1861 p_cur_bs->ott_cld_idx, p_cur_bs->cmp_ott_cld_idx, NULL, i,
1862 p_cur_bs->ott_cld_idx_prev, i, CLD, 0, b_ott_bands[i],
1863 ott_cld_default[i], parameter_sets, param_slot, extend_frame,
1864 (curr_state->tree_config == TREE_525) ? 0 : quant_mode, NULL,
1865 NULL, NULL, bitdec_table, free_scratch);
1866 if (error_code) return error_code;
1867 }
1868 break;
1869 }
1870
1871 if (curr_state->one_icc == 1) {
1872 if (extend_frame == 0) {
1873 num_parameter_sets = parameter_sets;
1874 } else {
1875 num_parameter_sets = parameter_sets + 1;
1876 }
1877
1878 for (ott_idx = 1; ott_idx < num_ott_boxes; ott_idx++) {
1879 if (curr_state->ott_mode_lfe[ott_idx] == 0) {
1880 for (i = 0; i < num_parameter_sets; i++) {
1881 for (band = 0; band < bitstream_parameter_bands; band++) {
1882 p_cur_bs->cmp_ott_icc_idx[ott_idx][i][band] = p_cur_bs->cmp_ott_icc_idx[0][i][band];
1883 }
1884 }
1885 }
1886 }
1887
1888 for (ott_idx = 0; ott_idx < num_ott_boxes; ott_idx++) {
1889 if (curr_state->ott_mode_lfe[ott_idx] == 0) {
1890 error_code = ixheaacd_map_index_data(&p_cur_bs->icc_lossless_data, p_aux_struct->ott_icc,
1891 p_cur_bs->ott_icc_idx, p_cur_bs->cmp_ott_icc_idx,
1892 p_cur_bs->ott_icc_diff_idx, ott_idx, p_cur_bs->ott_icc_idx_prev,
1893 0, ICC, 0, b_ott_bands[ott_idx], curr_state->icc_default,
1894 parameter_sets, param_slot, extend_frame, quant_mode, NULL, NULL,
1895 NULL, bitdec_table, free_scratch);
1896 if (error_code) return error_code;
1897 }
1898 }
1899 } else {
1900 for (ott_idx = 0; ott_idx < num_ott_boxes; ott_idx++) {
1901 if (curr_state->ott_mode_lfe[ott_idx] == 0) {
1902 error_code = ixheaacd_map_index_data(&p_cur_bs->icc_lossless_data, p_aux_struct->ott_icc,
1903 p_cur_bs->ott_icc_idx, p_cur_bs->cmp_ott_icc_idx,
1904 p_cur_bs->ott_icc_diff_idx, ott_idx, p_cur_bs->ott_icc_idx_prev,
1905 ott_idx, ICC, 0, b_ott_bands[ott_idx], curr_state->icc_default,
1906 parameter_sets, param_slot, extend_frame, quant_mode, NULL, NULL,
1907 NULL, bitdec_table, free_scratch);
1908 if (error_code) return error_code;
1909 }
1910 }
1911 }
1912
1913 if (curr_state->up_mix_type == 2) {
1914 WORD32 num_parameter_sets = parameter_sets;
1915
1916 if (extend_frame) {
1917 num_parameter_sets++;
1918 }
1919
1920 for (ott_idx = 0; ott_idx < curr_state->num_ott_boxes; ott_idx++) {
1921 for (ps = 0; ps < num_parameter_sets; ps++) {
1922 ixheaacd_map_data_to_28_bands(p_aux_struct->ott_cld[ott_idx][ps],
1923 bitstream_parameter_bands, bitdec_table);
1924 ixheaacd_map_data_to_28_bands(p_aux_struct->ott_icc[ott_idx][ps],
1925 bitstream_parameter_bands, bitdec_table);
1926 }
1927 }
1928 }
1929 return error_code;
1930 }
1931
ixheaacd_decode_and_map_frame_ttt(ia_heaac_mps_state_struct * pstr_mps_state)1932 static IA_ERRORCODE ixheaacd_decode_and_map_frame_ttt(ia_heaac_mps_state_struct *pstr_mps_state)
1933 {
1934 IA_ERRORCODE error_code = IA_NO_ERROR;
1935 ia_mps_dec_spatial_bs_frame_struct *p_cur_bs;
1936 ia_mps_dec_bitdec_tables_struct *bitdec_table =
1937 pstr_mps_state->ia_mps_dec_mps_table.bitdec_table_ptr;
1938 ia_mps_dec_auxilary_struct *p_aux_struct = pstr_mps_state->aux_struct;
1939 WORD32 *param_slot = pstr_mps_state->aux_struct->param_slot;
1940
1941 WORD32 num_bands;
1942
1943 WORD32 i, j, offset;
1944 WORD32 num_ttt_boxes;
1945 VOID *free_scratch;
1946
1947 p_cur_bs = pstr_mps_state->bs_frame;
1948 num_bands = pstr_mps_state->bitstream_parameter_bands;
1949 offset = pstr_mps_state->num_ott_boxes;
1950 num_ttt_boxes = pstr_mps_state->num_ttt_boxes;
1951 free_scratch = pstr_mps_state->mps_scratch_mem_v;
1952
1953 for (i = 0; i < num_ttt_boxes; i++) {
1954 for (j = 0;
1955 (j < 2) &&
1956 p_aux_struct->ttt_config[j][i].start_band < p_aux_struct->ttt_config[j][i].stop_band;
1957 j++) {
1958 if (p_aux_struct->ttt_config[j][i].mode < 2) {
1959 error_code = ixheaacd_map_index_data(
1960 &p_cur_bs->cpc_lossless_data, p_aux_struct->ttt_cpc_1, p_cur_bs->ttt_cpc_1_idx,
1961 p_cur_bs->cmp_ttt_cpc_1_idx, NULL, i, p_cur_bs->ttt_cpc_1_idx_prev,
1962 offset + 4 * i + 2 * j, CPC, p_aux_struct->ttt_config[j][i].bitstream_start_band,
1963 p_aux_struct->ttt_config[j][i].bitstream_stop_band, pstr_mps_state->cpc_default,
1964 pstr_mps_state->num_parameter_sets, param_slot, pstr_mps_state->extend_frame,
1965 pstr_mps_state->quant_mode, NULL, NULL, NULL, bitdec_table, free_scratch);
1966 if (error_code) return error_code;
1967
1968 error_code = ixheaacd_map_index_data(
1969 &p_cur_bs->cpc_lossless_data, p_aux_struct->ttt_cpc_2, p_cur_bs->ttt_cpc_2_idx,
1970 p_cur_bs->cmp_ttt_cpc_2_idx, NULL, i, p_cur_bs->ttt_cpc_2_idx_prev,
1971 offset + 4 * i + 1 + 2 * j, CPC, p_aux_struct->ttt_config[j][i].bitstream_start_band,
1972 p_aux_struct->ttt_config[j][i].bitstream_stop_band, pstr_mps_state->cpc_default,
1973 pstr_mps_state->num_parameter_sets, param_slot, pstr_mps_state->extend_frame,
1974 pstr_mps_state->quant_mode, NULL, NULL, NULL, bitdec_table, free_scratch);
1975 if (error_code) return error_code;
1976
1977 error_code = ixheaacd_map_index_data(
1978 &p_cur_bs->icc_lossless_data, p_aux_struct->ttt_icc, p_cur_bs->ttt_icc_idx,
1979 p_cur_bs->cmp_ttt_icc_idx, NULL, i, p_cur_bs->ttt_icc_idx_prev,
1980 offset + 4 * i + 2 * j, ICC, p_aux_struct->ttt_config[j][i].bitstream_start_band,
1981 p_aux_struct->ttt_config[j][i].bitstream_stop_band, pstr_mps_state->icc_default,
1982 pstr_mps_state->num_parameter_sets, param_slot, pstr_mps_state->extend_frame,
1983 pstr_mps_state->quant_mode, NULL, NULL, NULL, bitdec_table, free_scratch);
1984 if (error_code) return error_code;
1985 }
1986
1987 else {
1988 error_code = ixheaacd_map_index_data(
1989 &p_cur_bs->cld_lossless_data, p_aux_struct->ttt_cld_1, p_cur_bs->ttt_cld_1_idx,
1990 p_cur_bs->cmp_ttt_cld_1_idx, NULL, i, p_cur_bs->ttt_cld_1_idx_prev,
1991 offset + 4 * i + 2 * j, CLD, p_aux_struct->ttt_config[j][i].bitstream_start_band,
1992 p_aux_struct->ttt_config[j][i].bitstream_stop_band,
1993 pstr_mps_state->ttt_cld_1_default[i], pstr_mps_state->num_parameter_sets, param_slot,
1994 pstr_mps_state->extend_frame, pstr_mps_state->quant_mode, NULL, NULL, NULL,
1995 bitdec_table, free_scratch);
1996 if (error_code) return error_code;
1997
1998 error_code = ixheaacd_map_index_data(
1999 &p_cur_bs->cld_lossless_data, p_aux_struct->ttt_cld_2, p_cur_bs->ttt_cld_2_idx,
2000 p_cur_bs->cmp_ttt_cld_2_idx, NULL, i, p_cur_bs->ttt_cld_2_idx_prev,
2001 offset + 4 * i + 1 + 2 * j, CLD, p_aux_struct->ttt_config[j][i].bitstream_start_band,
2002 p_aux_struct->ttt_config[j][i].bitstream_stop_band,
2003 pstr_mps_state->ttt_cld_2_default[i], pstr_mps_state->num_parameter_sets, param_slot,
2004 pstr_mps_state->extend_frame, pstr_mps_state->quant_mode, NULL, NULL, NULL,
2005 bitdec_table, free_scratch);
2006 if (error_code) return error_code;
2007 }
2008
2009 if (pstr_mps_state->up_mix_type == 2) {
2010 WORD32 num_parameter_sets = pstr_mps_state->num_parameter_sets;
2011 WORD32 ps;
2012
2013 if (pstr_mps_state->extend_frame) {
2014 num_parameter_sets++;
2015 }
2016
2017 for (ps = 0; ps < num_parameter_sets; ps++) {
2018 ixheaacd_map_data_to_28_bands(p_aux_struct->ttt_cpc_1[i][ps], num_bands, bitdec_table);
2019 ixheaacd_map_data_to_28_bands(p_aux_struct->ttt_cpc_2[i][ps], num_bands, bitdec_table);
2020 ixheaacd_map_data_to_28_bands(p_aux_struct->ttt_cld_1[i][ps], num_bands, bitdec_table);
2021 ixheaacd_map_data_to_28_bands(p_aux_struct->ttt_cld_2[i][ps], num_bands, bitdec_table);
2022 ixheaacd_map_data_to_28_bands(p_aux_struct->ttt_icc[i][ps], num_bands, bitdec_table);
2023 }
2024 }
2025 }
2026 }
2027 return error_code;
2028 }
2029
ixheaacd_decode_and_map_frame_smg(ia_heaac_mps_state_struct * pstr_mps_state)2030 static VOID ixheaacd_decode_and_map_frame_smg(ia_heaac_mps_state_struct *pstr_mps_state) {
2031 ia_mps_dec_smoothing_state_struct *smooth_state =
2032 pstr_mps_state->mps_persistent_mem.smooth_state;
2033 ia_mps_dec_bitdec_tables_struct *bitdec_table =
2034 pstr_mps_state->ia_mps_dec_mps_table.bitdec_table_ptr;
2035 ia_mps_dec_auxilary_struct *p_aux_struct = pstr_mps_state->aux_struct;
2036 WORD32 *smg_time = p_aux_struct->smg_time;
2037 WORD32 ps, pb, pg, pb_stride, data_bands, pb_start, pb_stop;
2038 WORD32 *a_group_to_band;
2039 VOID *free_scratch;
2040 ia_mps_dec_spatial_bs_frame_struct *frame = pstr_mps_state->bs_frame;
2041 pstr_mps_state->smooth_control = frame->bs_smooth_control;
2042 a_group_to_band = pstr_mps_state->mps_scratch_mem_v;
2043 free_scratch =
2044 a_group_to_band + IXHEAAC_GET_SIZE_ALIGNED_TYPE(MAX_PARAMETER_BANDS_PLUS_1,
2045 sizeof(*a_group_to_band), BYTE_ALIGN_8);
2046
2047 if (pstr_mps_state->smooth_control) {
2048 for (ps = 0; ps < pstr_mps_state->num_parameter_sets; ps++) {
2049 switch (frame->bs_smooth_mode[ps]) {
2050 case SMOOTH_MODE_0:
2051 smg_time[ps] = 256;
2052 for (pb = 0; pb < pstr_mps_state->bitstream_parameter_bands; pb++) {
2053 p_aux_struct->smg_data[ps][pb] = 0;
2054 }
2055 break;
2056
2057 case SMOOTH_MODE_1:
2058 if (ps > 0)
2059 smg_time[ps] = smg_time[ps - 1];
2060 else
2061 smg_time[ps] = smooth_state->prev_smg_time;
2062
2063 for (pb = 0; pb < pstr_mps_state->bitstream_parameter_bands; pb++) {
2064 if (ps > 0)
2065 p_aux_struct->smg_data[ps][pb] = p_aux_struct->smg_data[ps - 1][pb];
2066 else
2067 p_aux_struct->smg_data[ps][pb] = smooth_state->prev_smg_data[pb];
2068 }
2069 break;
2070
2071 case SMOOTH_MODE_2:
2072 smg_time[ps] = bitdec_table->smg_time_table[frame->bs_smooth_time[ps]];
2073 for (pb = 0; pb < pstr_mps_state->bitstream_parameter_bands; pb++) {
2074 p_aux_struct->smg_data[ps][pb] = 1;
2075 }
2076 break;
2077
2078 case SMOOTH_MODE_3:
2079 smg_time[ps] = bitdec_table->smg_time_table[frame->bs_smooth_time[ps]];
2080 pb_stride = bitdec_table->pb_stride_table[frame->bs_freq_res_stride_smg[ps]];
2081 data_bands = (pstr_mps_state->bitstream_parameter_bands - 1) / pb_stride + 1;
2082 ixheaacd_create_mapping(a_group_to_band, 0, pstr_mps_state->bitstream_parameter_bands,
2083 pb_stride, free_scratch);
2084 for (pg = 0; pg < data_bands; pg++) {
2085 pb_start = a_group_to_band[pg];
2086 pb_stop = a_group_to_band[pg + 1];
2087 for (pb = pb_start; pb < pb_stop; pb++) {
2088 p_aux_struct->smg_data[ps][pb] = frame->bs_smg_data[ps][pg];
2089 }
2090 }
2091 break;
2092
2093 default:
2094 break;
2095 }
2096 }
2097
2098 smooth_state->prev_smg_time = smg_time[pstr_mps_state->num_parameter_sets - 1];
2099 for (pb = 0; pb < pstr_mps_state->bitstream_parameter_bands; pb++) {
2100 smooth_state->prev_smg_data[pb] =
2101 p_aux_struct->smg_data[pstr_mps_state->num_parameter_sets - 1][pb];
2102 }
2103
2104 if (pstr_mps_state->extend_frame) {
2105 smg_time[pstr_mps_state->num_parameter_sets] =
2106 smg_time[pstr_mps_state->num_parameter_sets - 1];
2107 for (pb = 0; pb < pstr_mps_state->bitstream_parameter_bands; pb++) {
2108 p_aux_struct->smg_data[pstr_mps_state->num_parameter_sets][pb] =
2109 p_aux_struct->smg_data[pstr_mps_state->num_parameter_sets - 1][pb];
2110 }
2111 }
2112
2113 if (pstr_mps_state->up_mix_type == 2) {
2114 WORD32 *mapping = NULL;
2115 ixheaacd_get_parameters_mapping(pstr_mps_state->bitstream_parameter_bands, mapping,
2116 bitdec_table);
2117
2118 if (mapping != NULL) {
2119 WORD32 num_parameter_sets = pstr_mps_state->num_parameter_sets;
2120
2121 if (pstr_mps_state->extend_frame) {
2122 num_parameter_sets++;
2123 }
2124
2125 for (ps = 0; ps < num_parameter_sets; ps++) {
2126 for (pb = MAX_PARAMETER_BANDS - 1; pb >= 0; pb--) {
2127 p_aux_struct->smg_data[ps][pb] = p_aux_struct->smg_data[ps][mapping[pb]];
2128 }
2129 }
2130 }
2131 }
2132 }
2133 return;
2134 }
2135
ixheaacd_decode_and_map_frame_arbdmx(ia_heaac_mps_state_struct * pstr_mps_state)2136 static IA_ERRORCODE ixheaacd_decode_and_map_frame_arbdmx(
2137 ia_heaac_mps_state_struct *pstr_mps_state) {
2138 IA_ERRORCODE error_code = IA_NO_ERROR;
2139 ia_mps_dec_spatial_bs_frame_struct *frame = pstr_mps_state->bs_frame;
2140 ia_mps_dec_bitdec_tables_struct *bitdec_table =
2141 pstr_mps_state->ia_mps_dec_mps_table.bitdec_table_ptr;
2142 ia_mps_dec_auxilary_struct *p_aux_struct = pstr_mps_state->aux_struct;
2143 WORD32 *param_slot = p_aux_struct->param_slot;
2144 WORD32 offset = pstr_mps_state->num_ott_boxes + 4 * pstr_mps_state->num_ttt_boxes;
2145 WORD32 ch;
2146
2147 VOID *scratch = pstr_mps_state->mps_scratch_mem_v;
2148
2149 for (ch = 0; ch < pstr_mps_state->num_input_channels; ch++) {
2150 error_code = ixheaacd_map_index_data(
2151 &frame->cld_lossless_data, p_aux_struct->arbdmx_gain, frame->arbdmx_gain_idx,
2152 frame->cmp_arbdmx_gain_idx, NULL, ch, frame->arbdmx_gain_idx_prev, offset + ch, CLD, 0,
2153 pstr_mps_state->bitstream_parameter_bands, pstr_mps_state->arbdmx_gain_default,
2154 pstr_mps_state->num_parameter_sets, param_slot, pstr_mps_state->extend_frame, 0, NULL,
2155 NULL, NULL, bitdec_table, scratch);
2156 if (error_code) return error_code;
2157
2158 p_aux_struct->arbdmx_residual_abs[ch] = frame->bs_arbitrary_downmix_residual_abs[ch];
2159 p_aux_struct->arbdmx_alpha_upd_set[ch] =
2160 frame->bs_arbitrary_downmix_residual_alpha_update_set[ch];
2161
2162 if (pstr_mps_state->up_mix_type == 2) {
2163 WORD32 num_parameter_sets = pstr_mps_state->num_parameter_sets;
2164 WORD32 ps;
2165
2166 if (pstr_mps_state->extend_frame) {
2167 num_parameter_sets++;
2168 }
2169
2170 for (ps = 0; ps < num_parameter_sets; ps++) {
2171 ixheaacd_map_data_to_28_bands(p_aux_struct->arbdmx_gain[ch][ps],
2172 pstr_mps_state->bitstream_parameter_bands, bitdec_table);
2173 }
2174 }
2175 }
2176 return error_code;
2177 }
2178
ixheaacd_decode_and_map_frame_arb_tree(ia_heaac_mps_state_struct * pstr_mps_state)2179 static IA_ERRORCODE ixheaacd_decode_and_map_frame_arb_tree(
2180 ia_heaac_mps_state_struct *pstr_mps_state) {
2181 IA_ERRORCODE error_code = IA_NO_ERROR;
2182 ia_mps_dec_spatial_bs_frame_struct *p_cur_bs = pstr_mps_state->bs_frame;
2183 ia_mps_spatial_bs_config_struct *p_config = &(pstr_mps_state->bs_config);
2184 ia_mps_dec_auxilary_struct *p_aux_struct = pstr_mps_state->aux_struct;
2185 WORD32 *param_slot = p_aux_struct->param_slot;
2186 WORD32 offset = pstr_mps_state->num_ott_boxes;
2187
2188 VOID *scratch = pstr_mps_state->mps_scratch_mem_v;
2189
2190 WORD32 i;
2191
2192 for (i = 0; i < p_config->num_ott_boxes_at; i++) {
2193 error_code = ixheaacd_map_index_data(&p_cur_bs->cld_lossless_data, p_aux_struct->ott_cld,
2194 p_cur_bs->ott_cld_idx, p_cur_bs->cmp_ott_cld_idx, NULL, offset + i,
2195 p_cur_bs->ott_cld_idx_prev, offset + i, CLD, 0,
2196 p_config->bs_ott_bands_at[i], p_config->bs_ott_default_cld_at[i],
2197 pstr_mps_state->num_parameter_sets, param_slot,
2198 pstr_mps_state->extend_frame, pstr_mps_state->quant_mode, NULL, NULL,
2199 NULL, pstr_mps_state->ia_mps_dec_mps_table.bitdec_table_ptr, scratch);
2200 if (error_code) return error_code;
2201 }
2202 return error_code;
2203 }
2204
ixheaacd_decode_frame(ia_heaac_mps_state_struct * pstr_mps_state)2205 IA_ERRORCODE ixheaacd_decode_frame(ia_heaac_mps_state_struct *pstr_mps_state) {
2206 IA_ERRORCODE error_code = IA_NO_ERROR;
2207 ia_mps_spatial_bs_config_struct *p_bs_config = &pstr_mps_state->bs_config;
2208 WORD32 *param_slot = pstr_mps_state->aux_struct->param_slot;
2209
2210 pstr_mps_state->extend_frame = 0;
2211 if (param_slot[pstr_mps_state->num_parameter_sets - 1] != pstr_mps_state->time_slots - 1) {
2212 pstr_mps_state->extend_frame = 1;
2213 }
2214 if (pstr_mps_state->extend_frame)
2215 {
2216 if (pstr_mps_state->num_parameter_sets == MAX_PARAMETER_SETS) {
2217 if (pstr_mps_state->ec_flag)
2218 pstr_mps_state->num_parameter_sets = 1;
2219 else
2220 return IA_FATAL_ERROR;
2221 }
2222 }
2223
2224 error_code = ixheaacd_decode_and_map_frame_ott(pstr_mps_state);
2225 if (error_code)
2226 {
2227 if (pstr_mps_state->ec_flag)
2228 {
2229 pstr_mps_state->frame_ok = 0;
2230 for (WORD32 idx = 0; idx < MAX_NUM_OTT; idx++)
2231 {
2232 ixheaacd_mps_check_index_bounds(pstr_mps_state->bs_frame->ott_cld_idx,
2233 pstr_mps_state->num_parameter_sets, 0, pstr_mps_state->bitstream_ott_bands[idx],
2234 CLD, idx);
2235 ixheaacd_mps_check_index_bounds(pstr_mps_state->bs_frame->ott_icc_idx,
2236 pstr_mps_state->num_parameter_sets, 0, pstr_mps_state->bitstream_ott_bands[idx],
2237 ICC, idx);
2238 }
2239 }
2240 else
2241 return error_code;
2242 }
2243
2244 error_code = ixheaacd_decode_and_map_frame_ttt(pstr_mps_state);
2245 if (error_code)
2246 {
2247 if (pstr_mps_state->ec_flag)
2248 {
2249 pstr_mps_state->frame_ok = 0;
2250 ixheaacd_mps_check_index_bounds(pstr_mps_state->bs_frame->ttt_icc_idx,
2251 pstr_mps_state->num_parameter_sets, 0, MAX_PARAMETER_BANDS,
2252 ICC, 0);
2253 }
2254 else
2255 return error_code;
2256 }
2257
2258 ixheaacd_decode_and_map_frame_smg(pstr_mps_state);
2259 if (p_bs_config->arbitrary_tree != 0) {
2260 error_code = ixheaacd_decode_and_map_frame_arb_tree(pstr_mps_state);
2261 if (error_code)
2262 {
2263 if (pstr_mps_state->ec_flag)
2264 {
2265 pstr_mps_state->frame_ok = 0;
2266 for (WORD32 idx = 0; idx < MAX_NUM_OTT; idx++)
2267 {
2268 ixheaacd_mps_check_index_bounds(pstr_mps_state->bs_frame->ott_cld_idx,
2269 pstr_mps_state->num_parameter_sets, 0, MAX_PARAMETER_BANDS,
2270 CLD, idx);
2271 }
2272 }
2273 else
2274 return error_code;
2275 }
2276 }
2277
2278 if (pstr_mps_state->arbitrary_downmix != 0) {
2279 error_code = ixheaacd_decode_and_map_frame_arbdmx(pstr_mps_state);
2280 if (error_code)
2281 {
2282 if (pstr_mps_state->ec_flag)
2283 {
2284 pstr_mps_state->frame_ok = 0;
2285 for (WORD32 idx = 0; idx < MAX_INPUT_CHANNELS_MPS; idx++)
2286 {
2287 ixheaacd_mps_check_index_bounds(pstr_mps_state->bs_frame->arbdmx_gain_idx,
2288 pstr_mps_state->num_parameter_sets, 0, MAX_PARAMETER_BANDS,
2289 CLD, idx);
2290 }
2291 }
2292 else
2293 return error_code;
2294 }
2295 }
2296
2297 if (pstr_mps_state->extend_frame) {
2298 pstr_mps_state->num_parameter_sets++;
2299 param_slot[pstr_mps_state->num_parameter_sets - 1] = pstr_mps_state->time_slots - 1;
2300 }
2301 return IA_NO_ERROR;
2302 }
2303
ixheaacd_set_current_state_parameters(ia_heaac_mps_state_struct * pstr_mps_state)2304 IA_ERRORCODE ixheaacd_set_current_state_parameters(ia_heaac_mps_state_struct *pstr_mps_state) {
2305 WORD32 i;
2306
2307 ia_mps_spatial_bs_config_struct *config = &(pstr_mps_state->bs_config);
2308 ia_mps_spatial_bs_config_struct *p_bs_config = &pstr_mps_state->bs_config;
2309 ia_heaac_mps_state_struct *curr_state = pstr_mps_state;
2310 ia_mps_dec_bitdec_tables_struct *bitdec_table =
2311 pstr_mps_state->ia_mps_dec_mps_table.bitdec_table_ptr;
2312 ia_mps_dec_auxilary_struct *p_aux_struct = pstr_mps_state->aux_struct;
2313 WORD32 *b_ott_bands = curr_state->bitstream_ott_bands;
2314
2315 if (config->bs_sampling_freq_index == 15) {
2316 curr_state->sampling_freq = config->bs_sampling_frequency;
2317 } else {
2318 curr_state->sampling_freq = bitdec_table->sampling_freq_table[config->bs_sampling_freq_index];
2319 }
2320 curr_state->time_slots = config->bs_frame_length + 1;
2321 curr_state->frame_length = curr_state->time_slots * curr_state->qmf_bands;
2322 curr_state->bitstream_parameter_bands = bitdec_table->freq_res_table[config->bs_freq_res];
2323
2324 curr_state->hybrid_bands = curr_state->qmf_bands - QMF_BANDS_TO_HYBRID + 10;
2325 curr_state->tp_hyb_band_border = 12;
2326 if (curr_state->hybrid_bands > 71) {
2327 return IA_FATAL_ERROR;
2328 }
2329 if (curr_state->up_mix_type == 2) {
2330 curr_state->num_parameter_bands = MAX_PARAMETER_BANDS;
2331 } else {
2332 curr_state->num_parameter_bands = curr_state->bitstream_parameter_bands;
2333 }
2334
2335 switch (curr_state->num_parameter_bands) {
2336 case PARAMETER_BANDS_4:
2337 for (i = 0; i < curr_state->hybrid_bands; i++) {
2338 curr_state->kernels[i] = bitdec_table->kernel_table.kernels_4_to_71[i];
2339 }
2340 break;
2341 case PARAMETER_BANDS_5:
2342 for (i = 0; i < curr_state->hybrid_bands; i++) {
2343 curr_state->kernels[i] = bitdec_table->kernel_table.kernels_5_to_71[i];
2344 }
2345 break;
2346 case PARAMETER_BANDS_7:
2347 for (i = 0; i < curr_state->hybrid_bands; i++) {
2348 curr_state->kernels[i] = bitdec_table->kernel_table.kernels_7_to_71[i];
2349 }
2350 break;
2351 case PARAMETER_BANDS_10:
2352 for (i = 0; i < curr_state->hybrid_bands; i++) {
2353 curr_state->kernels[i] = bitdec_table->kernel_table.kernels_10_to_71[i];
2354 }
2355 break;
2356 case PARAMETER_BANDS_14:
2357 for (i = 0; i < curr_state->hybrid_bands; i++) {
2358 curr_state->kernels[i] = bitdec_table->kernel_table.kernels_14_to_71[i];
2359 }
2360 break;
2361 case PARAMETER_BANDS_20:
2362 for (i = 0; i < curr_state->hybrid_bands; i++) {
2363 curr_state->kernels[i] = bitdec_table->kernel_table.kernels_20_to_71[i];
2364 }
2365 break;
2366 case PARAMETER_BANDS_28:
2367 for (i = 0; i < curr_state->hybrid_bands; i++) {
2368 curr_state->kernels[i] = bitdec_table->kernel_table.kernels_28_to_71[i];
2369 }
2370 break;
2371 default:
2372 return IA_XHEAAC_MPS_DEC_EXE_FATAL_INVALID_PARAMETER_BANDS;
2373 };
2374
2375 curr_state->tree_config = config->bs_tree_config;
2376
2377 switch (curr_state->tree_config) {
2378 case TREE_5151:
2379 case TREE_5152:
2380 case TREE_525:
2381 config->ui_channel_mask = FIVE_POINT_ONE_CHANNEL_MASK;
2382 break;
2383 case TREE_7271:
2384 case TREE_7571:
2385 config->ui_channel_mask = SEVEN_POINT_ONE_CHANNEL_MASK1;
2386 break;
2387 case TREE_7272:
2388 case TREE_7572:
2389 config->ui_channel_mask = SEVEN_POINT_ONE_CHANNEL_MASK2;
2390 break;
2391 default:
2392 return IA_XHEAAC_MPS_DEC_EXE_FATAL_UNSUPPRORTED_TREE_CONFIG;
2393 }
2394
2395 curr_state->num_ott_boxes =
2396 bitdec_table->tree_property_table[curr_state->tree_config].num_ott_boxes;
2397 curr_state->num_ttt_boxes =
2398 bitdec_table->tree_property_table[curr_state->tree_config].num_ttt_boxes;
2399 curr_state->num_input_channels =
2400 bitdec_table->tree_property_table[curr_state->tree_config].num_input_channels;
2401 curr_state->num_output_channels =
2402 bitdec_table->tree_property_table[curr_state->tree_config].num_output_channels;
2403 curr_state->quant_mode = config->bs_quant_mode;
2404 curr_state->one_icc = config->bs_one_icc;
2405 curr_state->arbitrary_downmix = config->bs_arbitrary_downmix;
2406 curr_state->residual_coding = config->bs_residual_coding;
2407 curr_state->smooth_config = config->bs_smooth_config;
2408 curr_state->mtx_inversion = config->bs_matrix_mode;
2409 curr_state->temp_shape_config = config->bs_temp_shape_config;
2410 curr_state->decorr_config = config->bs_decorr_config;
2411 curr_state->env_quant_mode = config->bs_env_quant_mode;
2412 curr_state->lfe_gain = bitdec_table->lfe_gain_table[config->bs_fixed_gain_lfe];
2413 curr_state->surround_gain = bitdec_table->surround_gain_table[config->bs_fixed_gain_sur];
2414 curr_state->clip_protect_gain = bitdec_table->clip_gain_table[config->bs_fixed_gain_dmx];
2415
2416 if (curr_state->up_mix_type == 2) {
2417 curr_state->num_output_channels = 2;
2418 curr_state->decorr_config = 0;
2419 }
2420
2421 if (curr_state->up_mix_type == 3) {
2422 curr_state->num_output_channels = 2;
2423 }
2424
2425 if (p_bs_config->arbitrary_tree == 1)
2426 curr_state->num_output_channels_at = p_bs_config->num_out_chan_at;
2427 else
2428 curr_state->num_output_channels_at = curr_state->num_output_channels;
2429
2430 p_bs_config->ui_out_channels = curr_state->num_output_channels_at;
2431
2432 curr_state->_3d_stereo_inversion = config->bs_3d_audio_mode;
2433
2434 if (curr_state->mtx_inversion == 1 || curr_state->_3d_stereo_inversion == 1)
2435 curr_state->m1_param_imag_present = 1;
2436
2437 for (i = 0; i < curr_state->num_ott_boxes; i++) {
2438 if (bitdec_table->tree_property_table[curr_state->tree_config].ott_mode_lfe[i]) {
2439 b_ott_bands[i] = config->bs_ott_bands[i];
2440 curr_state->ott_mode_lfe[i] = 1;
2441 } else {
2442 b_ott_bands[i] = curr_state->bitstream_parameter_bands;
2443 curr_state->ott_mode_lfe[i] = 0;
2444 }
2445
2446 if (curr_state->up_mix_type == 2) {
2447 ixheaacd_map_number_of_bands_to_28_bands(b_ott_bands[i],
2448 curr_state->bitstream_parameter_bands,
2449 &p_aux_struct->num_ott_bands[i], bitdec_table);
2450 } else {
2451 p_aux_struct->num_ott_bands[i] = b_ott_bands[i];
2452 }
2453 }
2454 for (i = 0; i < curr_state->num_ttt_boxes; i++) {
2455 p_aux_struct->ttt_config[0][i].mode = config->bs_ttt_mode_low[i];
2456 p_aux_struct->ttt_config[1][i].mode = config->bs_ttt_mode_high[i];
2457 p_aux_struct->ttt_config[0][i].bitstream_start_band = 0;
2458 p_aux_struct->ttt_config[1][i].bitstream_stop_band = curr_state->bitstream_parameter_bands;
2459
2460 if (config->bs_ttt_dual_mode[i]) {
2461 p_aux_struct->ttt_config[0][i].bitstream_stop_band = config->bs_ttt_bands_low[i];
2462 p_aux_struct->ttt_config[1][i].bitstream_start_band = config->bs_ttt_bands_low[i];
2463 } else {
2464 p_aux_struct->ttt_config[0][i].bitstream_stop_band = curr_state->bitstream_parameter_bands;
2465 p_aux_struct->ttt_config[1][i].bitstream_start_band = curr_state->bitstream_parameter_bands;
2466 }
2467
2468 if (curr_state->up_mix_type == 2) {
2469 ixheaacd_map_number_of_bands_to_28_bands(
2470 p_aux_struct->ttt_config[0][i].bitstream_start_band,
2471 curr_state->bitstream_parameter_bands, &p_aux_struct->ttt_config[0][i].start_band,
2472 bitdec_table);
2473
2474 ixheaacd_map_number_of_bands_to_28_bands(p_aux_struct->ttt_config[0][i].bitstream_stop_band,
2475 curr_state->bitstream_parameter_bands,
2476 &p_aux_struct->ttt_config[0][i].stop_band,
2477 bitdec_table);
2478
2479 ixheaacd_map_number_of_bands_to_28_bands(
2480 p_aux_struct->ttt_config[1][i].bitstream_start_band,
2481 curr_state->bitstream_parameter_bands, &p_aux_struct->ttt_config[1][i].start_band,
2482 bitdec_table);
2483
2484 ixheaacd_map_number_of_bands_to_28_bands(p_aux_struct->ttt_config[1][i].bitstream_stop_band,
2485 curr_state->bitstream_parameter_bands,
2486 &p_aux_struct->ttt_config[1][i].stop_band,
2487 bitdec_table);
2488 } else {
2489 p_aux_struct->ttt_config[0][i].start_band =
2490 p_aux_struct->ttt_config[0][i].bitstream_start_band;
2491 p_aux_struct->ttt_config[0][i].stop_band =
2492 p_aux_struct->ttt_config[0][i].bitstream_stop_band;
2493 p_aux_struct->ttt_config[1][i].start_band =
2494 p_aux_struct->ttt_config[1][i].bitstream_start_band;
2495 p_aux_struct->ttt_config[1][i].stop_band =
2496 p_aux_struct->ttt_config[1][i].bitstream_stop_band;
2497 }
2498 }
2499 curr_state->residual_coding = config->bs_residual_coding;
2500 curr_state->num_residual_signals = 0;
2501 if (curr_state->residual_coding) {
2502 for (i = 0; i < curr_state->num_ttt_boxes + curr_state->num_ott_boxes; i++) {
2503 if (config->bs_residual_present[i]) {
2504 curr_state->res_bands[i] = config->bs_residual_bands[i];
2505 curr_state->num_residual_signals++;
2506 } else {
2507 curr_state->res_bands[i] = 0;
2508 }
2509
2510 if (curr_state->up_mix_type == 2 || curr_state->up_mix_type == 3) {
2511 curr_state->res_bands[i] = 0;
2512 }
2513 }
2514 }
2515
2516 curr_state->residual_frames_per_spatial_frame =
2517 p_bs_config->bs_residual_frames_per_spatial_frame + 1;
2518 if (curr_state->residual_frames_per_spatial_frame > 0) {
2519 WORD32 const *reciprocal_tab =
2520 pstr_mps_state->ia_mps_dec_mps_table.m1_m2_table_ptr->reciprocal;
2521
2522 WORD64 temp =
2523 (WORD64)(((WORD64)(p_bs_config->bs_frame_length + 1) *
2524 (WORD64)reciprocal_tab[p_bs_config->bs_residual_frames_per_spatial_frame]) >>
2525 28);
2526 curr_state->upd_qmf = (WORD32)temp;
2527 if (curr_state->upd_qmf != UPD_QMF_15 && curr_state->upd_qmf != UPD_QMF_16 &&
2528 curr_state->upd_qmf != UPD_QMF_32 && curr_state->upd_qmf != UPD_QMF_18 &&
2529 curr_state->upd_qmf != UPD_QMF_30 && curr_state->upd_qmf != UPD_QMF_24)
2530 return IA_XHEAAC_MPS_DEC_EXE_NONFATAL_INVALID_QMF_UPDATE;
2531 }
2532
2533 curr_state->arbdmx_residual_bands = config->bs_arbitrary_downmix_residual_bands;
2534 curr_state->arbdmx_frames_per_spatial_frame =
2535 config->bs_arbitrary_downmix_residual_frames_per_spatial_frame + 1;
2536 if (curr_state->arbdmx_frames_per_spatial_frame > 0) {
2537 curr_state->arbdmx_upd_qmf =
2538 curr_state->time_slots / curr_state->arbdmx_frames_per_spatial_frame;
2539 if (curr_state->arbdmx_upd_qmf != UPD_QMF_15 && curr_state->arbdmx_upd_qmf != UPD_QMF_16 &&
2540 curr_state->arbdmx_upd_qmf != UPD_QMF_32 && curr_state->arbdmx_upd_qmf != UPD_QMF_18 &&
2541 curr_state->arbdmx_upd_qmf != UPD_QMF_30 && curr_state->arbdmx_upd_qmf != UPD_QMF_24)
2542 return IA_XHEAAC_MPS_DEC_EXE_NONFATAL_INVALID_QMF_UPDATE;
2543
2544 if ((curr_state->arbdmx_upd_qmf * 1.5f) > (curr_state->upd_qmf * 2))
2545 return IA_XHEAAC_MPS_DEC_EXE_NONFATAL_INVALID_QMF_UPDATE;
2546 }
2547
2548 curr_state->cpc_default = 10;
2549 curr_state->ttt_cld_1_default[0] = 15;
2550 curr_state->ttt_cld_2_default[0] = 0;
2551 curr_state->icc_default = 0;
2552 curr_state->arbdmx_gain_default = 0;
2553
2554 if (curr_state->_3d_stereo_inversion) {
2555 if (config->bs_3d_audio_hrtf_set == 0) {
2556 return IA_XHEAAC_MPS_DEC_EXE_FATAL_INVALID_HRTF_SET;
2557 } else {
2558 return IA_XHEAAC_MPS_DEC_EXE_FATAL_INVALID_HRTF_SET;
2559 }
2560 }
2561
2562 switch (curr_state->tree_config) {
2563 case TREE_5151:
2564 curr_state->num_direct_signals = 1;
2565 curr_state->num_decor_signals = 4;
2566
2567 if (curr_state->up_mix_type == 2) {
2568 curr_state->num_decor_signals = 1;
2569 }
2570
2571 if (curr_state->up_mix_type == 3) {
2572 curr_state->num_decor_signals = 3;
2573 }
2574
2575 curr_state->num_x_channels = 1;
2576 if (curr_state->arbitrary_downmix == 2) {
2577 curr_state->num_x_channels += 1;
2578 }
2579 curr_state->num_v_channels = curr_state->num_direct_signals + curr_state->num_decor_signals;
2580 curr_state->num_w_channels = curr_state->num_v_channels;
2581 curr_state->w_start_residual_idx = 0;
2582 curr_state->ott_cld_default[0] = 15;
2583 curr_state->ott_cld_default[1] = 15;
2584 curr_state->ott_cld_default[2] = 0;
2585 curr_state->ott_cld_default[3] = 0;
2586 curr_state->ott_cld_default[4] = 15;
2587 break;
2588 case TREE_5152:
2589 curr_state->num_direct_signals = 1;
2590 curr_state->num_decor_signals = 4;
2591
2592 if (curr_state->up_mix_type == 2) {
2593 curr_state->num_decor_signals = 1;
2594 }
2595
2596 if (curr_state->up_mix_type == 3) {
2597 curr_state->num_decor_signals = 2;
2598 }
2599
2600 curr_state->num_x_channels = 1;
2601 if (curr_state->arbitrary_downmix == 2) {
2602 curr_state->num_x_channels += 1;
2603 }
2604 curr_state->num_v_channels = curr_state->num_direct_signals + curr_state->num_decor_signals;
2605 curr_state->num_w_channels = curr_state->num_v_channels;
2606 curr_state->w_start_residual_idx = 0;
2607 curr_state->ott_cld_default[0] = 15;
2608 curr_state->ott_cld_default[1] = 0;
2609 curr_state->ott_cld_default[2] = 15;
2610 curr_state->ott_cld_default[3] = 15;
2611 curr_state->ott_cld_default[4] = 15;
2612 break;
2613 case TREE_525:
2614 curr_state->num_direct_signals = 3;
2615
2616 for (i = 0; i < 2; i++) {
2617 switch (p_aux_struct->ttt_config[i][0].mode) {
2618 case TTT_MODE_0:
2619 p_aux_struct->ttt_config[i][0].use_ttt_decorr = 1;
2620 curr_state->num_decor_signals = 3;
2621 break;
2622 case TTT_MODE_1:
2623 case TTT_MODE_2:
2624 case TTT_MODE_3:
2625 case TTT_MODE_4:
2626 case TTT_MODE_5:
2627 p_aux_struct->ttt_config[i][0].use_ttt_decorr = 0;
2628 curr_state->num_decor_signals = 2;
2629 break;
2630 default:
2631 if (p_bs_config->bs_ttt_mode_low[0] <= 1)
2632 return IA_XHEAAC_MPS_DEC_EXE_FATAL_INVALID_TTT_MODE;
2633 break;
2634 }
2635 }
2636
2637 if (curr_state->residual_coding == 1) {
2638 curr_state->num_x_channels = 3;
2639 } else {
2640 curr_state->num_x_channels = 2;
2641 }
2642
2643 if (curr_state->arbitrary_downmix == 2) {
2644 curr_state->num_x_channels = 5;
2645 }
2646
2647 if (curr_state->up_mix_type == 2) {
2648 curr_state->num_direct_signals = 2;
2649 curr_state->num_decor_signals = 0;
2650 curr_state->num_x_channels = 2;
2651
2652 if (curr_state->arbitrary_downmix == 2) {
2653 curr_state->num_direct_signals = 4;
2654 curr_state->num_x_channels = 5;
2655 }
2656 }
2657
2658 curr_state->num_v_channels = curr_state->num_direct_signals + curr_state->num_decor_signals;
2659 curr_state->num_w_channels = curr_state->num_v_channels;
2660 curr_state->w_start_residual_idx = 1;
2661 curr_state->ott_cld_default[0] = 15;
2662 curr_state->ott_cld_default[1] = 15;
2663 curr_state->ott_cld_default[2] = 15;
2664 break;
2665 case TREE_7271:
2666 case TREE_7272:
2667 curr_state->num_direct_signals = 3;
2668
2669 for (i = 0; i < 2; i++) {
2670 switch (p_aux_struct->ttt_config[i][0].mode) {
2671 case TTT_MODE_0:
2672 p_aux_struct->ttt_config[i][0].use_ttt_decorr = 1;
2673 curr_state->num_decor_signals = 5;
2674 break;
2675 case TTT_MODE_1:
2676 case TTT_MODE_2:
2677 case TTT_MODE_3:
2678 case TTT_MODE_4:
2679 case TTT_MODE_5:
2680 p_aux_struct->ttt_config[i][0].use_ttt_decorr = 0;
2681 curr_state->num_decor_signals = 5;
2682 break;
2683 default:
2684 if (p_bs_config->bs_ttt_mode_low[0] <= 1)
2685 return IA_XHEAAC_MPS_DEC_EXE_FATAL_INVALID_TTT_MODE;
2686 break;
2687 }
2688 }
2689
2690 if (curr_state->residual_coding == 1) {
2691 curr_state->num_x_channels = 3;
2692 } else {
2693 curr_state->num_x_channels = 2;
2694 }
2695
2696 if (curr_state->arbitrary_downmix == 2) {
2697 curr_state->num_x_channels = 5;
2698 }
2699
2700 if (curr_state->up_mix_type == 2) {
2701 curr_state->num_direct_signals = 2;
2702 curr_state->num_decor_signals = 0;
2703 curr_state->num_x_channels = 2;
2704
2705 if (curr_state->arbitrary_downmix == 2) {
2706 curr_state->num_direct_signals = 4;
2707 curr_state->num_x_channels = 5;
2708 }
2709 }
2710
2711 curr_state->num_v_channels = curr_state->num_direct_signals + curr_state->num_decor_signals;
2712 curr_state->num_w_channels = curr_state->num_v_channels;
2713 curr_state->w_start_residual_idx = 1;
2714 curr_state->ott_cld_default[0] = 15;
2715 curr_state->ott_cld_default[1] = 15;
2716 curr_state->ott_cld_default[2] = 15;
2717 curr_state->ott_cld_default[3] = 15;
2718 curr_state->ott_cld_default[4] = 15;
2719 break;
2720 case TREE_7571:
2721 case TREE_7572:
2722 curr_state->num_direct_signals = 6;
2723 curr_state->num_decor_signals = 2;
2724 curr_state->num_x_channels = 6;
2725 curr_state->num_v_channels = curr_state->num_direct_signals + curr_state->num_decor_signals;
2726 curr_state->num_w_channels = curr_state->num_v_channels;
2727 curr_state->w_start_residual_idx = 0;
2728 curr_state->ott_cld_default[0] = 15;
2729 curr_state->ott_cld_default[1] = 15;
2730 break;
2731 default:
2732 return IA_XHEAAC_MPS_DEC_EXE_FATAL_UNSUPPRORTED_TREE_CONFIG;
2733 break;
2734 }
2735 return IA_NO_ERROR;
2736 }
2737
ixheaacd_get_dequant_tables(WORD32 ** cld,WORD32 ** icc,WORD32 ** cpc,ia_mps_dec_bitdec_tables_struct * ixheaacd_mps_dec_bitdec_tables)2738 VOID ixheaacd_get_dequant_tables(
2739 WORD32 **cld, WORD32 **icc, WORD32 **cpc,
2740 ia_mps_dec_bitdec_tables_struct *ixheaacd_mps_dec_bitdec_tables) {
2741 *cld = ixheaacd_mps_dec_bitdec_tables->dequant_cld;
2742 *icc = ixheaacd_mps_dec_bitdec_tables->dequant_icc;
2743 *cpc = ixheaacd_mps_dec_bitdec_tables->dequant_cpc;
2744 }
2745
ixheaacd_quantize_cld(WORD32 v,ia_mps_dec_bitdec_tables_struct * ixheaacd_mps_dec_bitdec_tables)2746 WORD32 ixheaacd_quantize_cld(WORD32 v,
2747 ia_mps_dec_bitdec_tables_struct *ixheaacd_mps_dec_bitdec_tables) {
2748 WORD32 i = 1;
2749 WORD32 temp_1;
2750 WORD32 vmin = ixheaacd_mps_dec_bitdec_tables->dequant_cld[0];
2751 WORD32 dmin = abs(v - vmin);
2752
2753 do {
2754 temp_1 = abs(v - ixheaacd_mps_dec_bitdec_tables->dequant_cld[i]);
2755 if (temp_1 < dmin) {
2756 dmin = temp_1;
2757 vmin = ixheaacd_mps_dec_bitdec_tables->dequant_cld[i];
2758 }
2759 } while (ixheaacd_mps_dec_bitdec_tables->dequant_cld[i++] < ONE_FORTYNINE_Q15);
2760 return vmin;
2761 }
2762
ixheaacd_quantize_icc(WORD32 v,ia_mps_dec_bitdec_tables_struct * ixheaacd_mps_dec_bitdec_tables)2763 WORD32 ixheaacd_quantize_icc(WORD32 v,
2764 ia_mps_dec_bitdec_tables_struct *ixheaacd_mps_dec_bitdec_tables) {
2765 WORD32 i = 1;
2766 WORD32 temp_1;
2767 WORD32 vmin = ixheaacd_mps_dec_bitdec_tables->dequant_icc[0];
2768 WORD32 dmin = abs(v - vmin);
2769
2770 do {
2771 temp_1 = abs(v - ixheaacd_mps_dec_bitdec_tables->dequant_icc[i]);
2772 if (temp_1 < dmin) {
2773 dmin = temp_1;
2774 vmin = ixheaacd_mps_dec_bitdec_tables->dequant_icc[i];
2775 }
2776 } while (ixheaacd_mps_dec_bitdec_tables->dequant_icc[i++] > MINUS_POINT_NINE_EIGHT_Q15);
2777
2778 return vmin;
2779 }
2780