1 /*
2 * Copyright (C) 2019-2022 Collabora, Ltd.
3 * Copyright (C) 2018-2019 Alyssa Rosenzweig
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 */
25
26 #include "util/log.h"
27 #include "util/macros.h"
28 #include "util/u_math.h"
29 #include "pan_texture.h"
30
31 /*
32 * List of supported modifiers, in descending order of preference. AFBC is
33 * faster than u-interleaved tiling which is faster than linear. Within AFBC,
34 * enabling the YUV-like transform is typically a win where possible.
35 * AFRC is only used if explicitely asked for (only for RGB formats).
36 */
37 uint64_t pan_best_modifiers[PAN_MODIFIER_COUNT] = {
38 DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
39 AFBC_FORMAT_MOD_TILED | AFBC_FORMAT_MOD_SC |
40 AFBC_FORMAT_MOD_SPARSE | AFBC_FORMAT_MOD_YTR),
41
42 DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
43 AFBC_FORMAT_MOD_TILED | AFBC_FORMAT_MOD_SC |
44 AFBC_FORMAT_MOD_SPARSE),
45
46 DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
47 AFBC_FORMAT_MOD_SPARSE | AFBC_FORMAT_MOD_YTR),
48
49 DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 |
50 AFBC_FORMAT_MOD_SPARSE),
51
52 DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED,
53 DRM_FORMAT_MOD_LINEAR,
54
55 DRM_FORMAT_MOD_ARM_AFRC(
56 AFRC_FORMAT_MOD_CU_SIZE_P0(AFRC_FORMAT_MOD_CU_SIZE_16)),
57 DRM_FORMAT_MOD_ARM_AFRC(
58 AFRC_FORMAT_MOD_CU_SIZE_P0(AFRC_FORMAT_MOD_CU_SIZE_24)),
59 DRM_FORMAT_MOD_ARM_AFRC(
60 AFRC_FORMAT_MOD_CU_SIZE_P0(AFRC_FORMAT_MOD_CU_SIZE_32)),
61 DRM_FORMAT_MOD_ARM_AFRC(
62 AFRC_FORMAT_MOD_CU_SIZE_P0(AFRC_FORMAT_MOD_CU_SIZE_16) |
63 AFRC_FORMAT_MOD_LAYOUT_SCAN),
64 DRM_FORMAT_MOD_ARM_AFRC(
65 AFRC_FORMAT_MOD_CU_SIZE_P0(AFRC_FORMAT_MOD_CU_SIZE_24) |
66 AFRC_FORMAT_MOD_LAYOUT_SCAN),
67 DRM_FORMAT_MOD_ARM_AFRC(
68 AFRC_FORMAT_MOD_CU_SIZE_P0(AFRC_FORMAT_MOD_CU_SIZE_32) |
69 AFRC_FORMAT_MOD_LAYOUT_SCAN),
70 };
71
72 /* Table of AFBC superblock sizes */
73 static const struct pan_block_size afbc_superblock_sizes[] = {
74 [AFBC_FORMAT_MOD_BLOCK_SIZE_16x16] = {16, 16},
75 [AFBC_FORMAT_MOD_BLOCK_SIZE_32x8] = {32, 8},
76 [AFBC_FORMAT_MOD_BLOCK_SIZE_64x4] = {64, 4},
77 };
78
79 /*
80 * Given an AFBC modifier, return the superblock size.
81 *
82 * We do not yet have any use cases for multiplanar YCBCr formats with different
83 * superblock sizes on the luma and chroma planes. These formats are unsupported
84 * for now.
85 */
86 struct pan_block_size
panfrost_afbc_superblock_size(uint64_t modifier)87 panfrost_afbc_superblock_size(uint64_t modifier)
88 {
89 unsigned index = (modifier & AFBC_FORMAT_MOD_BLOCK_SIZE_MASK);
90
91 assert(drm_is_afbc(modifier));
92 assert(index < ARRAY_SIZE(afbc_superblock_sizes));
93
94 return afbc_superblock_sizes[index];
95 }
96
97 /*
98 * Given an AFBC modifier, return the width of the superblock.
99 */
100 unsigned
panfrost_afbc_superblock_width(uint64_t modifier)101 panfrost_afbc_superblock_width(uint64_t modifier)
102 {
103 return panfrost_afbc_superblock_size(modifier).width;
104 }
105
106 /*
107 * Given an AFBC modifier, return the height of the superblock.
108 */
109 unsigned
panfrost_afbc_superblock_height(uint64_t modifier)110 panfrost_afbc_superblock_height(uint64_t modifier)
111 {
112 return panfrost_afbc_superblock_size(modifier).height;
113 }
114
115 /*
116 * Given an AFBC modifier, return if "wide blocks" are used. Wide blocks are
117 * defined as superblocks wider than 16 pixels, the minimum (and default) super
118 * block width.
119 */
120 bool
panfrost_afbc_is_wide(uint64_t modifier)121 panfrost_afbc_is_wide(uint64_t modifier)
122 {
123 return panfrost_afbc_superblock_width(modifier) > 16;
124 }
125
126 /*
127 * Given an AFBC modifier, return the subblock size (subdivision of a
128 * superblock). This is always 4x4 for now as we only support one AFBC
129 * superblock layout.
130 */
131 struct pan_block_size
panfrost_afbc_subblock_size(uint64_t modifier)132 panfrost_afbc_subblock_size(uint64_t modifier)
133 {
134 return (struct pan_block_size){4, 4};
135 }
136
137 /*
138 * Given an AFRC modifier, return whether the layout is optimized for scan
139 * order (vs rotation order).
140 */
141 bool
panfrost_afrc_is_scan(uint64_t modifier)142 panfrost_afrc_is_scan(uint64_t modifier)
143 {
144 return modifier & AFRC_FORMAT_MOD_LAYOUT_SCAN;
145 }
146
147 struct pan_block_size
panfrost_afrc_clump_size(enum pipe_format format,bool scan)148 panfrost_afrc_clump_size(enum pipe_format format, bool scan)
149 {
150 struct pan_afrc_format_info finfo = panfrost_afrc_get_format_info(format);
151
152 switch (finfo.num_comps) {
153 case 1:
154 return scan ? (struct pan_block_size){16, 4}
155 : (struct pan_block_size){8, 8};
156 case 2:
157 return (struct pan_block_size){8, 4};
158 case 3:
159 case 4:
160 return (struct pan_block_size){4, 4};
161 default:
162 assert(0);
163 return (struct pan_block_size){0, 0};
164 }
165 }
166
167 static struct pan_block_size
panfrost_afrc_layout_size(uint64_t modifier)168 panfrost_afrc_layout_size(uint64_t modifier)
169 {
170 if (panfrost_afrc_is_scan(modifier))
171 return (struct pan_block_size){16, 4};
172 else
173 return (struct pan_block_size){8, 8};
174 }
175
176 struct pan_block_size
panfrost_afrc_tile_size(enum pipe_format format,uint64_t modifier)177 panfrost_afrc_tile_size(enum pipe_format format, uint64_t modifier)
178 {
179 bool scan = panfrost_afrc_is_scan(modifier);
180 struct pan_block_size clump_sz = panfrost_afrc_clump_size(format, scan);
181 struct pan_block_size layout_sz = panfrost_afrc_layout_size(modifier);
182
183 return (struct pan_block_size){clump_sz.width * layout_sz.width,
184 clump_sz.height * layout_sz.height};
185 }
186
187 unsigned
panfrost_afrc_block_size_from_modifier(uint64_t modifier)188 panfrost_afrc_block_size_from_modifier(uint64_t modifier)
189 {
190 switch (modifier & AFRC_FORMAT_MOD_CU_SIZE_MASK) {
191 case AFRC_FORMAT_MOD_CU_SIZE_16:
192 return 16;
193 case AFRC_FORMAT_MOD_CU_SIZE_24:
194 return 24;
195 case AFRC_FORMAT_MOD_CU_SIZE_32:
196 return 32;
197 default:
198 unreachable("invalid coding unit size flag in modifier");
199 };
200 }
201
202 static unsigned
panfrost_afrc_buffer_alignment_from_modifier(uint64_t modifier)203 panfrost_afrc_buffer_alignment_from_modifier(uint64_t modifier)
204 {
205 switch (modifier & AFRC_FORMAT_MOD_CU_SIZE_MASK) {
206 case AFRC_FORMAT_MOD_CU_SIZE_16:
207 return 1024;
208 case AFRC_FORMAT_MOD_CU_SIZE_24:
209 return 512;
210 case AFRC_FORMAT_MOD_CU_SIZE_32:
211 return 2048;
212 default:
213 unreachable("invalid coding unit size flag in modifier");
214 };
215 }
216
217 /*
218 * Determine the number of bytes between rows of paging tiles in an AFRC image
219 */
220 uint32_t
pan_afrc_row_stride(enum pipe_format format,uint64_t modifier,uint32_t width)221 pan_afrc_row_stride(enum pipe_format format, uint64_t modifier, uint32_t width)
222 {
223 struct pan_block_size tile_size = panfrost_afrc_tile_size(format, modifier);
224 unsigned block_size = panfrost_afrc_block_size_from_modifier(modifier);
225
226 return (width / tile_size.width) * block_size * AFRC_CLUMPS_PER_TILE;
227 }
228
229 /*
230 * Given a format, determine the tile size used for u-interleaving. For formats
231 * that are already block compressed, this is 4x4. For all other formats, this
232 * is 16x16, hence the modifier name.
233 */
234 static inline struct pan_block_size
panfrost_u_interleaved_tile_size(enum pipe_format format)235 panfrost_u_interleaved_tile_size(enum pipe_format format)
236 {
237 if (util_format_is_compressed(format))
238 return (struct pan_block_size){4, 4};
239 else
240 return (struct pan_block_size){16, 16};
241 }
242
243 /*
244 * Determine the block size used for interleaving. For u-interleaving, this is
245 * the tile size. For AFBC, this is the superblock size. For AFRC, this is the
246 * paging tile size. For linear textures, this is trivially 1x1.
247 */
248 struct pan_block_size
panfrost_block_size(uint64_t modifier,enum pipe_format format)249 panfrost_block_size(uint64_t modifier, enum pipe_format format)
250 {
251 if (modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED)
252 return panfrost_u_interleaved_tile_size(format);
253 else if (drm_is_afbc(modifier))
254 return panfrost_afbc_superblock_size(modifier);
255 else if (drm_is_afrc(modifier))
256 return panfrost_afrc_tile_size(format, modifier);
257 else
258 return (struct pan_block_size){1, 1};
259 }
260
261 /*
262 * Determine the tile size used by AFBC. This tiles superblocks themselves.
263 * Current GPUs support either 8x8 tiling or no tiling (1x1)
264 */
265 static inline unsigned
pan_afbc_tile_size(uint64_t modifier)266 pan_afbc_tile_size(uint64_t modifier)
267 {
268 return (modifier & AFBC_FORMAT_MOD_TILED) ? 8 : 1;
269 }
270
271 /*
272 * Determine the number of bytes between header rows for an AFBC image. For an
273 * image with linear headers, this is simply the number of header blocks
274 * (=superblocks) per row times the numbers of bytes per header block. For an
275 * image with tiled headers, this is multipled by the number of rows of
276 * header blocks are in a tile together.
277 */
278 uint32_t
pan_afbc_row_stride(uint64_t modifier,uint32_t width)279 pan_afbc_row_stride(uint64_t modifier, uint32_t width)
280 {
281 unsigned block_width = panfrost_afbc_superblock_width(modifier);
282
283 return (width / block_width) * pan_afbc_tile_size(modifier) *
284 AFBC_HEADER_BYTES_PER_TILE;
285 }
286
287 /*
288 * Determine the number of header blocks between header rows. This is equal to
289 * the number of bytes between header rows divided by the bytes per blocks of a
290 * header tile. This is also divided by the tile size to give a "line stride" in
291 * blocks, rather than a real row stride. This is required by Bifrost.
292 */
293 uint32_t
pan_afbc_stride_blocks(uint64_t modifier,uint32_t row_stride_bytes)294 pan_afbc_stride_blocks(uint64_t modifier, uint32_t row_stride_bytes)
295 {
296 return row_stride_bytes /
297 (AFBC_HEADER_BYTES_PER_TILE * pan_afbc_tile_size(modifier));
298 }
299
300 /*
301 * Determine the required alignment for the slice offset of an image. For
302 * now, this is always aligned on 64-byte boundaries. */
303 uint32_t
pan_slice_align(uint64_t modifier)304 pan_slice_align(uint64_t modifier)
305 {
306 return 64;
307 }
308
309 /*
310 * Determine the required alignment for the body offset of an AFBC image. For
311 * now, this depends only on whether tiling is in use. These minimum alignments
312 * are required on all current GPUs.
313 */
314 uint32_t
pan_afbc_body_align(uint64_t modifier)315 pan_afbc_body_align(uint64_t modifier)
316 {
317 return (modifier & AFBC_FORMAT_MOD_TILED) ? 4096 : 64;
318 }
319
320 static inline unsigned
format_minimum_alignment(unsigned arch,enum pipe_format format,uint64_t mod)321 format_minimum_alignment(unsigned arch, enum pipe_format format, uint64_t mod)
322 {
323 if (drm_is_afbc(mod))
324 return 16;
325
326 if (drm_is_afrc(mod))
327 return panfrost_afrc_buffer_alignment_from_modifier(mod);
328
329 if (arch < 7)
330 return 64;
331
332 switch (format) {
333 /* For v7+, NV12/NV21/I420 have a looser alignment requirement of 16 bytes */
334 case PIPE_FORMAT_R8_G8B8_420_UNORM:
335 case PIPE_FORMAT_G8_B8R8_420_UNORM:
336 case PIPE_FORMAT_R8_G8_B8_420_UNORM:
337 case PIPE_FORMAT_R8_B8_G8_420_UNORM:
338 return 16;
339 default:
340 return 64;
341 }
342 }
343
344 /* Computes sizes for checksumming, which is 8 bytes per 16x16 tile.
345 * Checksumming is believed to be a CRC variant (CRC64 based on the size?).
346 * This feature is also known as "transaction elimination". */
347
348 #define CHECKSUM_TILE_WIDTH 16
349 #define CHECKSUM_TILE_HEIGHT 16
350 #define CHECKSUM_BYTES_PER_TILE 8
351
352 unsigned
panfrost_compute_checksum_size(struct pan_image_slice_layout * slice,unsigned width,unsigned height)353 panfrost_compute_checksum_size(struct pan_image_slice_layout *slice,
354 unsigned width, unsigned height)
355 {
356 unsigned tile_count_x = DIV_ROUND_UP(width, CHECKSUM_TILE_WIDTH);
357 unsigned tile_count_y = DIV_ROUND_UP(height, CHECKSUM_TILE_HEIGHT);
358
359 slice->crc.stride = tile_count_x * CHECKSUM_BYTES_PER_TILE;
360
361 return slice->crc.stride * tile_count_y;
362 }
363
364 unsigned
panfrost_get_layer_stride(const struct pan_image_layout * layout,unsigned level)365 panfrost_get_layer_stride(const struct pan_image_layout *layout, unsigned level)
366 {
367 if (layout->dim != MALI_TEXTURE_DIMENSION_3D)
368 return layout->array_stride;
369 else if (drm_is_afbc(layout->modifier))
370 return layout->slices[level].afbc.surface_stride;
371 else
372 return layout->slices[level].surface_stride;
373 }
374
375 unsigned
panfrost_get_legacy_stride(const struct pan_image_layout * layout,unsigned level)376 panfrost_get_legacy_stride(const struct pan_image_layout *layout,
377 unsigned level)
378 {
379 unsigned row_stride = layout->slices[level].row_stride;
380 struct pan_block_size block_size =
381 panfrost_block_size(layout->modifier, layout->format);
382
383 if (drm_is_afbc(layout->modifier)) {
384 unsigned width = u_minify(layout->width, level);
385 unsigned alignment =
386 block_size.width * pan_afbc_tile_size(layout->modifier);
387
388 width = ALIGN_POT(width, alignment);
389 return width * util_format_get_blocksize(layout->format);
390 } else if (drm_is_afrc(layout->modifier)) {
391 struct pan_block_size tile_size =
392 panfrost_afrc_tile_size(layout->format, layout->modifier);
393
394 return row_stride / tile_size.height;
395 } else {
396 return row_stride / block_size.height;
397 }
398 }
399
400 unsigned
panfrost_from_legacy_stride(unsigned legacy_stride,enum pipe_format format,uint64_t modifier)401 panfrost_from_legacy_stride(unsigned legacy_stride, enum pipe_format format,
402 uint64_t modifier)
403 {
404 struct pan_block_size block_size = panfrost_block_size(modifier, format);
405
406 if (drm_is_afbc(modifier)) {
407 unsigned width = legacy_stride / util_format_get_blocksize(format);
408
409 return pan_afbc_row_stride(modifier, width);
410 } else if (drm_is_afrc(modifier)) {
411 struct pan_block_size tile_size =
412 panfrost_afrc_tile_size(format, modifier);
413
414 return legacy_stride * tile_size.height;
415 } else {
416 return legacy_stride * block_size.height;
417 }
418 }
419
420 /* Computes the offset into a texture at a particular level/face. Add to
421 * the base address of a texture to get the address to that level/face */
422
423 unsigned
panfrost_texture_offset(const struct pan_image_layout * layout,unsigned level,unsigned array_idx,unsigned surface_idx)424 panfrost_texture_offset(const struct pan_image_layout *layout, unsigned level,
425 unsigned array_idx, unsigned surface_idx)
426 {
427 return layout->slices[level].offset + (array_idx * layout->array_stride) +
428 (surface_idx * layout->slices[level].surface_stride);
429 }
430
431 bool
pan_image_layout_init(unsigned arch,struct pan_image_layout * layout,const struct pan_image_explicit_layout * explicit_layout)432 pan_image_layout_init(unsigned arch, struct pan_image_layout *layout,
433 const struct pan_image_explicit_layout *explicit_layout)
434 {
435 /* Explicit stride only work with non-mipmap, non-array, single-sample
436 * 2D image without CRC.
437 */
438 if (explicit_layout &&
439 (layout->depth > 1 || layout->nr_samples > 1 || layout->array_size > 1 ||
440 layout->dim != MALI_TEXTURE_DIMENSION_2D || layout->nr_slices > 1 ||
441 layout->crc))
442 return false;
443
444 bool afbc = drm_is_afbc(layout->modifier);
445 bool afrc = drm_is_afrc(layout->modifier);
446 int align_req =
447 format_minimum_alignment(arch, layout->format, layout->modifier);
448
449 /* Mandate alignment */
450 if (explicit_layout) {
451 bool rejected = false;
452
453 int align_mask = align_req - 1;
454
455 if (arch >= 7) {
456 rejected = ((explicit_layout->offset & align_mask) ||
457 (explicit_layout->row_stride & align_mask));
458 } else {
459 rejected = (explicit_layout->offset & align_mask);
460 }
461
462 if (rejected) {
463 mesa_loge(
464 "panfrost: rejecting image due to unsupported offset or stride "
465 "alignment.\n");
466 return false;
467 }
468 }
469
470 unsigned fmt_blocksize = util_format_get_blocksize(layout->format);
471
472 /* MSAA is implemented as a 3D texture with z corresponding to the
473 * sample #, horrifyingly enough */
474
475 assert(layout->depth == 1 || layout->nr_samples == 1);
476
477 bool linear = layout->modifier == DRM_FORMAT_MOD_LINEAR;
478 bool is_3d = layout->dim == MALI_TEXTURE_DIMENSION_3D;
479
480 unsigned offset = explicit_layout ? explicit_layout->offset : 0;
481 struct pan_block_size block_size =
482 panfrost_block_size(layout->modifier, layout->format);
483
484 unsigned width = layout->width;
485 unsigned height = layout->height;
486 unsigned depth = layout->depth;
487
488 unsigned align_w = block_size.width;
489 unsigned align_h = block_size.height;
490
491 /* For tiled AFBC, align to tiles of superblocks (this can be large) */
492 if (afbc) {
493 align_w *= pan_afbc_tile_size(layout->modifier);
494 align_h *= pan_afbc_tile_size(layout->modifier);
495 }
496
497 for (unsigned l = 0; l < layout->nr_slices; ++l) {
498 struct pan_image_slice_layout *slice = &layout->slices[l];
499
500 unsigned effective_width =
501 ALIGN_POT(util_format_get_nblocksx(layout->format, width), align_w);
502 unsigned effective_height =
503 ALIGN_POT(util_format_get_nblocksy(layout->format, height), align_h);
504 unsigned row_stride;
505
506 /* Align levels to cache-line as a performance improvement for
507 * linear/tiled and as a requirement for AFBC */
508
509 offset = ALIGN_POT(offset, pan_slice_align(layout->modifier));
510
511 slice->offset = offset;
512
513 if (afrc) {
514 row_stride = pan_afrc_row_stride(layout->format, layout->modifier,
515 effective_width);
516 } else {
517 row_stride = fmt_blocksize * effective_width * block_size.height;
518 }
519
520 /* On v7+ row_stride and offset alignment requirement are equal */
521 if (arch >= 7) {
522 row_stride = ALIGN_POT(row_stride, align_req);
523 }
524
525 if (explicit_layout && !afbc && !afrc) {
526 /* Make sure the explicit stride is valid */
527 if (explicit_layout->row_stride < row_stride) {
528 mesa_loge("panfrost: rejecting image due to invalid row stride.\n");
529 return false;
530 }
531
532 row_stride = explicit_layout->row_stride;
533 } else if (linear) {
534 /* Keep lines alignment on 64 byte for performance */
535 row_stride = ALIGN_POT(row_stride, 64);
536 }
537
538 unsigned slice_one_size =
539 row_stride * (effective_height / block_size.height);
540
541 /* Compute AFBC sizes if necessary */
542 if (afbc) {
543 slice->row_stride =
544 pan_afbc_row_stride(layout->modifier, effective_width);
545 slice->afbc.stride = effective_width / block_size.width;
546 slice->afbc.nr_blocks =
547 slice->afbc.stride * (effective_height / block_size.height);
548 slice->afbc.header_size =
549 ALIGN_POT(slice->row_stride * (effective_height / align_h),
550 pan_afbc_body_align(layout->modifier));
551
552 if (explicit_layout &&
553 explicit_layout->row_stride < slice->row_stride) {
554 mesa_loge("panfrost: rejecting image due to invalid row stride.\n");
555 return false;
556 }
557
558 /* AFBC body size */
559 slice->afbc.body_size = slice_one_size;
560
561 /* 3D AFBC resources have all headers placed at the
562 * beginning instead of having them split per depth
563 * level
564 */
565 if (is_3d) {
566 slice->afbc.surface_stride = slice->afbc.header_size;
567 slice->afbc.header_size *= depth;
568 slice->afbc.body_size *= depth;
569 offset += slice->afbc.header_size;
570 } else {
571 slice_one_size += slice->afbc.header_size;
572 slice->afbc.surface_stride = slice_one_size;
573 }
574 } else {
575 slice->row_stride = row_stride;
576 }
577
578 unsigned slice_full_size = slice_one_size * depth * layout->nr_samples;
579
580 slice->surface_stride = slice_one_size;
581
582 /* Compute AFBC sizes if necessary */
583
584 offset += slice_full_size;
585 slice->size = slice_full_size;
586
587 /* Add a checksum region if necessary */
588 if (layout->crc) {
589 slice->crc.size = panfrost_compute_checksum_size(slice, width, height);
590
591 slice->crc.offset = offset;
592 offset += slice->crc.size;
593 slice->size += slice->crc.size;
594 }
595
596 width = u_minify(width, 1);
597 height = u_minify(height, 1);
598 depth = u_minify(depth, 1);
599 }
600
601 /* Arrays and cubemaps have the entire miptree duplicated */
602 layout->array_stride = ALIGN_POT(offset, 64);
603 if (explicit_layout)
604 layout->data_size = offset;
605 else
606 layout->data_size = ALIGN_POT(
607 (uint64_t)layout->array_stride * (uint64_t)layout->array_size, 4096);
608
609 return true;
610 }
611
612 void
pan_iview_get_surface(const struct pan_image_view * iview,unsigned level,unsigned layer,unsigned sample,struct pan_surface * surf)613 pan_iview_get_surface(const struct pan_image_view *iview, unsigned level,
614 unsigned layer, unsigned sample, struct pan_surface *surf)
615 {
616 const struct pan_image *image = pan_image_view_get_plane(iview, 0);
617
618 level += iview->first_level;
619 assert(level < image->layout.nr_slices);
620
621 layer += iview->first_layer;
622
623 bool is_3d = image->layout.dim == MALI_TEXTURE_DIMENSION_3D;
624 const struct pan_image_slice_layout *slice = &image->layout.slices[level];
625 mali_ptr base = image->data.base + image->data.offset;
626
627 if (drm_is_afbc(image->layout.modifier)) {
628 assert(!sample);
629
630 if (is_3d) {
631 ASSERTED unsigned depth = u_minify(image->layout.depth, level);
632 assert(layer < depth);
633 surf->afbc.header =
634 base + slice->offset + (layer * slice->afbc.surface_stride);
635 surf->afbc.body = base + slice->offset + slice->afbc.header_size +
636 (slice->surface_stride * layer);
637 } else {
638 assert(layer < image->layout.array_size);
639 surf->afbc.header =
640 base + panfrost_texture_offset(&image->layout, level, layer, 0);
641 surf->afbc.body = surf->afbc.header + slice->afbc.header_size;
642 }
643 } else {
644 unsigned array_idx = is_3d ? 0 : layer;
645 unsigned surface_idx = is_3d ? layer : sample;
646
647 surf->data = base + panfrost_texture_offset(&image->layout, level,
648 array_idx, surface_idx);
649 }
650 }
651