1 /*
2 * Copyright 2023 Valve Corporation
3 * SPDX-License-Identifier: MIT
4 */
5 #ifndef PIPE_NIR_H
6 #define PIPE_NIR_H
7
8 #include "pipe/p_context.h"
9 #include "pipe/p_defines.h"
10 #include "pipe/p_state.h"
11 #include "nir.h"
12 #include "shader_enums.h"
13
14 static inline void *
pipe_shader_from_nir(struct pipe_context * pipe,nir_shader * nir)15 pipe_shader_from_nir(struct pipe_context *pipe, nir_shader *nir)
16 {
17 struct pipe_shader_state state = {
18 .type = PIPE_SHADER_IR_NIR,
19 .ir.nir = nir,
20 };
21
22 switch (nir->info.stage) {
23 case MESA_SHADER_VERTEX:
24 return pipe->create_vs_state(pipe, &state);
25 case MESA_SHADER_TESS_CTRL:
26 return pipe->create_tcs_state(pipe, &state);
27 case MESA_SHADER_TESS_EVAL:
28 return pipe->create_tes_state(pipe, &state);
29 case MESA_SHADER_GEOMETRY:
30 return pipe->create_gs_state(pipe, &state);
31 case MESA_SHADER_FRAGMENT:
32 return pipe->create_fs_state(pipe, &state);
33
34 case MESA_SHADER_COMPUTE:
35 case MESA_SHADER_KERNEL: {
36 struct pipe_compute_state compute = {
37 .ir_type = PIPE_SHADER_IR_NIR,
38 .prog = nir,
39 .static_shared_mem = nir->info.shared_size,
40 };
41
42 return pipe->create_compute_state(pipe, &compute);
43 }
44
45 default:
46 unreachable("unexpected shader stage");
47 }
48 }
49
50 #endif
51