xref: /aosp_15_r20/external/coreboot/src/soc/amd/stoneyridge/BiosCallOuts.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <device/device.h>
4 #include <device/pci_def.h>
5 #include <amdblocks/BiosCallOuts.h>
6 #include <console/console.h>
7 #include <soc/southbridge.h>
8 #include <soc/pci_devs.h>
9 #include <amdblocks/agesawrapper.h>
10 #include <amdblocks/dimm_spd.h>
11 #include <amdblocks/car.h>
12 
13 #include "chip.h"
14 
platform_FchParams_reset(FCH_RESET_DATA_BLOCK * FchParams_reset)15 void __weak platform_FchParams_reset(FCH_RESET_DATA_BLOCK *FchParams_reset) {}
16 
agesa_fch_initreset(uint32_t Func,uintptr_t FchData,void * ConfigPtr)17 AGESA_STATUS agesa_fch_initreset(uint32_t Func, uintptr_t FchData,
18 							void *ConfigPtr)
19 {
20 	AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
21 
22 	if (StdHeader->Func == AMD_INIT_RESET) {
23 		FCH_RESET_DATA_BLOCK *FchParams_reset;
24 		FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData;
25 		printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
26 
27 		/* Get platform specific configuration changes */
28 		platform_FchParams_reset(FchParams_reset);
29 
30 		printk(BIOS_DEBUG, "Done\n");
31 	}
32 
33 	return AGESA_SUCCESS;
34 }
35 
agesa_fch_initenv(uint32_t Func,uintptr_t FchData,void * ConfigPtr)36 AGESA_STATUS agesa_fch_initenv(uint32_t Func, uintptr_t FchData,
37 							void *ConfigPtr)
38 {
39 	AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
40 
41 	if (StdHeader->Func == AMD_INIT_ENV) {
42 		FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
43 		printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
44 
45 		/* XHCI configuration */
46 		if (CONFIG(STONEYRIDGE_XHCI_ENABLE))
47 			FchParams_env->Usb.Xhci0Enable = TRUE;
48 		else
49 			FchParams_env->Usb.Xhci0Enable = FALSE;
50 		FchParams_env->Usb.Xhci1Enable = FALSE;
51 
52 		/* SATA configuration */
53 		FchParams_env->Sata.SataClass = CONFIG_STONEYRIDGE_SATA_MODE;
54 		if (is_dev_enabled(DEV_PTR(sata))) {
55 			switch ((SATA_CLASS)CONFIG_STONEYRIDGE_SATA_MODE) {
56 			case SataRaid:
57 			case SataAhci:
58 			case SataAhci7804:
59 			case SataLegacyIde:
60 				FchParams_env->Sata.SataIdeMode = FALSE;
61 				break;
62 			case SataIde2Ahci:
63 			case SataIde2Ahci7804:
64 			default: /* SataNativeIde */
65 				FchParams_env->Sata.SataIdeMode = TRUE;
66 				break;
67 			}
68 		} else {
69 			FchParams_env->Sata.SataIdeMode = FALSE;
70 		}
71 
72 		/* Platform updates */
73 		platform_FchParams_env(FchParams_env);
74 
75 		printk(BIOS_DEBUG, "Done\n");
76 	}
77 
78 	return AGESA_SUCCESS;
79 }
80 
agesa_ReadSpd(uint32_t Func,uintptr_t Data,void * ConfigPtr)81 AGESA_STATUS agesa_ReadSpd(uint32_t Func, uintptr_t Data, void *ConfigPtr)
82 {
83 	uint8_t spd_address;
84 	int err;
85 	DEVTREE_CONST struct device *dev;
86 	DEVTREE_CONST struct soc_amd_stoneyridge_config *conf;
87 	AGESA_READ_SPD_PARAMS *info = ConfigPtr;
88 
89 	if (!ENV_RAMINIT)
90 		return AGESA_UNSUPPORTED;
91 
92 	dev = pcidev_path_on_root(DCT_DEVFN);
93 	if (dev == NULL)
94 		return AGESA_ERROR;
95 
96 	conf = dev->chip_info;
97 	if (conf == NULL)
98 		return AGESA_ERROR;
99 
100 	if (info->SocketId >= ARRAY_SIZE(conf->spd_addr_lookup))
101 		return AGESA_ERROR;
102 	if (info->MemChannelId >= ARRAY_SIZE(conf->spd_addr_lookup[0]))
103 		return AGESA_ERROR;
104 	if (info->DimmId >= ARRAY_SIZE(conf->spd_addr_lookup[0][0]))
105 		return AGESA_ERROR;
106 
107 	spd_address = conf->spd_addr_lookup
108 		[info->SocketId][info->MemChannelId][info->DimmId];
109 	if (spd_address == 0)
110 		return AGESA_ERROR;
111 
112 	err = mainboard_read_spd(spd_address, (void *)info->Buffer,
113 				CONFIG_DIMM_SPD_SIZE);
114 
115 	/* Read the SPD if the mainboard didn't fill the buffer */
116 	if (err || (*info->Buffer == 0))
117 		err = sb_read_spd(spd_address, (void *)info->Buffer,
118 				CONFIG_DIMM_SPD_SIZE);
119 
120 	if (err)
121 		return AGESA_ERROR;
122 
123 	return AGESA_SUCCESS;
124 }
125 
agesa_HaltThisAp(uint32_t Func,uintptr_t Data,void * ConfigPtr)126 AGESA_STATUS agesa_HaltThisAp(uint32_t Func, uintptr_t Data, void *ConfigPtr)
127 {
128 	AGESA_HALT_THIS_AP_PARAMS *info = ConfigPtr;
129 	uint32_t flags = 0;
130 
131 	if (info->PrimaryCore == TRUE)
132 		return AGESA_UNSUPPORTED; /* force normal path */
133 	if (info->ExecWbinvd == TRUE)
134 		flags |= 1;
135 	if (info->CacheEn == TRUE)
136 		flags |= 2;
137 
138 	ap_teardown_car(flags); /* does not return */
139 
140 	/* Should never reach here */
141 	return AGESA_UNSUPPORTED;
142 }
143 
144 /* Allow mainboards to fill the SPD buffer */
mainboard_read_spd(uint8_t spdAddress,char * buf,size_t len)145 __weak int mainboard_read_spd(uint8_t spdAddress, char *buf,
146 						size_t len)
147 {
148 	printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
149 	return -1; /* SPD not read */
150 }
151