xref: /aosp_15_r20/external/coreboot/src/soc/mediatek/common/include/soc/pmif_common.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef __MEDIATEK_SOC_PMIF_COMMON__
4 #define __MEDIATEK_SOC_PMIF_COMMON__
5 
6 #include <types.h>
7 
8 enum {
9 	PMIF_CMD_REG_0,
10 	PMIF_CMD_REG,
11 	PMIF_CMD_EXT_REG,
12 	PMIF_CMD_EXT_REG_LONG,
13 };
14 
15 struct chan_regs {
16 	u32 ch_send;
17 	u32 wdata;
18 	u32 reserved12[3];
19 	u32 rdata;
20 	u32 reserved13[3];
21 	u32 ch_rdy;
22 	u32 ch_sta;
23 };
24 
25 struct pmif {
26 	struct mtk_pmif_regs *mtk_pmif;
27 	struct chan_regs *ch;
28 	u32 swinf_no;
29 	u32 mstid;
30 	u32 pmifid;
31 	void (*read)(struct pmif *arb, u32 slvid, u32 reg, u32 *data);
32 	void (*write)(struct pmif *arb, u32 slvid, u32 reg, u32 data);
33 	u32 (*read_field)(struct pmif *arb, u32 slvid, u32 reg, u32 mask, u32 shift);
34 	void (*write_field)(struct pmif *arb, u32 slvid, u32 reg, u32 val, u32 mask, u32 shift);
35 	int (*is_pmif_init_done)(struct pmif *arb);
36 };
37 
38 enum {
39 	PMIF_SPI,
40 	PMIF_SPMI,
41 };
42 
43 enum {
44 	E_IO = 1,		/* I/O error */
45 	E_BUSY,			/* Device or resource busy */
46 	E_NODEV,		/* No such device */
47 	E_INVAL,		/* Invalid argument */
48 	E_OPNOTSUPP,		/* Operation not supported on transport endpoint */
49 	E_TIMEOUT,		/* Wait for idle time out */
50 	E_READ_TEST_FAIL,	/* SPI read fail */
51 	E_SPI_INIT_RESET_SPI,	/* Reset SPI fail */
52 	E_SPI_INIT_SIDLY,	/* SPI edge calibration fail */
53 };
54 
55 enum pmic_interface {
56 	PMIF_VLD_RDY = 0,
57 	PMIF_SLP_REQ,
58 };
59 
60 DEFINE_BIT(PMIFSPI_INF_EN_SRCLKEN_RC_HW, 4)
61 
62 DEFINE_BIT(PMIFSPI_OTHER_INF_DXCO0_EN, 0)
63 DEFINE_BIT(PMIFSPI_OTHER_INF_DXCO1_EN, 1)
64 
65 DEFINE_BIT(PMIFSPI_ARB_EN_SRCLKEN_RC_HW, 4)
66 DEFINE_BIT(PMIFSPI_ARB_EN_DCXO_CONN, 15)
67 DEFINE_BIT(PMIFSPI_ARB_EN_DCXO_NFC, 16)
68 
69 DEFINE_BITFIELD(PMIFSPI_SPM_SLEEP_REQ_SEL, 1, 0)
70 DEFINE_BITFIELD(PMIFSPI_SCP_SLEEP_REQ_SEL, 10, 9)
71 
72 DEFINE_BIT(PMIFSPI_MD_CTL_PMIF_RDY, 9)
73 DEFINE_BIT(PMIFSPI_MD_CTL_SRCLK_EN, 10)
74 DEFINE_BIT(PMIFSPI_MD_CTL_SRVOL_EN, 11)
75 
76 DEFINE_BITFIELD(PMIFSPMI_SPM_SLEEP_REQ_SEL, 1, 0)
77 DEFINE_BITFIELD(PMIFSPMI_SCP_SLEEP_REQ_SEL, 10, 9)
78 
79 DEFINE_BIT(PMIFSPMI_MD_CTL_PMIF_RDY, 9)
80 DEFINE_BIT(PMIFSPMI_MD_CTL_SRCLK_EN, 10)
81 DEFINE_BIT(PMIFSPMI_MD_CTL_SRVOL_EN, 11)
82 
83 /* External API */
84 struct pmif *get_pmif_controller(int inf, int mstid);
85 void pmwrap_interface_init(void);
86 int mtk_pmif_init(void);
87 #endif /*__MEDIATEK_SOC_PMIF_COMMON__*/
88