1 /*
2 * Copyright 2005 Ben Skeggs.
3 * SPDX-License-Identifier: MIT
4 */
5
6 #include "r300_fragprog.h"
7
8 #include <stdio.h>
9
10 #include "r300_reg.h"
11
presub_string(char out[10],unsigned int inst)12 static void presub_string(char out[10], unsigned int inst)
13 {
14 switch(inst & 0x600000){
15 case R300_ALU_SRCP_1_MINUS_2_SRC0:
16 sprintf(out, "bias");
17 break;
18 case R300_ALU_SRCP_SRC1_MINUS_SRC0:
19 sprintf(out, "sub");
20 break;
21 case R300_ALU_SRCP_SRC1_PLUS_SRC0:
22 sprintf(out, "add");
23 break;
24 case R300_ALU_SRCP_1_MINUS_SRC0:
25 sprintf(out, "inv ");
26 break;
27 }
28 }
29
get_msb(unsigned int bit,unsigned int r400_ext_addr)30 static int get_msb(unsigned int bit, unsigned int r400_ext_addr)
31 {
32 return (r400_ext_addr & bit) ? 1 << 5 : 0;
33 }
34
35 /* just some random things... */
r300FragmentProgramDump(struct radeon_compiler * c,void * user)36 void r300FragmentProgramDump(struct radeon_compiler *c, void *user)
37 {
38 struct r300_fragment_program_compiler *compiler = (struct r300_fragment_program_compiler*)c;
39 struct r300_fragment_program_code *code = &compiler->code->code.r300;
40 int n, i, j;
41 static int pc = 0;
42
43 fprintf(stderr, "pc=%d*************************************\n", pc++);
44
45 fprintf(stderr, "Hardware program\n");
46 fprintf(stderr, "----------------\n");
47 if (c->is_r400) {
48 fprintf(stderr, "code_offset_ext: %08x\n", code->r400_code_offset_ext);
49 }
50
51 for (n = 0; n <= (code->config & 3); n++) {
52 uint32_t code_addr = code->code_addr[3 - (code->config & 3) + n];
53 unsigned int alu_offset = ((code_addr & R300_ALU_START_MASK) >> R300_ALU_START_SHIFT) +
54 (((code->r400_code_offset_ext >> (24 - (n * 6))) & 0x7) << 6);
55 unsigned int alu_end = ((code_addr & R300_ALU_SIZE_MASK) >> R300_ALU_SIZE_SHIFT) +
56 (((code->r400_code_offset_ext >> (27 - (n * 6))) & 0x7) << 6);
57 int tex_offset = (code_addr & R300_TEX_START_MASK) >> R300_TEX_START_SHIFT;
58 int tex_end = (code_addr & R300_TEX_SIZE_MASK) >> R300_TEX_SIZE_SHIFT;
59
60 fprintf(stderr, "NODE %d: alu_offset: %u, tex_offset: %d, "
61 "alu_end: %u, tex_end: %d (code_addr: %08x)\n", n,
62 alu_offset, tex_offset, alu_end, tex_end, code_addr);
63
64 if (n > 0 || (code->config & R300_PFS_CNTL_FIRST_NODE_HAS_TEX)) {
65 fprintf(stderr, " TEX:\n");
66 for (i = tex_offset;
67 i <= tex_offset + tex_end;
68 ++i) {
69 const char *instr;
70
71 switch ((code->tex.
72 inst[i] >> R300_TEX_INST_SHIFT) &
73 15) {
74 case R300_TEX_OP_LD:
75 instr = "TEX";
76 break;
77 case R300_TEX_OP_KIL:
78 instr = "KIL";
79 break;
80 case R300_TEX_OP_TXP:
81 instr = "TXP";
82 break;
83 case R300_TEX_OP_TXB:
84 instr = "TXB";
85 break;
86 default:
87 instr = "UNKNOWN";
88 }
89
90 fprintf(stderr,
91 " %s t%i, %c%i, texture[%i] (%08x)\n",
92 instr,
93 (code->tex.
94 inst[i] >> R300_DST_ADDR_SHIFT) & 31,
95 't',
96 (code->tex.
97 inst[i] >> R300_SRC_ADDR_SHIFT) & 31,
98 (code->tex.
99 inst[i] & R300_TEX_ID_MASK) >>
100 R300_TEX_ID_SHIFT,
101 code->tex.inst[i]);
102 }
103 }
104
105 for (i = alu_offset;
106 i <= alu_offset + alu_end; ++i) {
107 char srcc[4][10], dstc[20];
108 char srca[4][10], dsta[20];
109 char argc[3][20];
110 char arga[3][20];
111 char flags[5], tmp[10];
112
113 for (j = 0; j < 3; ++j) {
114 int regc = code->alu.inst[i].rgb_addr >> (j * 6);
115 int rega = code->alu.inst[i].alpha_addr >> (j * 6);
116 int msbc = get_msb(R400_ADDR_EXT_RGB_MSB_BIT(j),
117 code->alu.inst[i].r400_ext_addr);
118 int msba = get_msb(R400_ADDR_EXT_A_MSB_BIT(j),
119 code->alu.inst[i].r400_ext_addr);
120
121 sprintf(srcc[j], "%c%i",
122 (regc & 32) ? 'c' : 't', (regc & 31) | msbc);
123 sprintf(srca[j], "%c%i",
124 (rega & 32) ? 'c' : 't', (rega & 31) | msba);
125 }
126
127 dstc[0] = 0;
128 sprintf(flags, "%s%s%s",
129 (code->alu.inst[i].
130 rgb_addr & R300_ALU_DSTC_REG_X) ? "x" : "",
131 (code->alu.inst[i].
132 rgb_addr & R300_ALU_DSTC_REG_Y) ? "y" : "",
133 (code->alu.inst[i].
134 rgb_addr & R300_ALU_DSTC_REG_Z) ? "z" : "");
135 if (flags[0] != 0) {
136 unsigned int msb = get_msb(
137 R400_ADDRD_EXT_RGB_MSB_BIT,
138 code->alu.inst[i].r400_ext_addr);
139
140 sprintf(dstc, "t%i.%s ",
141 ((code->alu.inst[i].
142 rgb_addr >> R300_ALU_DSTC_SHIFT)
143 & 31) | msb,
144 flags);
145 }
146 sprintf(flags, "%s%s%s",
147 (code->alu.inst[i].
148 rgb_addr & R300_ALU_DSTC_OUTPUT_X) ? "x" : "",
149 (code->alu.inst[i].
150 rgb_addr & R300_ALU_DSTC_OUTPUT_Y) ? "y" : "",
151 (code->alu.inst[i].
152 rgb_addr & R300_ALU_DSTC_OUTPUT_Z) ? "z" : "");
153 if (flags[0] != 0) {
154 sprintf(tmp, "o%i.%s",
155 (code->alu.inst[i].
156 rgb_addr >> 29) & 3,
157 flags);
158 strcat(dstc, tmp);
159 }
160 /* Presub */
161 presub_string(srcc[3], code->alu.inst[i].rgb_inst);
162 presub_string(srca[3], code->alu.inst[i].alpha_inst);
163
164 dsta[0] = 0;
165 if (code->alu.inst[i].alpha_addr & R300_ALU_DSTA_REG) {
166 unsigned int msb = get_msb(
167 R400_ADDRD_EXT_A_MSB_BIT,
168 code->alu.inst[i].r400_ext_addr);
169 sprintf(dsta, "t%i.w ",
170 ((code->alu.inst[i].
171 alpha_addr >> R300_ALU_DSTA_SHIFT) & 31)
172 | msb);
173 }
174 if (code->alu.inst[i].alpha_addr & R300_ALU_DSTA_OUTPUT) {
175 sprintf(tmp, "o%i.w ",
176 (code->alu.inst[i].
177 alpha_addr >> 25) & 3);
178 strcat(dsta, tmp);
179 }
180 if (code->alu.inst[i].alpha_addr & R300_ALU_DSTA_DEPTH) {
181 strcat(dsta, "Z");
182 }
183
184 fprintf(stderr,
185 "%3i: xyz: %3s %3s %3s %5s-> %-20s (%08x)\n"
186 " w: %3s %3s %3s %5s-> %-20s (%08x)\n", i,
187 srcc[0], srcc[1], srcc[2], srcc[3], dstc,
188 code->alu.inst[i].rgb_addr, srca[0], srca[1],
189 srca[2], srca[3], dsta,
190 code->alu.inst[i].alpha_addr);
191
192 for (j = 0; j < 3; ++j) {
193 int regc = code->alu.inst[i].rgb_inst >> (j * 7);
194 int rega = code->alu.inst[i].alpha_inst >> (j * 7);
195 int d;
196 char buf[20];
197
198 d = regc & 31;
199 if (d < 12) {
200 switch (d % 4) {
201 case R300_ALU_ARGC_SRC0C_XYZ:
202 sprintf(buf, "%s.xyz",
203 srcc[d / 4]);
204 break;
205 case R300_ALU_ARGC_SRC0C_XXX:
206 sprintf(buf, "%s.xxx",
207 srcc[d / 4]);
208 break;
209 case R300_ALU_ARGC_SRC0C_YYY:
210 sprintf(buf, "%s.yyy",
211 srcc[d / 4]);
212 break;
213 case R300_ALU_ARGC_SRC0C_ZZZ:
214 sprintf(buf, "%s.zzz",
215 srcc[d / 4]);
216 break;
217 }
218 } else if (d < 15) {
219 sprintf(buf, "%s.www", srca[d - 12]);
220 } else if (d < 20 ) {
221 switch(d) {
222 case R300_ALU_ARGC_SRCP_XYZ:
223 sprintf(buf, "srcp.xyz");
224 break;
225 case R300_ALU_ARGC_SRCP_XXX:
226 sprintf(buf, "srcp.xxx");
227 break;
228 case R300_ALU_ARGC_SRCP_YYY:
229 sprintf(buf, "srcp.yyy");
230 break;
231 case R300_ALU_ARGC_SRCP_ZZZ:
232 sprintf(buf, "srcp.zzz");
233 break;
234 case R300_ALU_ARGC_SRCP_WWW:
235 sprintf(buf, "srcp.www");
236 break;
237 }
238 } else if (d == 20) {
239 sprintf(buf, "0.0");
240 } else if (d == 21) {
241 sprintf(buf, "1.0");
242 } else if (d == 22) {
243 sprintf(buf, "0.5");
244 } else if (d >= 23 && d < 32) {
245 d -= 23;
246 switch (d / 3) {
247 case 0:
248 sprintf(buf, "%s.yzx",
249 srcc[d % 3]);
250 break;
251 case 1:
252 sprintf(buf, "%s.zxy",
253 srcc[d % 3]);
254 break;
255 case 2:
256 sprintf(buf, "%s.Wzy",
257 srcc[d % 3]);
258 break;
259 }
260 } else {
261 sprintf(buf, "%i", d);
262 }
263
264 sprintf(argc[j], "%s%s%s%s",
265 (regc & 32) ? "-" : "",
266 (regc & 64) ? "|" : "",
267 buf, (regc & 64) ? "|" : "");
268
269 d = rega & 31;
270 if (d < 9) {
271 sprintf(buf, "%s.%c", srcc[d / 3],
272 'x' + (char)(d % 3));
273 } else if (d < 12) {
274 sprintf(buf, "%s.w", srca[d - 9]);
275 } else if (d < 16) {
276 switch(d) {
277 case R300_ALU_ARGA_SRCP_X:
278 sprintf(buf, "srcp.x");
279 break;
280 case R300_ALU_ARGA_SRCP_Y:
281 sprintf(buf, "srcp.y");
282 break;
283 case R300_ALU_ARGA_SRCP_Z:
284 sprintf(buf, "srcp.z");
285 break;
286 case R300_ALU_ARGA_SRCP_W:
287 sprintf(buf, "srcp.w");
288 break;
289 }
290 } else if (d == 16) {
291 sprintf(buf, "0.0");
292 } else if (d == 17) {
293 sprintf(buf, "1.0");
294 } else if (d == 18) {
295 sprintf(buf, "0.5");
296 } else {
297 sprintf(buf, "%i", d);
298 }
299
300 sprintf(arga[j], "%s%s%s%s",
301 (rega & 32) ? "-" : "",
302 (rega & 64) ? "|" : "",
303 buf, (rega & 64) ? "|" : "");
304 }
305
306 fprintf(stderr, " xyz: %8s %8s %8s op: %08x %s\n"
307 " w: %8s %8s %8s op: %08x\n",
308 argc[0], argc[1], argc[2],
309 code->alu.inst[i].rgb_inst,
310 code->alu.inst[i].rgb_inst & R300_ALU_INSERT_NOP ?
311 "NOP" : "",
312 arga[0], arga[1],arga[2],
313 code->alu.inst[i].alpha_inst);
314 }
315 }
316 }
317