1 /*
2 * Copyright 2011 Advanced Micro Devices, Inc.
3 * Authors:
4 * Christian König <[email protected]>
5 * SPDX-License-Identifier: MIT
6 */
7
8 #include <sys/types.h>
9 #include <assert.h>
10 #include <errno.h>
11 #include <unistd.h>
12
13 #include "pipe/p_video_codec.h"
14
15 #include "util/u_memory.h"
16 #include "util/u_video.h"
17
18 #include "vl/vl_defines.h"
19 #include "vl/vl_mpeg12_decoder.h"
20
21 #include "r600_pipe.h"
22 #include "radeon_video.h"
23 #include "radeon_uvd.h"
24 #include "radeon_vce.h"
25 #include "r600d.h"
26
27 #define R600_UVD_ENABLE_TILING 0
28
29 /**
30 * creates an video buffer with an UVD compatible memory layout
31 */
r600_video_buffer_create(struct pipe_context * pipe,const struct pipe_video_buffer * tmpl)32 struct pipe_video_buffer *r600_video_buffer_create(struct pipe_context *pipe,
33 const struct pipe_video_buffer *tmpl)
34 {
35 struct r600_context *ctx = (struct r600_context *)pipe;
36 struct r600_texture *resources[VL_NUM_COMPONENTS] = {};
37 struct radeon_surf* surfaces[VL_NUM_COMPONENTS] = {};
38 struct pb_buffer_lean **pbs[VL_NUM_COMPONENTS] = {};
39 enum pipe_format resource_formats[3];
40 struct pipe_video_buffer template;
41 struct pipe_resource templ;
42 unsigned i, array_size;
43 enum pipe_video_chroma_format chroma_format =
44 pipe_format_to_chroma_format(tmpl->buffer_format);
45
46 assert(pipe);
47
48 /* first create the needed resources as "normal" textures */
49 vl_get_video_buffer_formats(pipe->screen, tmpl->buffer_format, resource_formats);
50
51 array_size = tmpl->interlaced ? 2 : 1;
52 template = *tmpl;
53 template.width = align(tmpl->width, VL_MACROBLOCK_WIDTH);
54 template.height = align(tmpl->height / array_size, VL_MACROBLOCK_HEIGHT);
55 template.contiguous_planes = true;
56
57 vl_video_buffer_template(&templ, &template, resource_formats[0], 1, array_size,
58 PIPE_USAGE_DEFAULT, 0, chroma_format);
59 if (ctx->b.gfx_level < EVERGREEN || tmpl->interlaced || !R600_UVD_ENABLE_TILING)
60 templ.bind = PIPE_BIND_LINEAR;
61 resources[0] = (struct r600_texture *)
62 pipe->screen->resource_create(pipe->screen, &templ);
63 if (!resources[0])
64 goto error;
65
66 if (resource_formats[1] != PIPE_FORMAT_NONE) {
67 vl_video_buffer_template(&templ, &template, resource_formats[1], 1, array_size,
68 PIPE_USAGE_DEFAULT, 1, chroma_format);
69 if (ctx->b.gfx_level < EVERGREEN || tmpl->interlaced || !R600_UVD_ENABLE_TILING)
70 templ.bind = PIPE_BIND_LINEAR;
71 resources[1] = (struct r600_texture *)
72 pipe->screen->resource_create(pipe->screen, &templ);
73 if (!resources[1])
74 goto error;
75 }
76
77 if (resource_formats[2] != PIPE_FORMAT_NONE) {
78 vl_video_buffer_template(&templ, &template, resource_formats[2], 1, array_size,
79 PIPE_USAGE_DEFAULT, 2, chroma_format);
80 if (ctx->b.gfx_level < EVERGREEN || tmpl->interlaced || !R600_UVD_ENABLE_TILING)
81 templ.bind = PIPE_BIND_LINEAR;
82 resources[2] = (struct r600_texture *)
83 pipe->screen->resource_create(pipe->screen, &templ);
84 if (!resources[2])
85 goto error;
86 }
87
88 for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
89 if (!resources[i])
90 continue;
91
92 pbs[i] = &resources[i]->resource.buf;
93 surfaces[i] = &resources[i]->surface;
94 }
95
96 rvid_join_surfaces(&ctx->b, pbs, surfaces);
97
98 for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
99 if (!resources[i])
100 continue;
101
102 /* reset the address */
103 resources[i]->resource.gpu_address = ctx->b.ws->buffer_get_virtual_address(
104 resources[i]->resource.buf);
105 }
106
107 template.height *= array_size;
108 return vl_video_buffer_create_ex2(pipe, &template, (struct pipe_resource **)resources);
109
110 error:
111 for (i = 0; i < VL_NUM_COMPONENTS; ++i)
112 r600_texture_reference(&resources[i], NULL);
113
114 return NULL;
115 }
116
117 /* hw encode the number of memory banks */
eg_num_banks(uint32_t nbanks)118 static uint32_t eg_num_banks(uint32_t nbanks)
119 {
120 switch (nbanks) {
121 case 2:
122 return 0;
123 case 4:
124 return 1;
125 case 8:
126 default:
127 return 2;
128 case 16:
129 return 3;
130 }
131 }
132
133 /* set the decoding target buffer offsets */
r600_uvd_set_dtb(struct ruvd_msg * msg,struct vl_video_buffer * buf)134 static struct pb_buffer_lean* r600_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf)
135 {
136 struct r600_screen *rscreen = (struct r600_screen*)buf->base.context->screen;
137 struct r600_texture *luma = (struct r600_texture *)buf->resources[0];
138 struct r600_texture *chroma = (struct r600_texture *)buf->resources[1];
139
140 msg->body.decode.dt_field_mode = buf->base.interlaced;
141 msg->body.decode.dt_surf_tile_config |= RUVD_NUM_BANKS(eg_num_banks(rscreen->b.info.r600_num_banks));
142
143 ruvd_set_dt_surfaces(msg, &luma->surface, &chroma->surface);
144
145 return luma->resource.buf;
146 }
147
148 /* get the radeon resources for VCE */
r600_vce_get_buffer(struct pipe_resource * resource,struct pb_buffer_lean ** handle,struct radeon_surf ** surface)149 static void r600_vce_get_buffer(struct pipe_resource *resource,
150 struct pb_buffer_lean **handle,
151 struct radeon_surf **surface)
152 {
153 struct r600_texture *res = (struct r600_texture *)resource;
154
155 if (handle)
156 *handle = res->resource.buf;
157
158 if (surface)
159 *surface = &res->surface;
160 }
161
162 /* create decoder */
r600_uvd_create_decoder(struct pipe_context * context,const struct pipe_video_codec * templat)163 struct pipe_video_codec *r600_uvd_create_decoder(struct pipe_context *context,
164 const struct pipe_video_codec *templat)
165 {
166 struct r600_context *ctx = (struct r600_context *)context;
167
168 if (templat->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE)
169 return rvce_create_encoder(context, templat, ctx->b.ws, r600_vce_get_buffer);
170
171 return ruvd_create_decoder(context, templat, r600_uvd_set_dtb);
172 }
173