/aosp_15_r20/external/vixl/src/aarch64/ |
H A D | registers-aarch64.cc | 175 const CPURegister& reg3, in AreAliased() 226 const CPURegister& reg3, in AreSameSizeAndType() 246 const CPURegister& reg3, in AreEven() 266 const CPURegister& reg3, in AreConsecutive() 296 const CPURegister& reg3, in AreSameFormat() 308 const CPURegister& reg3, in AreSameLaneSize()
|
H A D | macro-assembler-aarch64.cc | 2920 const Register& reg3, in Include() 2934 const VRegister& reg3, in Include() 2944 const CPURegister& reg3, in Include() 2984 const Register& reg3, in Exclude() 2994 const VRegister& reg3, in Exclude() 3004 const CPURegister& reg3, in Exclude()
|
/aosp_15_r20/external/libvpx/vpx_ports/ |
H A D | asmdefs_mmi.h | 21 #define MMI_ADDU(reg1, reg2, reg3) \ argument 30 #define MMI_SUBU(reg1, reg2, reg3) \ argument 50 #define MMI_ADDU(reg1, reg2, reg3) \ argument 59 #define MMI_SUBU(reg1, reg2, reg3) \ argument
|
/aosp_15_r20/external/libvpx/vpx_dsp/loongarch/ |
H A D | idct32x32_lsx.c | 93 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct32x8_row_even_process_store() local 185 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct32x8_row_odd_process_store() local 319 __m128i reg0, reg1, reg2, reg3; in idct_butterfly_transpose_store() local 450 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct8x32_column_even_process_store() local 545 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct8x32_column_odd_process_store() local
|
H A D | subtract_lsx.c | 51 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in sub_blk_8x8_lsx() local 102 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in sub_blk_16x16_lsx() local 214 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in sub_blk_32x32_lsx() local 281 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in sub_blk_64x64_lsx() local
|
H A D | vpx_convolve8_vert_lsx.c | 24 __m128i reg0, reg1, reg2, reg3, reg4; in common_vt_8t_4w_lsx() local 83 __m128i reg0, reg1, reg2, reg3, reg4, reg5; in common_vt_8t_8w_lsx() local 154 __m128i reg0, reg1, reg2, reg3, reg4, reg5; in common_vt_8t_16w_lsx() local 249 __m128i reg0, reg1, reg2, reg3, reg4, reg5; in common_vt_8t_16w_mult_lsx() local
|
H A D | vpx_convolve8_avg_vert_lsx.c | 24 __m128i reg0, reg1, reg2, reg3, reg4; in common_vt_8t_and_aver_dst_4w_lsx() local 102 __m128i reg0, reg1, reg2, reg3, reg4, reg5; in common_vt_8t_and_aver_dst_8w_lsx() local 185 __m128i reg0, reg1, reg2, reg3, reg4, reg5; in common_vt_8t_and_aver_dst_16w_mult_lsx() local
|
/aosp_15_r20/external/libvpx/vpx_dsp/mips/ |
H A D | idct32x32_msa.c | 45 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct32x8_row_even_process_store() local 129 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct32x8_row_odd_process_store() local 355 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct8x32_column_even_process_store() local 435 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in idct8x32_column_odd_process_store() local
|
H A D | idct16x16_msa.c | 17 v8i16 reg3, reg13, reg11, reg5, reg7, reg9, reg1, reg15; in vpx_idct16_1d_rows_msa() local 111 v8i16 reg3, reg13, reg11, reg5, reg7, reg9, reg1, reg15; in vpx_idct16_1d_columns_addblk_msa() local
|
/aosp_15_r20/external/libyuv/source/ |
H A D | scale_lsx.cc | 83 __m128i reg0, reg1, reg2, reg3; in ScaleARGBRowDown2Box_LSX() local 279 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, dst0; in ScaleRowDown4Box_LSX() local 347 __m128i reg0, reg1, reg2, reg3; in ScaleRowDown38_2_Box_LSX() local 387 __m128i reg0, reg1, reg2, reg3, dst0; in ScaleRowDown38_3_Box_LSX() local 454 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ScaleFilterCols_LSX() local 545 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ScaleARGBFilterCols_LSX() local
|
H A D | scale_msa.cc | 78 v8u16 reg0, reg1, reg2, reg3; in ScaleARGBRowDown2Box_MSA() local 141 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ScaleARGBRowDownEvenBox_MSA() local 304 v4u32 reg0, reg1, reg2, reg3; in ScaleRowDown4Box_MSA() local 669 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ScaleARGBFilterCols_MSA() local 766 v8i16 reg0, reg1, reg2, reg3, reg4, reg5; in ScaleRowDown34_0_Box_MSA() local 860 v8i16 reg0, reg1, reg2, reg3, reg4, reg5; in ScaleRowDown34_1_Box_MSA() local
|
H A D | row_msa.cc | 515 v16u8 reg0, reg1, reg2, reg3; in I422ToRGB24Row_MSA() local 803 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in ARGBToYRow_MSA() local 855 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in ARGBToUVRow_MSA() local 1125 v16u8 src0, src1, src2, src3, reg0, reg1, reg2, reg3, dst0, dst1; in ARGBToUV444Row_MSA() local 1199 v4u32 reg0, reg1, reg2, reg3; in ARGBMultiplyRow_MSA() local 1279 v4u32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ARGBAttenuateRow_MSA() local 1415 v4u32 reg0, reg1, reg2, reg3, rgba_scale; in ARGBShadeRow_MSA() local 1548 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6; in ARGB1555ToARGBRow_MSA() local 1597 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in RGB565ToARGBRow_MSA() local 1797 v16u8 src0, src1, src2, reg0, reg1, reg2, reg3, dst0; in RGB24ToYRow_MSA() local [all …]
|
H A D | row_lasx.cc | 1034 __m256i reg0, reg1, reg2, reg3, dst0, dst1; in ARGBToUV444Row_LASX() local 1147 __m256i reg0, reg1, reg2, reg3, reg4, reg5; in ARGBAttenuateRow_LASX() local 1344 __m256i reg0, reg1, reg2, reg3; in ARGB4444ToARGBRow_LASX() local 1376 __m256i reg0, reg1, reg2, reg3; in ARGB1555ToARGBRow_LASX() local 1426 __m256i reg0, reg1, reg2, reg3, dst0, dst1, dst2, dst3; in RGB565ToARGBRow_LASX() local 1473 __m256i reg0, reg1, reg2, reg3; in RGB24ToARGBRow_LASX() local 1511 __m256i tmp0, tmp1, tmp2, reg0, reg1, reg2, reg3; in RAWToARGBRow_LASX() local 1606 __m256i reg0, reg1, reg2, reg3, dst0; in ARGB1555ToUVRow_LASX() local 1723 __m256i reg0, reg1, reg2, reg3, dst0; in RGB565ToUVRow_LASX() local
|
H A D | rotate_msa.cc | 85 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeWx16_MSA() local 166 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeUVWx16_MSA() local
|
H A D | rotate_lsx.cc | 103 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeWx16_LSX() local 179 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeUVWx16_LSX() local
|
H A D | compare_msa.cc | 59 v4i32 reg0 = {0}, reg1 = {0}, reg2 = {0}, reg3 = {0}; in SumSquareError_MSA() local
|
H A D | row_lsx.cc | 988 __m128i reg0, reg1, reg2, reg3, dst0, dst1; in ARGBToUV444Row_LSX() local 1102 __m128i reg0, reg1, reg2, reg3, reg4, reg5; in ARGBAttenuateRow_LSX() local 1291 __m128i reg0, reg1, reg2, reg3; in ARGB4444ToARGBRow_LSX() local 1530 __m128i reg0, reg1, reg2, reg3, dst0; in ARGB1555ToUVRow_LSX() local 1639 __m128i reg0, reg1, reg2, reg3, dst0; in RGB565ToUVRow_LSX() local 2512 __m128i reg0, reg1, reg2, reg3; in ARGBBlendRow_LSX() local 2558 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ARGBQuantizeRow_LSX() local 2738 __m128 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in HalfFloatRow_LSX() local
|
/aosp_15_r20/external/libvpx/third_party/libyuv/source/ |
H A D | row_msa.cc | 481 v16u8 reg0, reg1, reg2, reg3; in I422ToRGB24Row_MSA() local 774 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in ARGBToYRow_MSA() local 826 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in ARGBToUVRow_MSA() local 1089 v16u8 src0, src1, src2, src3, reg0, reg1, reg2, reg3, dst0, dst1; in ARGBToUV444Row_MSA() local 1163 v4u32 reg0, reg1, reg2, reg3; in ARGBMultiplyRow_MSA() local 1243 v4u32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ARGBAttenuateRow_MSA() local 1379 v4u32 reg0, reg1, reg2, reg3, rgba_scale; in ARGBShadeRow_MSA() local 1512 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6; in ARGB1555ToARGBRow_MSA() local 1561 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in RGB565ToARGBRow_MSA() local 1660 v8u16 reg0, reg1, reg2, reg3, reg4, reg5; in ARGB1555ToYRow_MSA() local [all …]
|
H A D | scale_msa.cc | 78 v8u16 reg0, reg1, reg2, reg3; in ScaleARGBRowDown2Box_MSA() local 141 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ScaleARGBRowDownEvenBox_MSA() local 304 v4u32 reg0, reg1, reg2, reg3; in ScaleRowDown4Box_MSA() local 669 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in ScaleARGBFilterCols_MSA() local 766 v8i16 reg0, reg1, reg2, reg3, reg4, reg5; in ScaleRowDown34_0_Box_MSA() local 860 v8i16 reg0, reg1, reg2, reg3, reg4, reg5; in ScaleRowDown34_1_Box_MSA() local
|
H A D | rotate_msa.cc | 85 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeWx16_MSA() local 166 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; in TransposeUVWx16_MSA() local
|
H A D | compare_msa.cc | 59 v4i32 reg0 = {0}, reg1 = {0}, reg2 = {0}, reg3 = {0}; in SumSquareError_MSA() local
|
/aosp_15_r20/external/libvpx/vp8/encoder/loongarch/ |
H A D | encodeopt_lsx.c | 18 __m128i reg0, reg1, reg2, reg3, error; in vp8_block_error_lsx() local 43 __m128i reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, error; in vp8_mbblock_error_lsx() local
|
/aosp_15_r20/frameworks/libs/binary_translation/backend/x86_64/ |
D | loop_guest_context_optimizer_test.cc | 345 auto reg3 = machine_ir.AllocVReg(); in TEST() local 401 auto reg3 = machine_ir.AllocVReg(); in TEST() local 473 auto reg3 = machine_ir.AllocVReg(); in TEST() local 546 auto reg3 = machine_ir.AllocVReg(); in TEST() local
|
/aosp_15_r20/frameworks/libs/binary_translation/backend/common/ |
D | machine_ir_test.cc | 33 MachineReg reg3{10}; in TEST() local
|
/aosp_15_r20/art/compiler/utils/ |
H A D | assembler_test.h | 251 for (auto reg3 : reg3_registers) { in RepeatTemplatedRegistersImmBits() local 1425 for (auto reg3 : reg3_registers) { in RepeatTemplatedRegisters() local 1457 for (auto reg3 : reg3_registers) { in RepeatTemplatedRegisters() local
|