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Searched defs:reg_enum (Results 1 – 2 of 2) sorted by relevance

/aosp_15_r20/external/mesa3d/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h71 #define radeon_opt_set_reg(reg, reg_enum, idx, value, prefix_name, packet) do { \ argument
82 #define radeon_opt_set_reg2(reg, reg_enum, v1, v2, prefix_name, packet) do { \ argument
98 #define radeon_opt_set_reg3(reg, reg_enum, v1, v2, v3, prefix_name, packet) do { \ argument
117 #define radeon_opt_set_reg4(reg, reg_enum, v1, v2, v3, v4, prefix_name, packet) do { \ argument
139 #define radeon_opt_set_reg5(reg, reg_enum, v1, v2, v3, v4, v5, prefix_name, packet) do { \ argument
164 #define radeon_opt_set_reg6(reg, reg_enum, v1, v2, v3, v4, v5, v6, prefix_name, packet) do { \ argument
211 #define radeon_opt_set_context_reg(reg, reg_enum, value) \ argument
214 #define radeon_opt_set_context_reg_idx(reg, reg_enum, idx, value) \ argument
217 #define radeon_opt_set_context_reg2(reg, reg_enum, v1, v2) \ argument
220 #define radeon_opt_set_context_reg3(reg, reg_enum, v1, v2, v3) \ argument
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/aosp_15_r20/external/mesa3d/src/amd/vulkan/
H A Dradv_cs.h170 #define radeon_opt_set_context_reg(cmdbuf, reg, reg_enum, value) … argument
184 #define radeon_opt_set_context_reg2(cmdbuf, reg, reg_enum, v1, v2) … argument
201 #define radeon_opt_set_context_reg3(cmdbuf, reg, reg_enum, v1, v2, v3) … argument
221 #define radeon_opt_set_context_reg4(cmdbuf, reg, reg_enum, v1, v2, v3, v4) … argument