xref: /aosp_15_r20/external/intel-media-driver/cmrtlib/agnostic/share/cm_device_def.h (revision ba62d9d3abf0e404f2022b4cd7a85e107f48596f)
1 /*
2 * Copyright (c) 2017, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 
23 //!
24 //! Declaration of types and data stuctures used by implementations of CmDevice on various operating systems.
25 //!
26 
27 #ifndef CMRTLIB_AGNOSTIC_SHARE_CM_DEVICE_DEF_H_
28 #define CMRTLIB_AGNOSTIC_SHARE_CM_DEVICE_DEF_H_
29 
30 #include <cstdint>
31 #include "cm_surface_properties.h"
32 #include "cm_l3_cache_config.h"
33 #include "cm_queue_base_hw.h"
34 #include "cm_def.h"
35 
36 typedef enum _CM_DEVICE_CAP_NAME {
37   CAP_KERNEL_COUNT_PER_TASK,
38   CAP_KERNEL_BINARY_SIZE,
39   CAP_SAMPLER_COUNT ,
40   CAP_SAMPLER_COUNT_PER_KERNEL,
41   CAP_BUFFER_COUNT ,
42   CAP_SURFACE2D_COUNT,
43   CAP_SURFACE3D_COUNT,
44   CAP_SURFACE_COUNT_PER_KERNEL,
45   CAP_ARG_COUNT_PER_KERNEL,
46   CAP_ARG_SIZE_PER_KERNEL ,
47   CAP_USER_DEFINED_THREAD_COUNT_PER_TASK,
48   CAP_HW_THREAD_COUNT,
49   CAP_SURFACE2D_FORMAT_COUNT,
50   CAP_SURFACE2D_FORMATS,
51   CAP_SURFACE3D_FORMAT_COUNT,
52   CAP_SURFACE3D_FORMATS,
53   CAP_VME_STATE_COUNT,
54   CAP_GPU_PLATFORM,
55   CAP_GT_PLATFORM,
56   CAP_MIN_FREQUENCY,
57   CAP_MAX_FREQUENCY,
58   CAP_L3_CONFIG,
59   CAP_GPU_CURRENT_FREQUENCY,
60   CAP_USER_DEFINED_THREAD_COUNT_PER_TASK_NO_THREAD_ARG,
61   CAP_USER_DEFINED_THREAD_COUNT_PER_MEDIA_WALKER,
62   CAP_USER_DEFINED_THREAD_COUNT_PER_THREAD_GROUP,
63   CAP_SURFACE2DUP_COUNT,
64   CAP_PLATFORM_INFO,
65   CAP_MAX_BUFFER_SIZE,
66   CAP_MAX_SUBDEV_COUNT //for app to retrieve the total count of sub devices
67 } CM_DEVICE_CAP_NAME;
68 
69 // parameters used to set the surface state of the CmSurface
70 struct CM_VME_SURFACE_STATE_PARAM {
71   uint32_t width;
72   uint32_t height;
73 };
74 
75 #define CM_DEFAULT_PRINT_BUFFER_SIZE  (1*1024*1024) // 1M print buffer size
76 
77 #define CM_SAMPLER_ARRAY_SIZE 100
78 #define MAX_BUFFER_SIZE 256
79 #define CM_VME_VIDEO_TYPE_AVC  1      //default value for AVC
80 #define CM_VME_VIDEO_TYPE_HEVC 2
81 
82 typedef enum _CM_SUB_MAJOR_STEPPING {
83   A = 0,
84   B = 1,
85   C = 2,
86   D = 3,
87   E = 4,
88   F = 5,
89   G = 6,
90   H = 7,
91   I = 8,
92   J = 9,
93   K = 10,
94   L = 11,
95   M = 12,
96   N = 13,
97   O = 14,
98   P = 15,
99   Q = 16,
100   R = 17,
101   S = 18,
102   T = 19,
103   U = 20,
104   V = 21,
105   W = 22,
106   X = 23,
107   Y = 24,
108   Z = 25
109 } CM_SUB_MAJOR_STEPPING;
110 
111 typedef enum _CM_SUB_PLATFORM_USE_SKU {
112   GT1 = 1,
113   GT2 = 2,
114   GT3 = 3,
115   GT4 = 4,
116   GT5 = 5,
117   GTA = 5,
118   GTC = 6,
119   GTX = 7,
120   GT1_5 = 8
121 } CM_SUB_PLATFORM_USE_SKU;
122 
123 typedef int32_t  (__cdecl *ReleaseSurfaceCallback)(void *cmDevice, void *surface);
124 
125 struct CmDeviceCreationParam
126 {
127     uint32_t createOption;        // [in]  Dev create option
128     ReleaseSurfaceCallback releaseSurfaceFunc;  // [in]  Function Pointer to free surface
129     void *deviceHandleInUmd;      // [out] pointer to handle in driver
130     uint32_t version;             // [out] the Cm version
131     uint32_t driverStoreEnabled;  // [out] DriverStoreEnable flag
132     int32_t returnValue;          // [out] the return value from CMRT@UMD
133 };
134 
135 #define CM_MAX_SPILL_SIZE_IN_BYTE_PER_HW_THREAD 9216 // 9K
136 
137 #define CM_MAX_SURFACE3D_FORMAT_COUNT 3
138 
139 #define CM_RT_PLATFORM "CM_RT_PLATFORM"
140 #define CM_RT_SKU "CM_RT_SKU"
141 #define CM_RT_MAX_THREADS "CM_RT_MAX_THREADS"
142 #define CM_RT_AUBLOAD_OPTION "CM_RT_AUBLOAD_OPTION"
143 #define CM_RT_GRITS_OPTION "CM_RT_GRITS_OPTION"
144 
145 #define CM_RT_MULTIPLE_FRAMES "CM_RT_MULTIPLE_FRAMES"
146 #define CM_RT_STEPPING "CM_RT_STEPPING"
147 #define GRITS_PATH "GRITS_PATH"
148 
149 #define CM_DEVICE_CONFIG_FAST_PATH_OFFSET 30
150 #define CM_DEVICE_CONFIG_FAST_PATH_ENABLE (1 << CM_DEVICE_CONFIG_FAST_PATH_OFFSET)
151 // enable the fast path by default from cmrtlib
152 #define CM_DEVICE_CREATE_OPTION_DEFAULT   CM_DEVICE_CONFIG_FAST_PATH_ENABLE
153 #define IGFX_UNKNOWN_CORE 0
154 
155 struct CM_PLATFORM_INFO
156 {
157     uint32_t numSlices;
158     uint32_t numSubSlices;
159     uint32_t numEUsPerSubSlice;
160     uint32_t numHWThreadsPerEU;
161     uint32_t numMaxEUsPerPool;
162 };
163 
164 enum CM_QUERY_TYPE
165 {
166     CM_QUERY_VERSION,
167     CM_QUERY_REG_HANDLE,
168     CM_QUERY_MAX_VALUES,
169     CM_QUERY_GPU,
170     CM_QUERY_GT,
171     CM_QUERY_MIN_RENDER_FREQ,
172     CM_QUERY_MAX_RENDER_FREQ,
173     CM_QUERY_STEP,
174     CM_QUERY_GPU_FREQ,
175     CM_QUERY_MAX_VALUES_EX,
176     CM_QUERY_SURFACE2D_FORMAT_COUNT,
177     CM_QUERY_SURFACE2D_FORMATS,
178     CM_QUERY_PLATFORM_INFO
179 };
180 
181 struct CM_QUERY_CAPS
182 {
183     CM_QUERY_TYPE type;
184     union
185     {
186         int32_t version;
187         HANDLE hRegistration;
188         CM_HAL_MAX_VALUES maxValues;
189         CM_HAL_MAX_VALUES_EX maxValuesEx;
190         uint32_t maxVmeTableSize;
191         uint32_t genCore;
192         uint32_t genGT;
193         uint32_t minRenderFreq;
194         uint32_t maxRenderFreq;
195         uint32_t genStepId;
196         uint32_t gpuCurrentFreq;
197         uint32_t surf2DCount;
198         uint32_t *surf2DFormats;
199         CM_PLATFORM_INFO platformInfo;
200     };
201 };
202 
203 // Dummy param for execute
204 struct CM_PARAMS
205 {
206     uint32_t placeHolder;
207 };
208 
209 enum CM_FUNCTION_ID
210 {
211     CM_FN_RT_ULT                       = 0x900, // (This function code is only used to run ults for CM_RT@UMD)
212 
213     CM_FN_CREATECMDEVICE                   = 0x1000,
214     CM_FN_DESTROYCMDEVICE                  = 0x1001,
215 
216     CM_FN_CMDEVICE_CREATEBUFFER            = 0x1100,
217     CM_FN_CMDEVICE_DESTROYBUFFER           = 0x1101,
218     CM_FN_CMDEVICE_CREATEBUFFERUP          = 0x1102,
219     CM_FN_CMDEVICE_DESTROYBUFFERUP         = 0x1103,
220     CM_FN_CMDEVICE_CREATESURFACE2D         = 0x1104,
221     CM_FN_CMDEVICE_DESTROYSURFACE2D        = 0x1105,
222     CM_FN_CMDEVICE_CREATESURFACE2DUP       = 0x1106,
223     CM_FN_CMDEVICE_DESTROYSURFACE2DUP      = 0x1107,
224     CM_FN_CMDEVICE_GETSURFACE2DINFO        = 0x1108,
225     CM_FN_CMDEVICE_CREATESURFACE3D         = 0x1109,
226     CM_FN_CMDEVICE_DESTROYSURFACE3D        = 0x110A,
227     CM_FN_CMDEVICE_CREATEQUEUE             = 0x110B,
228     CM_FN_CMDEVICE_LOADPROGRAM             = 0x110C,
229     CM_FN_CMDEVICE_DESTROYPROGRAM          = 0x110D,
230     CM_FN_CMDEVICE_CREATEKERNEL            = 0x110E,
231     CM_FN_CMDEVICE_DESTROYKERNEL           = 0x110F,
232     CM_FN_CMDEVICE_CREATETASK              = 0x1110,
233     CM_FN_CMDEVICE_DESTROYTASK             = 0x1111,
234     CM_FN_CMDEVICE_GETCAPS                 = 0x1112,
235     CM_FN_CMDEVICE_SETCAPS                 = 0x1113,
236     CM_FN_CMDEVICE_CREATETHREADSPACE       = 0x1114,
237     CM_FN_CMDEVICE_DESTROYTHREADSPACE      = 0x1115,
238     CM_FN_CMDEVICE_CREATETHREADGROUPSPACE  = 0x1116,
239     CM_FN_CMDEVICE_DESTROYTHREADGROUPSPACE = 0x1117,
240     CM_FN_CMDEVICE_SETL3CONFIG             = 0x1118,
241     CM_FN_CMDEVICE_SETSUGGESTEDL3CONFIG    = 0x1119,
242     CM_FN_CMDEVICE_CREATESAMPLER           = 0x111A,
243     CM_FN_CMDEVICE_DESTROYSAMPLER          = 0x111B,
244     CM_FN_CMDEVICE_CREATESAMPLER8X8        = 0x111C,
245     CM_FN_CMDEVICE_DESTROYSAMPLER8X8       = 0x111D,
246     CM_FN_CMDEVICE_CREATESAMPLER8X8SURFACE = 0x111E,
247     CM_FN_CMDEVICE_DESTROYSAMPLER8X8SURFACE= 0x111F,
248     CM_FN_CMDEVICE_DESTROYVMESURFACE       = 0x1123,
249     CM_FN_CMDEVICE_CREATEVMESURFACEG7_5    = 0x1124,
250     CM_FN_CMDEVICE_DESTROYVMESURFACEG7_5   = 0x1125,
251     CM_FN_CMDEVICE_CREATESAMPLERSURFACE2D  = 0x1126,
252     CM_FN_CMDEVICE_CREATESAMPLERSURFACE3D  = 0x1127,
253     CM_FN_CMDEVICE_DESTROYSAMPLERSURFACE   = 0x1128,
254     CM_FN_CMDEVICE_ENABLE_GTPIN            = 0x112A,
255     CM_FN_CMDEVICE_INIT_PRINT_BUFFER       = 0x112C,
256     CM_FN_CMDEVICE_CREATEVEBOX             = 0x112D,
257     CM_FN_CMDEVICE_DESTROYVEBOX            = 0x112E,
258     CM_FN_CMDEVICE_CREATEBUFFERSVM          = 0x1131,
259     CM_FN_CMDEVICE_DESTROYBUFFERSVM         = 0x1132,
260     CM_FN_CMDEVICE_CREATESAMPLERSURFACE2DUP= 0x1133,
261     CM_FN_CMDEVICE_REGISTER_GTPIN_MARKERS  = 0x1136,
262     CM_FN_CMDEVICE_CLONEKERNEL             = 0x1137,
263     CM_FN_CMDEVICE_CREATESURFACE2D_ALIAS   = 0x1138,
264     CM_FN_CMDEVICE_CREATESAMPLER_EX        = 0x1139,
265     CM_FN_CMDEVICE_CREATESAMPLER8X8SURFACE_EX = 0x113A,
266     CM_FN_CMDEVICE_CREATESAMPLERSURFACE2D_EX = 0x113B,
267     CM_FN_CMDEVICE_CREATESURFACE2D_EX      = 0x113C,
268     CM_FN_CMDEVICE_CREATEBUFFER_ALIAS      = 0x113D,
269     CM_FN_CMDEVICE_CONFIGVMESURFACEDIMENSION = 0x113E,
270     CM_FN_CMDEVICE_CREATEHEVCVMESURFACEG10 = 0x113F,
271     CM_FN_CMDEVICE_GETVISAVERSION          = 0x1140,
272     CM_FN_CMDEVICE_CREATEQUEUEEX           = 0x1141,
273     CM_FN_CMDEVICE_FLUSH_PRINT_BUFFER      = 0x1142,
274     CM_FN_CMDEVICE_DESTROYBUFFERSTATELESS  = 0x1143,
275 
276     CM_FN_CMQUEUE_ENQUEUE                  = 0x1500,
277     CM_FN_CMQUEUE_DESTROYEVENT             = 0x1501,
278     CM_FN_CMQUEUE_ENQUEUECOPY              = 0x1502,
279     CM_FN_CMQUEUE_ENQUEUEWITHGROUP         = 0x1504,
280     CM_FN_CMQUEUE_ENQUEUESURF2DINIT        = 0x1505,
281     CM_FN_CMQUEUE_ENQUEUECOPY_V2V          = 0x1506,
282     CM_FN_CMQUEUE_ENQUEUECOPY_L2L          = 0x1507,
283     CM_FN_CMQUEUE_ENQUEUEVEBOX             = 0x1508,
284     CM_FN_CMQUEUE_ENQUEUEWITHHINTS         = 0x1509,
285     CM_FN_CMQUEUE_ENQUEUEFAST              = 0x150a,
286     CM_FN_CMQUEUE_DESTROYEVENTFAST         = 0x150b,
287     CM_FN_CMQUEUE_ENQUEUEWITHGROUPFAST     = 0x150c,
288     CM_FN_CMQUEUE_ENQUEUECOPY_BUFFER       = 0x150d,
289 
290 };
291 
292 #endif  // #ifndef CMRTLIB_AGNOSTIC_SHARE_CM_DEVICE_DEF_H_
293