1// Code generated from _gen/ARM.rules using 'go generate'; DO NOT EDIT.
2
3package ssa
4
5import "internal/buildcfg"
6import "cmd/compile/internal/types"
7
8func rewriteValueARM(v *Value) bool {
9	switch v.Op {
10	case OpARMADC:
11		return rewriteValueARM_OpARMADC(v)
12	case OpARMADCconst:
13		return rewriteValueARM_OpARMADCconst(v)
14	case OpARMADCshiftLL:
15		return rewriteValueARM_OpARMADCshiftLL(v)
16	case OpARMADCshiftLLreg:
17		return rewriteValueARM_OpARMADCshiftLLreg(v)
18	case OpARMADCshiftRA:
19		return rewriteValueARM_OpARMADCshiftRA(v)
20	case OpARMADCshiftRAreg:
21		return rewriteValueARM_OpARMADCshiftRAreg(v)
22	case OpARMADCshiftRL:
23		return rewriteValueARM_OpARMADCshiftRL(v)
24	case OpARMADCshiftRLreg:
25		return rewriteValueARM_OpARMADCshiftRLreg(v)
26	case OpARMADD:
27		return rewriteValueARM_OpARMADD(v)
28	case OpARMADDD:
29		return rewriteValueARM_OpARMADDD(v)
30	case OpARMADDF:
31		return rewriteValueARM_OpARMADDF(v)
32	case OpARMADDS:
33		return rewriteValueARM_OpARMADDS(v)
34	case OpARMADDSshiftLL:
35		return rewriteValueARM_OpARMADDSshiftLL(v)
36	case OpARMADDSshiftLLreg:
37		return rewriteValueARM_OpARMADDSshiftLLreg(v)
38	case OpARMADDSshiftRA:
39		return rewriteValueARM_OpARMADDSshiftRA(v)
40	case OpARMADDSshiftRAreg:
41		return rewriteValueARM_OpARMADDSshiftRAreg(v)
42	case OpARMADDSshiftRL:
43		return rewriteValueARM_OpARMADDSshiftRL(v)
44	case OpARMADDSshiftRLreg:
45		return rewriteValueARM_OpARMADDSshiftRLreg(v)
46	case OpARMADDconst:
47		return rewriteValueARM_OpARMADDconst(v)
48	case OpARMADDshiftLL:
49		return rewriteValueARM_OpARMADDshiftLL(v)
50	case OpARMADDshiftLLreg:
51		return rewriteValueARM_OpARMADDshiftLLreg(v)
52	case OpARMADDshiftRA:
53		return rewriteValueARM_OpARMADDshiftRA(v)
54	case OpARMADDshiftRAreg:
55		return rewriteValueARM_OpARMADDshiftRAreg(v)
56	case OpARMADDshiftRL:
57		return rewriteValueARM_OpARMADDshiftRL(v)
58	case OpARMADDshiftRLreg:
59		return rewriteValueARM_OpARMADDshiftRLreg(v)
60	case OpARMAND:
61		return rewriteValueARM_OpARMAND(v)
62	case OpARMANDconst:
63		return rewriteValueARM_OpARMANDconst(v)
64	case OpARMANDshiftLL:
65		return rewriteValueARM_OpARMANDshiftLL(v)
66	case OpARMANDshiftLLreg:
67		return rewriteValueARM_OpARMANDshiftLLreg(v)
68	case OpARMANDshiftRA:
69		return rewriteValueARM_OpARMANDshiftRA(v)
70	case OpARMANDshiftRAreg:
71		return rewriteValueARM_OpARMANDshiftRAreg(v)
72	case OpARMANDshiftRL:
73		return rewriteValueARM_OpARMANDshiftRL(v)
74	case OpARMANDshiftRLreg:
75		return rewriteValueARM_OpARMANDshiftRLreg(v)
76	case OpARMBFX:
77		return rewriteValueARM_OpARMBFX(v)
78	case OpARMBFXU:
79		return rewriteValueARM_OpARMBFXU(v)
80	case OpARMBIC:
81		return rewriteValueARM_OpARMBIC(v)
82	case OpARMBICconst:
83		return rewriteValueARM_OpARMBICconst(v)
84	case OpARMBICshiftLL:
85		return rewriteValueARM_OpARMBICshiftLL(v)
86	case OpARMBICshiftLLreg:
87		return rewriteValueARM_OpARMBICshiftLLreg(v)
88	case OpARMBICshiftRA:
89		return rewriteValueARM_OpARMBICshiftRA(v)
90	case OpARMBICshiftRAreg:
91		return rewriteValueARM_OpARMBICshiftRAreg(v)
92	case OpARMBICshiftRL:
93		return rewriteValueARM_OpARMBICshiftRL(v)
94	case OpARMBICshiftRLreg:
95		return rewriteValueARM_OpARMBICshiftRLreg(v)
96	case OpARMCMN:
97		return rewriteValueARM_OpARMCMN(v)
98	case OpARMCMNconst:
99		return rewriteValueARM_OpARMCMNconst(v)
100	case OpARMCMNshiftLL:
101		return rewriteValueARM_OpARMCMNshiftLL(v)
102	case OpARMCMNshiftLLreg:
103		return rewriteValueARM_OpARMCMNshiftLLreg(v)
104	case OpARMCMNshiftRA:
105		return rewriteValueARM_OpARMCMNshiftRA(v)
106	case OpARMCMNshiftRAreg:
107		return rewriteValueARM_OpARMCMNshiftRAreg(v)
108	case OpARMCMNshiftRL:
109		return rewriteValueARM_OpARMCMNshiftRL(v)
110	case OpARMCMNshiftRLreg:
111		return rewriteValueARM_OpARMCMNshiftRLreg(v)
112	case OpARMCMOVWHSconst:
113		return rewriteValueARM_OpARMCMOVWHSconst(v)
114	case OpARMCMOVWLSconst:
115		return rewriteValueARM_OpARMCMOVWLSconst(v)
116	case OpARMCMP:
117		return rewriteValueARM_OpARMCMP(v)
118	case OpARMCMPD:
119		return rewriteValueARM_OpARMCMPD(v)
120	case OpARMCMPF:
121		return rewriteValueARM_OpARMCMPF(v)
122	case OpARMCMPconst:
123		return rewriteValueARM_OpARMCMPconst(v)
124	case OpARMCMPshiftLL:
125		return rewriteValueARM_OpARMCMPshiftLL(v)
126	case OpARMCMPshiftLLreg:
127		return rewriteValueARM_OpARMCMPshiftLLreg(v)
128	case OpARMCMPshiftRA:
129		return rewriteValueARM_OpARMCMPshiftRA(v)
130	case OpARMCMPshiftRAreg:
131		return rewriteValueARM_OpARMCMPshiftRAreg(v)
132	case OpARMCMPshiftRL:
133		return rewriteValueARM_OpARMCMPshiftRL(v)
134	case OpARMCMPshiftRLreg:
135		return rewriteValueARM_OpARMCMPshiftRLreg(v)
136	case OpARMEqual:
137		return rewriteValueARM_OpARMEqual(v)
138	case OpARMGreaterEqual:
139		return rewriteValueARM_OpARMGreaterEqual(v)
140	case OpARMGreaterEqualU:
141		return rewriteValueARM_OpARMGreaterEqualU(v)
142	case OpARMGreaterThan:
143		return rewriteValueARM_OpARMGreaterThan(v)
144	case OpARMGreaterThanU:
145		return rewriteValueARM_OpARMGreaterThanU(v)
146	case OpARMLessEqual:
147		return rewriteValueARM_OpARMLessEqual(v)
148	case OpARMLessEqualU:
149		return rewriteValueARM_OpARMLessEqualU(v)
150	case OpARMLessThan:
151		return rewriteValueARM_OpARMLessThan(v)
152	case OpARMLessThanU:
153		return rewriteValueARM_OpARMLessThanU(v)
154	case OpARMMOVBUload:
155		return rewriteValueARM_OpARMMOVBUload(v)
156	case OpARMMOVBUloadidx:
157		return rewriteValueARM_OpARMMOVBUloadidx(v)
158	case OpARMMOVBUreg:
159		return rewriteValueARM_OpARMMOVBUreg(v)
160	case OpARMMOVBload:
161		return rewriteValueARM_OpARMMOVBload(v)
162	case OpARMMOVBloadidx:
163		return rewriteValueARM_OpARMMOVBloadidx(v)
164	case OpARMMOVBreg:
165		return rewriteValueARM_OpARMMOVBreg(v)
166	case OpARMMOVBstore:
167		return rewriteValueARM_OpARMMOVBstore(v)
168	case OpARMMOVBstoreidx:
169		return rewriteValueARM_OpARMMOVBstoreidx(v)
170	case OpARMMOVDload:
171		return rewriteValueARM_OpARMMOVDload(v)
172	case OpARMMOVDstore:
173		return rewriteValueARM_OpARMMOVDstore(v)
174	case OpARMMOVFload:
175		return rewriteValueARM_OpARMMOVFload(v)
176	case OpARMMOVFstore:
177		return rewriteValueARM_OpARMMOVFstore(v)
178	case OpARMMOVHUload:
179		return rewriteValueARM_OpARMMOVHUload(v)
180	case OpARMMOVHUloadidx:
181		return rewriteValueARM_OpARMMOVHUloadidx(v)
182	case OpARMMOVHUreg:
183		return rewriteValueARM_OpARMMOVHUreg(v)
184	case OpARMMOVHload:
185		return rewriteValueARM_OpARMMOVHload(v)
186	case OpARMMOVHloadidx:
187		return rewriteValueARM_OpARMMOVHloadidx(v)
188	case OpARMMOVHreg:
189		return rewriteValueARM_OpARMMOVHreg(v)
190	case OpARMMOVHstore:
191		return rewriteValueARM_OpARMMOVHstore(v)
192	case OpARMMOVHstoreidx:
193		return rewriteValueARM_OpARMMOVHstoreidx(v)
194	case OpARMMOVWload:
195		return rewriteValueARM_OpARMMOVWload(v)
196	case OpARMMOVWloadidx:
197		return rewriteValueARM_OpARMMOVWloadidx(v)
198	case OpARMMOVWloadshiftLL:
199		return rewriteValueARM_OpARMMOVWloadshiftLL(v)
200	case OpARMMOVWloadshiftRA:
201		return rewriteValueARM_OpARMMOVWloadshiftRA(v)
202	case OpARMMOVWloadshiftRL:
203		return rewriteValueARM_OpARMMOVWloadshiftRL(v)
204	case OpARMMOVWnop:
205		return rewriteValueARM_OpARMMOVWnop(v)
206	case OpARMMOVWreg:
207		return rewriteValueARM_OpARMMOVWreg(v)
208	case OpARMMOVWstore:
209		return rewriteValueARM_OpARMMOVWstore(v)
210	case OpARMMOVWstoreidx:
211		return rewriteValueARM_OpARMMOVWstoreidx(v)
212	case OpARMMOVWstoreshiftLL:
213		return rewriteValueARM_OpARMMOVWstoreshiftLL(v)
214	case OpARMMOVWstoreshiftRA:
215		return rewriteValueARM_OpARMMOVWstoreshiftRA(v)
216	case OpARMMOVWstoreshiftRL:
217		return rewriteValueARM_OpARMMOVWstoreshiftRL(v)
218	case OpARMMUL:
219		return rewriteValueARM_OpARMMUL(v)
220	case OpARMMULA:
221		return rewriteValueARM_OpARMMULA(v)
222	case OpARMMULD:
223		return rewriteValueARM_OpARMMULD(v)
224	case OpARMMULF:
225		return rewriteValueARM_OpARMMULF(v)
226	case OpARMMULS:
227		return rewriteValueARM_OpARMMULS(v)
228	case OpARMMVN:
229		return rewriteValueARM_OpARMMVN(v)
230	case OpARMMVNshiftLL:
231		return rewriteValueARM_OpARMMVNshiftLL(v)
232	case OpARMMVNshiftLLreg:
233		return rewriteValueARM_OpARMMVNshiftLLreg(v)
234	case OpARMMVNshiftRA:
235		return rewriteValueARM_OpARMMVNshiftRA(v)
236	case OpARMMVNshiftRAreg:
237		return rewriteValueARM_OpARMMVNshiftRAreg(v)
238	case OpARMMVNshiftRL:
239		return rewriteValueARM_OpARMMVNshiftRL(v)
240	case OpARMMVNshiftRLreg:
241		return rewriteValueARM_OpARMMVNshiftRLreg(v)
242	case OpARMNEGD:
243		return rewriteValueARM_OpARMNEGD(v)
244	case OpARMNEGF:
245		return rewriteValueARM_OpARMNEGF(v)
246	case OpARMNMULD:
247		return rewriteValueARM_OpARMNMULD(v)
248	case OpARMNMULF:
249		return rewriteValueARM_OpARMNMULF(v)
250	case OpARMNotEqual:
251		return rewriteValueARM_OpARMNotEqual(v)
252	case OpARMOR:
253		return rewriteValueARM_OpARMOR(v)
254	case OpARMORconst:
255		return rewriteValueARM_OpARMORconst(v)
256	case OpARMORshiftLL:
257		return rewriteValueARM_OpARMORshiftLL(v)
258	case OpARMORshiftLLreg:
259		return rewriteValueARM_OpARMORshiftLLreg(v)
260	case OpARMORshiftRA:
261		return rewriteValueARM_OpARMORshiftRA(v)
262	case OpARMORshiftRAreg:
263		return rewriteValueARM_OpARMORshiftRAreg(v)
264	case OpARMORshiftRL:
265		return rewriteValueARM_OpARMORshiftRL(v)
266	case OpARMORshiftRLreg:
267		return rewriteValueARM_OpARMORshiftRLreg(v)
268	case OpARMRSB:
269		return rewriteValueARM_OpARMRSB(v)
270	case OpARMRSBSshiftLL:
271		return rewriteValueARM_OpARMRSBSshiftLL(v)
272	case OpARMRSBSshiftLLreg:
273		return rewriteValueARM_OpARMRSBSshiftLLreg(v)
274	case OpARMRSBSshiftRA:
275		return rewriteValueARM_OpARMRSBSshiftRA(v)
276	case OpARMRSBSshiftRAreg:
277		return rewriteValueARM_OpARMRSBSshiftRAreg(v)
278	case OpARMRSBSshiftRL:
279		return rewriteValueARM_OpARMRSBSshiftRL(v)
280	case OpARMRSBSshiftRLreg:
281		return rewriteValueARM_OpARMRSBSshiftRLreg(v)
282	case OpARMRSBconst:
283		return rewriteValueARM_OpARMRSBconst(v)
284	case OpARMRSBshiftLL:
285		return rewriteValueARM_OpARMRSBshiftLL(v)
286	case OpARMRSBshiftLLreg:
287		return rewriteValueARM_OpARMRSBshiftLLreg(v)
288	case OpARMRSBshiftRA:
289		return rewriteValueARM_OpARMRSBshiftRA(v)
290	case OpARMRSBshiftRAreg:
291		return rewriteValueARM_OpARMRSBshiftRAreg(v)
292	case OpARMRSBshiftRL:
293		return rewriteValueARM_OpARMRSBshiftRL(v)
294	case OpARMRSBshiftRLreg:
295		return rewriteValueARM_OpARMRSBshiftRLreg(v)
296	case OpARMRSCconst:
297		return rewriteValueARM_OpARMRSCconst(v)
298	case OpARMRSCshiftLL:
299		return rewriteValueARM_OpARMRSCshiftLL(v)
300	case OpARMRSCshiftLLreg:
301		return rewriteValueARM_OpARMRSCshiftLLreg(v)
302	case OpARMRSCshiftRA:
303		return rewriteValueARM_OpARMRSCshiftRA(v)
304	case OpARMRSCshiftRAreg:
305		return rewriteValueARM_OpARMRSCshiftRAreg(v)
306	case OpARMRSCshiftRL:
307		return rewriteValueARM_OpARMRSCshiftRL(v)
308	case OpARMRSCshiftRLreg:
309		return rewriteValueARM_OpARMRSCshiftRLreg(v)
310	case OpARMSBC:
311		return rewriteValueARM_OpARMSBC(v)
312	case OpARMSBCconst:
313		return rewriteValueARM_OpARMSBCconst(v)
314	case OpARMSBCshiftLL:
315		return rewriteValueARM_OpARMSBCshiftLL(v)
316	case OpARMSBCshiftLLreg:
317		return rewriteValueARM_OpARMSBCshiftLLreg(v)
318	case OpARMSBCshiftRA:
319		return rewriteValueARM_OpARMSBCshiftRA(v)
320	case OpARMSBCshiftRAreg:
321		return rewriteValueARM_OpARMSBCshiftRAreg(v)
322	case OpARMSBCshiftRL:
323		return rewriteValueARM_OpARMSBCshiftRL(v)
324	case OpARMSBCshiftRLreg:
325		return rewriteValueARM_OpARMSBCshiftRLreg(v)
326	case OpARMSLL:
327		return rewriteValueARM_OpARMSLL(v)
328	case OpARMSLLconst:
329		return rewriteValueARM_OpARMSLLconst(v)
330	case OpARMSRA:
331		return rewriteValueARM_OpARMSRA(v)
332	case OpARMSRAcond:
333		return rewriteValueARM_OpARMSRAcond(v)
334	case OpARMSRAconst:
335		return rewriteValueARM_OpARMSRAconst(v)
336	case OpARMSRL:
337		return rewriteValueARM_OpARMSRL(v)
338	case OpARMSRLconst:
339		return rewriteValueARM_OpARMSRLconst(v)
340	case OpARMSRR:
341		return rewriteValueARM_OpARMSRR(v)
342	case OpARMSUB:
343		return rewriteValueARM_OpARMSUB(v)
344	case OpARMSUBD:
345		return rewriteValueARM_OpARMSUBD(v)
346	case OpARMSUBF:
347		return rewriteValueARM_OpARMSUBF(v)
348	case OpARMSUBS:
349		return rewriteValueARM_OpARMSUBS(v)
350	case OpARMSUBSshiftLL:
351		return rewriteValueARM_OpARMSUBSshiftLL(v)
352	case OpARMSUBSshiftLLreg:
353		return rewriteValueARM_OpARMSUBSshiftLLreg(v)
354	case OpARMSUBSshiftRA:
355		return rewriteValueARM_OpARMSUBSshiftRA(v)
356	case OpARMSUBSshiftRAreg:
357		return rewriteValueARM_OpARMSUBSshiftRAreg(v)
358	case OpARMSUBSshiftRL:
359		return rewriteValueARM_OpARMSUBSshiftRL(v)
360	case OpARMSUBSshiftRLreg:
361		return rewriteValueARM_OpARMSUBSshiftRLreg(v)
362	case OpARMSUBconst:
363		return rewriteValueARM_OpARMSUBconst(v)
364	case OpARMSUBshiftLL:
365		return rewriteValueARM_OpARMSUBshiftLL(v)
366	case OpARMSUBshiftLLreg:
367		return rewriteValueARM_OpARMSUBshiftLLreg(v)
368	case OpARMSUBshiftRA:
369		return rewriteValueARM_OpARMSUBshiftRA(v)
370	case OpARMSUBshiftRAreg:
371		return rewriteValueARM_OpARMSUBshiftRAreg(v)
372	case OpARMSUBshiftRL:
373		return rewriteValueARM_OpARMSUBshiftRL(v)
374	case OpARMSUBshiftRLreg:
375		return rewriteValueARM_OpARMSUBshiftRLreg(v)
376	case OpARMTEQ:
377		return rewriteValueARM_OpARMTEQ(v)
378	case OpARMTEQconst:
379		return rewriteValueARM_OpARMTEQconst(v)
380	case OpARMTEQshiftLL:
381		return rewriteValueARM_OpARMTEQshiftLL(v)
382	case OpARMTEQshiftLLreg:
383		return rewriteValueARM_OpARMTEQshiftLLreg(v)
384	case OpARMTEQshiftRA:
385		return rewriteValueARM_OpARMTEQshiftRA(v)
386	case OpARMTEQshiftRAreg:
387		return rewriteValueARM_OpARMTEQshiftRAreg(v)
388	case OpARMTEQshiftRL:
389		return rewriteValueARM_OpARMTEQshiftRL(v)
390	case OpARMTEQshiftRLreg:
391		return rewriteValueARM_OpARMTEQshiftRLreg(v)
392	case OpARMTST:
393		return rewriteValueARM_OpARMTST(v)
394	case OpARMTSTconst:
395		return rewriteValueARM_OpARMTSTconst(v)
396	case OpARMTSTshiftLL:
397		return rewriteValueARM_OpARMTSTshiftLL(v)
398	case OpARMTSTshiftLLreg:
399		return rewriteValueARM_OpARMTSTshiftLLreg(v)
400	case OpARMTSTshiftRA:
401		return rewriteValueARM_OpARMTSTshiftRA(v)
402	case OpARMTSTshiftRAreg:
403		return rewriteValueARM_OpARMTSTshiftRAreg(v)
404	case OpARMTSTshiftRL:
405		return rewriteValueARM_OpARMTSTshiftRL(v)
406	case OpARMTSTshiftRLreg:
407		return rewriteValueARM_OpARMTSTshiftRLreg(v)
408	case OpARMXOR:
409		return rewriteValueARM_OpARMXOR(v)
410	case OpARMXORconst:
411		return rewriteValueARM_OpARMXORconst(v)
412	case OpARMXORshiftLL:
413		return rewriteValueARM_OpARMXORshiftLL(v)
414	case OpARMXORshiftLLreg:
415		return rewriteValueARM_OpARMXORshiftLLreg(v)
416	case OpARMXORshiftRA:
417		return rewriteValueARM_OpARMXORshiftRA(v)
418	case OpARMXORshiftRAreg:
419		return rewriteValueARM_OpARMXORshiftRAreg(v)
420	case OpARMXORshiftRL:
421		return rewriteValueARM_OpARMXORshiftRL(v)
422	case OpARMXORshiftRLreg:
423		return rewriteValueARM_OpARMXORshiftRLreg(v)
424	case OpARMXORshiftRR:
425		return rewriteValueARM_OpARMXORshiftRR(v)
426	case OpAbs:
427		v.Op = OpARMABSD
428		return true
429	case OpAdd16:
430		v.Op = OpARMADD
431		return true
432	case OpAdd32:
433		v.Op = OpARMADD
434		return true
435	case OpAdd32F:
436		v.Op = OpARMADDF
437		return true
438	case OpAdd32carry:
439		v.Op = OpARMADDS
440		return true
441	case OpAdd32withcarry:
442		v.Op = OpARMADC
443		return true
444	case OpAdd64F:
445		v.Op = OpARMADDD
446		return true
447	case OpAdd8:
448		v.Op = OpARMADD
449		return true
450	case OpAddPtr:
451		v.Op = OpARMADD
452		return true
453	case OpAddr:
454		return rewriteValueARM_OpAddr(v)
455	case OpAnd16:
456		v.Op = OpARMAND
457		return true
458	case OpAnd32:
459		v.Op = OpARMAND
460		return true
461	case OpAnd8:
462		v.Op = OpARMAND
463		return true
464	case OpAndB:
465		v.Op = OpARMAND
466		return true
467	case OpAvg32u:
468		return rewriteValueARM_OpAvg32u(v)
469	case OpBitLen32:
470		return rewriteValueARM_OpBitLen32(v)
471	case OpBswap32:
472		return rewriteValueARM_OpBswap32(v)
473	case OpClosureCall:
474		v.Op = OpARMCALLclosure
475		return true
476	case OpCom16:
477		v.Op = OpARMMVN
478		return true
479	case OpCom32:
480		v.Op = OpARMMVN
481		return true
482	case OpCom8:
483		v.Op = OpARMMVN
484		return true
485	case OpConst16:
486		return rewriteValueARM_OpConst16(v)
487	case OpConst32:
488		return rewriteValueARM_OpConst32(v)
489	case OpConst32F:
490		return rewriteValueARM_OpConst32F(v)
491	case OpConst64F:
492		return rewriteValueARM_OpConst64F(v)
493	case OpConst8:
494		return rewriteValueARM_OpConst8(v)
495	case OpConstBool:
496		return rewriteValueARM_OpConstBool(v)
497	case OpConstNil:
498		return rewriteValueARM_OpConstNil(v)
499	case OpCtz16:
500		return rewriteValueARM_OpCtz16(v)
501	case OpCtz16NonZero:
502		v.Op = OpCtz32
503		return true
504	case OpCtz32:
505		return rewriteValueARM_OpCtz32(v)
506	case OpCtz32NonZero:
507		v.Op = OpCtz32
508		return true
509	case OpCtz8:
510		return rewriteValueARM_OpCtz8(v)
511	case OpCtz8NonZero:
512		v.Op = OpCtz32
513		return true
514	case OpCvt32Fto32:
515		v.Op = OpARMMOVFW
516		return true
517	case OpCvt32Fto32U:
518		v.Op = OpARMMOVFWU
519		return true
520	case OpCvt32Fto64F:
521		v.Op = OpARMMOVFD
522		return true
523	case OpCvt32Uto32F:
524		v.Op = OpARMMOVWUF
525		return true
526	case OpCvt32Uto64F:
527		v.Op = OpARMMOVWUD
528		return true
529	case OpCvt32to32F:
530		v.Op = OpARMMOVWF
531		return true
532	case OpCvt32to64F:
533		v.Op = OpARMMOVWD
534		return true
535	case OpCvt64Fto32:
536		v.Op = OpARMMOVDW
537		return true
538	case OpCvt64Fto32F:
539		v.Op = OpARMMOVDF
540		return true
541	case OpCvt64Fto32U:
542		v.Op = OpARMMOVDWU
543		return true
544	case OpCvtBoolToUint8:
545		v.Op = OpCopy
546		return true
547	case OpDiv16:
548		return rewriteValueARM_OpDiv16(v)
549	case OpDiv16u:
550		return rewriteValueARM_OpDiv16u(v)
551	case OpDiv32:
552		return rewriteValueARM_OpDiv32(v)
553	case OpDiv32F:
554		v.Op = OpARMDIVF
555		return true
556	case OpDiv32u:
557		return rewriteValueARM_OpDiv32u(v)
558	case OpDiv64F:
559		v.Op = OpARMDIVD
560		return true
561	case OpDiv8:
562		return rewriteValueARM_OpDiv8(v)
563	case OpDiv8u:
564		return rewriteValueARM_OpDiv8u(v)
565	case OpEq16:
566		return rewriteValueARM_OpEq16(v)
567	case OpEq32:
568		return rewriteValueARM_OpEq32(v)
569	case OpEq32F:
570		return rewriteValueARM_OpEq32F(v)
571	case OpEq64F:
572		return rewriteValueARM_OpEq64F(v)
573	case OpEq8:
574		return rewriteValueARM_OpEq8(v)
575	case OpEqB:
576		return rewriteValueARM_OpEqB(v)
577	case OpEqPtr:
578		return rewriteValueARM_OpEqPtr(v)
579	case OpFMA:
580		return rewriteValueARM_OpFMA(v)
581	case OpGetCallerPC:
582		v.Op = OpARMLoweredGetCallerPC
583		return true
584	case OpGetCallerSP:
585		v.Op = OpARMLoweredGetCallerSP
586		return true
587	case OpGetClosurePtr:
588		v.Op = OpARMLoweredGetClosurePtr
589		return true
590	case OpHmul32:
591		v.Op = OpARMHMUL
592		return true
593	case OpHmul32u:
594		v.Op = OpARMHMULU
595		return true
596	case OpInterCall:
597		v.Op = OpARMCALLinter
598		return true
599	case OpIsInBounds:
600		return rewriteValueARM_OpIsInBounds(v)
601	case OpIsNonNil:
602		return rewriteValueARM_OpIsNonNil(v)
603	case OpIsSliceInBounds:
604		return rewriteValueARM_OpIsSliceInBounds(v)
605	case OpLeq16:
606		return rewriteValueARM_OpLeq16(v)
607	case OpLeq16U:
608		return rewriteValueARM_OpLeq16U(v)
609	case OpLeq32:
610		return rewriteValueARM_OpLeq32(v)
611	case OpLeq32F:
612		return rewriteValueARM_OpLeq32F(v)
613	case OpLeq32U:
614		return rewriteValueARM_OpLeq32U(v)
615	case OpLeq64F:
616		return rewriteValueARM_OpLeq64F(v)
617	case OpLeq8:
618		return rewriteValueARM_OpLeq8(v)
619	case OpLeq8U:
620		return rewriteValueARM_OpLeq8U(v)
621	case OpLess16:
622		return rewriteValueARM_OpLess16(v)
623	case OpLess16U:
624		return rewriteValueARM_OpLess16U(v)
625	case OpLess32:
626		return rewriteValueARM_OpLess32(v)
627	case OpLess32F:
628		return rewriteValueARM_OpLess32F(v)
629	case OpLess32U:
630		return rewriteValueARM_OpLess32U(v)
631	case OpLess64F:
632		return rewriteValueARM_OpLess64F(v)
633	case OpLess8:
634		return rewriteValueARM_OpLess8(v)
635	case OpLess8U:
636		return rewriteValueARM_OpLess8U(v)
637	case OpLoad:
638		return rewriteValueARM_OpLoad(v)
639	case OpLocalAddr:
640		return rewriteValueARM_OpLocalAddr(v)
641	case OpLsh16x16:
642		return rewriteValueARM_OpLsh16x16(v)
643	case OpLsh16x32:
644		return rewriteValueARM_OpLsh16x32(v)
645	case OpLsh16x64:
646		return rewriteValueARM_OpLsh16x64(v)
647	case OpLsh16x8:
648		return rewriteValueARM_OpLsh16x8(v)
649	case OpLsh32x16:
650		return rewriteValueARM_OpLsh32x16(v)
651	case OpLsh32x32:
652		return rewriteValueARM_OpLsh32x32(v)
653	case OpLsh32x64:
654		return rewriteValueARM_OpLsh32x64(v)
655	case OpLsh32x8:
656		return rewriteValueARM_OpLsh32x8(v)
657	case OpLsh8x16:
658		return rewriteValueARM_OpLsh8x16(v)
659	case OpLsh8x32:
660		return rewriteValueARM_OpLsh8x32(v)
661	case OpLsh8x64:
662		return rewriteValueARM_OpLsh8x64(v)
663	case OpLsh8x8:
664		return rewriteValueARM_OpLsh8x8(v)
665	case OpMod16:
666		return rewriteValueARM_OpMod16(v)
667	case OpMod16u:
668		return rewriteValueARM_OpMod16u(v)
669	case OpMod32:
670		return rewriteValueARM_OpMod32(v)
671	case OpMod32u:
672		return rewriteValueARM_OpMod32u(v)
673	case OpMod8:
674		return rewriteValueARM_OpMod8(v)
675	case OpMod8u:
676		return rewriteValueARM_OpMod8u(v)
677	case OpMove:
678		return rewriteValueARM_OpMove(v)
679	case OpMul16:
680		v.Op = OpARMMUL
681		return true
682	case OpMul32:
683		v.Op = OpARMMUL
684		return true
685	case OpMul32F:
686		v.Op = OpARMMULF
687		return true
688	case OpMul32uhilo:
689		v.Op = OpARMMULLU
690		return true
691	case OpMul64F:
692		v.Op = OpARMMULD
693		return true
694	case OpMul8:
695		v.Op = OpARMMUL
696		return true
697	case OpNeg16:
698		return rewriteValueARM_OpNeg16(v)
699	case OpNeg32:
700		return rewriteValueARM_OpNeg32(v)
701	case OpNeg32F:
702		v.Op = OpARMNEGF
703		return true
704	case OpNeg64F:
705		v.Op = OpARMNEGD
706		return true
707	case OpNeg8:
708		return rewriteValueARM_OpNeg8(v)
709	case OpNeq16:
710		return rewriteValueARM_OpNeq16(v)
711	case OpNeq32:
712		return rewriteValueARM_OpNeq32(v)
713	case OpNeq32F:
714		return rewriteValueARM_OpNeq32F(v)
715	case OpNeq64F:
716		return rewriteValueARM_OpNeq64F(v)
717	case OpNeq8:
718		return rewriteValueARM_OpNeq8(v)
719	case OpNeqB:
720		v.Op = OpARMXOR
721		return true
722	case OpNeqPtr:
723		return rewriteValueARM_OpNeqPtr(v)
724	case OpNilCheck:
725		v.Op = OpARMLoweredNilCheck
726		return true
727	case OpNot:
728		return rewriteValueARM_OpNot(v)
729	case OpOffPtr:
730		return rewriteValueARM_OpOffPtr(v)
731	case OpOr16:
732		v.Op = OpARMOR
733		return true
734	case OpOr32:
735		v.Op = OpARMOR
736		return true
737	case OpOr8:
738		v.Op = OpARMOR
739		return true
740	case OpOrB:
741		v.Op = OpARMOR
742		return true
743	case OpPanicBounds:
744		return rewriteValueARM_OpPanicBounds(v)
745	case OpPanicExtend:
746		return rewriteValueARM_OpPanicExtend(v)
747	case OpRotateLeft16:
748		return rewriteValueARM_OpRotateLeft16(v)
749	case OpRotateLeft32:
750		return rewriteValueARM_OpRotateLeft32(v)
751	case OpRotateLeft8:
752		return rewriteValueARM_OpRotateLeft8(v)
753	case OpRound32F:
754		v.Op = OpCopy
755		return true
756	case OpRound64F:
757		v.Op = OpCopy
758		return true
759	case OpRsh16Ux16:
760		return rewriteValueARM_OpRsh16Ux16(v)
761	case OpRsh16Ux32:
762		return rewriteValueARM_OpRsh16Ux32(v)
763	case OpRsh16Ux64:
764		return rewriteValueARM_OpRsh16Ux64(v)
765	case OpRsh16Ux8:
766		return rewriteValueARM_OpRsh16Ux8(v)
767	case OpRsh16x16:
768		return rewriteValueARM_OpRsh16x16(v)
769	case OpRsh16x32:
770		return rewriteValueARM_OpRsh16x32(v)
771	case OpRsh16x64:
772		return rewriteValueARM_OpRsh16x64(v)
773	case OpRsh16x8:
774		return rewriteValueARM_OpRsh16x8(v)
775	case OpRsh32Ux16:
776		return rewriteValueARM_OpRsh32Ux16(v)
777	case OpRsh32Ux32:
778		return rewriteValueARM_OpRsh32Ux32(v)
779	case OpRsh32Ux64:
780		return rewriteValueARM_OpRsh32Ux64(v)
781	case OpRsh32Ux8:
782		return rewriteValueARM_OpRsh32Ux8(v)
783	case OpRsh32x16:
784		return rewriteValueARM_OpRsh32x16(v)
785	case OpRsh32x32:
786		return rewriteValueARM_OpRsh32x32(v)
787	case OpRsh32x64:
788		return rewriteValueARM_OpRsh32x64(v)
789	case OpRsh32x8:
790		return rewriteValueARM_OpRsh32x8(v)
791	case OpRsh8Ux16:
792		return rewriteValueARM_OpRsh8Ux16(v)
793	case OpRsh8Ux32:
794		return rewriteValueARM_OpRsh8Ux32(v)
795	case OpRsh8Ux64:
796		return rewriteValueARM_OpRsh8Ux64(v)
797	case OpRsh8Ux8:
798		return rewriteValueARM_OpRsh8Ux8(v)
799	case OpRsh8x16:
800		return rewriteValueARM_OpRsh8x16(v)
801	case OpRsh8x32:
802		return rewriteValueARM_OpRsh8x32(v)
803	case OpRsh8x64:
804		return rewriteValueARM_OpRsh8x64(v)
805	case OpRsh8x8:
806		return rewriteValueARM_OpRsh8x8(v)
807	case OpSelect0:
808		return rewriteValueARM_OpSelect0(v)
809	case OpSelect1:
810		return rewriteValueARM_OpSelect1(v)
811	case OpSignExt16to32:
812		v.Op = OpARMMOVHreg
813		return true
814	case OpSignExt8to16:
815		v.Op = OpARMMOVBreg
816		return true
817	case OpSignExt8to32:
818		v.Op = OpARMMOVBreg
819		return true
820	case OpSignmask:
821		return rewriteValueARM_OpSignmask(v)
822	case OpSlicemask:
823		return rewriteValueARM_OpSlicemask(v)
824	case OpSqrt:
825		v.Op = OpARMSQRTD
826		return true
827	case OpSqrt32:
828		v.Op = OpARMSQRTF
829		return true
830	case OpStaticCall:
831		v.Op = OpARMCALLstatic
832		return true
833	case OpStore:
834		return rewriteValueARM_OpStore(v)
835	case OpSub16:
836		v.Op = OpARMSUB
837		return true
838	case OpSub32:
839		v.Op = OpARMSUB
840		return true
841	case OpSub32F:
842		v.Op = OpARMSUBF
843		return true
844	case OpSub32carry:
845		v.Op = OpARMSUBS
846		return true
847	case OpSub32withcarry:
848		v.Op = OpARMSBC
849		return true
850	case OpSub64F:
851		v.Op = OpARMSUBD
852		return true
853	case OpSub8:
854		v.Op = OpARMSUB
855		return true
856	case OpSubPtr:
857		v.Op = OpARMSUB
858		return true
859	case OpTailCall:
860		v.Op = OpARMCALLtail
861		return true
862	case OpTrunc16to8:
863		v.Op = OpCopy
864		return true
865	case OpTrunc32to16:
866		v.Op = OpCopy
867		return true
868	case OpTrunc32to8:
869		v.Op = OpCopy
870		return true
871	case OpWB:
872		v.Op = OpARMLoweredWB
873		return true
874	case OpXor16:
875		v.Op = OpARMXOR
876		return true
877	case OpXor32:
878		v.Op = OpARMXOR
879		return true
880	case OpXor8:
881		v.Op = OpARMXOR
882		return true
883	case OpZero:
884		return rewriteValueARM_OpZero(v)
885	case OpZeroExt16to32:
886		v.Op = OpARMMOVHUreg
887		return true
888	case OpZeroExt8to16:
889		v.Op = OpARMMOVBUreg
890		return true
891	case OpZeroExt8to32:
892		v.Op = OpARMMOVBUreg
893		return true
894	case OpZeromask:
895		return rewriteValueARM_OpZeromask(v)
896	}
897	return false
898}
899func rewriteValueARM_OpARMADC(v *Value) bool {
900	v_2 := v.Args[2]
901	v_1 := v.Args[1]
902	v_0 := v.Args[0]
903	// match: (ADC (MOVWconst [c]) x flags)
904	// result: (ADCconst [c] x flags)
905	for {
906		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
907			if v_0.Op != OpARMMOVWconst {
908				continue
909			}
910			c := auxIntToInt32(v_0.AuxInt)
911			x := v_1
912			flags := v_2
913			v.reset(OpARMADCconst)
914			v.AuxInt = int32ToAuxInt(c)
915			v.AddArg2(x, flags)
916			return true
917		}
918		break
919	}
920	// match: (ADC x (SLLconst [c] y) flags)
921	// result: (ADCshiftLL x y [c] flags)
922	for {
923		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
924			x := v_0
925			if v_1.Op != OpARMSLLconst {
926				continue
927			}
928			c := auxIntToInt32(v_1.AuxInt)
929			y := v_1.Args[0]
930			flags := v_2
931			v.reset(OpARMADCshiftLL)
932			v.AuxInt = int32ToAuxInt(c)
933			v.AddArg3(x, y, flags)
934			return true
935		}
936		break
937	}
938	// match: (ADC x (SRLconst [c] y) flags)
939	// result: (ADCshiftRL x y [c] flags)
940	for {
941		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
942			x := v_0
943			if v_1.Op != OpARMSRLconst {
944				continue
945			}
946			c := auxIntToInt32(v_1.AuxInt)
947			y := v_1.Args[0]
948			flags := v_2
949			v.reset(OpARMADCshiftRL)
950			v.AuxInt = int32ToAuxInt(c)
951			v.AddArg3(x, y, flags)
952			return true
953		}
954		break
955	}
956	// match: (ADC x (SRAconst [c] y) flags)
957	// result: (ADCshiftRA x y [c] flags)
958	for {
959		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
960			x := v_0
961			if v_1.Op != OpARMSRAconst {
962				continue
963			}
964			c := auxIntToInt32(v_1.AuxInt)
965			y := v_1.Args[0]
966			flags := v_2
967			v.reset(OpARMADCshiftRA)
968			v.AuxInt = int32ToAuxInt(c)
969			v.AddArg3(x, y, flags)
970			return true
971		}
972		break
973	}
974	// match: (ADC x (SLL y z) flags)
975	// result: (ADCshiftLLreg x y z flags)
976	for {
977		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
978			x := v_0
979			if v_1.Op != OpARMSLL {
980				continue
981			}
982			z := v_1.Args[1]
983			y := v_1.Args[0]
984			flags := v_2
985			v.reset(OpARMADCshiftLLreg)
986			v.AddArg4(x, y, z, flags)
987			return true
988		}
989		break
990	}
991	// match: (ADC x (SRL y z) flags)
992	// result: (ADCshiftRLreg x y z flags)
993	for {
994		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
995			x := v_0
996			if v_1.Op != OpARMSRL {
997				continue
998			}
999			z := v_1.Args[1]
1000			y := v_1.Args[0]
1001			flags := v_2
1002			v.reset(OpARMADCshiftRLreg)
1003			v.AddArg4(x, y, z, flags)
1004			return true
1005		}
1006		break
1007	}
1008	// match: (ADC x (SRA y z) flags)
1009	// result: (ADCshiftRAreg x y z flags)
1010	for {
1011		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1012			x := v_0
1013			if v_1.Op != OpARMSRA {
1014				continue
1015			}
1016			z := v_1.Args[1]
1017			y := v_1.Args[0]
1018			flags := v_2
1019			v.reset(OpARMADCshiftRAreg)
1020			v.AddArg4(x, y, z, flags)
1021			return true
1022		}
1023		break
1024	}
1025	return false
1026}
1027func rewriteValueARM_OpARMADCconst(v *Value) bool {
1028	v_1 := v.Args[1]
1029	v_0 := v.Args[0]
1030	// match: (ADCconst [c] (ADDconst [d] x) flags)
1031	// result: (ADCconst [c+d] x flags)
1032	for {
1033		c := auxIntToInt32(v.AuxInt)
1034		if v_0.Op != OpARMADDconst {
1035			break
1036		}
1037		d := auxIntToInt32(v_0.AuxInt)
1038		x := v_0.Args[0]
1039		flags := v_1
1040		v.reset(OpARMADCconst)
1041		v.AuxInt = int32ToAuxInt(c + d)
1042		v.AddArg2(x, flags)
1043		return true
1044	}
1045	// match: (ADCconst [c] (SUBconst [d] x) flags)
1046	// result: (ADCconst [c-d] x flags)
1047	for {
1048		c := auxIntToInt32(v.AuxInt)
1049		if v_0.Op != OpARMSUBconst {
1050			break
1051		}
1052		d := auxIntToInt32(v_0.AuxInt)
1053		x := v_0.Args[0]
1054		flags := v_1
1055		v.reset(OpARMADCconst)
1056		v.AuxInt = int32ToAuxInt(c - d)
1057		v.AddArg2(x, flags)
1058		return true
1059	}
1060	return false
1061}
1062func rewriteValueARM_OpARMADCshiftLL(v *Value) bool {
1063	v_2 := v.Args[2]
1064	v_1 := v.Args[1]
1065	v_0 := v.Args[0]
1066	b := v.Block
1067	// match: (ADCshiftLL (MOVWconst [c]) x [d] flags)
1068	// result: (ADCconst [c] (SLLconst <x.Type> x [d]) flags)
1069	for {
1070		d := auxIntToInt32(v.AuxInt)
1071		if v_0.Op != OpARMMOVWconst {
1072			break
1073		}
1074		c := auxIntToInt32(v_0.AuxInt)
1075		x := v_1
1076		flags := v_2
1077		v.reset(OpARMADCconst)
1078		v.AuxInt = int32ToAuxInt(c)
1079		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
1080		v0.AuxInt = int32ToAuxInt(d)
1081		v0.AddArg(x)
1082		v.AddArg2(v0, flags)
1083		return true
1084	}
1085	// match: (ADCshiftLL x (MOVWconst [c]) [d] flags)
1086	// result: (ADCconst x [c<<uint64(d)] flags)
1087	for {
1088		d := auxIntToInt32(v.AuxInt)
1089		x := v_0
1090		if v_1.Op != OpARMMOVWconst {
1091			break
1092		}
1093		c := auxIntToInt32(v_1.AuxInt)
1094		flags := v_2
1095		v.reset(OpARMADCconst)
1096		v.AuxInt = int32ToAuxInt(c << uint64(d))
1097		v.AddArg2(x, flags)
1098		return true
1099	}
1100	return false
1101}
1102func rewriteValueARM_OpARMADCshiftLLreg(v *Value) bool {
1103	v_3 := v.Args[3]
1104	v_2 := v.Args[2]
1105	v_1 := v.Args[1]
1106	v_0 := v.Args[0]
1107	b := v.Block
1108	// match: (ADCshiftLLreg (MOVWconst [c]) x y flags)
1109	// result: (ADCconst [c] (SLL <x.Type> x y) flags)
1110	for {
1111		if v_0.Op != OpARMMOVWconst {
1112			break
1113		}
1114		c := auxIntToInt32(v_0.AuxInt)
1115		x := v_1
1116		y := v_2
1117		flags := v_3
1118		v.reset(OpARMADCconst)
1119		v.AuxInt = int32ToAuxInt(c)
1120		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
1121		v0.AddArg2(x, y)
1122		v.AddArg2(v0, flags)
1123		return true
1124	}
1125	// match: (ADCshiftLLreg x y (MOVWconst [c]) flags)
1126	// cond: 0 <= c && c < 32
1127	// result: (ADCshiftLL x y [c] flags)
1128	for {
1129		x := v_0
1130		y := v_1
1131		if v_2.Op != OpARMMOVWconst {
1132			break
1133		}
1134		c := auxIntToInt32(v_2.AuxInt)
1135		flags := v_3
1136		if !(0 <= c && c < 32) {
1137			break
1138		}
1139		v.reset(OpARMADCshiftLL)
1140		v.AuxInt = int32ToAuxInt(c)
1141		v.AddArg3(x, y, flags)
1142		return true
1143	}
1144	return false
1145}
1146func rewriteValueARM_OpARMADCshiftRA(v *Value) bool {
1147	v_2 := v.Args[2]
1148	v_1 := v.Args[1]
1149	v_0 := v.Args[0]
1150	b := v.Block
1151	// match: (ADCshiftRA (MOVWconst [c]) x [d] flags)
1152	// result: (ADCconst [c] (SRAconst <x.Type> x [d]) flags)
1153	for {
1154		d := auxIntToInt32(v.AuxInt)
1155		if v_0.Op != OpARMMOVWconst {
1156			break
1157		}
1158		c := auxIntToInt32(v_0.AuxInt)
1159		x := v_1
1160		flags := v_2
1161		v.reset(OpARMADCconst)
1162		v.AuxInt = int32ToAuxInt(c)
1163		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
1164		v0.AuxInt = int32ToAuxInt(d)
1165		v0.AddArg(x)
1166		v.AddArg2(v0, flags)
1167		return true
1168	}
1169	// match: (ADCshiftRA x (MOVWconst [c]) [d] flags)
1170	// result: (ADCconst x [c>>uint64(d)] flags)
1171	for {
1172		d := auxIntToInt32(v.AuxInt)
1173		x := v_0
1174		if v_1.Op != OpARMMOVWconst {
1175			break
1176		}
1177		c := auxIntToInt32(v_1.AuxInt)
1178		flags := v_2
1179		v.reset(OpARMADCconst)
1180		v.AuxInt = int32ToAuxInt(c >> uint64(d))
1181		v.AddArg2(x, flags)
1182		return true
1183	}
1184	return false
1185}
1186func rewriteValueARM_OpARMADCshiftRAreg(v *Value) bool {
1187	v_3 := v.Args[3]
1188	v_2 := v.Args[2]
1189	v_1 := v.Args[1]
1190	v_0 := v.Args[0]
1191	b := v.Block
1192	// match: (ADCshiftRAreg (MOVWconst [c]) x y flags)
1193	// result: (ADCconst [c] (SRA <x.Type> x y) flags)
1194	for {
1195		if v_0.Op != OpARMMOVWconst {
1196			break
1197		}
1198		c := auxIntToInt32(v_0.AuxInt)
1199		x := v_1
1200		y := v_2
1201		flags := v_3
1202		v.reset(OpARMADCconst)
1203		v.AuxInt = int32ToAuxInt(c)
1204		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
1205		v0.AddArg2(x, y)
1206		v.AddArg2(v0, flags)
1207		return true
1208	}
1209	// match: (ADCshiftRAreg x y (MOVWconst [c]) flags)
1210	// cond: 0 <= c && c < 32
1211	// result: (ADCshiftRA x y [c] flags)
1212	for {
1213		x := v_0
1214		y := v_1
1215		if v_2.Op != OpARMMOVWconst {
1216			break
1217		}
1218		c := auxIntToInt32(v_2.AuxInt)
1219		flags := v_3
1220		if !(0 <= c && c < 32) {
1221			break
1222		}
1223		v.reset(OpARMADCshiftRA)
1224		v.AuxInt = int32ToAuxInt(c)
1225		v.AddArg3(x, y, flags)
1226		return true
1227	}
1228	return false
1229}
1230func rewriteValueARM_OpARMADCshiftRL(v *Value) bool {
1231	v_2 := v.Args[2]
1232	v_1 := v.Args[1]
1233	v_0 := v.Args[0]
1234	b := v.Block
1235	// match: (ADCshiftRL (MOVWconst [c]) x [d] flags)
1236	// result: (ADCconst [c] (SRLconst <x.Type> x [d]) flags)
1237	for {
1238		d := auxIntToInt32(v.AuxInt)
1239		if v_0.Op != OpARMMOVWconst {
1240			break
1241		}
1242		c := auxIntToInt32(v_0.AuxInt)
1243		x := v_1
1244		flags := v_2
1245		v.reset(OpARMADCconst)
1246		v.AuxInt = int32ToAuxInt(c)
1247		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
1248		v0.AuxInt = int32ToAuxInt(d)
1249		v0.AddArg(x)
1250		v.AddArg2(v0, flags)
1251		return true
1252	}
1253	// match: (ADCshiftRL x (MOVWconst [c]) [d] flags)
1254	// result: (ADCconst x [int32(uint32(c)>>uint64(d))] flags)
1255	for {
1256		d := auxIntToInt32(v.AuxInt)
1257		x := v_0
1258		if v_1.Op != OpARMMOVWconst {
1259			break
1260		}
1261		c := auxIntToInt32(v_1.AuxInt)
1262		flags := v_2
1263		v.reset(OpARMADCconst)
1264		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
1265		v.AddArg2(x, flags)
1266		return true
1267	}
1268	return false
1269}
1270func rewriteValueARM_OpARMADCshiftRLreg(v *Value) bool {
1271	v_3 := v.Args[3]
1272	v_2 := v.Args[2]
1273	v_1 := v.Args[1]
1274	v_0 := v.Args[0]
1275	b := v.Block
1276	// match: (ADCshiftRLreg (MOVWconst [c]) x y flags)
1277	// result: (ADCconst [c] (SRL <x.Type> x y) flags)
1278	for {
1279		if v_0.Op != OpARMMOVWconst {
1280			break
1281		}
1282		c := auxIntToInt32(v_0.AuxInt)
1283		x := v_1
1284		y := v_2
1285		flags := v_3
1286		v.reset(OpARMADCconst)
1287		v.AuxInt = int32ToAuxInt(c)
1288		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
1289		v0.AddArg2(x, y)
1290		v.AddArg2(v0, flags)
1291		return true
1292	}
1293	// match: (ADCshiftRLreg x y (MOVWconst [c]) flags)
1294	// cond: 0 <= c && c < 32
1295	// result: (ADCshiftRL x y [c] flags)
1296	for {
1297		x := v_0
1298		y := v_1
1299		if v_2.Op != OpARMMOVWconst {
1300			break
1301		}
1302		c := auxIntToInt32(v_2.AuxInt)
1303		flags := v_3
1304		if !(0 <= c && c < 32) {
1305			break
1306		}
1307		v.reset(OpARMADCshiftRL)
1308		v.AuxInt = int32ToAuxInt(c)
1309		v.AddArg3(x, y, flags)
1310		return true
1311	}
1312	return false
1313}
1314func rewriteValueARM_OpARMADD(v *Value) bool {
1315	v_1 := v.Args[1]
1316	v_0 := v.Args[0]
1317	b := v.Block
1318	// match: (ADD x (MOVWconst <t> [c]))
1319	// cond: !t.IsPtr()
1320	// result: (ADDconst [c] x)
1321	for {
1322		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1323			x := v_0
1324			if v_1.Op != OpARMMOVWconst {
1325				continue
1326			}
1327			t := v_1.Type
1328			c := auxIntToInt32(v_1.AuxInt)
1329			if !(!t.IsPtr()) {
1330				continue
1331			}
1332			v.reset(OpARMADDconst)
1333			v.AuxInt = int32ToAuxInt(c)
1334			v.AddArg(x)
1335			return true
1336		}
1337		break
1338	}
1339	// match: (ADD x (SLLconst [c] y))
1340	// result: (ADDshiftLL x y [c])
1341	for {
1342		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1343			x := v_0
1344			if v_1.Op != OpARMSLLconst {
1345				continue
1346			}
1347			c := auxIntToInt32(v_1.AuxInt)
1348			y := v_1.Args[0]
1349			v.reset(OpARMADDshiftLL)
1350			v.AuxInt = int32ToAuxInt(c)
1351			v.AddArg2(x, y)
1352			return true
1353		}
1354		break
1355	}
1356	// match: (ADD x (SRLconst [c] y))
1357	// result: (ADDshiftRL x y [c])
1358	for {
1359		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1360			x := v_0
1361			if v_1.Op != OpARMSRLconst {
1362				continue
1363			}
1364			c := auxIntToInt32(v_1.AuxInt)
1365			y := v_1.Args[0]
1366			v.reset(OpARMADDshiftRL)
1367			v.AuxInt = int32ToAuxInt(c)
1368			v.AddArg2(x, y)
1369			return true
1370		}
1371		break
1372	}
1373	// match: (ADD x (SRAconst [c] y))
1374	// result: (ADDshiftRA x y [c])
1375	for {
1376		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1377			x := v_0
1378			if v_1.Op != OpARMSRAconst {
1379				continue
1380			}
1381			c := auxIntToInt32(v_1.AuxInt)
1382			y := v_1.Args[0]
1383			v.reset(OpARMADDshiftRA)
1384			v.AuxInt = int32ToAuxInt(c)
1385			v.AddArg2(x, y)
1386			return true
1387		}
1388		break
1389	}
1390	// match: (ADD x (SLL y z))
1391	// result: (ADDshiftLLreg x y z)
1392	for {
1393		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1394			x := v_0
1395			if v_1.Op != OpARMSLL {
1396				continue
1397			}
1398			z := v_1.Args[1]
1399			y := v_1.Args[0]
1400			v.reset(OpARMADDshiftLLreg)
1401			v.AddArg3(x, y, z)
1402			return true
1403		}
1404		break
1405	}
1406	// match: (ADD x (SRL y z))
1407	// result: (ADDshiftRLreg x y z)
1408	for {
1409		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1410			x := v_0
1411			if v_1.Op != OpARMSRL {
1412				continue
1413			}
1414			z := v_1.Args[1]
1415			y := v_1.Args[0]
1416			v.reset(OpARMADDshiftRLreg)
1417			v.AddArg3(x, y, z)
1418			return true
1419		}
1420		break
1421	}
1422	// match: (ADD x (SRA y z))
1423	// result: (ADDshiftRAreg x y z)
1424	for {
1425		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1426			x := v_0
1427			if v_1.Op != OpARMSRA {
1428				continue
1429			}
1430			z := v_1.Args[1]
1431			y := v_1.Args[0]
1432			v.reset(OpARMADDshiftRAreg)
1433			v.AddArg3(x, y, z)
1434			return true
1435		}
1436		break
1437	}
1438	// match: (ADD x (RSBconst [0] y))
1439	// result: (SUB x y)
1440	for {
1441		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1442			x := v_0
1443			if v_1.Op != OpARMRSBconst || auxIntToInt32(v_1.AuxInt) != 0 {
1444				continue
1445			}
1446			y := v_1.Args[0]
1447			v.reset(OpARMSUB)
1448			v.AddArg2(x, y)
1449			return true
1450		}
1451		break
1452	}
1453	// match: (ADD <t> (RSBconst [c] x) (RSBconst [d] y))
1454	// result: (RSBconst [c+d] (ADD <t> x y))
1455	for {
1456		t := v.Type
1457		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1458			if v_0.Op != OpARMRSBconst {
1459				continue
1460			}
1461			c := auxIntToInt32(v_0.AuxInt)
1462			x := v_0.Args[0]
1463			if v_1.Op != OpARMRSBconst {
1464				continue
1465			}
1466			d := auxIntToInt32(v_1.AuxInt)
1467			y := v_1.Args[0]
1468			v.reset(OpARMRSBconst)
1469			v.AuxInt = int32ToAuxInt(c + d)
1470			v0 := b.NewValue0(v.Pos, OpARMADD, t)
1471			v0.AddArg2(x, y)
1472			v.AddArg(v0)
1473			return true
1474		}
1475		break
1476	}
1477	// match: (ADD (MUL x y) a)
1478	// result: (MULA x y a)
1479	for {
1480		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1481			if v_0.Op != OpARMMUL {
1482				continue
1483			}
1484			y := v_0.Args[1]
1485			x := v_0.Args[0]
1486			a := v_1
1487			v.reset(OpARMMULA)
1488			v.AddArg3(x, y, a)
1489			return true
1490		}
1491		break
1492	}
1493	return false
1494}
1495func rewriteValueARM_OpARMADDD(v *Value) bool {
1496	v_1 := v.Args[1]
1497	v_0 := v.Args[0]
1498	// match: (ADDD a (MULD x y))
1499	// cond: a.Uses == 1 && buildcfg.GOARM.Version >= 6
1500	// result: (MULAD a x y)
1501	for {
1502		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1503			a := v_0
1504			if v_1.Op != OpARMMULD {
1505				continue
1506			}
1507			y := v_1.Args[1]
1508			x := v_1.Args[0]
1509			if !(a.Uses == 1 && buildcfg.GOARM.Version >= 6) {
1510				continue
1511			}
1512			v.reset(OpARMMULAD)
1513			v.AddArg3(a, x, y)
1514			return true
1515		}
1516		break
1517	}
1518	// match: (ADDD a (NMULD x y))
1519	// cond: a.Uses == 1 && buildcfg.GOARM.Version >= 6
1520	// result: (MULSD a x y)
1521	for {
1522		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1523			a := v_0
1524			if v_1.Op != OpARMNMULD {
1525				continue
1526			}
1527			y := v_1.Args[1]
1528			x := v_1.Args[0]
1529			if !(a.Uses == 1 && buildcfg.GOARM.Version >= 6) {
1530				continue
1531			}
1532			v.reset(OpARMMULSD)
1533			v.AddArg3(a, x, y)
1534			return true
1535		}
1536		break
1537	}
1538	return false
1539}
1540func rewriteValueARM_OpARMADDF(v *Value) bool {
1541	v_1 := v.Args[1]
1542	v_0 := v.Args[0]
1543	// match: (ADDF a (MULF x y))
1544	// cond: a.Uses == 1 && buildcfg.GOARM.Version >= 6
1545	// result: (MULAF a x y)
1546	for {
1547		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1548			a := v_0
1549			if v_1.Op != OpARMMULF {
1550				continue
1551			}
1552			y := v_1.Args[1]
1553			x := v_1.Args[0]
1554			if !(a.Uses == 1 && buildcfg.GOARM.Version >= 6) {
1555				continue
1556			}
1557			v.reset(OpARMMULAF)
1558			v.AddArg3(a, x, y)
1559			return true
1560		}
1561		break
1562	}
1563	// match: (ADDF a (NMULF x y))
1564	// cond: a.Uses == 1 && buildcfg.GOARM.Version >= 6
1565	// result: (MULSF a x y)
1566	for {
1567		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1568			a := v_0
1569			if v_1.Op != OpARMNMULF {
1570				continue
1571			}
1572			y := v_1.Args[1]
1573			x := v_1.Args[0]
1574			if !(a.Uses == 1 && buildcfg.GOARM.Version >= 6) {
1575				continue
1576			}
1577			v.reset(OpARMMULSF)
1578			v.AddArg3(a, x, y)
1579			return true
1580		}
1581		break
1582	}
1583	return false
1584}
1585func rewriteValueARM_OpARMADDS(v *Value) bool {
1586	v_1 := v.Args[1]
1587	v_0 := v.Args[0]
1588	// match: (ADDS x (MOVWconst [c]))
1589	// result: (ADDSconst [c] x)
1590	for {
1591		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1592			x := v_0
1593			if v_1.Op != OpARMMOVWconst {
1594				continue
1595			}
1596			c := auxIntToInt32(v_1.AuxInt)
1597			v.reset(OpARMADDSconst)
1598			v.AuxInt = int32ToAuxInt(c)
1599			v.AddArg(x)
1600			return true
1601		}
1602		break
1603	}
1604	// match: (ADDS x (SLLconst [c] y))
1605	// result: (ADDSshiftLL x y [c])
1606	for {
1607		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1608			x := v_0
1609			if v_1.Op != OpARMSLLconst {
1610				continue
1611			}
1612			c := auxIntToInt32(v_1.AuxInt)
1613			y := v_1.Args[0]
1614			v.reset(OpARMADDSshiftLL)
1615			v.AuxInt = int32ToAuxInt(c)
1616			v.AddArg2(x, y)
1617			return true
1618		}
1619		break
1620	}
1621	// match: (ADDS x (SRLconst [c] y))
1622	// result: (ADDSshiftRL x y [c])
1623	for {
1624		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1625			x := v_0
1626			if v_1.Op != OpARMSRLconst {
1627				continue
1628			}
1629			c := auxIntToInt32(v_1.AuxInt)
1630			y := v_1.Args[0]
1631			v.reset(OpARMADDSshiftRL)
1632			v.AuxInt = int32ToAuxInt(c)
1633			v.AddArg2(x, y)
1634			return true
1635		}
1636		break
1637	}
1638	// match: (ADDS x (SRAconst [c] y))
1639	// result: (ADDSshiftRA x y [c])
1640	for {
1641		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1642			x := v_0
1643			if v_1.Op != OpARMSRAconst {
1644				continue
1645			}
1646			c := auxIntToInt32(v_1.AuxInt)
1647			y := v_1.Args[0]
1648			v.reset(OpARMADDSshiftRA)
1649			v.AuxInt = int32ToAuxInt(c)
1650			v.AddArg2(x, y)
1651			return true
1652		}
1653		break
1654	}
1655	// match: (ADDS x (SLL y z))
1656	// result: (ADDSshiftLLreg x y z)
1657	for {
1658		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1659			x := v_0
1660			if v_1.Op != OpARMSLL {
1661				continue
1662			}
1663			z := v_1.Args[1]
1664			y := v_1.Args[0]
1665			v.reset(OpARMADDSshiftLLreg)
1666			v.AddArg3(x, y, z)
1667			return true
1668		}
1669		break
1670	}
1671	// match: (ADDS x (SRL y z))
1672	// result: (ADDSshiftRLreg x y z)
1673	for {
1674		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1675			x := v_0
1676			if v_1.Op != OpARMSRL {
1677				continue
1678			}
1679			z := v_1.Args[1]
1680			y := v_1.Args[0]
1681			v.reset(OpARMADDSshiftRLreg)
1682			v.AddArg3(x, y, z)
1683			return true
1684		}
1685		break
1686	}
1687	// match: (ADDS x (SRA y z))
1688	// result: (ADDSshiftRAreg x y z)
1689	for {
1690		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
1691			x := v_0
1692			if v_1.Op != OpARMSRA {
1693				continue
1694			}
1695			z := v_1.Args[1]
1696			y := v_1.Args[0]
1697			v.reset(OpARMADDSshiftRAreg)
1698			v.AddArg3(x, y, z)
1699			return true
1700		}
1701		break
1702	}
1703	return false
1704}
1705func rewriteValueARM_OpARMADDSshiftLL(v *Value) bool {
1706	v_1 := v.Args[1]
1707	v_0 := v.Args[0]
1708	b := v.Block
1709	// match: (ADDSshiftLL (MOVWconst [c]) x [d])
1710	// result: (ADDSconst [c] (SLLconst <x.Type> x [d]))
1711	for {
1712		d := auxIntToInt32(v.AuxInt)
1713		if v_0.Op != OpARMMOVWconst {
1714			break
1715		}
1716		c := auxIntToInt32(v_0.AuxInt)
1717		x := v_1
1718		v.reset(OpARMADDSconst)
1719		v.AuxInt = int32ToAuxInt(c)
1720		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
1721		v0.AuxInt = int32ToAuxInt(d)
1722		v0.AddArg(x)
1723		v.AddArg(v0)
1724		return true
1725	}
1726	// match: (ADDSshiftLL x (MOVWconst [c]) [d])
1727	// result: (ADDSconst x [c<<uint64(d)])
1728	for {
1729		d := auxIntToInt32(v.AuxInt)
1730		x := v_0
1731		if v_1.Op != OpARMMOVWconst {
1732			break
1733		}
1734		c := auxIntToInt32(v_1.AuxInt)
1735		v.reset(OpARMADDSconst)
1736		v.AuxInt = int32ToAuxInt(c << uint64(d))
1737		v.AddArg(x)
1738		return true
1739	}
1740	return false
1741}
1742func rewriteValueARM_OpARMADDSshiftLLreg(v *Value) bool {
1743	v_2 := v.Args[2]
1744	v_1 := v.Args[1]
1745	v_0 := v.Args[0]
1746	b := v.Block
1747	// match: (ADDSshiftLLreg (MOVWconst [c]) x y)
1748	// result: (ADDSconst [c] (SLL <x.Type> x y))
1749	for {
1750		if v_0.Op != OpARMMOVWconst {
1751			break
1752		}
1753		c := auxIntToInt32(v_0.AuxInt)
1754		x := v_1
1755		y := v_2
1756		v.reset(OpARMADDSconst)
1757		v.AuxInt = int32ToAuxInt(c)
1758		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
1759		v0.AddArg2(x, y)
1760		v.AddArg(v0)
1761		return true
1762	}
1763	// match: (ADDSshiftLLreg x y (MOVWconst [c]))
1764	// cond: 0 <= c && c < 32
1765	// result: (ADDSshiftLL x y [c])
1766	for {
1767		x := v_0
1768		y := v_1
1769		if v_2.Op != OpARMMOVWconst {
1770			break
1771		}
1772		c := auxIntToInt32(v_2.AuxInt)
1773		if !(0 <= c && c < 32) {
1774			break
1775		}
1776		v.reset(OpARMADDSshiftLL)
1777		v.AuxInt = int32ToAuxInt(c)
1778		v.AddArg2(x, y)
1779		return true
1780	}
1781	return false
1782}
1783func rewriteValueARM_OpARMADDSshiftRA(v *Value) bool {
1784	v_1 := v.Args[1]
1785	v_0 := v.Args[0]
1786	b := v.Block
1787	// match: (ADDSshiftRA (MOVWconst [c]) x [d])
1788	// result: (ADDSconst [c] (SRAconst <x.Type> x [d]))
1789	for {
1790		d := auxIntToInt32(v.AuxInt)
1791		if v_0.Op != OpARMMOVWconst {
1792			break
1793		}
1794		c := auxIntToInt32(v_0.AuxInt)
1795		x := v_1
1796		v.reset(OpARMADDSconst)
1797		v.AuxInt = int32ToAuxInt(c)
1798		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
1799		v0.AuxInt = int32ToAuxInt(d)
1800		v0.AddArg(x)
1801		v.AddArg(v0)
1802		return true
1803	}
1804	// match: (ADDSshiftRA x (MOVWconst [c]) [d])
1805	// result: (ADDSconst x [c>>uint64(d)])
1806	for {
1807		d := auxIntToInt32(v.AuxInt)
1808		x := v_0
1809		if v_1.Op != OpARMMOVWconst {
1810			break
1811		}
1812		c := auxIntToInt32(v_1.AuxInt)
1813		v.reset(OpARMADDSconst)
1814		v.AuxInt = int32ToAuxInt(c >> uint64(d))
1815		v.AddArg(x)
1816		return true
1817	}
1818	return false
1819}
1820func rewriteValueARM_OpARMADDSshiftRAreg(v *Value) bool {
1821	v_2 := v.Args[2]
1822	v_1 := v.Args[1]
1823	v_0 := v.Args[0]
1824	b := v.Block
1825	// match: (ADDSshiftRAreg (MOVWconst [c]) x y)
1826	// result: (ADDSconst [c] (SRA <x.Type> x y))
1827	for {
1828		if v_0.Op != OpARMMOVWconst {
1829			break
1830		}
1831		c := auxIntToInt32(v_0.AuxInt)
1832		x := v_1
1833		y := v_2
1834		v.reset(OpARMADDSconst)
1835		v.AuxInt = int32ToAuxInt(c)
1836		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
1837		v0.AddArg2(x, y)
1838		v.AddArg(v0)
1839		return true
1840	}
1841	// match: (ADDSshiftRAreg x y (MOVWconst [c]))
1842	// cond: 0 <= c && c < 32
1843	// result: (ADDSshiftRA x y [c])
1844	for {
1845		x := v_0
1846		y := v_1
1847		if v_2.Op != OpARMMOVWconst {
1848			break
1849		}
1850		c := auxIntToInt32(v_2.AuxInt)
1851		if !(0 <= c && c < 32) {
1852			break
1853		}
1854		v.reset(OpARMADDSshiftRA)
1855		v.AuxInt = int32ToAuxInt(c)
1856		v.AddArg2(x, y)
1857		return true
1858	}
1859	return false
1860}
1861func rewriteValueARM_OpARMADDSshiftRL(v *Value) bool {
1862	v_1 := v.Args[1]
1863	v_0 := v.Args[0]
1864	b := v.Block
1865	// match: (ADDSshiftRL (MOVWconst [c]) x [d])
1866	// result: (ADDSconst [c] (SRLconst <x.Type> x [d]))
1867	for {
1868		d := auxIntToInt32(v.AuxInt)
1869		if v_0.Op != OpARMMOVWconst {
1870			break
1871		}
1872		c := auxIntToInt32(v_0.AuxInt)
1873		x := v_1
1874		v.reset(OpARMADDSconst)
1875		v.AuxInt = int32ToAuxInt(c)
1876		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
1877		v0.AuxInt = int32ToAuxInt(d)
1878		v0.AddArg(x)
1879		v.AddArg(v0)
1880		return true
1881	}
1882	// match: (ADDSshiftRL x (MOVWconst [c]) [d])
1883	// result: (ADDSconst x [int32(uint32(c)>>uint64(d))])
1884	for {
1885		d := auxIntToInt32(v.AuxInt)
1886		x := v_0
1887		if v_1.Op != OpARMMOVWconst {
1888			break
1889		}
1890		c := auxIntToInt32(v_1.AuxInt)
1891		v.reset(OpARMADDSconst)
1892		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
1893		v.AddArg(x)
1894		return true
1895	}
1896	return false
1897}
1898func rewriteValueARM_OpARMADDSshiftRLreg(v *Value) bool {
1899	v_2 := v.Args[2]
1900	v_1 := v.Args[1]
1901	v_0 := v.Args[0]
1902	b := v.Block
1903	// match: (ADDSshiftRLreg (MOVWconst [c]) x y)
1904	// result: (ADDSconst [c] (SRL <x.Type> x y))
1905	for {
1906		if v_0.Op != OpARMMOVWconst {
1907			break
1908		}
1909		c := auxIntToInt32(v_0.AuxInt)
1910		x := v_1
1911		y := v_2
1912		v.reset(OpARMADDSconst)
1913		v.AuxInt = int32ToAuxInt(c)
1914		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
1915		v0.AddArg2(x, y)
1916		v.AddArg(v0)
1917		return true
1918	}
1919	// match: (ADDSshiftRLreg x y (MOVWconst [c]))
1920	// cond: 0 <= c && c < 32
1921	// result: (ADDSshiftRL x y [c])
1922	for {
1923		x := v_0
1924		y := v_1
1925		if v_2.Op != OpARMMOVWconst {
1926			break
1927		}
1928		c := auxIntToInt32(v_2.AuxInt)
1929		if !(0 <= c && c < 32) {
1930			break
1931		}
1932		v.reset(OpARMADDSshiftRL)
1933		v.AuxInt = int32ToAuxInt(c)
1934		v.AddArg2(x, y)
1935		return true
1936	}
1937	return false
1938}
1939func rewriteValueARM_OpARMADDconst(v *Value) bool {
1940	v_0 := v.Args[0]
1941	// match: (ADDconst [off1] (MOVWaddr [off2] {sym} ptr))
1942	// result: (MOVWaddr [off1+off2] {sym} ptr)
1943	for {
1944		off1 := auxIntToInt32(v.AuxInt)
1945		if v_0.Op != OpARMMOVWaddr {
1946			break
1947		}
1948		off2 := auxIntToInt32(v_0.AuxInt)
1949		sym := auxToSym(v_0.Aux)
1950		ptr := v_0.Args[0]
1951		v.reset(OpARMMOVWaddr)
1952		v.AuxInt = int32ToAuxInt(off1 + off2)
1953		v.Aux = symToAux(sym)
1954		v.AddArg(ptr)
1955		return true
1956	}
1957	// match: (ADDconst [0] x)
1958	// result: x
1959	for {
1960		if auxIntToInt32(v.AuxInt) != 0 {
1961			break
1962		}
1963		x := v_0
1964		v.copyOf(x)
1965		return true
1966	}
1967	// match: (ADDconst [c] x)
1968	// cond: !isARMImmRot(uint32(c)) && isARMImmRot(uint32(-c))
1969	// result: (SUBconst [-c] x)
1970	for {
1971		c := auxIntToInt32(v.AuxInt)
1972		x := v_0
1973		if !(!isARMImmRot(uint32(c)) && isARMImmRot(uint32(-c))) {
1974			break
1975		}
1976		v.reset(OpARMSUBconst)
1977		v.AuxInt = int32ToAuxInt(-c)
1978		v.AddArg(x)
1979		return true
1980	}
1981	// match: (ADDconst [c] x)
1982	// cond: buildcfg.GOARM.Version==7 && !isARMImmRot(uint32(c)) && uint32(c)>0xffff && uint32(-c)<=0xffff
1983	// result: (SUBconst [-c] x)
1984	for {
1985		c := auxIntToInt32(v.AuxInt)
1986		x := v_0
1987		if !(buildcfg.GOARM.Version == 7 && !isARMImmRot(uint32(c)) && uint32(c) > 0xffff && uint32(-c) <= 0xffff) {
1988			break
1989		}
1990		v.reset(OpARMSUBconst)
1991		v.AuxInt = int32ToAuxInt(-c)
1992		v.AddArg(x)
1993		return true
1994	}
1995	// match: (ADDconst [c] (MOVWconst [d]))
1996	// result: (MOVWconst [c+d])
1997	for {
1998		c := auxIntToInt32(v.AuxInt)
1999		if v_0.Op != OpARMMOVWconst {
2000			break
2001		}
2002		d := auxIntToInt32(v_0.AuxInt)
2003		v.reset(OpARMMOVWconst)
2004		v.AuxInt = int32ToAuxInt(c + d)
2005		return true
2006	}
2007	// match: (ADDconst [c] (ADDconst [d] x))
2008	// result: (ADDconst [c+d] x)
2009	for {
2010		c := auxIntToInt32(v.AuxInt)
2011		if v_0.Op != OpARMADDconst {
2012			break
2013		}
2014		d := auxIntToInt32(v_0.AuxInt)
2015		x := v_0.Args[0]
2016		v.reset(OpARMADDconst)
2017		v.AuxInt = int32ToAuxInt(c + d)
2018		v.AddArg(x)
2019		return true
2020	}
2021	// match: (ADDconst [c] (SUBconst [d] x))
2022	// result: (ADDconst [c-d] x)
2023	for {
2024		c := auxIntToInt32(v.AuxInt)
2025		if v_0.Op != OpARMSUBconst {
2026			break
2027		}
2028		d := auxIntToInt32(v_0.AuxInt)
2029		x := v_0.Args[0]
2030		v.reset(OpARMADDconst)
2031		v.AuxInt = int32ToAuxInt(c - d)
2032		v.AddArg(x)
2033		return true
2034	}
2035	// match: (ADDconst [c] (RSBconst [d] x))
2036	// result: (RSBconst [c+d] x)
2037	for {
2038		c := auxIntToInt32(v.AuxInt)
2039		if v_0.Op != OpARMRSBconst {
2040			break
2041		}
2042		d := auxIntToInt32(v_0.AuxInt)
2043		x := v_0.Args[0]
2044		v.reset(OpARMRSBconst)
2045		v.AuxInt = int32ToAuxInt(c + d)
2046		v.AddArg(x)
2047		return true
2048	}
2049	return false
2050}
2051func rewriteValueARM_OpARMADDshiftLL(v *Value) bool {
2052	v_1 := v.Args[1]
2053	v_0 := v.Args[0]
2054	b := v.Block
2055	typ := &b.Func.Config.Types
2056	// match: (ADDshiftLL (MOVWconst [c]) x [d])
2057	// result: (ADDconst [c] (SLLconst <x.Type> x [d]))
2058	for {
2059		d := auxIntToInt32(v.AuxInt)
2060		if v_0.Op != OpARMMOVWconst {
2061			break
2062		}
2063		c := auxIntToInt32(v_0.AuxInt)
2064		x := v_1
2065		v.reset(OpARMADDconst)
2066		v.AuxInt = int32ToAuxInt(c)
2067		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
2068		v0.AuxInt = int32ToAuxInt(d)
2069		v0.AddArg(x)
2070		v.AddArg(v0)
2071		return true
2072	}
2073	// match: (ADDshiftLL x (MOVWconst [c]) [d])
2074	// result: (ADDconst x [c<<uint64(d)])
2075	for {
2076		d := auxIntToInt32(v.AuxInt)
2077		x := v_0
2078		if v_1.Op != OpARMMOVWconst {
2079			break
2080		}
2081		c := auxIntToInt32(v_1.AuxInt)
2082		v.reset(OpARMADDconst)
2083		v.AuxInt = int32ToAuxInt(c << uint64(d))
2084		v.AddArg(x)
2085		return true
2086	}
2087	// match: (ADDshiftLL <typ.UInt16> [8] (BFXU <typ.UInt16> [int32(armBFAuxInt(8, 8))] x) x)
2088	// result: (REV16 x)
2089	for {
2090		if v.Type != typ.UInt16 || auxIntToInt32(v.AuxInt) != 8 || v_0.Op != OpARMBFXU || v_0.Type != typ.UInt16 || auxIntToInt32(v_0.AuxInt) != int32(armBFAuxInt(8, 8)) {
2091			break
2092		}
2093		x := v_0.Args[0]
2094		if x != v_1 {
2095			break
2096		}
2097		v.reset(OpARMREV16)
2098		v.AddArg(x)
2099		return true
2100	}
2101	// match: (ADDshiftLL <typ.UInt16> [8] (SRLconst <typ.UInt16> [24] (SLLconst [16] x)) x)
2102	// cond: buildcfg.GOARM.Version>=6
2103	// result: (REV16 x)
2104	for {
2105		if v.Type != typ.UInt16 || auxIntToInt32(v.AuxInt) != 8 || v_0.Op != OpARMSRLconst || v_0.Type != typ.UInt16 || auxIntToInt32(v_0.AuxInt) != 24 {
2106			break
2107		}
2108		v_0_0 := v_0.Args[0]
2109		if v_0_0.Op != OpARMSLLconst || auxIntToInt32(v_0_0.AuxInt) != 16 {
2110			break
2111		}
2112		x := v_0_0.Args[0]
2113		if x != v_1 || !(buildcfg.GOARM.Version >= 6) {
2114			break
2115		}
2116		v.reset(OpARMREV16)
2117		v.AddArg(x)
2118		return true
2119	}
2120	return false
2121}
2122func rewriteValueARM_OpARMADDshiftLLreg(v *Value) bool {
2123	v_2 := v.Args[2]
2124	v_1 := v.Args[1]
2125	v_0 := v.Args[0]
2126	b := v.Block
2127	// match: (ADDshiftLLreg (MOVWconst [c]) x y)
2128	// result: (ADDconst [c] (SLL <x.Type> x y))
2129	for {
2130		if v_0.Op != OpARMMOVWconst {
2131			break
2132		}
2133		c := auxIntToInt32(v_0.AuxInt)
2134		x := v_1
2135		y := v_2
2136		v.reset(OpARMADDconst)
2137		v.AuxInt = int32ToAuxInt(c)
2138		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
2139		v0.AddArg2(x, y)
2140		v.AddArg(v0)
2141		return true
2142	}
2143	// match: (ADDshiftLLreg x y (MOVWconst [c]))
2144	// cond: 0 <= c && c < 32
2145	// result: (ADDshiftLL x y [c])
2146	for {
2147		x := v_0
2148		y := v_1
2149		if v_2.Op != OpARMMOVWconst {
2150			break
2151		}
2152		c := auxIntToInt32(v_2.AuxInt)
2153		if !(0 <= c && c < 32) {
2154			break
2155		}
2156		v.reset(OpARMADDshiftLL)
2157		v.AuxInt = int32ToAuxInt(c)
2158		v.AddArg2(x, y)
2159		return true
2160	}
2161	return false
2162}
2163func rewriteValueARM_OpARMADDshiftRA(v *Value) bool {
2164	v_1 := v.Args[1]
2165	v_0 := v.Args[0]
2166	b := v.Block
2167	// match: (ADDshiftRA (MOVWconst [c]) x [d])
2168	// result: (ADDconst [c] (SRAconst <x.Type> x [d]))
2169	for {
2170		d := auxIntToInt32(v.AuxInt)
2171		if v_0.Op != OpARMMOVWconst {
2172			break
2173		}
2174		c := auxIntToInt32(v_0.AuxInt)
2175		x := v_1
2176		v.reset(OpARMADDconst)
2177		v.AuxInt = int32ToAuxInt(c)
2178		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
2179		v0.AuxInt = int32ToAuxInt(d)
2180		v0.AddArg(x)
2181		v.AddArg(v0)
2182		return true
2183	}
2184	// match: (ADDshiftRA x (MOVWconst [c]) [d])
2185	// result: (ADDconst x [c>>uint64(d)])
2186	for {
2187		d := auxIntToInt32(v.AuxInt)
2188		x := v_0
2189		if v_1.Op != OpARMMOVWconst {
2190			break
2191		}
2192		c := auxIntToInt32(v_1.AuxInt)
2193		v.reset(OpARMADDconst)
2194		v.AuxInt = int32ToAuxInt(c >> uint64(d))
2195		v.AddArg(x)
2196		return true
2197	}
2198	return false
2199}
2200func rewriteValueARM_OpARMADDshiftRAreg(v *Value) bool {
2201	v_2 := v.Args[2]
2202	v_1 := v.Args[1]
2203	v_0 := v.Args[0]
2204	b := v.Block
2205	// match: (ADDshiftRAreg (MOVWconst [c]) x y)
2206	// result: (ADDconst [c] (SRA <x.Type> x y))
2207	for {
2208		if v_0.Op != OpARMMOVWconst {
2209			break
2210		}
2211		c := auxIntToInt32(v_0.AuxInt)
2212		x := v_1
2213		y := v_2
2214		v.reset(OpARMADDconst)
2215		v.AuxInt = int32ToAuxInt(c)
2216		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
2217		v0.AddArg2(x, y)
2218		v.AddArg(v0)
2219		return true
2220	}
2221	// match: (ADDshiftRAreg x y (MOVWconst [c]))
2222	// cond: 0 <= c && c < 32
2223	// result: (ADDshiftRA x y [c])
2224	for {
2225		x := v_0
2226		y := v_1
2227		if v_2.Op != OpARMMOVWconst {
2228			break
2229		}
2230		c := auxIntToInt32(v_2.AuxInt)
2231		if !(0 <= c && c < 32) {
2232			break
2233		}
2234		v.reset(OpARMADDshiftRA)
2235		v.AuxInt = int32ToAuxInt(c)
2236		v.AddArg2(x, y)
2237		return true
2238	}
2239	return false
2240}
2241func rewriteValueARM_OpARMADDshiftRL(v *Value) bool {
2242	v_1 := v.Args[1]
2243	v_0 := v.Args[0]
2244	b := v.Block
2245	// match: (ADDshiftRL (MOVWconst [c]) x [d])
2246	// result: (ADDconst [c] (SRLconst <x.Type> x [d]))
2247	for {
2248		d := auxIntToInt32(v.AuxInt)
2249		if v_0.Op != OpARMMOVWconst {
2250			break
2251		}
2252		c := auxIntToInt32(v_0.AuxInt)
2253		x := v_1
2254		v.reset(OpARMADDconst)
2255		v.AuxInt = int32ToAuxInt(c)
2256		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
2257		v0.AuxInt = int32ToAuxInt(d)
2258		v0.AddArg(x)
2259		v.AddArg(v0)
2260		return true
2261	}
2262	// match: (ADDshiftRL x (MOVWconst [c]) [d])
2263	// result: (ADDconst x [int32(uint32(c)>>uint64(d))])
2264	for {
2265		d := auxIntToInt32(v.AuxInt)
2266		x := v_0
2267		if v_1.Op != OpARMMOVWconst {
2268			break
2269		}
2270		c := auxIntToInt32(v_1.AuxInt)
2271		v.reset(OpARMADDconst)
2272		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
2273		v.AddArg(x)
2274		return true
2275	}
2276	return false
2277}
2278func rewriteValueARM_OpARMADDshiftRLreg(v *Value) bool {
2279	v_2 := v.Args[2]
2280	v_1 := v.Args[1]
2281	v_0 := v.Args[0]
2282	b := v.Block
2283	// match: (ADDshiftRLreg (MOVWconst [c]) x y)
2284	// result: (ADDconst [c] (SRL <x.Type> x y))
2285	for {
2286		if v_0.Op != OpARMMOVWconst {
2287			break
2288		}
2289		c := auxIntToInt32(v_0.AuxInt)
2290		x := v_1
2291		y := v_2
2292		v.reset(OpARMADDconst)
2293		v.AuxInt = int32ToAuxInt(c)
2294		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
2295		v0.AddArg2(x, y)
2296		v.AddArg(v0)
2297		return true
2298	}
2299	// match: (ADDshiftRLreg x y (MOVWconst [c]))
2300	// cond: 0 <= c && c < 32
2301	// result: (ADDshiftRL x y [c])
2302	for {
2303		x := v_0
2304		y := v_1
2305		if v_2.Op != OpARMMOVWconst {
2306			break
2307		}
2308		c := auxIntToInt32(v_2.AuxInt)
2309		if !(0 <= c && c < 32) {
2310			break
2311		}
2312		v.reset(OpARMADDshiftRL)
2313		v.AuxInt = int32ToAuxInt(c)
2314		v.AddArg2(x, y)
2315		return true
2316	}
2317	return false
2318}
2319func rewriteValueARM_OpARMAND(v *Value) bool {
2320	v_1 := v.Args[1]
2321	v_0 := v.Args[0]
2322	// match: (AND x (MOVWconst [c]))
2323	// result: (ANDconst [c] x)
2324	for {
2325		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
2326			x := v_0
2327			if v_1.Op != OpARMMOVWconst {
2328				continue
2329			}
2330			c := auxIntToInt32(v_1.AuxInt)
2331			v.reset(OpARMANDconst)
2332			v.AuxInt = int32ToAuxInt(c)
2333			v.AddArg(x)
2334			return true
2335		}
2336		break
2337	}
2338	// match: (AND x (SLLconst [c] y))
2339	// result: (ANDshiftLL x y [c])
2340	for {
2341		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
2342			x := v_0
2343			if v_1.Op != OpARMSLLconst {
2344				continue
2345			}
2346			c := auxIntToInt32(v_1.AuxInt)
2347			y := v_1.Args[0]
2348			v.reset(OpARMANDshiftLL)
2349			v.AuxInt = int32ToAuxInt(c)
2350			v.AddArg2(x, y)
2351			return true
2352		}
2353		break
2354	}
2355	// match: (AND x (SRLconst [c] y))
2356	// result: (ANDshiftRL x y [c])
2357	for {
2358		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
2359			x := v_0
2360			if v_1.Op != OpARMSRLconst {
2361				continue
2362			}
2363			c := auxIntToInt32(v_1.AuxInt)
2364			y := v_1.Args[0]
2365			v.reset(OpARMANDshiftRL)
2366			v.AuxInt = int32ToAuxInt(c)
2367			v.AddArg2(x, y)
2368			return true
2369		}
2370		break
2371	}
2372	// match: (AND x (SRAconst [c] y))
2373	// result: (ANDshiftRA x y [c])
2374	for {
2375		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
2376			x := v_0
2377			if v_1.Op != OpARMSRAconst {
2378				continue
2379			}
2380			c := auxIntToInt32(v_1.AuxInt)
2381			y := v_1.Args[0]
2382			v.reset(OpARMANDshiftRA)
2383			v.AuxInt = int32ToAuxInt(c)
2384			v.AddArg2(x, y)
2385			return true
2386		}
2387		break
2388	}
2389	// match: (AND x (SLL y z))
2390	// result: (ANDshiftLLreg x y z)
2391	for {
2392		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
2393			x := v_0
2394			if v_1.Op != OpARMSLL {
2395				continue
2396			}
2397			z := v_1.Args[1]
2398			y := v_1.Args[0]
2399			v.reset(OpARMANDshiftLLreg)
2400			v.AddArg3(x, y, z)
2401			return true
2402		}
2403		break
2404	}
2405	// match: (AND x (SRL y z))
2406	// result: (ANDshiftRLreg x y z)
2407	for {
2408		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
2409			x := v_0
2410			if v_1.Op != OpARMSRL {
2411				continue
2412			}
2413			z := v_1.Args[1]
2414			y := v_1.Args[0]
2415			v.reset(OpARMANDshiftRLreg)
2416			v.AddArg3(x, y, z)
2417			return true
2418		}
2419		break
2420	}
2421	// match: (AND x (SRA y z))
2422	// result: (ANDshiftRAreg x y z)
2423	for {
2424		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
2425			x := v_0
2426			if v_1.Op != OpARMSRA {
2427				continue
2428			}
2429			z := v_1.Args[1]
2430			y := v_1.Args[0]
2431			v.reset(OpARMANDshiftRAreg)
2432			v.AddArg3(x, y, z)
2433			return true
2434		}
2435		break
2436	}
2437	// match: (AND x x)
2438	// result: x
2439	for {
2440		x := v_0
2441		if x != v_1 {
2442			break
2443		}
2444		v.copyOf(x)
2445		return true
2446	}
2447	// match: (AND x (MVN y))
2448	// result: (BIC x y)
2449	for {
2450		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
2451			x := v_0
2452			if v_1.Op != OpARMMVN {
2453				continue
2454			}
2455			y := v_1.Args[0]
2456			v.reset(OpARMBIC)
2457			v.AddArg2(x, y)
2458			return true
2459		}
2460		break
2461	}
2462	// match: (AND x (MVNshiftLL y [c]))
2463	// result: (BICshiftLL x y [c])
2464	for {
2465		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
2466			x := v_0
2467			if v_1.Op != OpARMMVNshiftLL {
2468				continue
2469			}
2470			c := auxIntToInt32(v_1.AuxInt)
2471			y := v_1.Args[0]
2472			v.reset(OpARMBICshiftLL)
2473			v.AuxInt = int32ToAuxInt(c)
2474			v.AddArg2(x, y)
2475			return true
2476		}
2477		break
2478	}
2479	// match: (AND x (MVNshiftRL y [c]))
2480	// result: (BICshiftRL x y [c])
2481	for {
2482		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
2483			x := v_0
2484			if v_1.Op != OpARMMVNshiftRL {
2485				continue
2486			}
2487			c := auxIntToInt32(v_1.AuxInt)
2488			y := v_1.Args[0]
2489			v.reset(OpARMBICshiftRL)
2490			v.AuxInt = int32ToAuxInt(c)
2491			v.AddArg2(x, y)
2492			return true
2493		}
2494		break
2495	}
2496	// match: (AND x (MVNshiftRA y [c]))
2497	// result: (BICshiftRA x y [c])
2498	for {
2499		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
2500			x := v_0
2501			if v_1.Op != OpARMMVNshiftRA {
2502				continue
2503			}
2504			c := auxIntToInt32(v_1.AuxInt)
2505			y := v_1.Args[0]
2506			v.reset(OpARMBICshiftRA)
2507			v.AuxInt = int32ToAuxInt(c)
2508			v.AddArg2(x, y)
2509			return true
2510		}
2511		break
2512	}
2513	return false
2514}
2515func rewriteValueARM_OpARMANDconst(v *Value) bool {
2516	v_0 := v.Args[0]
2517	// match: (ANDconst [0] _)
2518	// result: (MOVWconst [0])
2519	for {
2520		if auxIntToInt32(v.AuxInt) != 0 {
2521			break
2522		}
2523		v.reset(OpARMMOVWconst)
2524		v.AuxInt = int32ToAuxInt(0)
2525		return true
2526	}
2527	// match: (ANDconst [c] x)
2528	// cond: int32(c)==-1
2529	// result: x
2530	for {
2531		c := auxIntToInt32(v.AuxInt)
2532		x := v_0
2533		if !(int32(c) == -1) {
2534			break
2535		}
2536		v.copyOf(x)
2537		return true
2538	}
2539	// match: (ANDconst [c] x)
2540	// cond: !isARMImmRot(uint32(c)) && isARMImmRot(^uint32(c))
2541	// result: (BICconst [int32(^uint32(c))] x)
2542	for {
2543		c := auxIntToInt32(v.AuxInt)
2544		x := v_0
2545		if !(!isARMImmRot(uint32(c)) && isARMImmRot(^uint32(c))) {
2546			break
2547		}
2548		v.reset(OpARMBICconst)
2549		v.AuxInt = int32ToAuxInt(int32(^uint32(c)))
2550		v.AddArg(x)
2551		return true
2552	}
2553	// match: (ANDconst [c] x)
2554	// cond: buildcfg.GOARM.Version==7 && !isARMImmRot(uint32(c)) && uint32(c)>0xffff && ^uint32(c)<=0xffff
2555	// result: (BICconst [int32(^uint32(c))] x)
2556	for {
2557		c := auxIntToInt32(v.AuxInt)
2558		x := v_0
2559		if !(buildcfg.GOARM.Version == 7 && !isARMImmRot(uint32(c)) && uint32(c) > 0xffff && ^uint32(c) <= 0xffff) {
2560			break
2561		}
2562		v.reset(OpARMBICconst)
2563		v.AuxInt = int32ToAuxInt(int32(^uint32(c)))
2564		v.AddArg(x)
2565		return true
2566	}
2567	// match: (ANDconst [c] (MOVWconst [d]))
2568	// result: (MOVWconst [c&d])
2569	for {
2570		c := auxIntToInt32(v.AuxInt)
2571		if v_0.Op != OpARMMOVWconst {
2572			break
2573		}
2574		d := auxIntToInt32(v_0.AuxInt)
2575		v.reset(OpARMMOVWconst)
2576		v.AuxInt = int32ToAuxInt(c & d)
2577		return true
2578	}
2579	// match: (ANDconst [c] (ANDconst [d] x))
2580	// result: (ANDconst [c&d] x)
2581	for {
2582		c := auxIntToInt32(v.AuxInt)
2583		if v_0.Op != OpARMANDconst {
2584			break
2585		}
2586		d := auxIntToInt32(v_0.AuxInt)
2587		x := v_0.Args[0]
2588		v.reset(OpARMANDconst)
2589		v.AuxInt = int32ToAuxInt(c & d)
2590		v.AddArg(x)
2591		return true
2592	}
2593	return false
2594}
2595func rewriteValueARM_OpARMANDshiftLL(v *Value) bool {
2596	v_1 := v.Args[1]
2597	v_0 := v.Args[0]
2598	b := v.Block
2599	// match: (ANDshiftLL (MOVWconst [c]) x [d])
2600	// result: (ANDconst [c] (SLLconst <x.Type> x [d]))
2601	for {
2602		d := auxIntToInt32(v.AuxInt)
2603		if v_0.Op != OpARMMOVWconst {
2604			break
2605		}
2606		c := auxIntToInt32(v_0.AuxInt)
2607		x := v_1
2608		v.reset(OpARMANDconst)
2609		v.AuxInt = int32ToAuxInt(c)
2610		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
2611		v0.AuxInt = int32ToAuxInt(d)
2612		v0.AddArg(x)
2613		v.AddArg(v0)
2614		return true
2615	}
2616	// match: (ANDshiftLL x (MOVWconst [c]) [d])
2617	// result: (ANDconst x [c<<uint64(d)])
2618	for {
2619		d := auxIntToInt32(v.AuxInt)
2620		x := v_0
2621		if v_1.Op != OpARMMOVWconst {
2622			break
2623		}
2624		c := auxIntToInt32(v_1.AuxInt)
2625		v.reset(OpARMANDconst)
2626		v.AuxInt = int32ToAuxInt(c << uint64(d))
2627		v.AddArg(x)
2628		return true
2629	}
2630	// match: (ANDshiftLL y:(SLLconst x [c]) x [c])
2631	// result: y
2632	for {
2633		c := auxIntToInt32(v.AuxInt)
2634		y := v_0
2635		if y.Op != OpARMSLLconst || auxIntToInt32(y.AuxInt) != c {
2636			break
2637		}
2638		x := y.Args[0]
2639		if x != v_1 {
2640			break
2641		}
2642		v.copyOf(y)
2643		return true
2644	}
2645	return false
2646}
2647func rewriteValueARM_OpARMANDshiftLLreg(v *Value) bool {
2648	v_2 := v.Args[2]
2649	v_1 := v.Args[1]
2650	v_0 := v.Args[0]
2651	b := v.Block
2652	// match: (ANDshiftLLreg (MOVWconst [c]) x y)
2653	// result: (ANDconst [c] (SLL <x.Type> x y))
2654	for {
2655		if v_0.Op != OpARMMOVWconst {
2656			break
2657		}
2658		c := auxIntToInt32(v_0.AuxInt)
2659		x := v_1
2660		y := v_2
2661		v.reset(OpARMANDconst)
2662		v.AuxInt = int32ToAuxInt(c)
2663		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
2664		v0.AddArg2(x, y)
2665		v.AddArg(v0)
2666		return true
2667	}
2668	// match: (ANDshiftLLreg x y (MOVWconst [c]))
2669	// cond: 0 <= c && c < 32
2670	// result: (ANDshiftLL x y [c])
2671	for {
2672		x := v_0
2673		y := v_1
2674		if v_2.Op != OpARMMOVWconst {
2675			break
2676		}
2677		c := auxIntToInt32(v_2.AuxInt)
2678		if !(0 <= c && c < 32) {
2679			break
2680		}
2681		v.reset(OpARMANDshiftLL)
2682		v.AuxInt = int32ToAuxInt(c)
2683		v.AddArg2(x, y)
2684		return true
2685	}
2686	return false
2687}
2688func rewriteValueARM_OpARMANDshiftRA(v *Value) bool {
2689	v_1 := v.Args[1]
2690	v_0 := v.Args[0]
2691	b := v.Block
2692	// match: (ANDshiftRA (MOVWconst [c]) x [d])
2693	// result: (ANDconst [c] (SRAconst <x.Type> x [d]))
2694	for {
2695		d := auxIntToInt32(v.AuxInt)
2696		if v_0.Op != OpARMMOVWconst {
2697			break
2698		}
2699		c := auxIntToInt32(v_0.AuxInt)
2700		x := v_1
2701		v.reset(OpARMANDconst)
2702		v.AuxInt = int32ToAuxInt(c)
2703		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
2704		v0.AuxInt = int32ToAuxInt(d)
2705		v0.AddArg(x)
2706		v.AddArg(v0)
2707		return true
2708	}
2709	// match: (ANDshiftRA x (MOVWconst [c]) [d])
2710	// result: (ANDconst x [c>>uint64(d)])
2711	for {
2712		d := auxIntToInt32(v.AuxInt)
2713		x := v_0
2714		if v_1.Op != OpARMMOVWconst {
2715			break
2716		}
2717		c := auxIntToInt32(v_1.AuxInt)
2718		v.reset(OpARMANDconst)
2719		v.AuxInt = int32ToAuxInt(c >> uint64(d))
2720		v.AddArg(x)
2721		return true
2722	}
2723	// match: (ANDshiftRA y:(SRAconst x [c]) x [c])
2724	// result: y
2725	for {
2726		c := auxIntToInt32(v.AuxInt)
2727		y := v_0
2728		if y.Op != OpARMSRAconst || auxIntToInt32(y.AuxInt) != c {
2729			break
2730		}
2731		x := y.Args[0]
2732		if x != v_1 {
2733			break
2734		}
2735		v.copyOf(y)
2736		return true
2737	}
2738	return false
2739}
2740func rewriteValueARM_OpARMANDshiftRAreg(v *Value) bool {
2741	v_2 := v.Args[2]
2742	v_1 := v.Args[1]
2743	v_0 := v.Args[0]
2744	b := v.Block
2745	// match: (ANDshiftRAreg (MOVWconst [c]) x y)
2746	// result: (ANDconst [c] (SRA <x.Type> x y))
2747	for {
2748		if v_0.Op != OpARMMOVWconst {
2749			break
2750		}
2751		c := auxIntToInt32(v_0.AuxInt)
2752		x := v_1
2753		y := v_2
2754		v.reset(OpARMANDconst)
2755		v.AuxInt = int32ToAuxInt(c)
2756		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
2757		v0.AddArg2(x, y)
2758		v.AddArg(v0)
2759		return true
2760	}
2761	// match: (ANDshiftRAreg x y (MOVWconst [c]))
2762	// cond: 0 <= c && c < 32
2763	// result: (ANDshiftRA x y [c])
2764	for {
2765		x := v_0
2766		y := v_1
2767		if v_2.Op != OpARMMOVWconst {
2768			break
2769		}
2770		c := auxIntToInt32(v_2.AuxInt)
2771		if !(0 <= c && c < 32) {
2772			break
2773		}
2774		v.reset(OpARMANDshiftRA)
2775		v.AuxInt = int32ToAuxInt(c)
2776		v.AddArg2(x, y)
2777		return true
2778	}
2779	return false
2780}
2781func rewriteValueARM_OpARMANDshiftRL(v *Value) bool {
2782	v_1 := v.Args[1]
2783	v_0 := v.Args[0]
2784	b := v.Block
2785	// match: (ANDshiftRL (MOVWconst [c]) x [d])
2786	// result: (ANDconst [c] (SRLconst <x.Type> x [d]))
2787	for {
2788		d := auxIntToInt32(v.AuxInt)
2789		if v_0.Op != OpARMMOVWconst {
2790			break
2791		}
2792		c := auxIntToInt32(v_0.AuxInt)
2793		x := v_1
2794		v.reset(OpARMANDconst)
2795		v.AuxInt = int32ToAuxInt(c)
2796		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
2797		v0.AuxInt = int32ToAuxInt(d)
2798		v0.AddArg(x)
2799		v.AddArg(v0)
2800		return true
2801	}
2802	// match: (ANDshiftRL x (MOVWconst [c]) [d])
2803	// result: (ANDconst x [int32(uint32(c)>>uint64(d))])
2804	for {
2805		d := auxIntToInt32(v.AuxInt)
2806		x := v_0
2807		if v_1.Op != OpARMMOVWconst {
2808			break
2809		}
2810		c := auxIntToInt32(v_1.AuxInt)
2811		v.reset(OpARMANDconst)
2812		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
2813		v.AddArg(x)
2814		return true
2815	}
2816	// match: (ANDshiftRL y:(SRLconst x [c]) x [c])
2817	// result: y
2818	for {
2819		c := auxIntToInt32(v.AuxInt)
2820		y := v_0
2821		if y.Op != OpARMSRLconst || auxIntToInt32(y.AuxInt) != c {
2822			break
2823		}
2824		x := y.Args[0]
2825		if x != v_1 {
2826			break
2827		}
2828		v.copyOf(y)
2829		return true
2830	}
2831	return false
2832}
2833func rewriteValueARM_OpARMANDshiftRLreg(v *Value) bool {
2834	v_2 := v.Args[2]
2835	v_1 := v.Args[1]
2836	v_0 := v.Args[0]
2837	b := v.Block
2838	// match: (ANDshiftRLreg (MOVWconst [c]) x y)
2839	// result: (ANDconst [c] (SRL <x.Type> x y))
2840	for {
2841		if v_0.Op != OpARMMOVWconst {
2842			break
2843		}
2844		c := auxIntToInt32(v_0.AuxInt)
2845		x := v_1
2846		y := v_2
2847		v.reset(OpARMANDconst)
2848		v.AuxInt = int32ToAuxInt(c)
2849		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
2850		v0.AddArg2(x, y)
2851		v.AddArg(v0)
2852		return true
2853	}
2854	// match: (ANDshiftRLreg x y (MOVWconst [c]))
2855	// cond: 0 <= c && c < 32
2856	// result: (ANDshiftRL x y [c])
2857	for {
2858		x := v_0
2859		y := v_1
2860		if v_2.Op != OpARMMOVWconst {
2861			break
2862		}
2863		c := auxIntToInt32(v_2.AuxInt)
2864		if !(0 <= c && c < 32) {
2865			break
2866		}
2867		v.reset(OpARMANDshiftRL)
2868		v.AuxInt = int32ToAuxInt(c)
2869		v.AddArg2(x, y)
2870		return true
2871	}
2872	return false
2873}
2874func rewriteValueARM_OpARMBFX(v *Value) bool {
2875	v_0 := v.Args[0]
2876	// match: (BFX [c] (MOVWconst [d]))
2877	// result: (MOVWconst [d<<(32-uint32(c&0xff)-uint32(c>>8))>>(32-uint32(c>>8))])
2878	for {
2879		c := auxIntToInt32(v.AuxInt)
2880		if v_0.Op != OpARMMOVWconst {
2881			break
2882		}
2883		d := auxIntToInt32(v_0.AuxInt)
2884		v.reset(OpARMMOVWconst)
2885		v.AuxInt = int32ToAuxInt(d << (32 - uint32(c&0xff) - uint32(c>>8)) >> (32 - uint32(c>>8)))
2886		return true
2887	}
2888	return false
2889}
2890func rewriteValueARM_OpARMBFXU(v *Value) bool {
2891	v_0 := v.Args[0]
2892	// match: (BFXU [c] (MOVWconst [d]))
2893	// result: (MOVWconst [int32(uint32(d)<<(32-uint32(c&0xff)-uint32(c>>8))>>(32-uint32(c>>8)))])
2894	for {
2895		c := auxIntToInt32(v.AuxInt)
2896		if v_0.Op != OpARMMOVWconst {
2897			break
2898		}
2899		d := auxIntToInt32(v_0.AuxInt)
2900		v.reset(OpARMMOVWconst)
2901		v.AuxInt = int32ToAuxInt(int32(uint32(d) << (32 - uint32(c&0xff) - uint32(c>>8)) >> (32 - uint32(c>>8))))
2902		return true
2903	}
2904	return false
2905}
2906func rewriteValueARM_OpARMBIC(v *Value) bool {
2907	v_1 := v.Args[1]
2908	v_0 := v.Args[0]
2909	// match: (BIC x (MOVWconst [c]))
2910	// result: (BICconst [c] x)
2911	for {
2912		x := v_0
2913		if v_1.Op != OpARMMOVWconst {
2914			break
2915		}
2916		c := auxIntToInt32(v_1.AuxInt)
2917		v.reset(OpARMBICconst)
2918		v.AuxInt = int32ToAuxInt(c)
2919		v.AddArg(x)
2920		return true
2921	}
2922	// match: (BIC x (SLLconst [c] y))
2923	// result: (BICshiftLL x y [c])
2924	for {
2925		x := v_0
2926		if v_1.Op != OpARMSLLconst {
2927			break
2928		}
2929		c := auxIntToInt32(v_1.AuxInt)
2930		y := v_1.Args[0]
2931		v.reset(OpARMBICshiftLL)
2932		v.AuxInt = int32ToAuxInt(c)
2933		v.AddArg2(x, y)
2934		return true
2935	}
2936	// match: (BIC x (SRLconst [c] y))
2937	// result: (BICshiftRL x y [c])
2938	for {
2939		x := v_0
2940		if v_1.Op != OpARMSRLconst {
2941			break
2942		}
2943		c := auxIntToInt32(v_1.AuxInt)
2944		y := v_1.Args[0]
2945		v.reset(OpARMBICshiftRL)
2946		v.AuxInt = int32ToAuxInt(c)
2947		v.AddArg2(x, y)
2948		return true
2949	}
2950	// match: (BIC x (SRAconst [c] y))
2951	// result: (BICshiftRA x y [c])
2952	for {
2953		x := v_0
2954		if v_1.Op != OpARMSRAconst {
2955			break
2956		}
2957		c := auxIntToInt32(v_1.AuxInt)
2958		y := v_1.Args[0]
2959		v.reset(OpARMBICshiftRA)
2960		v.AuxInt = int32ToAuxInt(c)
2961		v.AddArg2(x, y)
2962		return true
2963	}
2964	// match: (BIC x (SLL y z))
2965	// result: (BICshiftLLreg x y z)
2966	for {
2967		x := v_0
2968		if v_1.Op != OpARMSLL {
2969			break
2970		}
2971		z := v_1.Args[1]
2972		y := v_1.Args[0]
2973		v.reset(OpARMBICshiftLLreg)
2974		v.AddArg3(x, y, z)
2975		return true
2976	}
2977	// match: (BIC x (SRL y z))
2978	// result: (BICshiftRLreg x y z)
2979	for {
2980		x := v_0
2981		if v_1.Op != OpARMSRL {
2982			break
2983		}
2984		z := v_1.Args[1]
2985		y := v_1.Args[0]
2986		v.reset(OpARMBICshiftRLreg)
2987		v.AddArg3(x, y, z)
2988		return true
2989	}
2990	// match: (BIC x (SRA y z))
2991	// result: (BICshiftRAreg x y z)
2992	for {
2993		x := v_0
2994		if v_1.Op != OpARMSRA {
2995			break
2996		}
2997		z := v_1.Args[1]
2998		y := v_1.Args[0]
2999		v.reset(OpARMBICshiftRAreg)
3000		v.AddArg3(x, y, z)
3001		return true
3002	}
3003	// match: (BIC x x)
3004	// result: (MOVWconst [0])
3005	for {
3006		x := v_0
3007		if x != v_1 {
3008			break
3009		}
3010		v.reset(OpARMMOVWconst)
3011		v.AuxInt = int32ToAuxInt(0)
3012		return true
3013	}
3014	return false
3015}
3016func rewriteValueARM_OpARMBICconst(v *Value) bool {
3017	v_0 := v.Args[0]
3018	// match: (BICconst [0] x)
3019	// result: x
3020	for {
3021		if auxIntToInt32(v.AuxInt) != 0 {
3022			break
3023		}
3024		x := v_0
3025		v.copyOf(x)
3026		return true
3027	}
3028	// match: (BICconst [c] _)
3029	// cond: int32(c)==-1
3030	// result: (MOVWconst [0])
3031	for {
3032		c := auxIntToInt32(v.AuxInt)
3033		if !(int32(c) == -1) {
3034			break
3035		}
3036		v.reset(OpARMMOVWconst)
3037		v.AuxInt = int32ToAuxInt(0)
3038		return true
3039	}
3040	// match: (BICconst [c] x)
3041	// cond: !isARMImmRot(uint32(c)) && isARMImmRot(^uint32(c))
3042	// result: (ANDconst [int32(^uint32(c))] x)
3043	for {
3044		c := auxIntToInt32(v.AuxInt)
3045		x := v_0
3046		if !(!isARMImmRot(uint32(c)) && isARMImmRot(^uint32(c))) {
3047			break
3048		}
3049		v.reset(OpARMANDconst)
3050		v.AuxInt = int32ToAuxInt(int32(^uint32(c)))
3051		v.AddArg(x)
3052		return true
3053	}
3054	// match: (BICconst [c] x)
3055	// cond: buildcfg.GOARM.Version==7 && !isARMImmRot(uint32(c)) && uint32(c)>0xffff && ^uint32(c)<=0xffff
3056	// result: (ANDconst [int32(^uint32(c))] x)
3057	for {
3058		c := auxIntToInt32(v.AuxInt)
3059		x := v_0
3060		if !(buildcfg.GOARM.Version == 7 && !isARMImmRot(uint32(c)) && uint32(c) > 0xffff && ^uint32(c) <= 0xffff) {
3061			break
3062		}
3063		v.reset(OpARMANDconst)
3064		v.AuxInt = int32ToAuxInt(int32(^uint32(c)))
3065		v.AddArg(x)
3066		return true
3067	}
3068	// match: (BICconst [c] (MOVWconst [d]))
3069	// result: (MOVWconst [d&^c])
3070	for {
3071		c := auxIntToInt32(v.AuxInt)
3072		if v_0.Op != OpARMMOVWconst {
3073			break
3074		}
3075		d := auxIntToInt32(v_0.AuxInt)
3076		v.reset(OpARMMOVWconst)
3077		v.AuxInt = int32ToAuxInt(d &^ c)
3078		return true
3079	}
3080	// match: (BICconst [c] (BICconst [d] x))
3081	// result: (BICconst [c|d] x)
3082	for {
3083		c := auxIntToInt32(v.AuxInt)
3084		if v_0.Op != OpARMBICconst {
3085			break
3086		}
3087		d := auxIntToInt32(v_0.AuxInt)
3088		x := v_0.Args[0]
3089		v.reset(OpARMBICconst)
3090		v.AuxInt = int32ToAuxInt(c | d)
3091		v.AddArg(x)
3092		return true
3093	}
3094	return false
3095}
3096func rewriteValueARM_OpARMBICshiftLL(v *Value) bool {
3097	v_1 := v.Args[1]
3098	v_0 := v.Args[0]
3099	// match: (BICshiftLL x (MOVWconst [c]) [d])
3100	// result: (BICconst x [c<<uint64(d)])
3101	for {
3102		d := auxIntToInt32(v.AuxInt)
3103		x := v_0
3104		if v_1.Op != OpARMMOVWconst {
3105			break
3106		}
3107		c := auxIntToInt32(v_1.AuxInt)
3108		v.reset(OpARMBICconst)
3109		v.AuxInt = int32ToAuxInt(c << uint64(d))
3110		v.AddArg(x)
3111		return true
3112	}
3113	// match: (BICshiftLL (SLLconst x [c]) x [c])
3114	// result: (MOVWconst [0])
3115	for {
3116		c := auxIntToInt32(v.AuxInt)
3117		if v_0.Op != OpARMSLLconst || auxIntToInt32(v_0.AuxInt) != c {
3118			break
3119		}
3120		x := v_0.Args[0]
3121		if x != v_1 {
3122			break
3123		}
3124		v.reset(OpARMMOVWconst)
3125		v.AuxInt = int32ToAuxInt(0)
3126		return true
3127	}
3128	return false
3129}
3130func rewriteValueARM_OpARMBICshiftLLreg(v *Value) bool {
3131	v_2 := v.Args[2]
3132	v_1 := v.Args[1]
3133	v_0 := v.Args[0]
3134	// match: (BICshiftLLreg x y (MOVWconst [c]))
3135	// cond: 0 <= c && c < 32
3136	// result: (BICshiftLL x y [c])
3137	for {
3138		x := v_0
3139		y := v_1
3140		if v_2.Op != OpARMMOVWconst {
3141			break
3142		}
3143		c := auxIntToInt32(v_2.AuxInt)
3144		if !(0 <= c && c < 32) {
3145			break
3146		}
3147		v.reset(OpARMBICshiftLL)
3148		v.AuxInt = int32ToAuxInt(c)
3149		v.AddArg2(x, y)
3150		return true
3151	}
3152	return false
3153}
3154func rewriteValueARM_OpARMBICshiftRA(v *Value) bool {
3155	v_1 := v.Args[1]
3156	v_0 := v.Args[0]
3157	// match: (BICshiftRA x (MOVWconst [c]) [d])
3158	// result: (BICconst x [c>>uint64(d)])
3159	for {
3160		d := auxIntToInt32(v.AuxInt)
3161		x := v_0
3162		if v_1.Op != OpARMMOVWconst {
3163			break
3164		}
3165		c := auxIntToInt32(v_1.AuxInt)
3166		v.reset(OpARMBICconst)
3167		v.AuxInt = int32ToAuxInt(c >> uint64(d))
3168		v.AddArg(x)
3169		return true
3170	}
3171	// match: (BICshiftRA (SRAconst x [c]) x [c])
3172	// result: (MOVWconst [0])
3173	for {
3174		c := auxIntToInt32(v.AuxInt)
3175		if v_0.Op != OpARMSRAconst || auxIntToInt32(v_0.AuxInt) != c {
3176			break
3177		}
3178		x := v_0.Args[0]
3179		if x != v_1 {
3180			break
3181		}
3182		v.reset(OpARMMOVWconst)
3183		v.AuxInt = int32ToAuxInt(0)
3184		return true
3185	}
3186	return false
3187}
3188func rewriteValueARM_OpARMBICshiftRAreg(v *Value) bool {
3189	v_2 := v.Args[2]
3190	v_1 := v.Args[1]
3191	v_0 := v.Args[0]
3192	// match: (BICshiftRAreg x y (MOVWconst [c]))
3193	// cond: 0 <= c && c < 32
3194	// result: (BICshiftRA x y [c])
3195	for {
3196		x := v_0
3197		y := v_1
3198		if v_2.Op != OpARMMOVWconst {
3199			break
3200		}
3201		c := auxIntToInt32(v_2.AuxInt)
3202		if !(0 <= c && c < 32) {
3203			break
3204		}
3205		v.reset(OpARMBICshiftRA)
3206		v.AuxInt = int32ToAuxInt(c)
3207		v.AddArg2(x, y)
3208		return true
3209	}
3210	return false
3211}
3212func rewriteValueARM_OpARMBICshiftRL(v *Value) bool {
3213	v_1 := v.Args[1]
3214	v_0 := v.Args[0]
3215	// match: (BICshiftRL x (MOVWconst [c]) [d])
3216	// result: (BICconst x [int32(uint32(c)>>uint64(d))])
3217	for {
3218		d := auxIntToInt32(v.AuxInt)
3219		x := v_0
3220		if v_1.Op != OpARMMOVWconst {
3221			break
3222		}
3223		c := auxIntToInt32(v_1.AuxInt)
3224		v.reset(OpARMBICconst)
3225		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
3226		v.AddArg(x)
3227		return true
3228	}
3229	// match: (BICshiftRL (SRLconst x [c]) x [c])
3230	// result: (MOVWconst [0])
3231	for {
3232		c := auxIntToInt32(v.AuxInt)
3233		if v_0.Op != OpARMSRLconst || auxIntToInt32(v_0.AuxInt) != c {
3234			break
3235		}
3236		x := v_0.Args[0]
3237		if x != v_1 {
3238			break
3239		}
3240		v.reset(OpARMMOVWconst)
3241		v.AuxInt = int32ToAuxInt(0)
3242		return true
3243	}
3244	return false
3245}
3246func rewriteValueARM_OpARMBICshiftRLreg(v *Value) bool {
3247	v_2 := v.Args[2]
3248	v_1 := v.Args[1]
3249	v_0 := v.Args[0]
3250	// match: (BICshiftRLreg x y (MOVWconst [c]))
3251	// cond: 0 <= c && c < 32
3252	// result: (BICshiftRL x y [c])
3253	for {
3254		x := v_0
3255		y := v_1
3256		if v_2.Op != OpARMMOVWconst {
3257			break
3258		}
3259		c := auxIntToInt32(v_2.AuxInt)
3260		if !(0 <= c && c < 32) {
3261			break
3262		}
3263		v.reset(OpARMBICshiftRL)
3264		v.AuxInt = int32ToAuxInt(c)
3265		v.AddArg2(x, y)
3266		return true
3267	}
3268	return false
3269}
3270func rewriteValueARM_OpARMCMN(v *Value) bool {
3271	v_1 := v.Args[1]
3272	v_0 := v.Args[0]
3273	// match: (CMN x (MOVWconst [c]))
3274	// result: (CMNconst [c] x)
3275	for {
3276		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
3277			x := v_0
3278			if v_1.Op != OpARMMOVWconst {
3279				continue
3280			}
3281			c := auxIntToInt32(v_1.AuxInt)
3282			v.reset(OpARMCMNconst)
3283			v.AuxInt = int32ToAuxInt(c)
3284			v.AddArg(x)
3285			return true
3286		}
3287		break
3288	}
3289	// match: (CMN x (SLLconst [c] y))
3290	// result: (CMNshiftLL x y [c])
3291	for {
3292		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
3293			x := v_0
3294			if v_1.Op != OpARMSLLconst {
3295				continue
3296			}
3297			c := auxIntToInt32(v_1.AuxInt)
3298			y := v_1.Args[0]
3299			v.reset(OpARMCMNshiftLL)
3300			v.AuxInt = int32ToAuxInt(c)
3301			v.AddArg2(x, y)
3302			return true
3303		}
3304		break
3305	}
3306	// match: (CMN x (SRLconst [c] y))
3307	// result: (CMNshiftRL x y [c])
3308	for {
3309		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
3310			x := v_0
3311			if v_1.Op != OpARMSRLconst {
3312				continue
3313			}
3314			c := auxIntToInt32(v_1.AuxInt)
3315			y := v_1.Args[0]
3316			v.reset(OpARMCMNshiftRL)
3317			v.AuxInt = int32ToAuxInt(c)
3318			v.AddArg2(x, y)
3319			return true
3320		}
3321		break
3322	}
3323	// match: (CMN x (SRAconst [c] y))
3324	// result: (CMNshiftRA x y [c])
3325	for {
3326		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
3327			x := v_0
3328			if v_1.Op != OpARMSRAconst {
3329				continue
3330			}
3331			c := auxIntToInt32(v_1.AuxInt)
3332			y := v_1.Args[0]
3333			v.reset(OpARMCMNshiftRA)
3334			v.AuxInt = int32ToAuxInt(c)
3335			v.AddArg2(x, y)
3336			return true
3337		}
3338		break
3339	}
3340	// match: (CMN x (SLL y z))
3341	// result: (CMNshiftLLreg x y z)
3342	for {
3343		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
3344			x := v_0
3345			if v_1.Op != OpARMSLL {
3346				continue
3347			}
3348			z := v_1.Args[1]
3349			y := v_1.Args[0]
3350			v.reset(OpARMCMNshiftLLreg)
3351			v.AddArg3(x, y, z)
3352			return true
3353		}
3354		break
3355	}
3356	// match: (CMN x (SRL y z))
3357	// result: (CMNshiftRLreg x y z)
3358	for {
3359		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
3360			x := v_0
3361			if v_1.Op != OpARMSRL {
3362				continue
3363			}
3364			z := v_1.Args[1]
3365			y := v_1.Args[0]
3366			v.reset(OpARMCMNshiftRLreg)
3367			v.AddArg3(x, y, z)
3368			return true
3369		}
3370		break
3371	}
3372	// match: (CMN x (SRA y z))
3373	// result: (CMNshiftRAreg x y z)
3374	for {
3375		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
3376			x := v_0
3377			if v_1.Op != OpARMSRA {
3378				continue
3379			}
3380			z := v_1.Args[1]
3381			y := v_1.Args[0]
3382			v.reset(OpARMCMNshiftRAreg)
3383			v.AddArg3(x, y, z)
3384			return true
3385		}
3386		break
3387	}
3388	return false
3389}
3390func rewriteValueARM_OpARMCMNconst(v *Value) bool {
3391	v_0 := v.Args[0]
3392	// match: (CMNconst (MOVWconst [x]) [y])
3393	// result: (FlagConstant [addFlags32(x,y)])
3394	for {
3395		y := auxIntToInt32(v.AuxInt)
3396		if v_0.Op != OpARMMOVWconst {
3397			break
3398		}
3399		x := auxIntToInt32(v_0.AuxInt)
3400		v.reset(OpARMFlagConstant)
3401		v.AuxInt = flagConstantToAuxInt(addFlags32(x, y))
3402		return true
3403	}
3404	return false
3405}
3406func rewriteValueARM_OpARMCMNshiftLL(v *Value) bool {
3407	v_1 := v.Args[1]
3408	v_0 := v.Args[0]
3409	b := v.Block
3410	// match: (CMNshiftLL (MOVWconst [c]) x [d])
3411	// result: (CMNconst [c] (SLLconst <x.Type> x [d]))
3412	for {
3413		d := auxIntToInt32(v.AuxInt)
3414		if v_0.Op != OpARMMOVWconst {
3415			break
3416		}
3417		c := auxIntToInt32(v_0.AuxInt)
3418		x := v_1
3419		v.reset(OpARMCMNconst)
3420		v.AuxInt = int32ToAuxInt(c)
3421		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
3422		v0.AuxInt = int32ToAuxInt(d)
3423		v0.AddArg(x)
3424		v.AddArg(v0)
3425		return true
3426	}
3427	// match: (CMNshiftLL x (MOVWconst [c]) [d])
3428	// result: (CMNconst x [c<<uint64(d)])
3429	for {
3430		d := auxIntToInt32(v.AuxInt)
3431		x := v_0
3432		if v_1.Op != OpARMMOVWconst {
3433			break
3434		}
3435		c := auxIntToInt32(v_1.AuxInt)
3436		v.reset(OpARMCMNconst)
3437		v.AuxInt = int32ToAuxInt(c << uint64(d))
3438		v.AddArg(x)
3439		return true
3440	}
3441	return false
3442}
3443func rewriteValueARM_OpARMCMNshiftLLreg(v *Value) bool {
3444	v_2 := v.Args[2]
3445	v_1 := v.Args[1]
3446	v_0 := v.Args[0]
3447	b := v.Block
3448	// match: (CMNshiftLLreg (MOVWconst [c]) x y)
3449	// result: (CMNconst [c] (SLL <x.Type> x y))
3450	for {
3451		if v_0.Op != OpARMMOVWconst {
3452			break
3453		}
3454		c := auxIntToInt32(v_0.AuxInt)
3455		x := v_1
3456		y := v_2
3457		v.reset(OpARMCMNconst)
3458		v.AuxInt = int32ToAuxInt(c)
3459		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
3460		v0.AddArg2(x, y)
3461		v.AddArg(v0)
3462		return true
3463	}
3464	// match: (CMNshiftLLreg x y (MOVWconst [c]))
3465	// cond: 0 <= c && c < 32
3466	// result: (CMNshiftLL x y [c])
3467	for {
3468		x := v_0
3469		y := v_1
3470		if v_2.Op != OpARMMOVWconst {
3471			break
3472		}
3473		c := auxIntToInt32(v_2.AuxInt)
3474		if !(0 <= c && c < 32) {
3475			break
3476		}
3477		v.reset(OpARMCMNshiftLL)
3478		v.AuxInt = int32ToAuxInt(c)
3479		v.AddArg2(x, y)
3480		return true
3481	}
3482	return false
3483}
3484func rewriteValueARM_OpARMCMNshiftRA(v *Value) bool {
3485	v_1 := v.Args[1]
3486	v_0 := v.Args[0]
3487	b := v.Block
3488	// match: (CMNshiftRA (MOVWconst [c]) x [d])
3489	// result: (CMNconst [c] (SRAconst <x.Type> x [d]))
3490	for {
3491		d := auxIntToInt32(v.AuxInt)
3492		if v_0.Op != OpARMMOVWconst {
3493			break
3494		}
3495		c := auxIntToInt32(v_0.AuxInt)
3496		x := v_1
3497		v.reset(OpARMCMNconst)
3498		v.AuxInt = int32ToAuxInt(c)
3499		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
3500		v0.AuxInt = int32ToAuxInt(d)
3501		v0.AddArg(x)
3502		v.AddArg(v0)
3503		return true
3504	}
3505	// match: (CMNshiftRA x (MOVWconst [c]) [d])
3506	// result: (CMNconst x [c>>uint64(d)])
3507	for {
3508		d := auxIntToInt32(v.AuxInt)
3509		x := v_0
3510		if v_1.Op != OpARMMOVWconst {
3511			break
3512		}
3513		c := auxIntToInt32(v_1.AuxInt)
3514		v.reset(OpARMCMNconst)
3515		v.AuxInt = int32ToAuxInt(c >> uint64(d))
3516		v.AddArg(x)
3517		return true
3518	}
3519	return false
3520}
3521func rewriteValueARM_OpARMCMNshiftRAreg(v *Value) bool {
3522	v_2 := v.Args[2]
3523	v_1 := v.Args[1]
3524	v_0 := v.Args[0]
3525	b := v.Block
3526	// match: (CMNshiftRAreg (MOVWconst [c]) x y)
3527	// result: (CMNconst [c] (SRA <x.Type> x y))
3528	for {
3529		if v_0.Op != OpARMMOVWconst {
3530			break
3531		}
3532		c := auxIntToInt32(v_0.AuxInt)
3533		x := v_1
3534		y := v_2
3535		v.reset(OpARMCMNconst)
3536		v.AuxInt = int32ToAuxInt(c)
3537		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
3538		v0.AddArg2(x, y)
3539		v.AddArg(v0)
3540		return true
3541	}
3542	// match: (CMNshiftRAreg x y (MOVWconst [c]))
3543	// cond: 0 <= c && c < 32
3544	// result: (CMNshiftRA x y [c])
3545	for {
3546		x := v_0
3547		y := v_1
3548		if v_2.Op != OpARMMOVWconst {
3549			break
3550		}
3551		c := auxIntToInt32(v_2.AuxInt)
3552		if !(0 <= c && c < 32) {
3553			break
3554		}
3555		v.reset(OpARMCMNshiftRA)
3556		v.AuxInt = int32ToAuxInt(c)
3557		v.AddArg2(x, y)
3558		return true
3559	}
3560	return false
3561}
3562func rewriteValueARM_OpARMCMNshiftRL(v *Value) bool {
3563	v_1 := v.Args[1]
3564	v_0 := v.Args[0]
3565	b := v.Block
3566	// match: (CMNshiftRL (MOVWconst [c]) x [d])
3567	// result: (CMNconst [c] (SRLconst <x.Type> x [d]))
3568	for {
3569		d := auxIntToInt32(v.AuxInt)
3570		if v_0.Op != OpARMMOVWconst {
3571			break
3572		}
3573		c := auxIntToInt32(v_0.AuxInt)
3574		x := v_1
3575		v.reset(OpARMCMNconst)
3576		v.AuxInt = int32ToAuxInt(c)
3577		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
3578		v0.AuxInt = int32ToAuxInt(d)
3579		v0.AddArg(x)
3580		v.AddArg(v0)
3581		return true
3582	}
3583	// match: (CMNshiftRL x (MOVWconst [c]) [d])
3584	// result: (CMNconst x [int32(uint32(c)>>uint64(d))])
3585	for {
3586		d := auxIntToInt32(v.AuxInt)
3587		x := v_0
3588		if v_1.Op != OpARMMOVWconst {
3589			break
3590		}
3591		c := auxIntToInt32(v_1.AuxInt)
3592		v.reset(OpARMCMNconst)
3593		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
3594		v.AddArg(x)
3595		return true
3596	}
3597	return false
3598}
3599func rewriteValueARM_OpARMCMNshiftRLreg(v *Value) bool {
3600	v_2 := v.Args[2]
3601	v_1 := v.Args[1]
3602	v_0 := v.Args[0]
3603	b := v.Block
3604	// match: (CMNshiftRLreg (MOVWconst [c]) x y)
3605	// result: (CMNconst [c] (SRL <x.Type> x y))
3606	for {
3607		if v_0.Op != OpARMMOVWconst {
3608			break
3609		}
3610		c := auxIntToInt32(v_0.AuxInt)
3611		x := v_1
3612		y := v_2
3613		v.reset(OpARMCMNconst)
3614		v.AuxInt = int32ToAuxInt(c)
3615		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
3616		v0.AddArg2(x, y)
3617		v.AddArg(v0)
3618		return true
3619	}
3620	// match: (CMNshiftRLreg x y (MOVWconst [c]))
3621	// cond: 0 <= c && c < 32
3622	// result: (CMNshiftRL x y [c])
3623	for {
3624		x := v_0
3625		y := v_1
3626		if v_2.Op != OpARMMOVWconst {
3627			break
3628		}
3629		c := auxIntToInt32(v_2.AuxInt)
3630		if !(0 <= c && c < 32) {
3631			break
3632		}
3633		v.reset(OpARMCMNshiftRL)
3634		v.AuxInt = int32ToAuxInt(c)
3635		v.AddArg2(x, y)
3636		return true
3637	}
3638	return false
3639}
3640func rewriteValueARM_OpARMCMOVWHSconst(v *Value) bool {
3641	v_1 := v.Args[1]
3642	v_0 := v.Args[0]
3643	// match: (CMOVWHSconst _ (FlagConstant [fc]) [c])
3644	// cond: fc.uge()
3645	// result: (MOVWconst [c])
3646	for {
3647		c := auxIntToInt32(v.AuxInt)
3648		if v_1.Op != OpARMFlagConstant {
3649			break
3650		}
3651		fc := auxIntToFlagConstant(v_1.AuxInt)
3652		if !(fc.uge()) {
3653			break
3654		}
3655		v.reset(OpARMMOVWconst)
3656		v.AuxInt = int32ToAuxInt(c)
3657		return true
3658	}
3659	// match: (CMOVWHSconst x (FlagConstant [fc]) [c])
3660	// cond: fc.ult()
3661	// result: x
3662	for {
3663		x := v_0
3664		if v_1.Op != OpARMFlagConstant {
3665			break
3666		}
3667		fc := auxIntToFlagConstant(v_1.AuxInt)
3668		if !(fc.ult()) {
3669			break
3670		}
3671		v.copyOf(x)
3672		return true
3673	}
3674	// match: (CMOVWHSconst x (InvertFlags flags) [c])
3675	// result: (CMOVWLSconst x flags [c])
3676	for {
3677		c := auxIntToInt32(v.AuxInt)
3678		x := v_0
3679		if v_1.Op != OpARMInvertFlags {
3680			break
3681		}
3682		flags := v_1.Args[0]
3683		v.reset(OpARMCMOVWLSconst)
3684		v.AuxInt = int32ToAuxInt(c)
3685		v.AddArg2(x, flags)
3686		return true
3687	}
3688	return false
3689}
3690func rewriteValueARM_OpARMCMOVWLSconst(v *Value) bool {
3691	v_1 := v.Args[1]
3692	v_0 := v.Args[0]
3693	// match: (CMOVWLSconst _ (FlagConstant [fc]) [c])
3694	// cond: fc.ule()
3695	// result: (MOVWconst [c])
3696	for {
3697		c := auxIntToInt32(v.AuxInt)
3698		if v_1.Op != OpARMFlagConstant {
3699			break
3700		}
3701		fc := auxIntToFlagConstant(v_1.AuxInt)
3702		if !(fc.ule()) {
3703			break
3704		}
3705		v.reset(OpARMMOVWconst)
3706		v.AuxInt = int32ToAuxInt(c)
3707		return true
3708	}
3709	// match: (CMOVWLSconst x (FlagConstant [fc]) [c])
3710	// cond: fc.ugt()
3711	// result: x
3712	for {
3713		x := v_0
3714		if v_1.Op != OpARMFlagConstant {
3715			break
3716		}
3717		fc := auxIntToFlagConstant(v_1.AuxInt)
3718		if !(fc.ugt()) {
3719			break
3720		}
3721		v.copyOf(x)
3722		return true
3723	}
3724	// match: (CMOVWLSconst x (InvertFlags flags) [c])
3725	// result: (CMOVWHSconst x flags [c])
3726	for {
3727		c := auxIntToInt32(v.AuxInt)
3728		x := v_0
3729		if v_1.Op != OpARMInvertFlags {
3730			break
3731		}
3732		flags := v_1.Args[0]
3733		v.reset(OpARMCMOVWHSconst)
3734		v.AuxInt = int32ToAuxInt(c)
3735		v.AddArg2(x, flags)
3736		return true
3737	}
3738	return false
3739}
3740func rewriteValueARM_OpARMCMP(v *Value) bool {
3741	v_1 := v.Args[1]
3742	v_0 := v.Args[0]
3743	b := v.Block
3744	// match: (CMP x (MOVWconst [c]))
3745	// result: (CMPconst [c] x)
3746	for {
3747		x := v_0
3748		if v_1.Op != OpARMMOVWconst {
3749			break
3750		}
3751		c := auxIntToInt32(v_1.AuxInt)
3752		v.reset(OpARMCMPconst)
3753		v.AuxInt = int32ToAuxInt(c)
3754		v.AddArg(x)
3755		return true
3756	}
3757	// match: (CMP (MOVWconst [c]) x)
3758	// result: (InvertFlags (CMPconst [c] x))
3759	for {
3760		if v_0.Op != OpARMMOVWconst {
3761			break
3762		}
3763		c := auxIntToInt32(v_0.AuxInt)
3764		x := v_1
3765		v.reset(OpARMInvertFlags)
3766		v0 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
3767		v0.AuxInt = int32ToAuxInt(c)
3768		v0.AddArg(x)
3769		v.AddArg(v0)
3770		return true
3771	}
3772	// match: (CMP x y)
3773	// cond: canonLessThan(x,y)
3774	// result: (InvertFlags (CMP y x))
3775	for {
3776		x := v_0
3777		y := v_1
3778		if !(canonLessThan(x, y)) {
3779			break
3780		}
3781		v.reset(OpARMInvertFlags)
3782		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
3783		v0.AddArg2(y, x)
3784		v.AddArg(v0)
3785		return true
3786	}
3787	// match: (CMP x (SLLconst [c] y))
3788	// result: (CMPshiftLL x y [c])
3789	for {
3790		x := v_0
3791		if v_1.Op != OpARMSLLconst {
3792			break
3793		}
3794		c := auxIntToInt32(v_1.AuxInt)
3795		y := v_1.Args[0]
3796		v.reset(OpARMCMPshiftLL)
3797		v.AuxInt = int32ToAuxInt(c)
3798		v.AddArg2(x, y)
3799		return true
3800	}
3801	// match: (CMP (SLLconst [c] y) x)
3802	// result: (InvertFlags (CMPshiftLL x y [c]))
3803	for {
3804		if v_0.Op != OpARMSLLconst {
3805			break
3806		}
3807		c := auxIntToInt32(v_0.AuxInt)
3808		y := v_0.Args[0]
3809		x := v_1
3810		v.reset(OpARMInvertFlags)
3811		v0 := b.NewValue0(v.Pos, OpARMCMPshiftLL, types.TypeFlags)
3812		v0.AuxInt = int32ToAuxInt(c)
3813		v0.AddArg2(x, y)
3814		v.AddArg(v0)
3815		return true
3816	}
3817	// match: (CMP x (SRLconst [c] y))
3818	// result: (CMPshiftRL x y [c])
3819	for {
3820		x := v_0
3821		if v_1.Op != OpARMSRLconst {
3822			break
3823		}
3824		c := auxIntToInt32(v_1.AuxInt)
3825		y := v_1.Args[0]
3826		v.reset(OpARMCMPshiftRL)
3827		v.AuxInt = int32ToAuxInt(c)
3828		v.AddArg2(x, y)
3829		return true
3830	}
3831	// match: (CMP (SRLconst [c] y) x)
3832	// result: (InvertFlags (CMPshiftRL x y [c]))
3833	for {
3834		if v_0.Op != OpARMSRLconst {
3835			break
3836		}
3837		c := auxIntToInt32(v_0.AuxInt)
3838		y := v_0.Args[0]
3839		x := v_1
3840		v.reset(OpARMInvertFlags)
3841		v0 := b.NewValue0(v.Pos, OpARMCMPshiftRL, types.TypeFlags)
3842		v0.AuxInt = int32ToAuxInt(c)
3843		v0.AddArg2(x, y)
3844		v.AddArg(v0)
3845		return true
3846	}
3847	// match: (CMP x (SRAconst [c] y))
3848	// result: (CMPshiftRA x y [c])
3849	for {
3850		x := v_0
3851		if v_1.Op != OpARMSRAconst {
3852			break
3853		}
3854		c := auxIntToInt32(v_1.AuxInt)
3855		y := v_1.Args[0]
3856		v.reset(OpARMCMPshiftRA)
3857		v.AuxInt = int32ToAuxInt(c)
3858		v.AddArg2(x, y)
3859		return true
3860	}
3861	// match: (CMP (SRAconst [c] y) x)
3862	// result: (InvertFlags (CMPshiftRA x y [c]))
3863	for {
3864		if v_0.Op != OpARMSRAconst {
3865			break
3866		}
3867		c := auxIntToInt32(v_0.AuxInt)
3868		y := v_0.Args[0]
3869		x := v_1
3870		v.reset(OpARMInvertFlags)
3871		v0 := b.NewValue0(v.Pos, OpARMCMPshiftRA, types.TypeFlags)
3872		v0.AuxInt = int32ToAuxInt(c)
3873		v0.AddArg2(x, y)
3874		v.AddArg(v0)
3875		return true
3876	}
3877	// match: (CMP x (SLL y z))
3878	// result: (CMPshiftLLreg x y z)
3879	for {
3880		x := v_0
3881		if v_1.Op != OpARMSLL {
3882			break
3883		}
3884		z := v_1.Args[1]
3885		y := v_1.Args[0]
3886		v.reset(OpARMCMPshiftLLreg)
3887		v.AddArg3(x, y, z)
3888		return true
3889	}
3890	// match: (CMP (SLL y z) x)
3891	// result: (InvertFlags (CMPshiftLLreg x y z))
3892	for {
3893		if v_0.Op != OpARMSLL {
3894			break
3895		}
3896		z := v_0.Args[1]
3897		y := v_0.Args[0]
3898		x := v_1
3899		v.reset(OpARMInvertFlags)
3900		v0 := b.NewValue0(v.Pos, OpARMCMPshiftLLreg, types.TypeFlags)
3901		v0.AddArg3(x, y, z)
3902		v.AddArg(v0)
3903		return true
3904	}
3905	// match: (CMP x (SRL y z))
3906	// result: (CMPshiftRLreg x y z)
3907	for {
3908		x := v_0
3909		if v_1.Op != OpARMSRL {
3910			break
3911		}
3912		z := v_1.Args[1]
3913		y := v_1.Args[0]
3914		v.reset(OpARMCMPshiftRLreg)
3915		v.AddArg3(x, y, z)
3916		return true
3917	}
3918	// match: (CMP (SRL y z) x)
3919	// result: (InvertFlags (CMPshiftRLreg x y z))
3920	for {
3921		if v_0.Op != OpARMSRL {
3922			break
3923		}
3924		z := v_0.Args[1]
3925		y := v_0.Args[0]
3926		x := v_1
3927		v.reset(OpARMInvertFlags)
3928		v0 := b.NewValue0(v.Pos, OpARMCMPshiftRLreg, types.TypeFlags)
3929		v0.AddArg3(x, y, z)
3930		v.AddArg(v0)
3931		return true
3932	}
3933	// match: (CMP x (SRA y z))
3934	// result: (CMPshiftRAreg x y z)
3935	for {
3936		x := v_0
3937		if v_1.Op != OpARMSRA {
3938			break
3939		}
3940		z := v_1.Args[1]
3941		y := v_1.Args[0]
3942		v.reset(OpARMCMPshiftRAreg)
3943		v.AddArg3(x, y, z)
3944		return true
3945	}
3946	// match: (CMP (SRA y z) x)
3947	// result: (InvertFlags (CMPshiftRAreg x y z))
3948	for {
3949		if v_0.Op != OpARMSRA {
3950			break
3951		}
3952		z := v_0.Args[1]
3953		y := v_0.Args[0]
3954		x := v_1
3955		v.reset(OpARMInvertFlags)
3956		v0 := b.NewValue0(v.Pos, OpARMCMPshiftRAreg, types.TypeFlags)
3957		v0.AddArg3(x, y, z)
3958		v.AddArg(v0)
3959		return true
3960	}
3961	return false
3962}
3963func rewriteValueARM_OpARMCMPD(v *Value) bool {
3964	v_1 := v.Args[1]
3965	v_0 := v.Args[0]
3966	// match: (CMPD x (MOVDconst [0]))
3967	// result: (CMPD0 x)
3968	for {
3969		x := v_0
3970		if v_1.Op != OpARMMOVDconst || auxIntToFloat64(v_1.AuxInt) != 0 {
3971			break
3972		}
3973		v.reset(OpARMCMPD0)
3974		v.AddArg(x)
3975		return true
3976	}
3977	return false
3978}
3979func rewriteValueARM_OpARMCMPF(v *Value) bool {
3980	v_1 := v.Args[1]
3981	v_0 := v.Args[0]
3982	// match: (CMPF x (MOVFconst [0]))
3983	// result: (CMPF0 x)
3984	for {
3985		x := v_0
3986		if v_1.Op != OpARMMOVFconst || auxIntToFloat64(v_1.AuxInt) != 0 {
3987			break
3988		}
3989		v.reset(OpARMCMPF0)
3990		v.AddArg(x)
3991		return true
3992	}
3993	return false
3994}
3995func rewriteValueARM_OpARMCMPconst(v *Value) bool {
3996	v_0 := v.Args[0]
3997	// match: (CMPconst (MOVWconst [x]) [y])
3998	// result: (FlagConstant [subFlags32(x,y)])
3999	for {
4000		y := auxIntToInt32(v.AuxInt)
4001		if v_0.Op != OpARMMOVWconst {
4002			break
4003		}
4004		x := auxIntToInt32(v_0.AuxInt)
4005		v.reset(OpARMFlagConstant)
4006		v.AuxInt = flagConstantToAuxInt(subFlags32(x, y))
4007		return true
4008	}
4009	// match: (CMPconst (MOVBUreg _) [c])
4010	// cond: 0xff < c
4011	// result: (FlagConstant [subFlags32(0, 1)])
4012	for {
4013		c := auxIntToInt32(v.AuxInt)
4014		if v_0.Op != OpARMMOVBUreg || !(0xff < c) {
4015			break
4016		}
4017		v.reset(OpARMFlagConstant)
4018		v.AuxInt = flagConstantToAuxInt(subFlags32(0, 1))
4019		return true
4020	}
4021	// match: (CMPconst (MOVHUreg _) [c])
4022	// cond: 0xffff < c
4023	// result: (FlagConstant [subFlags32(0, 1)])
4024	for {
4025		c := auxIntToInt32(v.AuxInt)
4026		if v_0.Op != OpARMMOVHUreg || !(0xffff < c) {
4027			break
4028		}
4029		v.reset(OpARMFlagConstant)
4030		v.AuxInt = flagConstantToAuxInt(subFlags32(0, 1))
4031		return true
4032	}
4033	// match: (CMPconst (ANDconst _ [m]) [n])
4034	// cond: 0 <= m && m < n
4035	// result: (FlagConstant [subFlags32(0, 1)])
4036	for {
4037		n := auxIntToInt32(v.AuxInt)
4038		if v_0.Op != OpARMANDconst {
4039			break
4040		}
4041		m := auxIntToInt32(v_0.AuxInt)
4042		if !(0 <= m && m < n) {
4043			break
4044		}
4045		v.reset(OpARMFlagConstant)
4046		v.AuxInt = flagConstantToAuxInt(subFlags32(0, 1))
4047		return true
4048	}
4049	// match: (CMPconst (SRLconst _ [c]) [n])
4050	// cond: 0 <= n && 0 < c && c <= 32 && (1<<uint32(32-c)) <= uint32(n)
4051	// result: (FlagConstant [subFlags32(0, 1)])
4052	for {
4053		n := auxIntToInt32(v.AuxInt)
4054		if v_0.Op != OpARMSRLconst {
4055			break
4056		}
4057		c := auxIntToInt32(v_0.AuxInt)
4058		if !(0 <= n && 0 < c && c <= 32 && (1<<uint32(32-c)) <= uint32(n)) {
4059			break
4060		}
4061		v.reset(OpARMFlagConstant)
4062		v.AuxInt = flagConstantToAuxInt(subFlags32(0, 1))
4063		return true
4064	}
4065	return false
4066}
4067func rewriteValueARM_OpARMCMPshiftLL(v *Value) bool {
4068	v_1 := v.Args[1]
4069	v_0 := v.Args[0]
4070	b := v.Block
4071	// match: (CMPshiftLL (MOVWconst [c]) x [d])
4072	// result: (InvertFlags (CMPconst [c] (SLLconst <x.Type> x [d])))
4073	for {
4074		d := auxIntToInt32(v.AuxInt)
4075		if v_0.Op != OpARMMOVWconst {
4076			break
4077		}
4078		c := auxIntToInt32(v_0.AuxInt)
4079		x := v_1
4080		v.reset(OpARMInvertFlags)
4081		v0 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
4082		v0.AuxInt = int32ToAuxInt(c)
4083		v1 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
4084		v1.AuxInt = int32ToAuxInt(d)
4085		v1.AddArg(x)
4086		v0.AddArg(v1)
4087		v.AddArg(v0)
4088		return true
4089	}
4090	// match: (CMPshiftLL x (MOVWconst [c]) [d])
4091	// result: (CMPconst x [c<<uint64(d)])
4092	for {
4093		d := auxIntToInt32(v.AuxInt)
4094		x := v_0
4095		if v_1.Op != OpARMMOVWconst {
4096			break
4097		}
4098		c := auxIntToInt32(v_1.AuxInt)
4099		v.reset(OpARMCMPconst)
4100		v.AuxInt = int32ToAuxInt(c << uint64(d))
4101		v.AddArg(x)
4102		return true
4103	}
4104	return false
4105}
4106func rewriteValueARM_OpARMCMPshiftLLreg(v *Value) bool {
4107	v_2 := v.Args[2]
4108	v_1 := v.Args[1]
4109	v_0 := v.Args[0]
4110	b := v.Block
4111	// match: (CMPshiftLLreg (MOVWconst [c]) x y)
4112	// result: (InvertFlags (CMPconst [c] (SLL <x.Type> x y)))
4113	for {
4114		if v_0.Op != OpARMMOVWconst {
4115			break
4116		}
4117		c := auxIntToInt32(v_0.AuxInt)
4118		x := v_1
4119		y := v_2
4120		v.reset(OpARMInvertFlags)
4121		v0 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
4122		v0.AuxInt = int32ToAuxInt(c)
4123		v1 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
4124		v1.AddArg2(x, y)
4125		v0.AddArg(v1)
4126		v.AddArg(v0)
4127		return true
4128	}
4129	// match: (CMPshiftLLreg x y (MOVWconst [c]))
4130	// cond: 0 <= c && c < 32
4131	// result: (CMPshiftLL x y [c])
4132	for {
4133		x := v_0
4134		y := v_1
4135		if v_2.Op != OpARMMOVWconst {
4136			break
4137		}
4138		c := auxIntToInt32(v_2.AuxInt)
4139		if !(0 <= c && c < 32) {
4140			break
4141		}
4142		v.reset(OpARMCMPshiftLL)
4143		v.AuxInt = int32ToAuxInt(c)
4144		v.AddArg2(x, y)
4145		return true
4146	}
4147	return false
4148}
4149func rewriteValueARM_OpARMCMPshiftRA(v *Value) bool {
4150	v_1 := v.Args[1]
4151	v_0 := v.Args[0]
4152	b := v.Block
4153	// match: (CMPshiftRA (MOVWconst [c]) x [d])
4154	// result: (InvertFlags (CMPconst [c] (SRAconst <x.Type> x [d])))
4155	for {
4156		d := auxIntToInt32(v.AuxInt)
4157		if v_0.Op != OpARMMOVWconst {
4158			break
4159		}
4160		c := auxIntToInt32(v_0.AuxInt)
4161		x := v_1
4162		v.reset(OpARMInvertFlags)
4163		v0 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
4164		v0.AuxInt = int32ToAuxInt(c)
4165		v1 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
4166		v1.AuxInt = int32ToAuxInt(d)
4167		v1.AddArg(x)
4168		v0.AddArg(v1)
4169		v.AddArg(v0)
4170		return true
4171	}
4172	// match: (CMPshiftRA x (MOVWconst [c]) [d])
4173	// result: (CMPconst x [c>>uint64(d)])
4174	for {
4175		d := auxIntToInt32(v.AuxInt)
4176		x := v_0
4177		if v_1.Op != OpARMMOVWconst {
4178			break
4179		}
4180		c := auxIntToInt32(v_1.AuxInt)
4181		v.reset(OpARMCMPconst)
4182		v.AuxInt = int32ToAuxInt(c >> uint64(d))
4183		v.AddArg(x)
4184		return true
4185	}
4186	return false
4187}
4188func rewriteValueARM_OpARMCMPshiftRAreg(v *Value) bool {
4189	v_2 := v.Args[2]
4190	v_1 := v.Args[1]
4191	v_0 := v.Args[0]
4192	b := v.Block
4193	// match: (CMPshiftRAreg (MOVWconst [c]) x y)
4194	// result: (InvertFlags (CMPconst [c] (SRA <x.Type> x y)))
4195	for {
4196		if v_0.Op != OpARMMOVWconst {
4197			break
4198		}
4199		c := auxIntToInt32(v_0.AuxInt)
4200		x := v_1
4201		y := v_2
4202		v.reset(OpARMInvertFlags)
4203		v0 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
4204		v0.AuxInt = int32ToAuxInt(c)
4205		v1 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
4206		v1.AddArg2(x, y)
4207		v0.AddArg(v1)
4208		v.AddArg(v0)
4209		return true
4210	}
4211	// match: (CMPshiftRAreg x y (MOVWconst [c]))
4212	// cond: 0 <= c && c < 32
4213	// result: (CMPshiftRA x y [c])
4214	for {
4215		x := v_0
4216		y := v_1
4217		if v_2.Op != OpARMMOVWconst {
4218			break
4219		}
4220		c := auxIntToInt32(v_2.AuxInt)
4221		if !(0 <= c && c < 32) {
4222			break
4223		}
4224		v.reset(OpARMCMPshiftRA)
4225		v.AuxInt = int32ToAuxInt(c)
4226		v.AddArg2(x, y)
4227		return true
4228	}
4229	return false
4230}
4231func rewriteValueARM_OpARMCMPshiftRL(v *Value) bool {
4232	v_1 := v.Args[1]
4233	v_0 := v.Args[0]
4234	b := v.Block
4235	// match: (CMPshiftRL (MOVWconst [c]) x [d])
4236	// result: (InvertFlags (CMPconst [c] (SRLconst <x.Type> x [d])))
4237	for {
4238		d := auxIntToInt32(v.AuxInt)
4239		if v_0.Op != OpARMMOVWconst {
4240			break
4241		}
4242		c := auxIntToInt32(v_0.AuxInt)
4243		x := v_1
4244		v.reset(OpARMInvertFlags)
4245		v0 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
4246		v0.AuxInt = int32ToAuxInt(c)
4247		v1 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
4248		v1.AuxInt = int32ToAuxInt(d)
4249		v1.AddArg(x)
4250		v0.AddArg(v1)
4251		v.AddArg(v0)
4252		return true
4253	}
4254	// match: (CMPshiftRL x (MOVWconst [c]) [d])
4255	// result: (CMPconst x [int32(uint32(c)>>uint64(d))])
4256	for {
4257		d := auxIntToInt32(v.AuxInt)
4258		x := v_0
4259		if v_1.Op != OpARMMOVWconst {
4260			break
4261		}
4262		c := auxIntToInt32(v_1.AuxInt)
4263		v.reset(OpARMCMPconst)
4264		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
4265		v.AddArg(x)
4266		return true
4267	}
4268	return false
4269}
4270func rewriteValueARM_OpARMCMPshiftRLreg(v *Value) bool {
4271	v_2 := v.Args[2]
4272	v_1 := v.Args[1]
4273	v_0 := v.Args[0]
4274	b := v.Block
4275	// match: (CMPshiftRLreg (MOVWconst [c]) x y)
4276	// result: (InvertFlags (CMPconst [c] (SRL <x.Type> x y)))
4277	for {
4278		if v_0.Op != OpARMMOVWconst {
4279			break
4280		}
4281		c := auxIntToInt32(v_0.AuxInt)
4282		x := v_1
4283		y := v_2
4284		v.reset(OpARMInvertFlags)
4285		v0 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
4286		v0.AuxInt = int32ToAuxInt(c)
4287		v1 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
4288		v1.AddArg2(x, y)
4289		v0.AddArg(v1)
4290		v.AddArg(v0)
4291		return true
4292	}
4293	// match: (CMPshiftRLreg x y (MOVWconst [c]))
4294	// cond: 0 <= c && c < 32
4295	// result: (CMPshiftRL x y [c])
4296	for {
4297		x := v_0
4298		y := v_1
4299		if v_2.Op != OpARMMOVWconst {
4300			break
4301		}
4302		c := auxIntToInt32(v_2.AuxInt)
4303		if !(0 <= c && c < 32) {
4304			break
4305		}
4306		v.reset(OpARMCMPshiftRL)
4307		v.AuxInt = int32ToAuxInt(c)
4308		v.AddArg2(x, y)
4309		return true
4310	}
4311	return false
4312}
4313func rewriteValueARM_OpARMEqual(v *Value) bool {
4314	v_0 := v.Args[0]
4315	// match: (Equal (FlagConstant [fc]))
4316	// result: (MOVWconst [b2i32(fc.eq())])
4317	for {
4318		if v_0.Op != OpARMFlagConstant {
4319			break
4320		}
4321		fc := auxIntToFlagConstant(v_0.AuxInt)
4322		v.reset(OpARMMOVWconst)
4323		v.AuxInt = int32ToAuxInt(b2i32(fc.eq()))
4324		return true
4325	}
4326	// match: (Equal (InvertFlags x))
4327	// result: (Equal x)
4328	for {
4329		if v_0.Op != OpARMInvertFlags {
4330			break
4331		}
4332		x := v_0.Args[0]
4333		v.reset(OpARMEqual)
4334		v.AddArg(x)
4335		return true
4336	}
4337	return false
4338}
4339func rewriteValueARM_OpARMGreaterEqual(v *Value) bool {
4340	v_0 := v.Args[0]
4341	// match: (GreaterEqual (FlagConstant [fc]))
4342	// result: (MOVWconst [b2i32(fc.ge())])
4343	for {
4344		if v_0.Op != OpARMFlagConstant {
4345			break
4346		}
4347		fc := auxIntToFlagConstant(v_0.AuxInt)
4348		v.reset(OpARMMOVWconst)
4349		v.AuxInt = int32ToAuxInt(b2i32(fc.ge()))
4350		return true
4351	}
4352	// match: (GreaterEqual (InvertFlags x))
4353	// result: (LessEqual x)
4354	for {
4355		if v_0.Op != OpARMInvertFlags {
4356			break
4357		}
4358		x := v_0.Args[0]
4359		v.reset(OpARMLessEqual)
4360		v.AddArg(x)
4361		return true
4362	}
4363	return false
4364}
4365func rewriteValueARM_OpARMGreaterEqualU(v *Value) bool {
4366	v_0 := v.Args[0]
4367	// match: (GreaterEqualU (FlagConstant [fc]))
4368	// result: (MOVWconst [b2i32(fc.uge())])
4369	for {
4370		if v_0.Op != OpARMFlagConstant {
4371			break
4372		}
4373		fc := auxIntToFlagConstant(v_0.AuxInt)
4374		v.reset(OpARMMOVWconst)
4375		v.AuxInt = int32ToAuxInt(b2i32(fc.uge()))
4376		return true
4377	}
4378	// match: (GreaterEqualU (InvertFlags x))
4379	// result: (LessEqualU x)
4380	for {
4381		if v_0.Op != OpARMInvertFlags {
4382			break
4383		}
4384		x := v_0.Args[0]
4385		v.reset(OpARMLessEqualU)
4386		v.AddArg(x)
4387		return true
4388	}
4389	return false
4390}
4391func rewriteValueARM_OpARMGreaterThan(v *Value) bool {
4392	v_0 := v.Args[0]
4393	// match: (GreaterThan (FlagConstant [fc]))
4394	// result: (MOVWconst [b2i32(fc.gt())])
4395	for {
4396		if v_0.Op != OpARMFlagConstant {
4397			break
4398		}
4399		fc := auxIntToFlagConstant(v_0.AuxInt)
4400		v.reset(OpARMMOVWconst)
4401		v.AuxInt = int32ToAuxInt(b2i32(fc.gt()))
4402		return true
4403	}
4404	// match: (GreaterThan (InvertFlags x))
4405	// result: (LessThan x)
4406	for {
4407		if v_0.Op != OpARMInvertFlags {
4408			break
4409		}
4410		x := v_0.Args[0]
4411		v.reset(OpARMLessThan)
4412		v.AddArg(x)
4413		return true
4414	}
4415	return false
4416}
4417func rewriteValueARM_OpARMGreaterThanU(v *Value) bool {
4418	v_0 := v.Args[0]
4419	// match: (GreaterThanU (FlagConstant [fc]))
4420	// result: (MOVWconst [b2i32(fc.ugt())])
4421	for {
4422		if v_0.Op != OpARMFlagConstant {
4423			break
4424		}
4425		fc := auxIntToFlagConstant(v_0.AuxInt)
4426		v.reset(OpARMMOVWconst)
4427		v.AuxInt = int32ToAuxInt(b2i32(fc.ugt()))
4428		return true
4429	}
4430	// match: (GreaterThanU (InvertFlags x))
4431	// result: (LessThanU x)
4432	for {
4433		if v_0.Op != OpARMInvertFlags {
4434			break
4435		}
4436		x := v_0.Args[0]
4437		v.reset(OpARMLessThanU)
4438		v.AddArg(x)
4439		return true
4440	}
4441	return false
4442}
4443func rewriteValueARM_OpARMLessEqual(v *Value) bool {
4444	v_0 := v.Args[0]
4445	// match: (LessEqual (FlagConstant [fc]))
4446	// result: (MOVWconst [b2i32(fc.le())])
4447	for {
4448		if v_0.Op != OpARMFlagConstant {
4449			break
4450		}
4451		fc := auxIntToFlagConstant(v_0.AuxInt)
4452		v.reset(OpARMMOVWconst)
4453		v.AuxInt = int32ToAuxInt(b2i32(fc.le()))
4454		return true
4455	}
4456	// match: (LessEqual (InvertFlags x))
4457	// result: (GreaterEqual x)
4458	for {
4459		if v_0.Op != OpARMInvertFlags {
4460			break
4461		}
4462		x := v_0.Args[0]
4463		v.reset(OpARMGreaterEqual)
4464		v.AddArg(x)
4465		return true
4466	}
4467	return false
4468}
4469func rewriteValueARM_OpARMLessEqualU(v *Value) bool {
4470	v_0 := v.Args[0]
4471	// match: (LessEqualU (FlagConstant [fc]))
4472	// result: (MOVWconst [b2i32(fc.ule())])
4473	for {
4474		if v_0.Op != OpARMFlagConstant {
4475			break
4476		}
4477		fc := auxIntToFlagConstant(v_0.AuxInt)
4478		v.reset(OpARMMOVWconst)
4479		v.AuxInt = int32ToAuxInt(b2i32(fc.ule()))
4480		return true
4481	}
4482	// match: (LessEqualU (InvertFlags x))
4483	// result: (GreaterEqualU x)
4484	for {
4485		if v_0.Op != OpARMInvertFlags {
4486			break
4487		}
4488		x := v_0.Args[0]
4489		v.reset(OpARMGreaterEqualU)
4490		v.AddArg(x)
4491		return true
4492	}
4493	return false
4494}
4495func rewriteValueARM_OpARMLessThan(v *Value) bool {
4496	v_0 := v.Args[0]
4497	// match: (LessThan (FlagConstant [fc]))
4498	// result: (MOVWconst [b2i32(fc.lt())])
4499	for {
4500		if v_0.Op != OpARMFlagConstant {
4501			break
4502		}
4503		fc := auxIntToFlagConstant(v_0.AuxInt)
4504		v.reset(OpARMMOVWconst)
4505		v.AuxInt = int32ToAuxInt(b2i32(fc.lt()))
4506		return true
4507	}
4508	// match: (LessThan (InvertFlags x))
4509	// result: (GreaterThan x)
4510	for {
4511		if v_0.Op != OpARMInvertFlags {
4512			break
4513		}
4514		x := v_0.Args[0]
4515		v.reset(OpARMGreaterThan)
4516		v.AddArg(x)
4517		return true
4518	}
4519	return false
4520}
4521func rewriteValueARM_OpARMLessThanU(v *Value) bool {
4522	v_0 := v.Args[0]
4523	// match: (LessThanU (FlagConstant [fc]))
4524	// result: (MOVWconst [b2i32(fc.ult())])
4525	for {
4526		if v_0.Op != OpARMFlagConstant {
4527			break
4528		}
4529		fc := auxIntToFlagConstant(v_0.AuxInt)
4530		v.reset(OpARMMOVWconst)
4531		v.AuxInt = int32ToAuxInt(b2i32(fc.ult()))
4532		return true
4533	}
4534	// match: (LessThanU (InvertFlags x))
4535	// result: (GreaterThanU x)
4536	for {
4537		if v_0.Op != OpARMInvertFlags {
4538			break
4539		}
4540		x := v_0.Args[0]
4541		v.reset(OpARMGreaterThanU)
4542		v.AddArg(x)
4543		return true
4544	}
4545	return false
4546}
4547func rewriteValueARM_OpARMMOVBUload(v *Value) bool {
4548	v_1 := v.Args[1]
4549	v_0 := v.Args[0]
4550	// match: (MOVBUload [off1] {sym} (ADDconst [off2] ptr) mem)
4551	// result: (MOVBUload [off1+off2] {sym} ptr mem)
4552	for {
4553		off1 := auxIntToInt32(v.AuxInt)
4554		sym := auxToSym(v.Aux)
4555		if v_0.Op != OpARMADDconst {
4556			break
4557		}
4558		off2 := auxIntToInt32(v_0.AuxInt)
4559		ptr := v_0.Args[0]
4560		mem := v_1
4561		v.reset(OpARMMOVBUload)
4562		v.AuxInt = int32ToAuxInt(off1 + off2)
4563		v.Aux = symToAux(sym)
4564		v.AddArg2(ptr, mem)
4565		return true
4566	}
4567	// match: (MOVBUload [off1] {sym} (SUBconst [off2] ptr) mem)
4568	// result: (MOVBUload [off1-off2] {sym} ptr mem)
4569	for {
4570		off1 := auxIntToInt32(v.AuxInt)
4571		sym := auxToSym(v.Aux)
4572		if v_0.Op != OpARMSUBconst {
4573			break
4574		}
4575		off2 := auxIntToInt32(v_0.AuxInt)
4576		ptr := v_0.Args[0]
4577		mem := v_1
4578		v.reset(OpARMMOVBUload)
4579		v.AuxInt = int32ToAuxInt(off1 - off2)
4580		v.Aux = symToAux(sym)
4581		v.AddArg2(ptr, mem)
4582		return true
4583	}
4584	// match: (MOVBUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
4585	// cond: canMergeSym(sym1,sym2)
4586	// result: (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
4587	for {
4588		off1 := auxIntToInt32(v.AuxInt)
4589		sym1 := auxToSym(v.Aux)
4590		if v_0.Op != OpARMMOVWaddr {
4591			break
4592		}
4593		off2 := auxIntToInt32(v_0.AuxInt)
4594		sym2 := auxToSym(v_0.Aux)
4595		ptr := v_0.Args[0]
4596		mem := v_1
4597		if !(canMergeSym(sym1, sym2)) {
4598			break
4599		}
4600		v.reset(OpARMMOVBUload)
4601		v.AuxInt = int32ToAuxInt(off1 + off2)
4602		v.Aux = symToAux(mergeSym(sym1, sym2))
4603		v.AddArg2(ptr, mem)
4604		return true
4605	}
4606	// match: (MOVBUload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
4607	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
4608	// result: (MOVBUreg x)
4609	for {
4610		off := auxIntToInt32(v.AuxInt)
4611		sym := auxToSym(v.Aux)
4612		ptr := v_0
4613		if v_1.Op != OpARMMOVBstore {
4614			break
4615		}
4616		off2 := auxIntToInt32(v_1.AuxInt)
4617		sym2 := auxToSym(v_1.Aux)
4618		x := v_1.Args[1]
4619		ptr2 := v_1.Args[0]
4620		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
4621			break
4622		}
4623		v.reset(OpARMMOVBUreg)
4624		v.AddArg(x)
4625		return true
4626	}
4627	// match: (MOVBUload [0] {sym} (ADD ptr idx) mem)
4628	// cond: sym == nil
4629	// result: (MOVBUloadidx ptr idx mem)
4630	for {
4631		if auxIntToInt32(v.AuxInt) != 0 {
4632			break
4633		}
4634		sym := auxToSym(v.Aux)
4635		if v_0.Op != OpARMADD {
4636			break
4637		}
4638		idx := v_0.Args[1]
4639		ptr := v_0.Args[0]
4640		mem := v_1
4641		if !(sym == nil) {
4642			break
4643		}
4644		v.reset(OpARMMOVBUloadidx)
4645		v.AddArg3(ptr, idx, mem)
4646		return true
4647	}
4648	// match: (MOVBUload [off] {sym} (SB) _)
4649	// cond: symIsRO(sym)
4650	// result: (MOVWconst [int32(read8(sym, int64(off)))])
4651	for {
4652		off := auxIntToInt32(v.AuxInt)
4653		sym := auxToSym(v.Aux)
4654		if v_0.Op != OpSB || !(symIsRO(sym)) {
4655			break
4656		}
4657		v.reset(OpARMMOVWconst)
4658		v.AuxInt = int32ToAuxInt(int32(read8(sym, int64(off))))
4659		return true
4660	}
4661	return false
4662}
4663func rewriteValueARM_OpARMMOVBUloadidx(v *Value) bool {
4664	v_2 := v.Args[2]
4665	v_1 := v.Args[1]
4666	v_0 := v.Args[0]
4667	// match: (MOVBUloadidx ptr idx (MOVBstoreidx ptr2 idx x _))
4668	// cond: isSamePtr(ptr, ptr2)
4669	// result: (MOVBUreg x)
4670	for {
4671		ptr := v_0
4672		idx := v_1
4673		if v_2.Op != OpARMMOVBstoreidx {
4674			break
4675		}
4676		x := v_2.Args[2]
4677		ptr2 := v_2.Args[0]
4678		if idx != v_2.Args[1] || !(isSamePtr(ptr, ptr2)) {
4679			break
4680		}
4681		v.reset(OpARMMOVBUreg)
4682		v.AddArg(x)
4683		return true
4684	}
4685	// match: (MOVBUloadidx ptr (MOVWconst [c]) mem)
4686	// result: (MOVBUload [c] ptr mem)
4687	for {
4688		ptr := v_0
4689		if v_1.Op != OpARMMOVWconst {
4690			break
4691		}
4692		c := auxIntToInt32(v_1.AuxInt)
4693		mem := v_2
4694		v.reset(OpARMMOVBUload)
4695		v.AuxInt = int32ToAuxInt(c)
4696		v.AddArg2(ptr, mem)
4697		return true
4698	}
4699	// match: (MOVBUloadidx (MOVWconst [c]) ptr mem)
4700	// result: (MOVBUload [c] ptr mem)
4701	for {
4702		if v_0.Op != OpARMMOVWconst {
4703			break
4704		}
4705		c := auxIntToInt32(v_0.AuxInt)
4706		ptr := v_1
4707		mem := v_2
4708		v.reset(OpARMMOVBUload)
4709		v.AuxInt = int32ToAuxInt(c)
4710		v.AddArg2(ptr, mem)
4711		return true
4712	}
4713	return false
4714}
4715func rewriteValueARM_OpARMMOVBUreg(v *Value) bool {
4716	v_0 := v.Args[0]
4717	// match: (MOVBUreg x:(MOVBUload _ _))
4718	// result: (MOVWreg x)
4719	for {
4720		x := v_0
4721		if x.Op != OpARMMOVBUload {
4722			break
4723		}
4724		v.reset(OpARMMOVWreg)
4725		v.AddArg(x)
4726		return true
4727	}
4728	// match: (MOVBUreg (ANDconst [c] x))
4729	// result: (ANDconst [c&0xff] x)
4730	for {
4731		if v_0.Op != OpARMANDconst {
4732			break
4733		}
4734		c := auxIntToInt32(v_0.AuxInt)
4735		x := v_0.Args[0]
4736		v.reset(OpARMANDconst)
4737		v.AuxInt = int32ToAuxInt(c & 0xff)
4738		v.AddArg(x)
4739		return true
4740	}
4741	// match: (MOVBUreg x:(MOVBUreg _))
4742	// result: (MOVWreg x)
4743	for {
4744		x := v_0
4745		if x.Op != OpARMMOVBUreg {
4746			break
4747		}
4748		v.reset(OpARMMOVWreg)
4749		v.AddArg(x)
4750		return true
4751	}
4752	// match: (MOVBUreg (MOVWconst [c]))
4753	// result: (MOVWconst [int32(uint8(c))])
4754	for {
4755		if v_0.Op != OpARMMOVWconst {
4756			break
4757		}
4758		c := auxIntToInt32(v_0.AuxInt)
4759		v.reset(OpARMMOVWconst)
4760		v.AuxInt = int32ToAuxInt(int32(uint8(c)))
4761		return true
4762	}
4763	return false
4764}
4765func rewriteValueARM_OpARMMOVBload(v *Value) bool {
4766	v_1 := v.Args[1]
4767	v_0 := v.Args[0]
4768	// match: (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem)
4769	// result: (MOVBload [off1+off2] {sym} ptr mem)
4770	for {
4771		off1 := auxIntToInt32(v.AuxInt)
4772		sym := auxToSym(v.Aux)
4773		if v_0.Op != OpARMADDconst {
4774			break
4775		}
4776		off2 := auxIntToInt32(v_0.AuxInt)
4777		ptr := v_0.Args[0]
4778		mem := v_1
4779		v.reset(OpARMMOVBload)
4780		v.AuxInt = int32ToAuxInt(off1 + off2)
4781		v.Aux = symToAux(sym)
4782		v.AddArg2(ptr, mem)
4783		return true
4784	}
4785	// match: (MOVBload [off1] {sym} (SUBconst [off2] ptr) mem)
4786	// result: (MOVBload [off1-off2] {sym} ptr mem)
4787	for {
4788		off1 := auxIntToInt32(v.AuxInt)
4789		sym := auxToSym(v.Aux)
4790		if v_0.Op != OpARMSUBconst {
4791			break
4792		}
4793		off2 := auxIntToInt32(v_0.AuxInt)
4794		ptr := v_0.Args[0]
4795		mem := v_1
4796		v.reset(OpARMMOVBload)
4797		v.AuxInt = int32ToAuxInt(off1 - off2)
4798		v.Aux = symToAux(sym)
4799		v.AddArg2(ptr, mem)
4800		return true
4801	}
4802	// match: (MOVBload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
4803	// cond: canMergeSym(sym1,sym2)
4804	// result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
4805	for {
4806		off1 := auxIntToInt32(v.AuxInt)
4807		sym1 := auxToSym(v.Aux)
4808		if v_0.Op != OpARMMOVWaddr {
4809			break
4810		}
4811		off2 := auxIntToInt32(v_0.AuxInt)
4812		sym2 := auxToSym(v_0.Aux)
4813		ptr := v_0.Args[0]
4814		mem := v_1
4815		if !(canMergeSym(sym1, sym2)) {
4816			break
4817		}
4818		v.reset(OpARMMOVBload)
4819		v.AuxInt = int32ToAuxInt(off1 + off2)
4820		v.Aux = symToAux(mergeSym(sym1, sym2))
4821		v.AddArg2(ptr, mem)
4822		return true
4823	}
4824	// match: (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
4825	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
4826	// result: (MOVBreg x)
4827	for {
4828		off := auxIntToInt32(v.AuxInt)
4829		sym := auxToSym(v.Aux)
4830		ptr := v_0
4831		if v_1.Op != OpARMMOVBstore {
4832			break
4833		}
4834		off2 := auxIntToInt32(v_1.AuxInt)
4835		sym2 := auxToSym(v_1.Aux)
4836		x := v_1.Args[1]
4837		ptr2 := v_1.Args[0]
4838		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
4839			break
4840		}
4841		v.reset(OpARMMOVBreg)
4842		v.AddArg(x)
4843		return true
4844	}
4845	// match: (MOVBload [0] {sym} (ADD ptr idx) mem)
4846	// cond: sym == nil
4847	// result: (MOVBloadidx ptr idx mem)
4848	for {
4849		if auxIntToInt32(v.AuxInt) != 0 {
4850			break
4851		}
4852		sym := auxToSym(v.Aux)
4853		if v_0.Op != OpARMADD {
4854			break
4855		}
4856		idx := v_0.Args[1]
4857		ptr := v_0.Args[0]
4858		mem := v_1
4859		if !(sym == nil) {
4860			break
4861		}
4862		v.reset(OpARMMOVBloadidx)
4863		v.AddArg3(ptr, idx, mem)
4864		return true
4865	}
4866	return false
4867}
4868func rewriteValueARM_OpARMMOVBloadidx(v *Value) bool {
4869	v_2 := v.Args[2]
4870	v_1 := v.Args[1]
4871	v_0 := v.Args[0]
4872	// match: (MOVBloadidx ptr idx (MOVBstoreidx ptr2 idx x _))
4873	// cond: isSamePtr(ptr, ptr2)
4874	// result: (MOVBreg x)
4875	for {
4876		ptr := v_0
4877		idx := v_1
4878		if v_2.Op != OpARMMOVBstoreidx {
4879			break
4880		}
4881		x := v_2.Args[2]
4882		ptr2 := v_2.Args[0]
4883		if idx != v_2.Args[1] || !(isSamePtr(ptr, ptr2)) {
4884			break
4885		}
4886		v.reset(OpARMMOVBreg)
4887		v.AddArg(x)
4888		return true
4889	}
4890	// match: (MOVBloadidx ptr (MOVWconst [c]) mem)
4891	// result: (MOVBload [c] ptr mem)
4892	for {
4893		ptr := v_0
4894		if v_1.Op != OpARMMOVWconst {
4895			break
4896		}
4897		c := auxIntToInt32(v_1.AuxInt)
4898		mem := v_2
4899		v.reset(OpARMMOVBload)
4900		v.AuxInt = int32ToAuxInt(c)
4901		v.AddArg2(ptr, mem)
4902		return true
4903	}
4904	// match: (MOVBloadidx (MOVWconst [c]) ptr mem)
4905	// result: (MOVBload [c] ptr mem)
4906	for {
4907		if v_0.Op != OpARMMOVWconst {
4908			break
4909		}
4910		c := auxIntToInt32(v_0.AuxInt)
4911		ptr := v_1
4912		mem := v_2
4913		v.reset(OpARMMOVBload)
4914		v.AuxInt = int32ToAuxInt(c)
4915		v.AddArg2(ptr, mem)
4916		return true
4917	}
4918	return false
4919}
4920func rewriteValueARM_OpARMMOVBreg(v *Value) bool {
4921	v_0 := v.Args[0]
4922	// match: (MOVBreg x:(MOVBload _ _))
4923	// result: (MOVWreg x)
4924	for {
4925		x := v_0
4926		if x.Op != OpARMMOVBload {
4927			break
4928		}
4929		v.reset(OpARMMOVWreg)
4930		v.AddArg(x)
4931		return true
4932	}
4933	// match: (MOVBreg (ANDconst [c] x))
4934	// cond: c & 0x80 == 0
4935	// result: (ANDconst [c&0x7f] x)
4936	for {
4937		if v_0.Op != OpARMANDconst {
4938			break
4939		}
4940		c := auxIntToInt32(v_0.AuxInt)
4941		x := v_0.Args[0]
4942		if !(c&0x80 == 0) {
4943			break
4944		}
4945		v.reset(OpARMANDconst)
4946		v.AuxInt = int32ToAuxInt(c & 0x7f)
4947		v.AddArg(x)
4948		return true
4949	}
4950	// match: (MOVBreg x:(MOVBreg _))
4951	// result: (MOVWreg x)
4952	for {
4953		x := v_0
4954		if x.Op != OpARMMOVBreg {
4955			break
4956		}
4957		v.reset(OpARMMOVWreg)
4958		v.AddArg(x)
4959		return true
4960	}
4961	// match: (MOVBreg (MOVWconst [c]))
4962	// result: (MOVWconst [int32(int8(c))])
4963	for {
4964		if v_0.Op != OpARMMOVWconst {
4965			break
4966		}
4967		c := auxIntToInt32(v_0.AuxInt)
4968		v.reset(OpARMMOVWconst)
4969		v.AuxInt = int32ToAuxInt(int32(int8(c)))
4970		return true
4971	}
4972	return false
4973}
4974func rewriteValueARM_OpARMMOVBstore(v *Value) bool {
4975	v_2 := v.Args[2]
4976	v_1 := v.Args[1]
4977	v_0 := v.Args[0]
4978	// match: (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem)
4979	// result: (MOVBstore [off1+off2] {sym} ptr val mem)
4980	for {
4981		off1 := auxIntToInt32(v.AuxInt)
4982		sym := auxToSym(v.Aux)
4983		if v_0.Op != OpARMADDconst {
4984			break
4985		}
4986		off2 := auxIntToInt32(v_0.AuxInt)
4987		ptr := v_0.Args[0]
4988		val := v_1
4989		mem := v_2
4990		v.reset(OpARMMOVBstore)
4991		v.AuxInt = int32ToAuxInt(off1 + off2)
4992		v.Aux = symToAux(sym)
4993		v.AddArg3(ptr, val, mem)
4994		return true
4995	}
4996	// match: (MOVBstore [off1] {sym} (SUBconst [off2] ptr) val mem)
4997	// result: (MOVBstore [off1-off2] {sym} ptr val mem)
4998	for {
4999		off1 := auxIntToInt32(v.AuxInt)
5000		sym := auxToSym(v.Aux)
5001		if v_0.Op != OpARMSUBconst {
5002			break
5003		}
5004		off2 := auxIntToInt32(v_0.AuxInt)
5005		ptr := v_0.Args[0]
5006		val := v_1
5007		mem := v_2
5008		v.reset(OpARMMOVBstore)
5009		v.AuxInt = int32ToAuxInt(off1 - off2)
5010		v.Aux = symToAux(sym)
5011		v.AddArg3(ptr, val, mem)
5012		return true
5013	}
5014	// match: (MOVBstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
5015	// cond: canMergeSym(sym1,sym2)
5016	// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
5017	for {
5018		off1 := auxIntToInt32(v.AuxInt)
5019		sym1 := auxToSym(v.Aux)
5020		if v_0.Op != OpARMMOVWaddr {
5021			break
5022		}
5023		off2 := auxIntToInt32(v_0.AuxInt)
5024		sym2 := auxToSym(v_0.Aux)
5025		ptr := v_0.Args[0]
5026		val := v_1
5027		mem := v_2
5028		if !(canMergeSym(sym1, sym2)) {
5029			break
5030		}
5031		v.reset(OpARMMOVBstore)
5032		v.AuxInt = int32ToAuxInt(off1 + off2)
5033		v.Aux = symToAux(mergeSym(sym1, sym2))
5034		v.AddArg3(ptr, val, mem)
5035		return true
5036	}
5037	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
5038	// result: (MOVBstore [off] {sym} ptr x mem)
5039	for {
5040		off := auxIntToInt32(v.AuxInt)
5041		sym := auxToSym(v.Aux)
5042		ptr := v_0
5043		if v_1.Op != OpARMMOVBreg {
5044			break
5045		}
5046		x := v_1.Args[0]
5047		mem := v_2
5048		v.reset(OpARMMOVBstore)
5049		v.AuxInt = int32ToAuxInt(off)
5050		v.Aux = symToAux(sym)
5051		v.AddArg3(ptr, x, mem)
5052		return true
5053	}
5054	// match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem)
5055	// result: (MOVBstore [off] {sym} ptr x mem)
5056	for {
5057		off := auxIntToInt32(v.AuxInt)
5058		sym := auxToSym(v.Aux)
5059		ptr := v_0
5060		if v_1.Op != OpARMMOVBUreg {
5061			break
5062		}
5063		x := v_1.Args[0]
5064		mem := v_2
5065		v.reset(OpARMMOVBstore)
5066		v.AuxInt = int32ToAuxInt(off)
5067		v.Aux = symToAux(sym)
5068		v.AddArg3(ptr, x, mem)
5069		return true
5070	}
5071	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
5072	// result: (MOVBstore [off] {sym} ptr x mem)
5073	for {
5074		off := auxIntToInt32(v.AuxInt)
5075		sym := auxToSym(v.Aux)
5076		ptr := v_0
5077		if v_1.Op != OpARMMOVHreg {
5078			break
5079		}
5080		x := v_1.Args[0]
5081		mem := v_2
5082		v.reset(OpARMMOVBstore)
5083		v.AuxInt = int32ToAuxInt(off)
5084		v.Aux = symToAux(sym)
5085		v.AddArg3(ptr, x, mem)
5086		return true
5087	}
5088	// match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem)
5089	// result: (MOVBstore [off] {sym} ptr x mem)
5090	for {
5091		off := auxIntToInt32(v.AuxInt)
5092		sym := auxToSym(v.Aux)
5093		ptr := v_0
5094		if v_1.Op != OpARMMOVHUreg {
5095			break
5096		}
5097		x := v_1.Args[0]
5098		mem := v_2
5099		v.reset(OpARMMOVBstore)
5100		v.AuxInt = int32ToAuxInt(off)
5101		v.Aux = symToAux(sym)
5102		v.AddArg3(ptr, x, mem)
5103		return true
5104	}
5105	// match: (MOVBstore [0] {sym} (ADD ptr idx) val mem)
5106	// cond: sym == nil
5107	// result: (MOVBstoreidx ptr idx val mem)
5108	for {
5109		if auxIntToInt32(v.AuxInt) != 0 {
5110			break
5111		}
5112		sym := auxToSym(v.Aux)
5113		if v_0.Op != OpARMADD {
5114			break
5115		}
5116		idx := v_0.Args[1]
5117		ptr := v_0.Args[0]
5118		val := v_1
5119		mem := v_2
5120		if !(sym == nil) {
5121			break
5122		}
5123		v.reset(OpARMMOVBstoreidx)
5124		v.AddArg4(ptr, idx, val, mem)
5125		return true
5126	}
5127	return false
5128}
5129func rewriteValueARM_OpARMMOVBstoreidx(v *Value) bool {
5130	v_3 := v.Args[3]
5131	v_2 := v.Args[2]
5132	v_1 := v.Args[1]
5133	v_0 := v.Args[0]
5134	// match: (MOVBstoreidx ptr (MOVWconst [c]) val mem)
5135	// result: (MOVBstore [c] ptr val mem)
5136	for {
5137		ptr := v_0
5138		if v_1.Op != OpARMMOVWconst {
5139			break
5140		}
5141		c := auxIntToInt32(v_1.AuxInt)
5142		val := v_2
5143		mem := v_3
5144		v.reset(OpARMMOVBstore)
5145		v.AuxInt = int32ToAuxInt(c)
5146		v.AddArg3(ptr, val, mem)
5147		return true
5148	}
5149	// match: (MOVBstoreidx (MOVWconst [c]) ptr val mem)
5150	// result: (MOVBstore [c] ptr val mem)
5151	for {
5152		if v_0.Op != OpARMMOVWconst {
5153			break
5154		}
5155		c := auxIntToInt32(v_0.AuxInt)
5156		ptr := v_1
5157		val := v_2
5158		mem := v_3
5159		v.reset(OpARMMOVBstore)
5160		v.AuxInt = int32ToAuxInt(c)
5161		v.AddArg3(ptr, val, mem)
5162		return true
5163	}
5164	return false
5165}
5166func rewriteValueARM_OpARMMOVDload(v *Value) bool {
5167	v_1 := v.Args[1]
5168	v_0 := v.Args[0]
5169	// match: (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
5170	// result: (MOVDload [off1+off2] {sym} ptr mem)
5171	for {
5172		off1 := auxIntToInt32(v.AuxInt)
5173		sym := auxToSym(v.Aux)
5174		if v_0.Op != OpARMADDconst {
5175			break
5176		}
5177		off2 := auxIntToInt32(v_0.AuxInt)
5178		ptr := v_0.Args[0]
5179		mem := v_1
5180		v.reset(OpARMMOVDload)
5181		v.AuxInt = int32ToAuxInt(off1 + off2)
5182		v.Aux = symToAux(sym)
5183		v.AddArg2(ptr, mem)
5184		return true
5185	}
5186	// match: (MOVDload [off1] {sym} (SUBconst [off2] ptr) mem)
5187	// result: (MOVDload [off1-off2] {sym} ptr mem)
5188	for {
5189		off1 := auxIntToInt32(v.AuxInt)
5190		sym := auxToSym(v.Aux)
5191		if v_0.Op != OpARMSUBconst {
5192			break
5193		}
5194		off2 := auxIntToInt32(v_0.AuxInt)
5195		ptr := v_0.Args[0]
5196		mem := v_1
5197		v.reset(OpARMMOVDload)
5198		v.AuxInt = int32ToAuxInt(off1 - off2)
5199		v.Aux = symToAux(sym)
5200		v.AddArg2(ptr, mem)
5201		return true
5202	}
5203	// match: (MOVDload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
5204	// cond: canMergeSym(sym1,sym2)
5205	// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
5206	for {
5207		off1 := auxIntToInt32(v.AuxInt)
5208		sym1 := auxToSym(v.Aux)
5209		if v_0.Op != OpARMMOVWaddr {
5210			break
5211		}
5212		off2 := auxIntToInt32(v_0.AuxInt)
5213		sym2 := auxToSym(v_0.Aux)
5214		ptr := v_0.Args[0]
5215		mem := v_1
5216		if !(canMergeSym(sym1, sym2)) {
5217			break
5218		}
5219		v.reset(OpARMMOVDload)
5220		v.AuxInt = int32ToAuxInt(off1 + off2)
5221		v.Aux = symToAux(mergeSym(sym1, sym2))
5222		v.AddArg2(ptr, mem)
5223		return true
5224	}
5225	// match: (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _))
5226	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
5227	// result: x
5228	for {
5229		off := auxIntToInt32(v.AuxInt)
5230		sym := auxToSym(v.Aux)
5231		ptr := v_0
5232		if v_1.Op != OpARMMOVDstore {
5233			break
5234		}
5235		off2 := auxIntToInt32(v_1.AuxInt)
5236		sym2 := auxToSym(v_1.Aux)
5237		x := v_1.Args[1]
5238		ptr2 := v_1.Args[0]
5239		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
5240			break
5241		}
5242		v.copyOf(x)
5243		return true
5244	}
5245	return false
5246}
5247func rewriteValueARM_OpARMMOVDstore(v *Value) bool {
5248	v_2 := v.Args[2]
5249	v_1 := v.Args[1]
5250	v_0 := v.Args[0]
5251	// match: (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
5252	// result: (MOVDstore [off1+off2] {sym} ptr val mem)
5253	for {
5254		off1 := auxIntToInt32(v.AuxInt)
5255		sym := auxToSym(v.Aux)
5256		if v_0.Op != OpARMADDconst {
5257			break
5258		}
5259		off2 := auxIntToInt32(v_0.AuxInt)
5260		ptr := v_0.Args[0]
5261		val := v_1
5262		mem := v_2
5263		v.reset(OpARMMOVDstore)
5264		v.AuxInt = int32ToAuxInt(off1 + off2)
5265		v.Aux = symToAux(sym)
5266		v.AddArg3(ptr, val, mem)
5267		return true
5268	}
5269	// match: (MOVDstore [off1] {sym} (SUBconst [off2] ptr) val mem)
5270	// result: (MOVDstore [off1-off2] {sym} ptr val mem)
5271	for {
5272		off1 := auxIntToInt32(v.AuxInt)
5273		sym := auxToSym(v.Aux)
5274		if v_0.Op != OpARMSUBconst {
5275			break
5276		}
5277		off2 := auxIntToInt32(v_0.AuxInt)
5278		ptr := v_0.Args[0]
5279		val := v_1
5280		mem := v_2
5281		v.reset(OpARMMOVDstore)
5282		v.AuxInt = int32ToAuxInt(off1 - off2)
5283		v.Aux = symToAux(sym)
5284		v.AddArg3(ptr, val, mem)
5285		return true
5286	}
5287	// match: (MOVDstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
5288	// cond: canMergeSym(sym1,sym2)
5289	// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
5290	for {
5291		off1 := auxIntToInt32(v.AuxInt)
5292		sym1 := auxToSym(v.Aux)
5293		if v_0.Op != OpARMMOVWaddr {
5294			break
5295		}
5296		off2 := auxIntToInt32(v_0.AuxInt)
5297		sym2 := auxToSym(v_0.Aux)
5298		ptr := v_0.Args[0]
5299		val := v_1
5300		mem := v_2
5301		if !(canMergeSym(sym1, sym2)) {
5302			break
5303		}
5304		v.reset(OpARMMOVDstore)
5305		v.AuxInt = int32ToAuxInt(off1 + off2)
5306		v.Aux = symToAux(mergeSym(sym1, sym2))
5307		v.AddArg3(ptr, val, mem)
5308		return true
5309	}
5310	return false
5311}
5312func rewriteValueARM_OpARMMOVFload(v *Value) bool {
5313	v_1 := v.Args[1]
5314	v_0 := v.Args[0]
5315	// match: (MOVFload [off1] {sym} (ADDconst [off2] ptr) mem)
5316	// result: (MOVFload [off1+off2] {sym} ptr mem)
5317	for {
5318		off1 := auxIntToInt32(v.AuxInt)
5319		sym := auxToSym(v.Aux)
5320		if v_0.Op != OpARMADDconst {
5321			break
5322		}
5323		off2 := auxIntToInt32(v_0.AuxInt)
5324		ptr := v_0.Args[0]
5325		mem := v_1
5326		v.reset(OpARMMOVFload)
5327		v.AuxInt = int32ToAuxInt(off1 + off2)
5328		v.Aux = symToAux(sym)
5329		v.AddArg2(ptr, mem)
5330		return true
5331	}
5332	// match: (MOVFload [off1] {sym} (SUBconst [off2] ptr) mem)
5333	// result: (MOVFload [off1-off2] {sym} ptr mem)
5334	for {
5335		off1 := auxIntToInt32(v.AuxInt)
5336		sym := auxToSym(v.Aux)
5337		if v_0.Op != OpARMSUBconst {
5338			break
5339		}
5340		off2 := auxIntToInt32(v_0.AuxInt)
5341		ptr := v_0.Args[0]
5342		mem := v_1
5343		v.reset(OpARMMOVFload)
5344		v.AuxInt = int32ToAuxInt(off1 - off2)
5345		v.Aux = symToAux(sym)
5346		v.AddArg2(ptr, mem)
5347		return true
5348	}
5349	// match: (MOVFload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
5350	// cond: canMergeSym(sym1,sym2)
5351	// result: (MOVFload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
5352	for {
5353		off1 := auxIntToInt32(v.AuxInt)
5354		sym1 := auxToSym(v.Aux)
5355		if v_0.Op != OpARMMOVWaddr {
5356			break
5357		}
5358		off2 := auxIntToInt32(v_0.AuxInt)
5359		sym2 := auxToSym(v_0.Aux)
5360		ptr := v_0.Args[0]
5361		mem := v_1
5362		if !(canMergeSym(sym1, sym2)) {
5363			break
5364		}
5365		v.reset(OpARMMOVFload)
5366		v.AuxInt = int32ToAuxInt(off1 + off2)
5367		v.Aux = symToAux(mergeSym(sym1, sym2))
5368		v.AddArg2(ptr, mem)
5369		return true
5370	}
5371	// match: (MOVFload [off] {sym} ptr (MOVFstore [off2] {sym2} ptr2 x _))
5372	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
5373	// result: x
5374	for {
5375		off := auxIntToInt32(v.AuxInt)
5376		sym := auxToSym(v.Aux)
5377		ptr := v_0
5378		if v_1.Op != OpARMMOVFstore {
5379			break
5380		}
5381		off2 := auxIntToInt32(v_1.AuxInt)
5382		sym2 := auxToSym(v_1.Aux)
5383		x := v_1.Args[1]
5384		ptr2 := v_1.Args[0]
5385		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
5386			break
5387		}
5388		v.copyOf(x)
5389		return true
5390	}
5391	return false
5392}
5393func rewriteValueARM_OpARMMOVFstore(v *Value) bool {
5394	v_2 := v.Args[2]
5395	v_1 := v.Args[1]
5396	v_0 := v.Args[0]
5397	// match: (MOVFstore [off1] {sym} (ADDconst [off2] ptr) val mem)
5398	// result: (MOVFstore [off1+off2] {sym} ptr val mem)
5399	for {
5400		off1 := auxIntToInt32(v.AuxInt)
5401		sym := auxToSym(v.Aux)
5402		if v_0.Op != OpARMADDconst {
5403			break
5404		}
5405		off2 := auxIntToInt32(v_0.AuxInt)
5406		ptr := v_0.Args[0]
5407		val := v_1
5408		mem := v_2
5409		v.reset(OpARMMOVFstore)
5410		v.AuxInt = int32ToAuxInt(off1 + off2)
5411		v.Aux = symToAux(sym)
5412		v.AddArg3(ptr, val, mem)
5413		return true
5414	}
5415	// match: (MOVFstore [off1] {sym} (SUBconst [off2] ptr) val mem)
5416	// result: (MOVFstore [off1-off2] {sym} ptr val mem)
5417	for {
5418		off1 := auxIntToInt32(v.AuxInt)
5419		sym := auxToSym(v.Aux)
5420		if v_0.Op != OpARMSUBconst {
5421			break
5422		}
5423		off2 := auxIntToInt32(v_0.AuxInt)
5424		ptr := v_0.Args[0]
5425		val := v_1
5426		mem := v_2
5427		v.reset(OpARMMOVFstore)
5428		v.AuxInt = int32ToAuxInt(off1 - off2)
5429		v.Aux = symToAux(sym)
5430		v.AddArg3(ptr, val, mem)
5431		return true
5432	}
5433	// match: (MOVFstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
5434	// cond: canMergeSym(sym1,sym2)
5435	// result: (MOVFstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
5436	for {
5437		off1 := auxIntToInt32(v.AuxInt)
5438		sym1 := auxToSym(v.Aux)
5439		if v_0.Op != OpARMMOVWaddr {
5440			break
5441		}
5442		off2 := auxIntToInt32(v_0.AuxInt)
5443		sym2 := auxToSym(v_0.Aux)
5444		ptr := v_0.Args[0]
5445		val := v_1
5446		mem := v_2
5447		if !(canMergeSym(sym1, sym2)) {
5448			break
5449		}
5450		v.reset(OpARMMOVFstore)
5451		v.AuxInt = int32ToAuxInt(off1 + off2)
5452		v.Aux = symToAux(mergeSym(sym1, sym2))
5453		v.AddArg3(ptr, val, mem)
5454		return true
5455	}
5456	return false
5457}
5458func rewriteValueARM_OpARMMOVHUload(v *Value) bool {
5459	v_1 := v.Args[1]
5460	v_0 := v.Args[0]
5461	b := v.Block
5462	config := b.Func.Config
5463	// match: (MOVHUload [off1] {sym} (ADDconst [off2] ptr) mem)
5464	// result: (MOVHUload [off1+off2] {sym} ptr mem)
5465	for {
5466		off1 := auxIntToInt32(v.AuxInt)
5467		sym := auxToSym(v.Aux)
5468		if v_0.Op != OpARMADDconst {
5469			break
5470		}
5471		off2 := auxIntToInt32(v_0.AuxInt)
5472		ptr := v_0.Args[0]
5473		mem := v_1
5474		v.reset(OpARMMOVHUload)
5475		v.AuxInt = int32ToAuxInt(off1 + off2)
5476		v.Aux = symToAux(sym)
5477		v.AddArg2(ptr, mem)
5478		return true
5479	}
5480	// match: (MOVHUload [off1] {sym} (SUBconst [off2] ptr) mem)
5481	// result: (MOVHUload [off1-off2] {sym} ptr mem)
5482	for {
5483		off1 := auxIntToInt32(v.AuxInt)
5484		sym := auxToSym(v.Aux)
5485		if v_0.Op != OpARMSUBconst {
5486			break
5487		}
5488		off2 := auxIntToInt32(v_0.AuxInt)
5489		ptr := v_0.Args[0]
5490		mem := v_1
5491		v.reset(OpARMMOVHUload)
5492		v.AuxInt = int32ToAuxInt(off1 - off2)
5493		v.Aux = symToAux(sym)
5494		v.AddArg2(ptr, mem)
5495		return true
5496	}
5497	// match: (MOVHUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
5498	// cond: canMergeSym(sym1,sym2)
5499	// result: (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
5500	for {
5501		off1 := auxIntToInt32(v.AuxInt)
5502		sym1 := auxToSym(v.Aux)
5503		if v_0.Op != OpARMMOVWaddr {
5504			break
5505		}
5506		off2 := auxIntToInt32(v_0.AuxInt)
5507		sym2 := auxToSym(v_0.Aux)
5508		ptr := v_0.Args[0]
5509		mem := v_1
5510		if !(canMergeSym(sym1, sym2)) {
5511			break
5512		}
5513		v.reset(OpARMMOVHUload)
5514		v.AuxInt = int32ToAuxInt(off1 + off2)
5515		v.Aux = symToAux(mergeSym(sym1, sym2))
5516		v.AddArg2(ptr, mem)
5517		return true
5518	}
5519	// match: (MOVHUload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _))
5520	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
5521	// result: (MOVHUreg x)
5522	for {
5523		off := auxIntToInt32(v.AuxInt)
5524		sym := auxToSym(v.Aux)
5525		ptr := v_0
5526		if v_1.Op != OpARMMOVHstore {
5527			break
5528		}
5529		off2 := auxIntToInt32(v_1.AuxInt)
5530		sym2 := auxToSym(v_1.Aux)
5531		x := v_1.Args[1]
5532		ptr2 := v_1.Args[0]
5533		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
5534			break
5535		}
5536		v.reset(OpARMMOVHUreg)
5537		v.AddArg(x)
5538		return true
5539	}
5540	// match: (MOVHUload [0] {sym} (ADD ptr idx) mem)
5541	// cond: sym == nil
5542	// result: (MOVHUloadidx ptr idx mem)
5543	for {
5544		if auxIntToInt32(v.AuxInt) != 0 {
5545			break
5546		}
5547		sym := auxToSym(v.Aux)
5548		if v_0.Op != OpARMADD {
5549			break
5550		}
5551		idx := v_0.Args[1]
5552		ptr := v_0.Args[0]
5553		mem := v_1
5554		if !(sym == nil) {
5555			break
5556		}
5557		v.reset(OpARMMOVHUloadidx)
5558		v.AddArg3(ptr, idx, mem)
5559		return true
5560	}
5561	// match: (MOVHUload [off] {sym} (SB) _)
5562	// cond: symIsRO(sym)
5563	// result: (MOVWconst [int32(read16(sym, int64(off), config.ctxt.Arch.ByteOrder))])
5564	for {
5565		off := auxIntToInt32(v.AuxInt)
5566		sym := auxToSym(v.Aux)
5567		if v_0.Op != OpSB || !(symIsRO(sym)) {
5568			break
5569		}
5570		v.reset(OpARMMOVWconst)
5571		v.AuxInt = int32ToAuxInt(int32(read16(sym, int64(off), config.ctxt.Arch.ByteOrder)))
5572		return true
5573	}
5574	return false
5575}
5576func rewriteValueARM_OpARMMOVHUloadidx(v *Value) bool {
5577	v_2 := v.Args[2]
5578	v_1 := v.Args[1]
5579	v_0 := v.Args[0]
5580	// match: (MOVHUloadidx ptr idx (MOVHstoreidx ptr2 idx x _))
5581	// cond: isSamePtr(ptr, ptr2)
5582	// result: (MOVHUreg x)
5583	for {
5584		ptr := v_0
5585		idx := v_1
5586		if v_2.Op != OpARMMOVHstoreidx {
5587			break
5588		}
5589		x := v_2.Args[2]
5590		ptr2 := v_2.Args[0]
5591		if idx != v_2.Args[1] || !(isSamePtr(ptr, ptr2)) {
5592			break
5593		}
5594		v.reset(OpARMMOVHUreg)
5595		v.AddArg(x)
5596		return true
5597	}
5598	// match: (MOVHUloadidx ptr (MOVWconst [c]) mem)
5599	// result: (MOVHUload [c] ptr mem)
5600	for {
5601		ptr := v_0
5602		if v_1.Op != OpARMMOVWconst {
5603			break
5604		}
5605		c := auxIntToInt32(v_1.AuxInt)
5606		mem := v_2
5607		v.reset(OpARMMOVHUload)
5608		v.AuxInt = int32ToAuxInt(c)
5609		v.AddArg2(ptr, mem)
5610		return true
5611	}
5612	// match: (MOVHUloadidx (MOVWconst [c]) ptr mem)
5613	// result: (MOVHUload [c] ptr mem)
5614	for {
5615		if v_0.Op != OpARMMOVWconst {
5616			break
5617		}
5618		c := auxIntToInt32(v_0.AuxInt)
5619		ptr := v_1
5620		mem := v_2
5621		v.reset(OpARMMOVHUload)
5622		v.AuxInt = int32ToAuxInt(c)
5623		v.AddArg2(ptr, mem)
5624		return true
5625	}
5626	return false
5627}
5628func rewriteValueARM_OpARMMOVHUreg(v *Value) bool {
5629	v_0 := v.Args[0]
5630	// match: (MOVHUreg x:(MOVBUload _ _))
5631	// result: (MOVWreg x)
5632	for {
5633		x := v_0
5634		if x.Op != OpARMMOVBUload {
5635			break
5636		}
5637		v.reset(OpARMMOVWreg)
5638		v.AddArg(x)
5639		return true
5640	}
5641	// match: (MOVHUreg x:(MOVHUload _ _))
5642	// result: (MOVWreg x)
5643	for {
5644		x := v_0
5645		if x.Op != OpARMMOVHUload {
5646			break
5647		}
5648		v.reset(OpARMMOVWreg)
5649		v.AddArg(x)
5650		return true
5651	}
5652	// match: (MOVHUreg (ANDconst [c] x))
5653	// result: (ANDconst [c&0xffff] x)
5654	for {
5655		if v_0.Op != OpARMANDconst {
5656			break
5657		}
5658		c := auxIntToInt32(v_0.AuxInt)
5659		x := v_0.Args[0]
5660		v.reset(OpARMANDconst)
5661		v.AuxInt = int32ToAuxInt(c & 0xffff)
5662		v.AddArg(x)
5663		return true
5664	}
5665	// match: (MOVHUreg x:(MOVBUreg _))
5666	// result: (MOVWreg x)
5667	for {
5668		x := v_0
5669		if x.Op != OpARMMOVBUreg {
5670			break
5671		}
5672		v.reset(OpARMMOVWreg)
5673		v.AddArg(x)
5674		return true
5675	}
5676	// match: (MOVHUreg x:(MOVHUreg _))
5677	// result: (MOVWreg x)
5678	for {
5679		x := v_0
5680		if x.Op != OpARMMOVHUreg {
5681			break
5682		}
5683		v.reset(OpARMMOVWreg)
5684		v.AddArg(x)
5685		return true
5686	}
5687	// match: (MOVHUreg (MOVWconst [c]))
5688	// result: (MOVWconst [int32(uint16(c))])
5689	for {
5690		if v_0.Op != OpARMMOVWconst {
5691			break
5692		}
5693		c := auxIntToInt32(v_0.AuxInt)
5694		v.reset(OpARMMOVWconst)
5695		v.AuxInt = int32ToAuxInt(int32(uint16(c)))
5696		return true
5697	}
5698	return false
5699}
5700func rewriteValueARM_OpARMMOVHload(v *Value) bool {
5701	v_1 := v.Args[1]
5702	v_0 := v.Args[0]
5703	// match: (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem)
5704	// result: (MOVHload [off1+off2] {sym} ptr mem)
5705	for {
5706		off1 := auxIntToInt32(v.AuxInt)
5707		sym := auxToSym(v.Aux)
5708		if v_0.Op != OpARMADDconst {
5709			break
5710		}
5711		off2 := auxIntToInt32(v_0.AuxInt)
5712		ptr := v_0.Args[0]
5713		mem := v_1
5714		v.reset(OpARMMOVHload)
5715		v.AuxInt = int32ToAuxInt(off1 + off2)
5716		v.Aux = symToAux(sym)
5717		v.AddArg2(ptr, mem)
5718		return true
5719	}
5720	// match: (MOVHload [off1] {sym} (SUBconst [off2] ptr) mem)
5721	// result: (MOVHload [off1-off2] {sym} ptr mem)
5722	for {
5723		off1 := auxIntToInt32(v.AuxInt)
5724		sym := auxToSym(v.Aux)
5725		if v_0.Op != OpARMSUBconst {
5726			break
5727		}
5728		off2 := auxIntToInt32(v_0.AuxInt)
5729		ptr := v_0.Args[0]
5730		mem := v_1
5731		v.reset(OpARMMOVHload)
5732		v.AuxInt = int32ToAuxInt(off1 - off2)
5733		v.Aux = symToAux(sym)
5734		v.AddArg2(ptr, mem)
5735		return true
5736	}
5737	// match: (MOVHload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
5738	// cond: canMergeSym(sym1,sym2)
5739	// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
5740	for {
5741		off1 := auxIntToInt32(v.AuxInt)
5742		sym1 := auxToSym(v.Aux)
5743		if v_0.Op != OpARMMOVWaddr {
5744			break
5745		}
5746		off2 := auxIntToInt32(v_0.AuxInt)
5747		sym2 := auxToSym(v_0.Aux)
5748		ptr := v_0.Args[0]
5749		mem := v_1
5750		if !(canMergeSym(sym1, sym2)) {
5751			break
5752		}
5753		v.reset(OpARMMOVHload)
5754		v.AuxInt = int32ToAuxInt(off1 + off2)
5755		v.Aux = symToAux(mergeSym(sym1, sym2))
5756		v.AddArg2(ptr, mem)
5757		return true
5758	}
5759	// match: (MOVHload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _))
5760	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
5761	// result: (MOVHreg x)
5762	for {
5763		off := auxIntToInt32(v.AuxInt)
5764		sym := auxToSym(v.Aux)
5765		ptr := v_0
5766		if v_1.Op != OpARMMOVHstore {
5767			break
5768		}
5769		off2 := auxIntToInt32(v_1.AuxInt)
5770		sym2 := auxToSym(v_1.Aux)
5771		x := v_1.Args[1]
5772		ptr2 := v_1.Args[0]
5773		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
5774			break
5775		}
5776		v.reset(OpARMMOVHreg)
5777		v.AddArg(x)
5778		return true
5779	}
5780	// match: (MOVHload [0] {sym} (ADD ptr idx) mem)
5781	// cond: sym == nil
5782	// result: (MOVHloadidx ptr idx mem)
5783	for {
5784		if auxIntToInt32(v.AuxInt) != 0 {
5785			break
5786		}
5787		sym := auxToSym(v.Aux)
5788		if v_0.Op != OpARMADD {
5789			break
5790		}
5791		idx := v_0.Args[1]
5792		ptr := v_0.Args[0]
5793		mem := v_1
5794		if !(sym == nil) {
5795			break
5796		}
5797		v.reset(OpARMMOVHloadidx)
5798		v.AddArg3(ptr, idx, mem)
5799		return true
5800	}
5801	return false
5802}
5803func rewriteValueARM_OpARMMOVHloadidx(v *Value) bool {
5804	v_2 := v.Args[2]
5805	v_1 := v.Args[1]
5806	v_0 := v.Args[0]
5807	// match: (MOVHloadidx ptr idx (MOVHstoreidx ptr2 idx x _))
5808	// cond: isSamePtr(ptr, ptr2)
5809	// result: (MOVHreg x)
5810	for {
5811		ptr := v_0
5812		idx := v_1
5813		if v_2.Op != OpARMMOVHstoreidx {
5814			break
5815		}
5816		x := v_2.Args[2]
5817		ptr2 := v_2.Args[0]
5818		if idx != v_2.Args[1] || !(isSamePtr(ptr, ptr2)) {
5819			break
5820		}
5821		v.reset(OpARMMOVHreg)
5822		v.AddArg(x)
5823		return true
5824	}
5825	// match: (MOVHloadidx ptr (MOVWconst [c]) mem)
5826	// result: (MOVHload [c] ptr mem)
5827	for {
5828		ptr := v_0
5829		if v_1.Op != OpARMMOVWconst {
5830			break
5831		}
5832		c := auxIntToInt32(v_1.AuxInt)
5833		mem := v_2
5834		v.reset(OpARMMOVHload)
5835		v.AuxInt = int32ToAuxInt(c)
5836		v.AddArg2(ptr, mem)
5837		return true
5838	}
5839	// match: (MOVHloadidx (MOVWconst [c]) ptr mem)
5840	// result: (MOVHload [c] ptr mem)
5841	for {
5842		if v_0.Op != OpARMMOVWconst {
5843			break
5844		}
5845		c := auxIntToInt32(v_0.AuxInt)
5846		ptr := v_1
5847		mem := v_2
5848		v.reset(OpARMMOVHload)
5849		v.AuxInt = int32ToAuxInt(c)
5850		v.AddArg2(ptr, mem)
5851		return true
5852	}
5853	return false
5854}
5855func rewriteValueARM_OpARMMOVHreg(v *Value) bool {
5856	v_0 := v.Args[0]
5857	// match: (MOVHreg x:(MOVBload _ _))
5858	// result: (MOVWreg x)
5859	for {
5860		x := v_0
5861		if x.Op != OpARMMOVBload {
5862			break
5863		}
5864		v.reset(OpARMMOVWreg)
5865		v.AddArg(x)
5866		return true
5867	}
5868	// match: (MOVHreg x:(MOVBUload _ _))
5869	// result: (MOVWreg x)
5870	for {
5871		x := v_0
5872		if x.Op != OpARMMOVBUload {
5873			break
5874		}
5875		v.reset(OpARMMOVWreg)
5876		v.AddArg(x)
5877		return true
5878	}
5879	// match: (MOVHreg x:(MOVHload _ _))
5880	// result: (MOVWreg x)
5881	for {
5882		x := v_0
5883		if x.Op != OpARMMOVHload {
5884			break
5885		}
5886		v.reset(OpARMMOVWreg)
5887		v.AddArg(x)
5888		return true
5889	}
5890	// match: (MOVHreg (ANDconst [c] x))
5891	// cond: c & 0x8000 == 0
5892	// result: (ANDconst [c&0x7fff] x)
5893	for {
5894		if v_0.Op != OpARMANDconst {
5895			break
5896		}
5897		c := auxIntToInt32(v_0.AuxInt)
5898		x := v_0.Args[0]
5899		if !(c&0x8000 == 0) {
5900			break
5901		}
5902		v.reset(OpARMANDconst)
5903		v.AuxInt = int32ToAuxInt(c & 0x7fff)
5904		v.AddArg(x)
5905		return true
5906	}
5907	// match: (MOVHreg x:(MOVBreg _))
5908	// result: (MOVWreg x)
5909	for {
5910		x := v_0
5911		if x.Op != OpARMMOVBreg {
5912			break
5913		}
5914		v.reset(OpARMMOVWreg)
5915		v.AddArg(x)
5916		return true
5917	}
5918	// match: (MOVHreg x:(MOVBUreg _))
5919	// result: (MOVWreg x)
5920	for {
5921		x := v_0
5922		if x.Op != OpARMMOVBUreg {
5923			break
5924		}
5925		v.reset(OpARMMOVWreg)
5926		v.AddArg(x)
5927		return true
5928	}
5929	// match: (MOVHreg x:(MOVHreg _))
5930	// result: (MOVWreg x)
5931	for {
5932		x := v_0
5933		if x.Op != OpARMMOVHreg {
5934			break
5935		}
5936		v.reset(OpARMMOVWreg)
5937		v.AddArg(x)
5938		return true
5939	}
5940	// match: (MOVHreg (MOVWconst [c]))
5941	// result: (MOVWconst [int32(int16(c))])
5942	for {
5943		if v_0.Op != OpARMMOVWconst {
5944			break
5945		}
5946		c := auxIntToInt32(v_0.AuxInt)
5947		v.reset(OpARMMOVWconst)
5948		v.AuxInt = int32ToAuxInt(int32(int16(c)))
5949		return true
5950	}
5951	return false
5952}
5953func rewriteValueARM_OpARMMOVHstore(v *Value) bool {
5954	v_2 := v.Args[2]
5955	v_1 := v.Args[1]
5956	v_0 := v.Args[0]
5957	// match: (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem)
5958	// result: (MOVHstore [off1+off2] {sym} ptr val mem)
5959	for {
5960		off1 := auxIntToInt32(v.AuxInt)
5961		sym := auxToSym(v.Aux)
5962		if v_0.Op != OpARMADDconst {
5963			break
5964		}
5965		off2 := auxIntToInt32(v_0.AuxInt)
5966		ptr := v_0.Args[0]
5967		val := v_1
5968		mem := v_2
5969		v.reset(OpARMMOVHstore)
5970		v.AuxInt = int32ToAuxInt(off1 + off2)
5971		v.Aux = symToAux(sym)
5972		v.AddArg3(ptr, val, mem)
5973		return true
5974	}
5975	// match: (MOVHstore [off1] {sym} (SUBconst [off2] ptr) val mem)
5976	// result: (MOVHstore [off1-off2] {sym} ptr val mem)
5977	for {
5978		off1 := auxIntToInt32(v.AuxInt)
5979		sym := auxToSym(v.Aux)
5980		if v_0.Op != OpARMSUBconst {
5981			break
5982		}
5983		off2 := auxIntToInt32(v_0.AuxInt)
5984		ptr := v_0.Args[0]
5985		val := v_1
5986		mem := v_2
5987		v.reset(OpARMMOVHstore)
5988		v.AuxInt = int32ToAuxInt(off1 - off2)
5989		v.Aux = symToAux(sym)
5990		v.AddArg3(ptr, val, mem)
5991		return true
5992	}
5993	// match: (MOVHstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
5994	// cond: canMergeSym(sym1,sym2)
5995	// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
5996	for {
5997		off1 := auxIntToInt32(v.AuxInt)
5998		sym1 := auxToSym(v.Aux)
5999		if v_0.Op != OpARMMOVWaddr {
6000			break
6001		}
6002		off2 := auxIntToInt32(v_0.AuxInt)
6003		sym2 := auxToSym(v_0.Aux)
6004		ptr := v_0.Args[0]
6005		val := v_1
6006		mem := v_2
6007		if !(canMergeSym(sym1, sym2)) {
6008			break
6009		}
6010		v.reset(OpARMMOVHstore)
6011		v.AuxInt = int32ToAuxInt(off1 + off2)
6012		v.Aux = symToAux(mergeSym(sym1, sym2))
6013		v.AddArg3(ptr, val, mem)
6014		return true
6015	}
6016	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
6017	// result: (MOVHstore [off] {sym} ptr x mem)
6018	for {
6019		off := auxIntToInt32(v.AuxInt)
6020		sym := auxToSym(v.Aux)
6021		ptr := v_0
6022		if v_1.Op != OpARMMOVHreg {
6023			break
6024		}
6025		x := v_1.Args[0]
6026		mem := v_2
6027		v.reset(OpARMMOVHstore)
6028		v.AuxInt = int32ToAuxInt(off)
6029		v.Aux = symToAux(sym)
6030		v.AddArg3(ptr, x, mem)
6031		return true
6032	}
6033	// match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
6034	// result: (MOVHstore [off] {sym} ptr x mem)
6035	for {
6036		off := auxIntToInt32(v.AuxInt)
6037		sym := auxToSym(v.Aux)
6038		ptr := v_0
6039		if v_1.Op != OpARMMOVHUreg {
6040			break
6041		}
6042		x := v_1.Args[0]
6043		mem := v_2
6044		v.reset(OpARMMOVHstore)
6045		v.AuxInt = int32ToAuxInt(off)
6046		v.Aux = symToAux(sym)
6047		v.AddArg3(ptr, x, mem)
6048		return true
6049	}
6050	// match: (MOVHstore [0] {sym} (ADD ptr idx) val mem)
6051	// cond: sym == nil
6052	// result: (MOVHstoreidx ptr idx val mem)
6053	for {
6054		if auxIntToInt32(v.AuxInt) != 0 {
6055			break
6056		}
6057		sym := auxToSym(v.Aux)
6058		if v_0.Op != OpARMADD {
6059			break
6060		}
6061		idx := v_0.Args[1]
6062		ptr := v_0.Args[0]
6063		val := v_1
6064		mem := v_2
6065		if !(sym == nil) {
6066			break
6067		}
6068		v.reset(OpARMMOVHstoreidx)
6069		v.AddArg4(ptr, idx, val, mem)
6070		return true
6071	}
6072	return false
6073}
6074func rewriteValueARM_OpARMMOVHstoreidx(v *Value) bool {
6075	v_3 := v.Args[3]
6076	v_2 := v.Args[2]
6077	v_1 := v.Args[1]
6078	v_0 := v.Args[0]
6079	// match: (MOVHstoreidx ptr (MOVWconst [c]) val mem)
6080	// result: (MOVHstore [c] ptr val mem)
6081	for {
6082		ptr := v_0
6083		if v_1.Op != OpARMMOVWconst {
6084			break
6085		}
6086		c := auxIntToInt32(v_1.AuxInt)
6087		val := v_2
6088		mem := v_3
6089		v.reset(OpARMMOVHstore)
6090		v.AuxInt = int32ToAuxInt(c)
6091		v.AddArg3(ptr, val, mem)
6092		return true
6093	}
6094	// match: (MOVHstoreidx (MOVWconst [c]) ptr val mem)
6095	// result: (MOVHstore [c] ptr val mem)
6096	for {
6097		if v_0.Op != OpARMMOVWconst {
6098			break
6099		}
6100		c := auxIntToInt32(v_0.AuxInt)
6101		ptr := v_1
6102		val := v_2
6103		mem := v_3
6104		v.reset(OpARMMOVHstore)
6105		v.AuxInt = int32ToAuxInt(c)
6106		v.AddArg3(ptr, val, mem)
6107		return true
6108	}
6109	return false
6110}
6111func rewriteValueARM_OpARMMOVWload(v *Value) bool {
6112	v_1 := v.Args[1]
6113	v_0 := v.Args[0]
6114	b := v.Block
6115	config := b.Func.Config
6116	// match: (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem)
6117	// result: (MOVWload [off1+off2] {sym} ptr mem)
6118	for {
6119		off1 := auxIntToInt32(v.AuxInt)
6120		sym := auxToSym(v.Aux)
6121		if v_0.Op != OpARMADDconst {
6122			break
6123		}
6124		off2 := auxIntToInt32(v_0.AuxInt)
6125		ptr := v_0.Args[0]
6126		mem := v_1
6127		v.reset(OpARMMOVWload)
6128		v.AuxInt = int32ToAuxInt(off1 + off2)
6129		v.Aux = symToAux(sym)
6130		v.AddArg2(ptr, mem)
6131		return true
6132	}
6133	// match: (MOVWload [off1] {sym} (SUBconst [off2] ptr) mem)
6134	// result: (MOVWload [off1-off2] {sym} ptr mem)
6135	for {
6136		off1 := auxIntToInt32(v.AuxInt)
6137		sym := auxToSym(v.Aux)
6138		if v_0.Op != OpARMSUBconst {
6139			break
6140		}
6141		off2 := auxIntToInt32(v_0.AuxInt)
6142		ptr := v_0.Args[0]
6143		mem := v_1
6144		v.reset(OpARMMOVWload)
6145		v.AuxInt = int32ToAuxInt(off1 - off2)
6146		v.Aux = symToAux(sym)
6147		v.AddArg2(ptr, mem)
6148		return true
6149	}
6150	// match: (MOVWload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
6151	// cond: canMergeSym(sym1,sym2)
6152	// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
6153	for {
6154		off1 := auxIntToInt32(v.AuxInt)
6155		sym1 := auxToSym(v.Aux)
6156		if v_0.Op != OpARMMOVWaddr {
6157			break
6158		}
6159		off2 := auxIntToInt32(v_0.AuxInt)
6160		sym2 := auxToSym(v_0.Aux)
6161		ptr := v_0.Args[0]
6162		mem := v_1
6163		if !(canMergeSym(sym1, sym2)) {
6164			break
6165		}
6166		v.reset(OpARMMOVWload)
6167		v.AuxInt = int32ToAuxInt(off1 + off2)
6168		v.Aux = symToAux(mergeSym(sym1, sym2))
6169		v.AddArg2(ptr, mem)
6170		return true
6171	}
6172	// match: (MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _))
6173	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
6174	// result: x
6175	for {
6176		off := auxIntToInt32(v.AuxInt)
6177		sym := auxToSym(v.Aux)
6178		ptr := v_0
6179		if v_1.Op != OpARMMOVWstore {
6180			break
6181		}
6182		off2 := auxIntToInt32(v_1.AuxInt)
6183		sym2 := auxToSym(v_1.Aux)
6184		x := v_1.Args[1]
6185		ptr2 := v_1.Args[0]
6186		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
6187			break
6188		}
6189		v.copyOf(x)
6190		return true
6191	}
6192	// match: (MOVWload [0] {sym} (ADD ptr idx) mem)
6193	// cond: sym == nil
6194	// result: (MOVWloadidx ptr idx mem)
6195	for {
6196		if auxIntToInt32(v.AuxInt) != 0 {
6197			break
6198		}
6199		sym := auxToSym(v.Aux)
6200		if v_0.Op != OpARMADD {
6201			break
6202		}
6203		idx := v_0.Args[1]
6204		ptr := v_0.Args[0]
6205		mem := v_1
6206		if !(sym == nil) {
6207			break
6208		}
6209		v.reset(OpARMMOVWloadidx)
6210		v.AddArg3(ptr, idx, mem)
6211		return true
6212	}
6213	// match: (MOVWload [0] {sym} (ADDshiftLL ptr idx [c]) mem)
6214	// cond: sym == nil
6215	// result: (MOVWloadshiftLL ptr idx [c] mem)
6216	for {
6217		if auxIntToInt32(v.AuxInt) != 0 {
6218			break
6219		}
6220		sym := auxToSym(v.Aux)
6221		if v_0.Op != OpARMADDshiftLL {
6222			break
6223		}
6224		c := auxIntToInt32(v_0.AuxInt)
6225		idx := v_0.Args[1]
6226		ptr := v_0.Args[0]
6227		mem := v_1
6228		if !(sym == nil) {
6229			break
6230		}
6231		v.reset(OpARMMOVWloadshiftLL)
6232		v.AuxInt = int32ToAuxInt(c)
6233		v.AddArg3(ptr, idx, mem)
6234		return true
6235	}
6236	// match: (MOVWload [0] {sym} (ADDshiftRL ptr idx [c]) mem)
6237	// cond: sym == nil
6238	// result: (MOVWloadshiftRL ptr idx [c] mem)
6239	for {
6240		if auxIntToInt32(v.AuxInt) != 0 {
6241			break
6242		}
6243		sym := auxToSym(v.Aux)
6244		if v_0.Op != OpARMADDshiftRL {
6245			break
6246		}
6247		c := auxIntToInt32(v_0.AuxInt)
6248		idx := v_0.Args[1]
6249		ptr := v_0.Args[0]
6250		mem := v_1
6251		if !(sym == nil) {
6252			break
6253		}
6254		v.reset(OpARMMOVWloadshiftRL)
6255		v.AuxInt = int32ToAuxInt(c)
6256		v.AddArg3(ptr, idx, mem)
6257		return true
6258	}
6259	// match: (MOVWload [0] {sym} (ADDshiftRA ptr idx [c]) mem)
6260	// cond: sym == nil
6261	// result: (MOVWloadshiftRA ptr idx [c] mem)
6262	for {
6263		if auxIntToInt32(v.AuxInt) != 0 {
6264			break
6265		}
6266		sym := auxToSym(v.Aux)
6267		if v_0.Op != OpARMADDshiftRA {
6268			break
6269		}
6270		c := auxIntToInt32(v_0.AuxInt)
6271		idx := v_0.Args[1]
6272		ptr := v_0.Args[0]
6273		mem := v_1
6274		if !(sym == nil) {
6275			break
6276		}
6277		v.reset(OpARMMOVWloadshiftRA)
6278		v.AuxInt = int32ToAuxInt(c)
6279		v.AddArg3(ptr, idx, mem)
6280		return true
6281	}
6282	// match: (MOVWload [off] {sym} (SB) _)
6283	// cond: symIsRO(sym)
6284	// result: (MOVWconst [int32(read32(sym, int64(off), config.ctxt.Arch.ByteOrder))])
6285	for {
6286		off := auxIntToInt32(v.AuxInt)
6287		sym := auxToSym(v.Aux)
6288		if v_0.Op != OpSB || !(symIsRO(sym)) {
6289			break
6290		}
6291		v.reset(OpARMMOVWconst)
6292		v.AuxInt = int32ToAuxInt(int32(read32(sym, int64(off), config.ctxt.Arch.ByteOrder)))
6293		return true
6294	}
6295	return false
6296}
6297func rewriteValueARM_OpARMMOVWloadidx(v *Value) bool {
6298	v_2 := v.Args[2]
6299	v_1 := v.Args[1]
6300	v_0 := v.Args[0]
6301	// match: (MOVWloadidx ptr idx (MOVWstoreidx ptr2 idx x _))
6302	// cond: isSamePtr(ptr, ptr2)
6303	// result: x
6304	for {
6305		ptr := v_0
6306		idx := v_1
6307		if v_2.Op != OpARMMOVWstoreidx {
6308			break
6309		}
6310		x := v_2.Args[2]
6311		ptr2 := v_2.Args[0]
6312		if idx != v_2.Args[1] || !(isSamePtr(ptr, ptr2)) {
6313			break
6314		}
6315		v.copyOf(x)
6316		return true
6317	}
6318	// match: (MOVWloadidx ptr (MOVWconst [c]) mem)
6319	// result: (MOVWload [c] ptr mem)
6320	for {
6321		ptr := v_0
6322		if v_1.Op != OpARMMOVWconst {
6323			break
6324		}
6325		c := auxIntToInt32(v_1.AuxInt)
6326		mem := v_2
6327		v.reset(OpARMMOVWload)
6328		v.AuxInt = int32ToAuxInt(c)
6329		v.AddArg2(ptr, mem)
6330		return true
6331	}
6332	// match: (MOVWloadidx (MOVWconst [c]) ptr mem)
6333	// result: (MOVWload [c] ptr mem)
6334	for {
6335		if v_0.Op != OpARMMOVWconst {
6336			break
6337		}
6338		c := auxIntToInt32(v_0.AuxInt)
6339		ptr := v_1
6340		mem := v_2
6341		v.reset(OpARMMOVWload)
6342		v.AuxInt = int32ToAuxInt(c)
6343		v.AddArg2(ptr, mem)
6344		return true
6345	}
6346	// match: (MOVWloadidx ptr (SLLconst idx [c]) mem)
6347	// result: (MOVWloadshiftLL ptr idx [c] mem)
6348	for {
6349		ptr := v_0
6350		if v_1.Op != OpARMSLLconst {
6351			break
6352		}
6353		c := auxIntToInt32(v_1.AuxInt)
6354		idx := v_1.Args[0]
6355		mem := v_2
6356		v.reset(OpARMMOVWloadshiftLL)
6357		v.AuxInt = int32ToAuxInt(c)
6358		v.AddArg3(ptr, idx, mem)
6359		return true
6360	}
6361	// match: (MOVWloadidx (SLLconst idx [c]) ptr mem)
6362	// result: (MOVWloadshiftLL ptr idx [c] mem)
6363	for {
6364		if v_0.Op != OpARMSLLconst {
6365			break
6366		}
6367		c := auxIntToInt32(v_0.AuxInt)
6368		idx := v_0.Args[0]
6369		ptr := v_1
6370		mem := v_2
6371		v.reset(OpARMMOVWloadshiftLL)
6372		v.AuxInt = int32ToAuxInt(c)
6373		v.AddArg3(ptr, idx, mem)
6374		return true
6375	}
6376	// match: (MOVWloadidx ptr (SRLconst idx [c]) mem)
6377	// result: (MOVWloadshiftRL ptr idx [c] mem)
6378	for {
6379		ptr := v_0
6380		if v_1.Op != OpARMSRLconst {
6381			break
6382		}
6383		c := auxIntToInt32(v_1.AuxInt)
6384		idx := v_1.Args[0]
6385		mem := v_2
6386		v.reset(OpARMMOVWloadshiftRL)
6387		v.AuxInt = int32ToAuxInt(c)
6388		v.AddArg3(ptr, idx, mem)
6389		return true
6390	}
6391	// match: (MOVWloadidx (SRLconst idx [c]) ptr mem)
6392	// result: (MOVWloadshiftRL ptr idx [c] mem)
6393	for {
6394		if v_0.Op != OpARMSRLconst {
6395			break
6396		}
6397		c := auxIntToInt32(v_0.AuxInt)
6398		idx := v_0.Args[0]
6399		ptr := v_1
6400		mem := v_2
6401		v.reset(OpARMMOVWloadshiftRL)
6402		v.AuxInt = int32ToAuxInt(c)
6403		v.AddArg3(ptr, idx, mem)
6404		return true
6405	}
6406	// match: (MOVWloadidx ptr (SRAconst idx [c]) mem)
6407	// result: (MOVWloadshiftRA ptr idx [c] mem)
6408	for {
6409		ptr := v_0
6410		if v_1.Op != OpARMSRAconst {
6411			break
6412		}
6413		c := auxIntToInt32(v_1.AuxInt)
6414		idx := v_1.Args[0]
6415		mem := v_2
6416		v.reset(OpARMMOVWloadshiftRA)
6417		v.AuxInt = int32ToAuxInt(c)
6418		v.AddArg3(ptr, idx, mem)
6419		return true
6420	}
6421	// match: (MOVWloadidx (SRAconst idx [c]) ptr mem)
6422	// result: (MOVWloadshiftRA ptr idx [c] mem)
6423	for {
6424		if v_0.Op != OpARMSRAconst {
6425			break
6426		}
6427		c := auxIntToInt32(v_0.AuxInt)
6428		idx := v_0.Args[0]
6429		ptr := v_1
6430		mem := v_2
6431		v.reset(OpARMMOVWloadshiftRA)
6432		v.AuxInt = int32ToAuxInt(c)
6433		v.AddArg3(ptr, idx, mem)
6434		return true
6435	}
6436	return false
6437}
6438func rewriteValueARM_OpARMMOVWloadshiftLL(v *Value) bool {
6439	v_2 := v.Args[2]
6440	v_1 := v.Args[1]
6441	v_0 := v.Args[0]
6442	// match: (MOVWloadshiftLL ptr idx [c] (MOVWstoreshiftLL ptr2 idx [d] x _))
6443	// cond: c==d && isSamePtr(ptr, ptr2)
6444	// result: x
6445	for {
6446		c := auxIntToInt32(v.AuxInt)
6447		ptr := v_0
6448		idx := v_1
6449		if v_2.Op != OpARMMOVWstoreshiftLL {
6450			break
6451		}
6452		d := auxIntToInt32(v_2.AuxInt)
6453		x := v_2.Args[2]
6454		ptr2 := v_2.Args[0]
6455		if idx != v_2.Args[1] || !(c == d && isSamePtr(ptr, ptr2)) {
6456			break
6457		}
6458		v.copyOf(x)
6459		return true
6460	}
6461	// match: (MOVWloadshiftLL ptr (MOVWconst [c]) [d] mem)
6462	// result: (MOVWload [int32(uint32(c)<<uint64(d))] ptr mem)
6463	for {
6464		d := auxIntToInt32(v.AuxInt)
6465		ptr := v_0
6466		if v_1.Op != OpARMMOVWconst {
6467			break
6468		}
6469		c := auxIntToInt32(v_1.AuxInt)
6470		mem := v_2
6471		v.reset(OpARMMOVWload)
6472		v.AuxInt = int32ToAuxInt(int32(uint32(c) << uint64(d)))
6473		v.AddArg2(ptr, mem)
6474		return true
6475	}
6476	return false
6477}
6478func rewriteValueARM_OpARMMOVWloadshiftRA(v *Value) bool {
6479	v_2 := v.Args[2]
6480	v_1 := v.Args[1]
6481	v_0 := v.Args[0]
6482	// match: (MOVWloadshiftRA ptr idx [c] (MOVWstoreshiftRA ptr2 idx [d] x _))
6483	// cond: c==d && isSamePtr(ptr, ptr2)
6484	// result: x
6485	for {
6486		c := auxIntToInt32(v.AuxInt)
6487		ptr := v_0
6488		idx := v_1
6489		if v_2.Op != OpARMMOVWstoreshiftRA {
6490			break
6491		}
6492		d := auxIntToInt32(v_2.AuxInt)
6493		x := v_2.Args[2]
6494		ptr2 := v_2.Args[0]
6495		if idx != v_2.Args[1] || !(c == d && isSamePtr(ptr, ptr2)) {
6496			break
6497		}
6498		v.copyOf(x)
6499		return true
6500	}
6501	// match: (MOVWloadshiftRA ptr (MOVWconst [c]) [d] mem)
6502	// result: (MOVWload [c>>uint64(d)] ptr mem)
6503	for {
6504		d := auxIntToInt32(v.AuxInt)
6505		ptr := v_0
6506		if v_1.Op != OpARMMOVWconst {
6507			break
6508		}
6509		c := auxIntToInt32(v_1.AuxInt)
6510		mem := v_2
6511		v.reset(OpARMMOVWload)
6512		v.AuxInt = int32ToAuxInt(c >> uint64(d))
6513		v.AddArg2(ptr, mem)
6514		return true
6515	}
6516	return false
6517}
6518func rewriteValueARM_OpARMMOVWloadshiftRL(v *Value) bool {
6519	v_2 := v.Args[2]
6520	v_1 := v.Args[1]
6521	v_0 := v.Args[0]
6522	// match: (MOVWloadshiftRL ptr idx [c] (MOVWstoreshiftRL ptr2 idx [d] x _))
6523	// cond: c==d && isSamePtr(ptr, ptr2)
6524	// result: x
6525	for {
6526		c := auxIntToInt32(v.AuxInt)
6527		ptr := v_0
6528		idx := v_1
6529		if v_2.Op != OpARMMOVWstoreshiftRL {
6530			break
6531		}
6532		d := auxIntToInt32(v_2.AuxInt)
6533		x := v_2.Args[2]
6534		ptr2 := v_2.Args[0]
6535		if idx != v_2.Args[1] || !(c == d && isSamePtr(ptr, ptr2)) {
6536			break
6537		}
6538		v.copyOf(x)
6539		return true
6540	}
6541	// match: (MOVWloadshiftRL ptr (MOVWconst [c]) [d] mem)
6542	// result: (MOVWload [int32(uint32(c)>>uint64(d))] ptr mem)
6543	for {
6544		d := auxIntToInt32(v.AuxInt)
6545		ptr := v_0
6546		if v_1.Op != OpARMMOVWconst {
6547			break
6548		}
6549		c := auxIntToInt32(v_1.AuxInt)
6550		mem := v_2
6551		v.reset(OpARMMOVWload)
6552		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
6553		v.AddArg2(ptr, mem)
6554		return true
6555	}
6556	return false
6557}
6558func rewriteValueARM_OpARMMOVWnop(v *Value) bool {
6559	v_0 := v.Args[0]
6560	// match: (MOVWnop (MOVWconst [c]))
6561	// result: (MOVWconst [c])
6562	for {
6563		if v_0.Op != OpARMMOVWconst {
6564			break
6565		}
6566		c := auxIntToInt32(v_0.AuxInt)
6567		v.reset(OpARMMOVWconst)
6568		v.AuxInt = int32ToAuxInt(c)
6569		return true
6570	}
6571	return false
6572}
6573func rewriteValueARM_OpARMMOVWreg(v *Value) bool {
6574	v_0 := v.Args[0]
6575	// match: (MOVWreg x)
6576	// cond: x.Uses == 1
6577	// result: (MOVWnop x)
6578	for {
6579		x := v_0
6580		if !(x.Uses == 1) {
6581			break
6582		}
6583		v.reset(OpARMMOVWnop)
6584		v.AddArg(x)
6585		return true
6586	}
6587	// match: (MOVWreg (MOVWconst [c]))
6588	// result: (MOVWconst [c])
6589	for {
6590		if v_0.Op != OpARMMOVWconst {
6591			break
6592		}
6593		c := auxIntToInt32(v_0.AuxInt)
6594		v.reset(OpARMMOVWconst)
6595		v.AuxInt = int32ToAuxInt(c)
6596		return true
6597	}
6598	return false
6599}
6600func rewriteValueARM_OpARMMOVWstore(v *Value) bool {
6601	v_2 := v.Args[2]
6602	v_1 := v.Args[1]
6603	v_0 := v.Args[0]
6604	// match: (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem)
6605	// result: (MOVWstore [off1+off2] {sym} ptr val mem)
6606	for {
6607		off1 := auxIntToInt32(v.AuxInt)
6608		sym := auxToSym(v.Aux)
6609		if v_0.Op != OpARMADDconst {
6610			break
6611		}
6612		off2 := auxIntToInt32(v_0.AuxInt)
6613		ptr := v_0.Args[0]
6614		val := v_1
6615		mem := v_2
6616		v.reset(OpARMMOVWstore)
6617		v.AuxInt = int32ToAuxInt(off1 + off2)
6618		v.Aux = symToAux(sym)
6619		v.AddArg3(ptr, val, mem)
6620		return true
6621	}
6622	// match: (MOVWstore [off1] {sym} (SUBconst [off2] ptr) val mem)
6623	// result: (MOVWstore [off1-off2] {sym} ptr val mem)
6624	for {
6625		off1 := auxIntToInt32(v.AuxInt)
6626		sym := auxToSym(v.Aux)
6627		if v_0.Op != OpARMSUBconst {
6628			break
6629		}
6630		off2 := auxIntToInt32(v_0.AuxInt)
6631		ptr := v_0.Args[0]
6632		val := v_1
6633		mem := v_2
6634		v.reset(OpARMMOVWstore)
6635		v.AuxInt = int32ToAuxInt(off1 - off2)
6636		v.Aux = symToAux(sym)
6637		v.AddArg3(ptr, val, mem)
6638		return true
6639	}
6640	// match: (MOVWstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
6641	// cond: canMergeSym(sym1,sym2)
6642	// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
6643	for {
6644		off1 := auxIntToInt32(v.AuxInt)
6645		sym1 := auxToSym(v.Aux)
6646		if v_0.Op != OpARMMOVWaddr {
6647			break
6648		}
6649		off2 := auxIntToInt32(v_0.AuxInt)
6650		sym2 := auxToSym(v_0.Aux)
6651		ptr := v_0.Args[0]
6652		val := v_1
6653		mem := v_2
6654		if !(canMergeSym(sym1, sym2)) {
6655			break
6656		}
6657		v.reset(OpARMMOVWstore)
6658		v.AuxInt = int32ToAuxInt(off1 + off2)
6659		v.Aux = symToAux(mergeSym(sym1, sym2))
6660		v.AddArg3(ptr, val, mem)
6661		return true
6662	}
6663	// match: (MOVWstore [0] {sym} (ADD ptr idx) val mem)
6664	// cond: sym == nil
6665	// result: (MOVWstoreidx ptr idx val mem)
6666	for {
6667		if auxIntToInt32(v.AuxInt) != 0 {
6668			break
6669		}
6670		sym := auxToSym(v.Aux)
6671		if v_0.Op != OpARMADD {
6672			break
6673		}
6674		idx := v_0.Args[1]
6675		ptr := v_0.Args[0]
6676		val := v_1
6677		mem := v_2
6678		if !(sym == nil) {
6679			break
6680		}
6681		v.reset(OpARMMOVWstoreidx)
6682		v.AddArg4(ptr, idx, val, mem)
6683		return true
6684	}
6685	// match: (MOVWstore [0] {sym} (ADDshiftLL ptr idx [c]) val mem)
6686	// cond: sym == nil
6687	// result: (MOVWstoreshiftLL ptr idx [c] val mem)
6688	for {
6689		if auxIntToInt32(v.AuxInt) != 0 {
6690			break
6691		}
6692		sym := auxToSym(v.Aux)
6693		if v_0.Op != OpARMADDshiftLL {
6694			break
6695		}
6696		c := auxIntToInt32(v_0.AuxInt)
6697		idx := v_0.Args[1]
6698		ptr := v_0.Args[0]
6699		val := v_1
6700		mem := v_2
6701		if !(sym == nil) {
6702			break
6703		}
6704		v.reset(OpARMMOVWstoreshiftLL)
6705		v.AuxInt = int32ToAuxInt(c)
6706		v.AddArg4(ptr, idx, val, mem)
6707		return true
6708	}
6709	// match: (MOVWstore [0] {sym} (ADDshiftRL ptr idx [c]) val mem)
6710	// cond: sym == nil
6711	// result: (MOVWstoreshiftRL ptr idx [c] val mem)
6712	for {
6713		if auxIntToInt32(v.AuxInt) != 0 {
6714			break
6715		}
6716		sym := auxToSym(v.Aux)
6717		if v_0.Op != OpARMADDshiftRL {
6718			break
6719		}
6720		c := auxIntToInt32(v_0.AuxInt)
6721		idx := v_0.Args[1]
6722		ptr := v_0.Args[0]
6723		val := v_1
6724		mem := v_2
6725		if !(sym == nil) {
6726			break
6727		}
6728		v.reset(OpARMMOVWstoreshiftRL)
6729		v.AuxInt = int32ToAuxInt(c)
6730		v.AddArg4(ptr, idx, val, mem)
6731		return true
6732	}
6733	// match: (MOVWstore [0] {sym} (ADDshiftRA ptr idx [c]) val mem)
6734	// cond: sym == nil
6735	// result: (MOVWstoreshiftRA ptr idx [c] val mem)
6736	for {
6737		if auxIntToInt32(v.AuxInt) != 0 {
6738			break
6739		}
6740		sym := auxToSym(v.Aux)
6741		if v_0.Op != OpARMADDshiftRA {
6742			break
6743		}
6744		c := auxIntToInt32(v_0.AuxInt)
6745		idx := v_0.Args[1]
6746		ptr := v_0.Args[0]
6747		val := v_1
6748		mem := v_2
6749		if !(sym == nil) {
6750			break
6751		}
6752		v.reset(OpARMMOVWstoreshiftRA)
6753		v.AuxInt = int32ToAuxInt(c)
6754		v.AddArg4(ptr, idx, val, mem)
6755		return true
6756	}
6757	return false
6758}
6759func rewriteValueARM_OpARMMOVWstoreidx(v *Value) bool {
6760	v_3 := v.Args[3]
6761	v_2 := v.Args[2]
6762	v_1 := v.Args[1]
6763	v_0 := v.Args[0]
6764	// match: (MOVWstoreidx ptr (MOVWconst [c]) val mem)
6765	// result: (MOVWstore [c] ptr val mem)
6766	for {
6767		ptr := v_0
6768		if v_1.Op != OpARMMOVWconst {
6769			break
6770		}
6771		c := auxIntToInt32(v_1.AuxInt)
6772		val := v_2
6773		mem := v_3
6774		v.reset(OpARMMOVWstore)
6775		v.AuxInt = int32ToAuxInt(c)
6776		v.AddArg3(ptr, val, mem)
6777		return true
6778	}
6779	// match: (MOVWstoreidx (MOVWconst [c]) ptr val mem)
6780	// result: (MOVWstore [c] ptr val mem)
6781	for {
6782		if v_0.Op != OpARMMOVWconst {
6783			break
6784		}
6785		c := auxIntToInt32(v_0.AuxInt)
6786		ptr := v_1
6787		val := v_2
6788		mem := v_3
6789		v.reset(OpARMMOVWstore)
6790		v.AuxInt = int32ToAuxInt(c)
6791		v.AddArg3(ptr, val, mem)
6792		return true
6793	}
6794	// match: (MOVWstoreidx ptr (SLLconst idx [c]) val mem)
6795	// result: (MOVWstoreshiftLL ptr idx [c] val mem)
6796	for {
6797		ptr := v_0
6798		if v_1.Op != OpARMSLLconst {
6799			break
6800		}
6801		c := auxIntToInt32(v_1.AuxInt)
6802		idx := v_1.Args[0]
6803		val := v_2
6804		mem := v_3
6805		v.reset(OpARMMOVWstoreshiftLL)
6806		v.AuxInt = int32ToAuxInt(c)
6807		v.AddArg4(ptr, idx, val, mem)
6808		return true
6809	}
6810	// match: (MOVWstoreidx (SLLconst idx [c]) ptr val mem)
6811	// result: (MOVWstoreshiftLL ptr idx [c] val mem)
6812	for {
6813		if v_0.Op != OpARMSLLconst {
6814			break
6815		}
6816		c := auxIntToInt32(v_0.AuxInt)
6817		idx := v_0.Args[0]
6818		ptr := v_1
6819		val := v_2
6820		mem := v_3
6821		v.reset(OpARMMOVWstoreshiftLL)
6822		v.AuxInt = int32ToAuxInt(c)
6823		v.AddArg4(ptr, idx, val, mem)
6824		return true
6825	}
6826	// match: (MOVWstoreidx ptr (SRLconst idx [c]) val mem)
6827	// result: (MOVWstoreshiftRL ptr idx [c] val mem)
6828	for {
6829		ptr := v_0
6830		if v_1.Op != OpARMSRLconst {
6831			break
6832		}
6833		c := auxIntToInt32(v_1.AuxInt)
6834		idx := v_1.Args[0]
6835		val := v_2
6836		mem := v_3
6837		v.reset(OpARMMOVWstoreshiftRL)
6838		v.AuxInt = int32ToAuxInt(c)
6839		v.AddArg4(ptr, idx, val, mem)
6840		return true
6841	}
6842	// match: (MOVWstoreidx (SRLconst idx [c]) ptr val mem)
6843	// result: (MOVWstoreshiftRL ptr idx [c] val mem)
6844	for {
6845		if v_0.Op != OpARMSRLconst {
6846			break
6847		}
6848		c := auxIntToInt32(v_0.AuxInt)
6849		idx := v_0.Args[0]
6850		ptr := v_1
6851		val := v_2
6852		mem := v_3
6853		v.reset(OpARMMOVWstoreshiftRL)
6854		v.AuxInt = int32ToAuxInt(c)
6855		v.AddArg4(ptr, idx, val, mem)
6856		return true
6857	}
6858	// match: (MOVWstoreidx ptr (SRAconst idx [c]) val mem)
6859	// result: (MOVWstoreshiftRA ptr idx [c] val mem)
6860	for {
6861		ptr := v_0
6862		if v_1.Op != OpARMSRAconst {
6863			break
6864		}
6865		c := auxIntToInt32(v_1.AuxInt)
6866		idx := v_1.Args[0]
6867		val := v_2
6868		mem := v_3
6869		v.reset(OpARMMOVWstoreshiftRA)
6870		v.AuxInt = int32ToAuxInt(c)
6871		v.AddArg4(ptr, idx, val, mem)
6872		return true
6873	}
6874	// match: (MOVWstoreidx (SRAconst idx [c]) ptr val mem)
6875	// result: (MOVWstoreshiftRA ptr idx [c] val mem)
6876	for {
6877		if v_0.Op != OpARMSRAconst {
6878			break
6879		}
6880		c := auxIntToInt32(v_0.AuxInt)
6881		idx := v_0.Args[0]
6882		ptr := v_1
6883		val := v_2
6884		mem := v_3
6885		v.reset(OpARMMOVWstoreshiftRA)
6886		v.AuxInt = int32ToAuxInt(c)
6887		v.AddArg4(ptr, idx, val, mem)
6888		return true
6889	}
6890	return false
6891}
6892func rewriteValueARM_OpARMMOVWstoreshiftLL(v *Value) bool {
6893	v_3 := v.Args[3]
6894	v_2 := v.Args[2]
6895	v_1 := v.Args[1]
6896	v_0 := v.Args[0]
6897	// match: (MOVWstoreshiftLL ptr (MOVWconst [c]) [d] val mem)
6898	// result: (MOVWstore [int32(uint32(c)<<uint64(d))] ptr val mem)
6899	for {
6900		d := auxIntToInt32(v.AuxInt)
6901		ptr := v_0
6902		if v_1.Op != OpARMMOVWconst {
6903			break
6904		}
6905		c := auxIntToInt32(v_1.AuxInt)
6906		val := v_2
6907		mem := v_3
6908		v.reset(OpARMMOVWstore)
6909		v.AuxInt = int32ToAuxInt(int32(uint32(c) << uint64(d)))
6910		v.AddArg3(ptr, val, mem)
6911		return true
6912	}
6913	return false
6914}
6915func rewriteValueARM_OpARMMOVWstoreshiftRA(v *Value) bool {
6916	v_3 := v.Args[3]
6917	v_2 := v.Args[2]
6918	v_1 := v.Args[1]
6919	v_0 := v.Args[0]
6920	// match: (MOVWstoreshiftRA ptr (MOVWconst [c]) [d] val mem)
6921	// result: (MOVWstore [c>>uint64(d)] ptr val mem)
6922	for {
6923		d := auxIntToInt32(v.AuxInt)
6924		ptr := v_0
6925		if v_1.Op != OpARMMOVWconst {
6926			break
6927		}
6928		c := auxIntToInt32(v_1.AuxInt)
6929		val := v_2
6930		mem := v_3
6931		v.reset(OpARMMOVWstore)
6932		v.AuxInt = int32ToAuxInt(c >> uint64(d))
6933		v.AddArg3(ptr, val, mem)
6934		return true
6935	}
6936	return false
6937}
6938func rewriteValueARM_OpARMMOVWstoreshiftRL(v *Value) bool {
6939	v_3 := v.Args[3]
6940	v_2 := v.Args[2]
6941	v_1 := v.Args[1]
6942	v_0 := v.Args[0]
6943	// match: (MOVWstoreshiftRL ptr (MOVWconst [c]) [d] val mem)
6944	// result: (MOVWstore [int32(uint32(c)>>uint64(d))] ptr val mem)
6945	for {
6946		d := auxIntToInt32(v.AuxInt)
6947		ptr := v_0
6948		if v_1.Op != OpARMMOVWconst {
6949			break
6950		}
6951		c := auxIntToInt32(v_1.AuxInt)
6952		val := v_2
6953		mem := v_3
6954		v.reset(OpARMMOVWstore)
6955		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
6956		v.AddArg3(ptr, val, mem)
6957		return true
6958	}
6959	return false
6960}
6961func rewriteValueARM_OpARMMUL(v *Value) bool {
6962	v_1 := v.Args[1]
6963	v_0 := v.Args[0]
6964	b := v.Block
6965	// match: (MUL x (MOVWconst [c]))
6966	// cond: int32(c) == -1
6967	// result: (RSBconst [0] x)
6968	for {
6969		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
6970			x := v_0
6971			if v_1.Op != OpARMMOVWconst {
6972				continue
6973			}
6974			c := auxIntToInt32(v_1.AuxInt)
6975			if !(int32(c) == -1) {
6976				continue
6977			}
6978			v.reset(OpARMRSBconst)
6979			v.AuxInt = int32ToAuxInt(0)
6980			v.AddArg(x)
6981			return true
6982		}
6983		break
6984	}
6985	// match: (MUL _ (MOVWconst [0]))
6986	// result: (MOVWconst [0])
6987	for {
6988		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
6989			if v_1.Op != OpARMMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
6990				continue
6991			}
6992			v.reset(OpARMMOVWconst)
6993			v.AuxInt = int32ToAuxInt(0)
6994			return true
6995		}
6996		break
6997	}
6998	// match: (MUL x (MOVWconst [1]))
6999	// result: x
7000	for {
7001		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
7002			x := v_0
7003			if v_1.Op != OpARMMOVWconst || auxIntToInt32(v_1.AuxInt) != 1 {
7004				continue
7005			}
7006			v.copyOf(x)
7007			return true
7008		}
7009		break
7010	}
7011	// match: (MUL x (MOVWconst [c]))
7012	// cond: isPowerOfTwo32(c)
7013	// result: (SLLconst [int32(log32(c))] x)
7014	for {
7015		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
7016			x := v_0
7017			if v_1.Op != OpARMMOVWconst {
7018				continue
7019			}
7020			c := auxIntToInt32(v_1.AuxInt)
7021			if !(isPowerOfTwo32(c)) {
7022				continue
7023			}
7024			v.reset(OpARMSLLconst)
7025			v.AuxInt = int32ToAuxInt(int32(log32(c)))
7026			v.AddArg(x)
7027			return true
7028		}
7029		break
7030	}
7031	// match: (MUL x (MOVWconst [c]))
7032	// cond: isPowerOfTwo32(c-1) && c >= 3
7033	// result: (ADDshiftLL x x [int32(log32(c-1))])
7034	for {
7035		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
7036			x := v_0
7037			if v_1.Op != OpARMMOVWconst {
7038				continue
7039			}
7040			c := auxIntToInt32(v_1.AuxInt)
7041			if !(isPowerOfTwo32(c-1) && c >= 3) {
7042				continue
7043			}
7044			v.reset(OpARMADDshiftLL)
7045			v.AuxInt = int32ToAuxInt(int32(log32(c - 1)))
7046			v.AddArg2(x, x)
7047			return true
7048		}
7049		break
7050	}
7051	// match: (MUL x (MOVWconst [c]))
7052	// cond: isPowerOfTwo32(c+1) && c >= 7
7053	// result: (RSBshiftLL x x [int32(log32(c+1))])
7054	for {
7055		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
7056			x := v_0
7057			if v_1.Op != OpARMMOVWconst {
7058				continue
7059			}
7060			c := auxIntToInt32(v_1.AuxInt)
7061			if !(isPowerOfTwo32(c+1) && c >= 7) {
7062				continue
7063			}
7064			v.reset(OpARMRSBshiftLL)
7065			v.AuxInt = int32ToAuxInt(int32(log32(c + 1)))
7066			v.AddArg2(x, x)
7067			return true
7068		}
7069		break
7070	}
7071	// match: (MUL x (MOVWconst [c]))
7072	// cond: c%3 == 0 && isPowerOfTwo32(c/3)
7073	// result: (SLLconst [int32(log32(c/3))] (ADDshiftLL <x.Type> x x [1]))
7074	for {
7075		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
7076			x := v_0
7077			if v_1.Op != OpARMMOVWconst {
7078				continue
7079			}
7080			c := auxIntToInt32(v_1.AuxInt)
7081			if !(c%3 == 0 && isPowerOfTwo32(c/3)) {
7082				continue
7083			}
7084			v.reset(OpARMSLLconst)
7085			v.AuxInt = int32ToAuxInt(int32(log32(c / 3)))
7086			v0 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
7087			v0.AuxInt = int32ToAuxInt(1)
7088			v0.AddArg2(x, x)
7089			v.AddArg(v0)
7090			return true
7091		}
7092		break
7093	}
7094	// match: (MUL x (MOVWconst [c]))
7095	// cond: c%5 == 0 && isPowerOfTwo32(c/5)
7096	// result: (SLLconst [int32(log32(c/5))] (ADDshiftLL <x.Type> x x [2]))
7097	for {
7098		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
7099			x := v_0
7100			if v_1.Op != OpARMMOVWconst {
7101				continue
7102			}
7103			c := auxIntToInt32(v_1.AuxInt)
7104			if !(c%5 == 0 && isPowerOfTwo32(c/5)) {
7105				continue
7106			}
7107			v.reset(OpARMSLLconst)
7108			v.AuxInt = int32ToAuxInt(int32(log32(c / 5)))
7109			v0 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
7110			v0.AuxInt = int32ToAuxInt(2)
7111			v0.AddArg2(x, x)
7112			v.AddArg(v0)
7113			return true
7114		}
7115		break
7116	}
7117	// match: (MUL x (MOVWconst [c]))
7118	// cond: c%7 == 0 && isPowerOfTwo32(c/7)
7119	// result: (SLLconst [int32(log32(c/7))] (RSBshiftLL <x.Type> x x [3]))
7120	for {
7121		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
7122			x := v_0
7123			if v_1.Op != OpARMMOVWconst {
7124				continue
7125			}
7126			c := auxIntToInt32(v_1.AuxInt)
7127			if !(c%7 == 0 && isPowerOfTwo32(c/7)) {
7128				continue
7129			}
7130			v.reset(OpARMSLLconst)
7131			v.AuxInt = int32ToAuxInt(int32(log32(c / 7)))
7132			v0 := b.NewValue0(v.Pos, OpARMRSBshiftLL, x.Type)
7133			v0.AuxInt = int32ToAuxInt(3)
7134			v0.AddArg2(x, x)
7135			v.AddArg(v0)
7136			return true
7137		}
7138		break
7139	}
7140	// match: (MUL x (MOVWconst [c]))
7141	// cond: c%9 == 0 && isPowerOfTwo32(c/9)
7142	// result: (SLLconst [int32(log32(c/9))] (ADDshiftLL <x.Type> x x [3]))
7143	for {
7144		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
7145			x := v_0
7146			if v_1.Op != OpARMMOVWconst {
7147				continue
7148			}
7149			c := auxIntToInt32(v_1.AuxInt)
7150			if !(c%9 == 0 && isPowerOfTwo32(c/9)) {
7151				continue
7152			}
7153			v.reset(OpARMSLLconst)
7154			v.AuxInt = int32ToAuxInt(int32(log32(c / 9)))
7155			v0 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
7156			v0.AuxInt = int32ToAuxInt(3)
7157			v0.AddArg2(x, x)
7158			v.AddArg(v0)
7159			return true
7160		}
7161		break
7162	}
7163	// match: (MUL (MOVWconst [c]) (MOVWconst [d]))
7164	// result: (MOVWconst [c*d])
7165	for {
7166		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
7167			if v_0.Op != OpARMMOVWconst {
7168				continue
7169			}
7170			c := auxIntToInt32(v_0.AuxInt)
7171			if v_1.Op != OpARMMOVWconst {
7172				continue
7173			}
7174			d := auxIntToInt32(v_1.AuxInt)
7175			v.reset(OpARMMOVWconst)
7176			v.AuxInt = int32ToAuxInt(c * d)
7177			return true
7178		}
7179		break
7180	}
7181	return false
7182}
7183func rewriteValueARM_OpARMMULA(v *Value) bool {
7184	v_2 := v.Args[2]
7185	v_1 := v.Args[1]
7186	v_0 := v.Args[0]
7187	b := v.Block
7188	// match: (MULA x (MOVWconst [c]) a)
7189	// cond: c == -1
7190	// result: (SUB a x)
7191	for {
7192		x := v_0
7193		if v_1.Op != OpARMMOVWconst {
7194			break
7195		}
7196		c := auxIntToInt32(v_1.AuxInt)
7197		a := v_2
7198		if !(c == -1) {
7199			break
7200		}
7201		v.reset(OpARMSUB)
7202		v.AddArg2(a, x)
7203		return true
7204	}
7205	// match: (MULA _ (MOVWconst [0]) a)
7206	// result: a
7207	for {
7208		if v_1.Op != OpARMMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
7209			break
7210		}
7211		a := v_2
7212		v.copyOf(a)
7213		return true
7214	}
7215	// match: (MULA x (MOVWconst [1]) a)
7216	// result: (ADD x a)
7217	for {
7218		x := v_0
7219		if v_1.Op != OpARMMOVWconst || auxIntToInt32(v_1.AuxInt) != 1 {
7220			break
7221		}
7222		a := v_2
7223		v.reset(OpARMADD)
7224		v.AddArg2(x, a)
7225		return true
7226	}
7227	// match: (MULA x (MOVWconst [c]) a)
7228	// cond: isPowerOfTwo32(c)
7229	// result: (ADD (SLLconst <x.Type> [int32(log32(c))] x) a)
7230	for {
7231		x := v_0
7232		if v_1.Op != OpARMMOVWconst {
7233			break
7234		}
7235		c := auxIntToInt32(v_1.AuxInt)
7236		a := v_2
7237		if !(isPowerOfTwo32(c)) {
7238			break
7239		}
7240		v.reset(OpARMADD)
7241		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7242		v0.AuxInt = int32ToAuxInt(int32(log32(c)))
7243		v0.AddArg(x)
7244		v.AddArg2(v0, a)
7245		return true
7246	}
7247	// match: (MULA x (MOVWconst [c]) a)
7248	// cond: isPowerOfTwo32(c-1) && c >= 3
7249	// result: (ADD (ADDshiftLL <x.Type> x x [int32(log32(c-1))]) a)
7250	for {
7251		x := v_0
7252		if v_1.Op != OpARMMOVWconst {
7253			break
7254		}
7255		c := auxIntToInt32(v_1.AuxInt)
7256		a := v_2
7257		if !(isPowerOfTwo32(c-1) && c >= 3) {
7258			break
7259		}
7260		v.reset(OpARMADD)
7261		v0 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
7262		v0.AuxInt = int32ToAuxInt(int32(log32(c - 1)))
7263		v0.AddArg2(x, x)
7264		v.AddArg2(v0, a)
7265		return true
7266	}
7267	// match: (MULA x (MOVWconst [c]) a)
7268	// cond: isPowerOfTwo32(c+1) && c >= 7
7269	// result: (ADD (RSBshiftLL <x.Type> x x [int32(log32(c+1))]) a)
7270	for {
7271		x := v_0
7272		if v_1.Op != OpARMMOVWconst {
7273			break
7274		}
7275		c := auxIntToInt32(v_1.AuxInt)
7276		a := v_2
7277		if !(isPowerOfTwo32(c+1) && c >= 7) {
7278			break
7279		}
7280		v.reset(OpARMADD)
7281		v0 := b.NewValue0(v.Pos, OpARMRSBshiftLL, x.Type)
7282		v0.AuxInt = int32ToAuxInt(int32(log32(c + 1)))
7283		v0.AddArg2(x, x)
7284		v.AddArg2(v0, a)
7285		return true
7286	}
7287	// match: (MULA x (MOVWconst [c]) a)
7288	// cond: c%3 == 0 && isPowerOfTwo32(c/3)
7289	// result: (ADD (SLLconst <x.Type> [int32(log32(c/3))] (ADDshiftLL <x.Type> x x [1])) a)
7290	for {
7291		x := v_0
7292		if v_1.Op != OpARMMOVWconst {
7293			break
7294		}
7295		c := auxIntToInt32(v_1.AuxInt)
7296		a := v_2
7297		if !(c%3 == 0 && isPowerOfTwo32(c/3)) {
7298			break
7299		}
7300		v.reset(OpARMADD)
7301		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7302		v0.AuxInt = int32ToAuxInt(int32(log32(c / 3)))
7303		v1 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
7304		v1.AuxInt = int32ToAuxInt(1)
7305		v1.AddArg2(x, x)
7306		v0.AddArg(v1)
7307		v.AddArg2(v0, a)
7308		return true
7309	}
7310	// match: (MULA x (MOVWconst [c]) a)
7311	// cond: c%5 == 0 && isPowerOfTwo32(c/5)
7312	// result: (ADD (SLLconst <x.Type> [int32(log32(c/5))] (ADDshiftLL <x.Type> x x [2])) a)
7313	for {
7314		x := v_0
7315		if v_1.Op != OpARMMOVWconst {
7316			break
7317		}
7318		c := auxIntToInt32(v_1.AuxInt)
7319		a := v_2
7320		if !(c%5 == 0 && isPowerOfTwo32(c/5)) {
7321			break
7322		}
7323		v.reset(OpARMADD)
7324		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7325		v0.AuxInt = int32ToAuxInt(int32(log32(c / 5)))
7326		v1 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
7327		v1.AuxInt = int32ToAuxInt(2)
7328		v1.AddArg2(x, x)
7329		v0.AddArg(v1)
7330		v.AddArg2(v0, a)
7331		return true
7332	}
7333	// match: (MULA x (MOVWconst [c]) a)
7334	// cond: c%7 == 0 && isPowerOfTwo32(c/7)
7335	// result: (ADD (SLLconst <x.Type> [int32(log32(c/7))] (RSBshiftLL <x.Type> x x [3])) a)
7336	for {
7337		x := v_0
7338		if v_1.Op != OpARMMOVWconst {
7339			break
7340		}
7341		c := auxIntToInt32(v_1.AuxInt)
7342		a := v_2
7343		if !(c%7 == 0 && isPowerOfTwo32(c/7)) {
7344			break
7345		}
7346		v.reset(OpARMADD)
7347		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7348		v0.AuxInt = int32ToAuxInt(int32(log32(c / 7)))
7349		v1 := b.NewValue0(v.Pos, OpARMRSBshiftLL, x.Type)
7350		v1.AuxInt = int32ToAuxInt(3)
7351		v1.AddArg2(x, x)
7352		v0.AddArg(v1)
7353		v.AddArg2(v0, a)
7354		return true
7355	}
7356	// match: (MULA x (MOVWconst [c]) a)
7357	// cond: c%9 == 0 && isPowerOfTwo32(c/9)
7358	// result: (ADD (SLLconst <x.Type> [int32(log32(c/9))] (ADDshiftLL <x.Type> x x [3])) a)
7359	for {
7360		x := v_0
7361		if v_1.Op != OpARMMOVWconst {
7362			break
7363		}
7364		c := auxIntToInt32(v_1.AuxInt)
7365		a := v_2
7366		if !(c%9 == 0 && isPowerOfTwo32(c/9)) {
7367			break
7368		}
7369		v.reset(OpARMADD)
7370		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7371		v0.AuxInt = int32ToAuxInt(int32(log32(c / 9)))
7372		v1 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
7373		v1.AuxInt = int32ToAuxInt(3)
7374		v1.AddArg2(x, x)
7375		v0.AddArg(v1)
7376		v.AddArg2(v0, a)
7377		return true
7378	}
7379	// match: (MULA (MOVWconst [c]) x a)
7380	// cond: c == -1
7381	// result: (SUB a x)
7382	for {
7383		if v_0.Op != OpARMMOVWconst {
7384			break
7385		}
7386		c := auxIntToInt32(v_0.AuxInt)
7387		x := v_1
7388		a := v_2
7389		if !(c == -1) {
7390			break
7391		}
7392		v.reset(OpARMSUB)
7393		v.AddArg2(a, x)
7394		return true
7395	}
7396	// match: (MULA (MOVWconst [0]) _ a)
7397	// result: a
7398	for {
7399		if v_0.Op != OpARMMOVWconst || auxIntToInt32(v_0.AuxInt) != 0 {
7400			break
7401		}
7402		a := v_2
7403		v.copyOf(a)
7404		return true
7405	}
7406	// match: (MULA (MOVWconst [1]) x a)
7407	// result: (ADD x a)
7408	for {
7409		if v_0.Op != OpARMMOVWconst || auxIntToInt32(v_0.AuxInt) != 1 {
7410			break
7411		}
7412		x := v_1
7413		a := v_2
7414		v.reset(OpARMADD)
7415		v.AddArg2(x, a)
7416		return true
7417	}
7418	// match: (MULA (MOVWconst [c]) x a)
7419	// cond: isPowerOfTwo32(c)
7420	// result: (ADD (SLLconst <x.Type> [int32(log32(c))] x) a)
7421	for {
7422		if v_0.Op != OpARMMOVWconst {
7423			break
7424		}
7425		c := auxIntToInt32(v_0.AuxInt)
7426		x := v_1
7427		a := v_2
7428		if !(isPowerOfTwo32(c)) {
7429			break
7430		}
7431		v.reset(OpARMADD)
7432		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7433		v0.AuxInt = int32ToAuxInt(int32(log32(c)))
7434		v0.AddArg(x)
7435		v.AddArg2(v0, a)
7436		return true
7437	}
7438	// match: (MULA (MOVWconst [c]) x a)
7439	// cond: isPowerOfTwo32(c-1) && c >= 3
7440	// result: (ADD (ADDshiftLL <x.Type> x x [int32(log32(c-1))]) a)
7441	for {
7442		if v_0.Op != OpARMMOVWconst {
7443			break
7444		}
7445		c := auxIntToInt32(v_0.AuxInt)
7446		x := v_1
7447		a := v_2
7448		if !(isPowerOfTwo32(c-1) && c >= 3) {
7449			break
7450		}
7451		v.reset(OpARMADD)
7452		v0 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
7453		v0.AuxInt = int32ToAuxInt(int32(log32(c - 1)))
7454		v0.AddArg2(x, x)
7455		v.AddArg2(v0, a)
7456		return true
7457	}
7458	// match: (MULA (MOVWconst [c]) x a)
7459	// cond: isPowerOfTwo32(c+1) && c >= 7
7460	// result: (ADD (RSBshiftLL <x.Type> x x [int32(log32(c+1))]) a)
7461	for {
7462		if v_0.Op != OpARMMOVWconst {
7463			break
7464		}
7465		c := auxIntToInt32(v_0.AuxInt)
7466		x := v_1
7467		a := v_2
7468		if !(isPowerOfTwo32(c+1) && c >= 7) {
7469			break
7470		}
7471		v.reset(OpARMADD)
7472		v0 := b.NewValue0(v.Pos, OpARMRSBshiftLL, x.Type)
7473		v0.AuxInt = int32ToAuxInt(int32(log32(c + 1)))
7474		v0.AddArg2(x, x)
7475		v.AddArg2(v0, a)
7476		return true
7477	}
7478	// match: (MULA (MOVWconst [c]) x a)
7479	// cond: c%3 == 0 && isPowerOfTwo32(c/3)
7480	// result: (ADD (SLLconst <x.Type> [int32(log32(c/3))] (ADDshiftLL <x.Type> x x [1])) a)
7481	for {
7482		if v_0.Op != OpARMMOVWconst {
7483			break
7484		}
7485		c := auxIntToInt32(v_0.AuxInt)
7486		x := v_1
7487		a := v_2
7488		if !(c%3 == 0 && isPowerOfTwo32(c/3)) {
7489			break
7490		}
7491		v.reset(OpARMADD)
7492		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7493		v0.AuxInt = int32ToAuxInt(int32(log32(c / 3)))
7494		v1 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
7495		v1.AuxInt = int32ToAuxInt(1)
7496		v1.AddArg2(x, x)
7497		v0.AddArg(v1)
7498		v.AddArg2(v0, a)
7499		return true
7500	}
7501	// match: (MULA (MOVWconst [c]) x a)
7502	// cond: c%5 == 0 && isPowerOfTwo32(c/5)
7503	// result: (ADD (SLLconst <x.Type> [int32(log32(c/5))] (ADDshiftLL <x.Type> x x [2])) a)
7504	for {
7505		if v_0.Op != OpARMMOVWconst {
7506			break
7507		}
7508		c := auxIntToInt32(v_0.AuxInt)
7509		x := v_1
7510		a := v_2
7511		if !(c%5 == 0 && isPowerOfTwo32(c/5)) {
7512			break
7513		}
7514		v.reset(OpARMADD)
7515		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7516		v0.AuxInt = int32ToAuxInt(int32(log32(c / 5)))
7517		v1 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
7518		v1.AuxInt = int32ToAuxInt(2)
7519		v1.AddArg2(x, x)
7520		v0.AddArg(v1)
7521		v.AddArg2(v0, a)
7522		return true
7523	}
7524	// match: (MULA (MOVWconst [c]) x a)
7525	// cond: c%7 == 0 && isPowerOfTwo32(c/7)
7526	// result: (ADD (SLLconst <x.Type> [int32(log32(c/7))] (RSBshiftLL <x.Type> x x [3])) a)
7527	for {
7528		if v_0.Op != OpARMMOVWconst {
7529			break
7530		}
7531		c := auxIntToInt32(v_0.AuxInt)
7532		x := v_1
7533		a := v_2
7534		if !(c%7 == 0 && isPowerOfTwo32(c/7)) {
7535			break
7536		}
7537		v.reset(OpARMADD)
7538		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7539		v0.AuxInt = int32ToAuxInt(int32(log32(c / 7)))
7540		v1 := b.NewValue0(v.Pos, OpARMRSBshiftLL, x.Type)
7541		v1.AuxInt = int32ToAuxInt(3)
7542		v1.AddArg2(x, x)
7543		v0.AddArg(v1)
7544		v.AddArg2(v0, a)
7545		return true
7546	}
7547	// match: (MULA (MOVWconst [c]) x a)
7548	// cond: c%9 == 0 && isPowerOfTwo32(c/9)
7549	// result: (ADD (SLLconst <x.Type> [int32(log32(c/9))] (ADDshiftLL <x.Type> x x [3])) a)
7550	for {
7551		if v_0.Op != OpARMMOVWconst {
7552			break
7553		}
7554		c := auxIntToInt32(v_0.AuxInt)
7555		x := v_1
7556		a := v_2
7557		if !(c%9 == 0 && isPowerOfTwo32(c/9)) {
7558			break
7559		}
7560		v.reset(OpARMADD)
7561		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7562		v0.AuxInt = int32ToAuxInt(int32(log32(c / 9)))
7563		v1 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
7564		v1.AuxInt = int32ToAuxInt(3)
7565		v1.AddArg2(x, x)
7566		v0.AddArg(v1)
7567		v.AddArg2(v0, a)
7568		return true
7569	}
7570	// match: (MULA (MOVWconst [c]) (MOVWconst [d]) a)
7571	// result: (ADDconst [c*d] a)
7572	for {
7573		if v_0.Op != OpARMMOVWconst {
7574			break
7575		}
7576		c := auxIntToInt32(v_0.AuxInt)
7577		if v_1.Op != OpARMMOVWconst {
7578			break
7579		}
7580		d := auxIntToInt32(v_1.AuxInt)
7581		a := v_2
7582		v.reset(OpARMADDconst)
7583		v.AuxInt = int32ToAuxInt(c * d)
7584		v.AddArg(a)
7585		return true
7586	}
7587	return false
7588}
7589func rewriteValueARM_OpARMMULD(v *Value) bool {
7590	v_1 := v.Args[1]
7591	v_0 := v.Args[0]
7592	// match: (MULD (NEGD x) y)
7593	// cond: buildcfg.GOARM.Version >= 6
7594	// result: (NMULD x y)
7595	for {
7596		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
7597			if v_0.Op != OpARMNEGD {
7598				continue
7599			}
7600			x := v_0.Args[0]
7601			y := v_1
7602			if !(buildcfg.GOARM.Version >= 6) {
7603				continue
7604			}
7605			v.reset(OpARMNMULD)
7606			v.AddArg2(x, y)
7607			return true
7608		}
7609		break
7610	}
7611	return false
7612}
7613func rewriteValueARM_OpARMMULF(v *Value) bool {
7614	v_1 := v.Args[1]
7615	v_0 := v.Args[0]
7616	// match: (MULF (NEGF x) y)
7617	// cond: buildcfg.GOARM.Version >= 6
7618	// result: (NMULF x y)
7619	for {
7620		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
7621			if v_0.Op != OpARMNEGF {
7622				continue
7623			}
7624			x := v_0.Args[0]
7625			y := v_1
7626			if !(buildcfg.GOARM.Version >= 6) {
7627				continue
7628			}
7629			v.reset(OpARMNMULF)
7630			v.AddArg2(x, y)
7631			return true
7632		}
7633		break
7634	}
7635	return false
7636}
7637func rewriteValueARM_OpARMMULS(v *Value) bool {
7638	v_2 := v.Args[2]
7639	v_1 := v.Args[1]
7640	v_0 := v.Args[0]
7641	b := v.Block
7642	// match: (MULS x (MOVWconst [c]) a)
7643	// cond: c == -1
7644	// result: (ADD a x)
7645	for {
7646		x := v_0
7647		if v_1.Op != OpARMMOVWconst {
7648			break
7649		}
7650		c := auxIntToInt32(v_1.AuxInt)
7651		a := v_2
7652		if !(c == -1) {
7653			break
7654		}
7655		v.reset(OpARMADD)
7656		v.AddArg2(a, x)
7657		return true
7658	}
7659	// match: (MULS _ (MOVWconst [0]) a)
7660	// result: a
7661	for {
7662		if v_1.Op != OpARMMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
7663			break
7664		}
7665		a := v_2
7666		v.copyOf(a)
7667		return true
7668	}
7669	// match: (MULS x (MOVWconst [1]) a)
7670	// result: (RSB x a)
7671	for {
7672		x := v_0
7673		if v_1.Op != OpARMMOVWconst || auxIntToInt32(v_1.AuxInt) != 1 {
7674			break
7675		}
7676		a := v_2
7677		v.reset(OpARMRSB)
7678		v.AddArg2(x, a)
7679		return true
7680	}
7681	// match: (MULS x (MOVWconst [c]) a)
7682	// cond: isPowerOfTwo32(c)
7683	// result: (RSB (SLLconst <x.Type> [int32(log32(c))] x) a)
7684	for {
7685		x := v_0
7686		if v_1.Op != OpARMMOVWconst {
7687			break
7688		}
7689		c := auxIntToInt32(v_1.AuxInt)
7690		a := v_2
7691		if !(isPowerOfTwo32(c)) {
7692			break
7693		}
7694		v.reset(OpARMRSB)
7695		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7696		v0.AuxInt = int32ToAuxInt(int32(log32(c)))
7697		v0.AddArg(x)
7698		v.AddArg2(v0, a)
7699		return true
7700	}
7701	// match: (MULS x (MOVWconst [c]) a)
7702	// cond: isPowerOfTwo32(c-1) && c >= 3
7703	// result: (RSB (ADDshiftLL <x.Type> x x [int32(log32(c-1))]) a)
7704	for {
7705		x := v_0
7706		if v_1.Op != OpARMMOVWconst {
7707			break
7708		}
7709		c := auxIntToInt32(v_1.AuxInt)
7710		a := v_2
7711		if !(isPowerOfTwo32(c-1) && c >= 3) {
7712			break
7713		}
7714		v.reset(OpARMRSB)
7715		v0 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
7716		v0.AuxInt = int32ToAuxInt(int32(log32(c - 1)))
7717		v0.AddArg2(x, x)
7718		v.AddArg2(v0, a)
7719		return true
7720	}
7721	// match: (MULS x (MOVWconst [c]) a)
7722	// cond: isPowerOfTwo32(c+1) && c >= 7
7723	// result: (RSB (RSBshiftLL <x.Type> x x [int32(log32(c+1))]) a)
7724	for {
7725		x := v_0
7726		if v_1.Op != OpARMMOVWconst {
7727			break
7728		}
7729		c := auxIntToInt32(v_1.AuxInt)
7730		a := v_2
7731		if !(isPowerOfTwo32(c+1) && c >= 7) {
7732			break
7733		}
7734		v.reset(OpARMRSB)
7735		v0 := b.NewValue0(v.Pos, OpARMRSBshiftLL, x.Type)
7736		v0.AuxInt = int32ToAuxInt(int32(log32(c + 1)))
7737		v0.AddArg2(x, x)
7738		v.AddArg2(v0, a)
7739		return true
7740	}
7741	// match: (MULS x (MOVWconst [c]) a)
7742	// cond: c%3 == 0 && isPowerOfTwo32(c/3)
7743	// result: (RSB (SLLconst <x.Type> [int32(log32(c/3))] (ADDshiftLL <x.Type> x x [1])) a)
7744	for {
7745		x := v_0
7746		if v_1.Op != OpARMMOVWconst {
7747			break
7748		}
7749		c := auxIntToInt32(v_1.AuxInt)
7750		a := v_2
7751		if !(c%3 == 0 && isPowerOfTwo32(c/3)) {
7752			break
7753		}
7754		v.reset(OpARMRSB)
7755		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7756		v0.AuxInt = int32ToAuxInt(int32(log32(c / 3)))
7757		v1 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
7758		v1.AuxInt = int32ToAuxInt(1)
7759		v1.AddArg2(x, x)
7760		v0.AddArg(v1)
7761		v.AddArg2(v0, a)
7762		return true
7763	}
7764	// match: (MULS x (MOVWconst [c]) a)
7765	// cond: c%5 == 0 && isPowerOfTwo32(c/5)
7766	// result: (RSB (SLLconst <x.Type> [int32(log32(c/5))] (ADDshiftLL <x.Type> x x [2])) a)
7767	for {
7768		x := v_0
7769		if v_1.Op != OpARMMOVWconst {
7770			break
7771		}
7772		c := auxIntToInt32(v_1.AuxInt)
7773		a := v_2
7774		if !(c%5 == 0 && isPowerOfTwo32(c/5)) {
7775			break
7776		}
7777		v.reset(OpARMRSB)
7778		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7779		v0.AuxInt = int32ToAuxInt(int32(log32(c / 5)))
7780		v1 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
7781		v1.AuxInt = int32ToAuxInt(2)
7782		v1.AddArg2(x, x)
7783		v0.AddArg(v1)
7784		v.AddArg2(v0, a)
7785		return true
7786	}
7787	// match: (MULS x (MOVWconst [c]) a)
7788	// cond: c%7 == 0 && isPowerOfTwo32(c/7)
7789	// result: (RSB (SLLconst <x.Type> [int32(log32(c/7))] (RSBshiftLL <x.Type> x x [3])) a)
7790	for {
7791		x := v_0
7792		if v_1.Op != OpARMMOVWconst {
7793			break
7794		}
7795		c := auxIntToInt32(v_1.AuxInt)
7796		a := v_2
7797		if !(c%7 == 0 && isPowerOfTwo32(c/7)) {
7798			break
7799		}
7800		v.reset(OpARMRSB)
7801		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7802		v0.AuxInt = int32ToAuxInt(int32(log32(c / 7)))
7803		v1 := b.NewValue0(v.Pos, OpARMRSBshiftLL, x.Type)
7804		v1.AuxInt = int32ToAuxInt(3)
7805		v1.AddArg2(x, x)
7806		v0.AddArg(v1)
7807		v.AddArg2(v0, a)
7808		return true
7809	}
7810	// match: (MULS x (MOVWconst [c]) a)
7811	// cond: c%9 == 0 && isPowerOfTwo32(c/9)
7812	// result: (RSB (SLLconst <x.Type> [int32(log32(c/9))] (ADDshiftLL <x.Type> x x [3])) a)
7813	for {
7814		x := v_0
7815		if v_1.Op != OpARMMOVWconst {
7816			break
7817		}
7818		c := auxIntToInt32(v_1.AuxInt)
7819		a := v_2
7820		if !(c%9 == 0 && isPowerOfTwo32(c/9)) {
7821			break
7822		}
7823		v.reset(OpARMRSB)
7824		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7825		v0.AuxInt = int32ToAuxInt(int32(log32(c / 9)))
7826		v1 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
7827		v1.AuxInt = int32ToAuxInt(3)
7828		v1.AddArg2(x, x)
7829		v0.AddArg(v1)
7830		v.AddArg2(v0, a)
7831		return true
7832	}
7833	// match: (MULS (MOVWconst [c]) x a)
7834	// cond: c == -1
7835	// result: (ADD a x)
7836	for {
7837		if v_0.Op != OpARMMOVWconst {
7838			break
7839		}
7840		c := auxIntToInt32(v_0.AuxInt)
7841		x := v_1
7842		a := v_2
7843		if !(c == -1) {
7844			break
7845		}
7846		v.reset(OpARMADD)
7847		v.AddArg2(a, x)
7848		return true
7849	}
7850	// match: (MULS (MOVWconst [0]) _ a)
7851	// result: a
7852	for {
7853		if v_0.Op != OpARMMOVWconst || auxIntToInt32(v_0.AuxInt) != 0 {
7854			break
7855		}
7856		a := v_2
7857		v.copyOf(a)
7858		return true
7859	}
7860	// match: (MULS (MOVWconst [1]) x a)
7861	// result: (RSB x a)
7862	for {
7863		if v_0.Op != OpARMMOVWconst || auxIntToInt32(v_0.AuxInt) != 1 {
7864			break
7865		}
7866		x := v_1
7867		a := v_2
7868		v.reset(OpARMRSB)
7869		v.AddArg2(x, a)
7870		return true
7871	}
7872	// match: (MULS (MOVWconst [c]) x a)
7873	// cond: isPowerOfTwo32(c)
7874	// result: (RSB (SLLconst <x.Type> [int32(log32(c))] x) a)
7875	for {
7876		if v_0.Op != OpARMMOVWconst {
7877			break
7878		}
7879		c := auxIntToInt32(v_0.AuxInt)
7880		x := v_1
7881		a := v_2
7882		if !(isPowerOfTwo32(c)) {
7883			break
7884		}
7885		v.reset(OpARMRSB)
7886		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7887		v0.AuxInt = int32ToAuxInt(int32(log32(c)))
7888		v0.AddArg(x)
7889		v.AddArg2(v0, a)
7890		return true
7891	}
7892	// match: (MULS (MOVWconst [c]) x a)
7893	// cond: isPowerOfTwo32(c-1) && c >= 3
7894	// result: (RSB (ADDshiftLL <x.Type> x x [int32(log32(c-1))]) a)
7895	for {
7896		if v_0.Op != OpARMMOVWconst {
7897			break
7898		}
7899		c := auxIntToInt32(v_0.AuxInt)
7900		x := v_1
7901		a := v_2
7902		if !(isPowerOfTwo32(c-1) && c >= 3) {
7903			break
7904		}
7905		v.reset(OpARMRSB)
7906		v0 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
7907		v0.AuxInt = int32ToAuxInt(int32(log32(c - 1)))
7908		v0.AddArg2(x, x)
7909		v.AddArg2(v0, a)
7910		return true
7911	}
7912	// match: (MULS (MOVWconst [c]) x a)
7913	// cond: isPowerOfTwo32(c+1) && c >= 7
7914	// result: (RSB (RSBshiftLL <x.Type> x x [int32(log32(c+1))]) a)
7915	for {
7916		if v_0.Op != OpARMMOVWconst {
7917			break
7918		}
7919		c := auxIntToInt32(v_0.AuxInt)
7920		x := v_1
7921		a := v_2
7922		if !(isPowerOfTwo32(c+1) && c >= 7) {
7923			break
7924		}
7925		v.reset(OpARMRSB)
7926		v0 := b.NewValue0(v.Pos, OpARMRSBshiftLL, x.Type)
7927		v0.AuxInt = int32ToAuxInt(int32(log32(c + 1)))
7928		v0.AddArg2(x, x)
7929		v.AddArg2(v0, a)
7930		return true
7931	}
7932	// match: (MULS (MOVWconst [c]) x a)
7933	// cond: c%3 == 0 && isPowerOfTwo32(c/3)
7934	// result: (RSB (SLLconst <x.Type> [int32(log32(c/3))] (ADDshiftLL <x.Type> x x [1])) a)
7935	for {
7936		if v_0.Op != OpARMMOVWconst {
7937			break
7938		}
7939		c := auxIntToInt32(v_0.AuxInt)
7940		x := v_1
7941		a := v_2
7942		if !(c%3 == 0 && isPowerOfTwo32(c/3)) {
7943			break
7944		}
7945		v.reset(OpARMRSB)
7946		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7947		v0.AuxInt = int32ToAuxInt(int32(log32(c / 3)))
7948		v1 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
7949		v1.AuxInt = int32ToAuxInt(1)
7950		v1.AddArg2(x, x)
7951		v0.AddArg(v1)
7952		v.AddArg2(v0, a)
7953		return true
7954	}
7955	// match: (MULS (MOVWconst [c]) x a)
7956	// cond: c%5 == 0 && isPowerOfTwo32(c/5)
7957	// result: (RSB (SLLconst <x.Type> [int32(log32(c/5))] (ADDshiftLL <x.Type> x x [2])) a)
7958	for {
7959		if v_0.Op != OpARMMOVWconst {
7960			break
7961		}
7962		c := auxIntToInt32(v_0.AuxInt)
7963		x := v_1
7964		a := v_2
7965		if !(c%5 == 0 && isPowerOfTwo32(c/5)) {
7966			break
7967		}
7968		v.reset(OpARMRSB)
7969		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7970		v0.AuxInt = int32ToAuxInt(int32(log32(c / 5)))
7971		v1 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
7972		v1.AuxInt = int32ToAuxInt(2)
7973		v1.AddArg2(x, x)
7974		v0.AddArg(v1)
7975		v.AddArg2(v0, a)
7976		return true
7977	}
7978	// match: (MULS (MOVWconst [c]) x a)
7979	// cond: c%7 == 0 && isPowerOfTwo32(c/7)
7980	// result: (RSB (SLLconst <x.Type> [int32(log32(c/7))] (RSBshiftLL <x.Type> x x [3])) a)
7981	for {
7982		if v_0.Op != OpARMMOVWconst {
7983			break
7984		}
7985		c := auxIntToInt32(v_0.AuxInt)
7986		x := v_1
7987		a := v_2
7988		if !(c%7 == 0 && isPowerOfTwo32(c/7)) {
7989			break
7990		}
7991		v.reset(OpARMRSB)
7992		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
7993		v0.AuxInt = int32ToAuxInt(int32(log32(c / 7)))
7994		v1 := b.NewValue0(v.Pos, OpARMRSBshiftLL, x.Type)
7995		v1.AuxInt = int32ToAuxInt(3)
7996		v1.AddArg2(x, x)
7997		v0.AddArg(v1)
7998		v.AddArg2(v0, a)
7999		return true
8000	}
8001	// match: (MULS (MOVWconst [c]) x a)
8002	// cond: c%9 == 0 && isPowerOfTwo32(c/9)
8003	// result: (RSB (SLLconst <x.Type> [int32(log32(c/9))] (ADDshiftLL <x.Type> x x [3])) a)
8004	for {
8005		if v_0.Op != OpARMMOVWconst {
8006			break
8007		}
8008		c := auxIntToInt32(v_0.AuxInt)
8009		x := v_1
8010		a := v_2
8011		if !(c%9 == 0 && isPowerOfTwo32(c/9)) {
8012			break
8013		}
8014		v.reset(OpARMRSB)
8015		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
8016		v0.AuxInt = int32ToAuxInt(int32(log32(c / 9)))
8017		v1 := b.NewValue0(v.Pos, OpARMADDshiftLL, x.Type)
8018		v1.AuxInt = int32ToAuxInt(3)
8019		v1.AddArg2(x, x)
8020		v0.AddArg(v1)
8021		v.AddArg2(v0, a)
8022		return true
8023	}
8024	// match: (MULS (MOVWconst [c]) (MOVWconst [d]) a)
8025	// result: (SUBconst [c*d] a)
8026	for {
8027		if v_0.Op != OpARMMOVWconst {
8028			break
8029		}
8030		c := auxIntToInt32(v_0.AuxInt)
8031		if v_1.Op != OpARMMOVWconst {
8032			break
8033		}
8034		d := auxIntToInt32(v_1.AuxInt)
8035		a := v_2
8036		v.reset(OpARMSUBconst)
8037		v.AuxInt = int32ToAuxInt(c * d)
8038		v.AddArg(a)
8039		return true
8040	}
8041	return false
8042}
8043func rewriteValueARM_OpARMMVN(v *Value) bool {
8044	v_0 := v.Args[0]
8045	// match: (MVN (MOVWconst [c]))
8046	// result: (MOVWconst [^c])
8047	for {
8048		if v_0.Op != OpARMMOVWconst {
8049			break
8050		}
8051		c := auxIntToInt32(v_0.AuxInt)
8052		v.reset(OpARMMOVWconst)
8053		v.AuxInt = int32ToAuxInt(^c)
8054		return true
8055	}
8056	// match: (MVN (SLLconst [c] x))
8057	// result: (MVNshiftLL x [c])
8058	for {
8059		if v_0.Op != OpARMSLLconst {
8060			break
8061		}
8062		c := auxIntToInt32(v_0.AuxInt)
8063		x := v_0.Args[0]
8064		v.reset(OpARMMVNshiftLL)
8065		v.AuxInt = int32ToAuxInt(c)
8066		v.AddArg(x)
8067		return true
8068	}
8069	// match: (MVN (SRLconst [c] x))
8070	// result: (MVNshiftRL x [c])
8071	for {
8072		if v_0.Op != OpARMSRLconst {
8073			break
8074		}
8075		c := auxIntToInt32(v_0.AuxInt)
8076		x := v_0.Args[0]
8077		v.reset(OpARMMVNshiftRL)
8078		v.AuxInt = int32ToAuxInt(c)
8079		v.AddArg(x)
8080		return true
8081	}
8082	// match: (MVN (SRAconst [c] x))
8083	// result: (MVNshiftRA x [c])
8084	for {
8085		if v_0.Op != OpARMSRAconst {
8086			break
8087		}
8088		c := auxIntToInt32(v_0.AuxInt)
8089		x := v_0.Args[0]
8090		v.reset(OpARMMVNshiftRA)
8091		v.AuxInt = int32ToAuxInt(c)
8092		v.AddArg(x)
8093		return true
8094	}
8095	// match: (MVN (SLL x y))
8096	// result: (MVNshiftLLreg x y)
8097	for {
8098		if v_0.Op != OpARMSLL {
8099			break
8100		}
8101		y := v_0.Args[1]
8102		x := v_0.Args[0]
8103		v.reset(OpARMMVNshiftLLreg)
8104		v.AddArg2(x, y)
8105		return true
8106	}
8107	// match: (MVN (SRL x y))
8108	// result: (MVNshiftRLreg x y)
8109	for {
8110		if v_0.Op != OpARMSRL {
8111			break
8112		}
8113		y := v_0.Args[1]
8114		x := v_0.Args[0]
8115		v.reset(OpARMMVNshiftRLreg)
8116		v.AddArg2(x, y)
8117		return true
8118	}
8119	// match: (MVN (SRA x y))
8120	// result: (MVNshiftRAreg x y)
8121	for {
8122		if v_0.Op != OpARMSRA {
8123			break
8124		}
8125		y := v_0.Args[1]
8126		x := v_0.Args[0]
8127		v.reset(OpARMMVNshiftRAreg)
8128		v.AddArg2(x, y)
8129		return true
8130	}
8131	return false
8132}
8133func rewriteValueARM_OpARMMVNshiftLL(v *Value) bool {
8134	v_0 := v.Args[0]
8135	// match: (MVNshiftLL (MOVWconst [c]) [d])
8136	// result: (MOVWconst [^(c<<uint64(d))])
8137	for {
8138		d := auxIntToInt32(v.AuxInt)
8139		if v_0.Op != OpARMMOVWconst {
8140			break
8141		}
8142		c := auxIntToInt32(v_0.AuxInt)
8143		v.reset(OpARMMOVWconst)
8144		v.AuxInt = int32ToAuxInt(^(c << uint64(d)))
8145		return true
8146	}
8147	return false
8148}
8149func rewriteValueARM_OpARMMVNshiftLLreg(v *Value) bool {
8150	v_1 := v.Args[1]
8151	v_0 := v.Args[0]
8152	// match: (MVNshiftLLreg x (MOVWconst [c]))
8153	// cond: 0 <= c && c < 32
8154	// result: (MVNshiftLL x [c])
8155	for {
8156		x := v_0
8157		if v_1.Op != OpARMMOVWconst {
8158			break
8159		}
8160		c := auxIntToInt32(v_1.AuxInt)
8161		if !(0 <= c && c < 32) {
8162			break
8163		}
8164		v.reset(OpARMMVNshiftLL)
8165		v.AuxInt = int32ToAuxInt(c)
8166		v.AddArg(x)
8167		return true
8168	}
8169	return false
8170}
8171func rewriteValueARM_OpARMMVNshiftRA(v *Value) bool {
8172	v_0 := v.Args[0]
8173	// match: (MVNshiftRA (MOVWconst [c]) [d])
8174	// result: (MOVWconst [int32(c)>>uint64(d)])
8175	for {
8176		d := auxIntToInt32(v.AuxInt)
8177		if v_0.Op != OpARMMOVWconst {
8178			break
8179		}
8180		c := auxIntToInt32(v_0.AuxInt)
8181		v.reset(OpARMMOVWconst)
8182		v.AuxInt = int32ToAuxInt(int32(c) >> uint64(d))
8183		return true
8184	}
8185	return false
8186}
8187func rewriteValueARM_OpARMMVNshiftRAreg(v *Value) bool {
8188	v_1 := v.Args[1]
8189	v_0 := v.Args[0]
8190	// match: (MVNshiftRAreg x (MOVWconst [c]))
8191	// cond: 0 <= c && c < 32
8192	// result: (MVNshiftRA x [c])
8193	for {
8194		x := v_0
8195		if v_1.Op != OpARMMOVWconst {
8196			break
8197		}
8198		c := auxIntToInt32(v_1.AuxInt)
8199		if !(0 <= c && c < 32) {
8200			break
8201		}
8202		v.reset(OpARMMVNshiftRA)
8203		v.AuxInt = int32ToAuxInt(c)
8204		v.AddArg(x)
8205		return true
8206	}
8207	return false
8208}
8209func rewriteValueARM_OpARMMVNshiftRL(v *Value) bool {
8210	v_0 := v.Args[0]
8211	// match: (MVNshiftRL (MOVWconst [c]) [d])
8212	// result: (MOVWconst [^int32(uint32(c)>>uint64(d))])
8213	for {
8214		d := auxIntToInt32(v.AuxInt)
8215		if v_0.Op != OpARMMOVWconst {
8216			break
8217		}
8218		c := auxIntToInt32(v_0.AuxInt)
8219		v.reset(OpARMMOVWconst)
8220		v.AuxInt = int32ToAuxInt(^int32(uint32(c) >> uint64(d)))
8221		return true
8222	}
8223	return false
8224}
8225func rewriteValueARM_OpARMMVNshiftRLreg(v *Value) bool {
8226	v_1 := v.Args[1]
8227	v_0 := v.Args[0]
8228	// match: (MVNshiftRLreg x (MOVWconst [c]))
8229	// cond: 0 <= c && c < 32
8230	// result: (MVNshiftRL x [c])
8231	for {
8232		x := v_0
8233		if v_1.Op != OpARMMOVWconst {
8234			break
8235		}
8236		c := auxIntToInt32(v_1.AuxInt)
8237		if !(0 <= c && c < 32) {
8238			break
8239		}
8240		v.reset(OpARMMVNshiftRL)
8241		v.AuxInt = int32ToAuxInt(c)
8242		v.AddArg(x)
8243		return true
8244	}
8245	return false
8246}
8247func rewriteValueARM_OpARMNEGD(v *Value) bool {
8248	v_0 := v.Args[0]
8249	// match: (NEGD (MULD x y))
8250	// cond: buildcfg.GOARM.Version >= 6
8251	// result: (NMULD x y)
8252	for {
8253		if v_0.Op != OpARMMULD {
8254			break
8255		}
8256		y := v_0.Args[1]
8257		x := v_0.Args[0]
8258		if !(buildcfg.GOARM.Version >= 6) {
8259			break
8260		}
8261		v.reset(OpARMNMULD)
8262		v.AddArg2(x, y)
8263		return true
8264	}
8265	return false
8266}
8267func rewriteValueARM_OpARMNEGF(v *Value) bool {
8268	v_0 := v.Args[0]
8269	// match: (NEGF (MULF x y))
8270	// cond: buildcfg.GOARM.Version >= 6
8271	// result: (NMULF x y)
8272	for {
8273		if v_0.Op != OpARMMULF {
8274			break
8275		}
8276		y := v_0.Args[1]
8277		x := v_0.Args[0]
8278		if !(buildcfg.GOARM.Version >= 6) {
8279			break
8280		}
8281		v.reset(OpARMNMULF)
8282		v.AddArg2(x, y)
8283		return true
8284	}
8285	return false
8286}
8287func rewriteValueARM_OpARMNMULD(v *Value) bool {
8288	v_1 := v.Args[1]
8289	v_0 := v.Args[0]
8290	// match: (NMULD (NEGD x) y)
8291	// result: (MULD x y)
8292	for {
8293		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
8294			if v_0.Op != OpARMNEGD {
8295				continue
8296			}
8297			x := v_0.Args[0]
8298			y := v_1
8299			v.reset(OpARMMULD)
8300			v.AddArg2(x, y)
8301			return true
8302		}
8303		break
8304	}
8305	return false
8306}
8307func rewriteValueARM_OpARMNMULF(v *Value) bool {
8308	v_1 := v.Args[1]
8309	v_0 := v.Args[0]
8310	// match: (NMULF (NEGF x) y)
8311	// result: (MULF x y)
8312	for {
8313		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
8314			if v_0.Op != OpARMNEGF {
8315				continue
8316			}
8317			x := v_0.Args[0]
8318			y := v_1
8319			v.reset(OpARMMULF)
8320			v.AddArg2(x, y)
8321			return true
8322		}
8323		break
8324	}
8325	return false
8326}
8327func rewriteValueARM_OpARMNotEqual(v *Value) bool {
8328	v_0 := v.Args[0]
8329	// match: (NotEqual (FlagConstant [fc]))
8330	// result: (MOVWconst [b2i32(fc.ne())])
8331	for {
8332		if v_0.Op != OpARMFlagConstant {
8333			break
8334		}
8335		fc := auxIntToFlagConstant(v_0.AuxInt)
8336		v.reset(OpARMMOVWconst)
8337		v.AuxInt = int32ToAuxInt(b2i32(fc.ne()))
8338		return true
8339	}
8340	// match: (NotEqual (InvertFlags x))
8341	// result: (NotEqual x)
8342	for {
8343		if v_0.Op != OpARMInvertFlags {
8344			break
8345		}
8346		x := v_0.Args[0]
8347		v.reset(OpARMNotEqual)
8348		v.AddArg(x)
8349		return true
8350	}
8351	return false
8352}
8353func rewriteValueARM_OpARMOR(v *Value) bool {
8354	v_1 := v.Args[1]
8355	v_0 := v.Args[0]
8356	// match: (OR x (MOVWconst [c]))
8357	// result: (ORconst [c] x)
8358	for {
8359		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
8360			x := v_0
8361			if v_1.Op != OpARMMOVWconst {
8362				continue
8363			}
8364			c := auxIntToInt32(v_1.AuxInt)
8365			v.reset(OpARMORconst)
8366			v.AuxInt = int32ToAuxInt(c)
8367			v.AddArg(x)
8368			return true
8369		}
8370		break
8371	}
8372	// match: (OR x (SLLconst [c] y))
8373	// result: (ORshiftLL x y [c])
8374	for {
8375		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
8376			x := v_0
8377			if v_1.Op != OpARMSLLconst {
8378				continue
8379			}
8380			c := auxIntToInt32(v_1.AuxInt)
8381			y := v_1.Args[0]
8382			v.reset(OpARMORshiftLL)
8383			v.AuxInt = int32ToAuxInt(c)
8384			v.AddArg2(x, y)
8385			return true
8386		}
8387		break
8388	}
8389	// match: (OR x (SRLconst [c] y))
8390	// result: (ORshiftRL x y [c])
8391	for {
8392		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
8393			x := v_0
8394			if v_1.Op != OpARMSRLconst {
8395				continue
8396			}
8397			c := auxIntToInt32(v_1.AuxInt)
8398			y := v_1.Args[0]
8399			v.reset(OpARMORshiftRL)
8400			v.AuxInt = int32ToAuxInt(c)
8401			v.AddArg2(x, y)
8402			return true
8403		}
8404		break
8405	}
8406	// match: (OR x (SRAconst [c] y))
8407	// result: (ORshiftRA x y [c])
8408	for {
8409		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
8410			x := v_0
8411			if v_1.Op != OpARMSRAconst {
8412				continue
8413			}
8414			c := auxIntToInt32(v_1.AuxInt)
8415			y := v_1.Args[0]
8416			v.reset(OpARMORshiftRA)
8417			v.AuxInt = int32ToAuxInt(c)
8418			v.AddArg2(x, y)
8419			return true
8420		}
8421		break
8422	}
8423	// match: (OR x (SLL y z))
8424	// result: (ORshiftLLreg x y z)
8425	for {
8426		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
8427			x := v_0
8428			if v_1.Op != OpARMSLL {
8429				continue
8430			}
8431			z := v_1.Args[1]
8432			y := v_1.Args[0]
8433			v.reset(OpARMORshiftLLreg)
8434			v.AddArg3(x, y, z)
8435			return true
8436		}
8437		break
8438	}
8439	// match: (OR x (SRL y z))
8440	// result: (ORshiftRLreg x y z)
8441	for {
8442		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
8443			x := v_0
8444			if v_1.Op != OpARMSRL {
8445				continue
8446			}
8447			z := v_1.Args[1]
8448			y := v_1.Args[0]
8449			v.reset(OpARMORshiftRLreg)
8450			v.AddArg3(x, y, z)
8451			return true
8452		}
8453		break
8454	}
8455	// match: (OR x (SRA y z))
8456	// result: (ORshiftRAreg x y z)
8457	for {
8458		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
8459			x := v_0
8460			if v_1.Op != OpARMSRA {
8461				continue
8462			}
8463			z := v_1.Args[1]
8464			y := v_1.Args[0]
8465			v.reset(OpARMORshiftRAreg)
8466			v.AddArg3(x, y, z)
8467			return true
8468		}
8469		break
8470	}
8471	// match: (OR x x)
8472	// result: x
8473	for {
8474		x := v_0
8475		if x != v_1 {
8476			break
8477		}
8478		v.copyOf(x)
8479		return true
8480	}
8481	return false
8482}
8483func rewriteValueARM_OpARMORconst(v *Value) bool {
8484	v_0 := v.Args[0]
8485	// match: (ORconst [0] x)
8486	// result: x
8487	for {
8488		if auxIntToInt32(v.AuxInt) != 0 {
8489			break
8490		}
8491		x := v_0
8492		v.copyOf(x)
8493		return true
8494	}
8495	// match: (ORconst [c] _)
8496	// cond: int32(c)==-1
8497	// result: (MOVWconst [-1])
8498	for {
8499		c := auxIntToInt32(v.AuxInt)
8500		if !(int32(c) == -1) {
8501			break
8502		}
8503		v.reset(OpARMMOVWconst)
8504		v.AuxInt = int32ToAuxInt(-1)
8505		return true
8506	}
8507	// match: (ORconst [c] (MOVWconst [d]))
8508	// result: (MOVWconst [c|d])
8509	for {
8510		c := auxIntToInt32(v.AuxInt)
8511		if v_0.Op != OpARMMOVWconst {
8512			break
8513		}
8514		d := auxIntToInt32(v_0.AuxInt)
8515		v.reset(OpARMMOVWconst)
8516		v.AuxInt = int32ToAuxInt(c | d)
8517		return true
8518	}
8519	// match: (ORconst [c] (ORconst [d] x))
8520	// result: (ORconst [c|d] x)
8521	for {
8522		c := auxIntToInt32(v.AuxInt)
8523		if v_0.Op != OpARMORconst {
8524			break
8525		}
8526		d := auxIntToInt32(v_0.AuxInt)
8527		x := v_0.Args[0]
8528		v.reset(OpARMORconst)
8529		v.AuxInt = int32ToAuxInt(c | d)
8530		v.AddArg(x)
8531		return true
8532	}
8533	return false
8534}
8535func rewriteValueARM_OpARMORshiftLL(v *Value) bool {
8536	v_1 := v.Args[1]
8537	v_0 := v.Args[0]
8538	b := v.Block
8539	typ := &b.Func.Config.Types
8540	// match: (ORshiftLL (MOVWconst [c]) x [d])
8541	// result: (ORconst [c] (SLLconst <x.Type> x [d]))
8542	for {
8543		d := auxIntToInt32(v.AuxInt)
8544		if v_0.Op != OpARMMOVWconst {
8545			break
8546		}
8547		c := auxIntToInt32(v_0.AuxInt)
8548		x := v_1
8549		v.reset(OpARMORconst)
8550		v.AuxInt = int32ToAuxInt(c)
8551		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
8552		v0.AuxInt = int32ToAuxInt(d)
8553		v0.AddArg(x)
8554		v.AddArg(v0)
8555		return true
8556	}
8557	// match: (ORshiftLL x (MOVWconst [c]) [d])
8558	// result: (ORconst x [c<<uint64(d)])
8559	for {
8560		d := auxIntToInt32(v.AuxInt)
8561		x := v_0
8562		if v_1.Op != OpARMMOVWconst {
8563			break
8564		}
8565		c := auxIntToInt32(v_1.AuxInt)
8566		v.reset(OpARMORconst)
8567		v.AuxInt = int32ToAuxInt(c << uint64(d))
8568		v.AddArg(x)
8569		return true
8570	}
8571	// match: (ORshiftLL <typ.UInt16> [8] (BFXU <typ.UInt16> [int32(armBFAuxInt(8, 8))] x) x)
8572	// result: (REV16 x)
8573	for {
8574		if v.Type != typ.UInt16 || auxIntToInt32(v.AuxInt) != 8 || v_0.Op != OpARMBFXU || v_0.Type != typ.UInt16 || auxIntToInt32(v_0.AuxInt) != int32(armBFAuxInt(8, 8)) {
8575			break
8576		}
8577		x := v_0.Args[0]
8578		if x != v_1 {
8579			break
8580		}
8581		v.reset(OpARMREV16)
8582		v.AddArg(x)
8583		return true
8584	}
8585	// match: (ORshiftLL <typ.UInt16> [8] (SRLconst <typ.UInt16> [24] (SLLconst [16] x)) x)
8586	// cond: buildcfg.GOARM.Version>=6
8587	// result: (REV16 x)
8588	for {
8589		if v.Type != typ.UInt16 || auxIntToInt32(v.AuxInt) != 8 || v_0.Op != OpARMSRLconst || v_0.Type != typ.UInt16 || auxIntToInt32(v_0.AuxInt) != 24 {
8590			break
8591		}
8592		v_0_0 := v_0.Args[0]
8593		if v_0_0.Op != OpARMSLLconst || auxIntToInt32(v_0_0.AuxInt) != 16 {
8594			break
8595		}
8596		x := v_0_0.Args[0]
8597		if x != v_1 || !(buildcfg.GOARM.Version >= 6) {
8598			break
8599		}
8600		v.reset(OpARMREV16)
8601		v.AddArg(x)
8602		return true
8603	}
8604	// match: (ORshiftLL y:(SLLconst x [c]) x [c])
8605	// result: y
8606	for {
8607		c := auxIntToInt32(v.AuxInt)
8608		y := v_0
8609		if y.Op != OpARMSLLconst || auxIntToInt32(y.AuxInt) != c {
8610			break
8611		}
8612		x := y.Args[0]
8613		if x != v_1 {
8614			break
8615		}
8616		v.copyOf(y)
8617		return true
8618	}
8619	return false
8620}
8621func rewriteValueARM_OpARMORshiftLLreg(v *Value) bool {
8622	v_2 := v.Args[2]
8623	v_1 := v.Args[1]
8624	v_0 := v.Args[0]
8625	b := v.Block
8626	// match: (ORshiftLLreg (MOVWconst [c]) x y)
8627	// result: (ORconst [c] (SLL <x.Type> x y))
8628	for {
8629		if v_0.Op != OpARMMOVWconst {
8630			break
8631		}
8632		c := auxIntToInt32(v_0.AuxInt)
8633		x := v_1
8634		y := v_2
8635		v.reset(OpARMORconst)
8636		v.AuxInt = int32ToAuxInt(c)
8637		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
8638		v0.AddArg2(x, y)
8639		v.AddArg(v0)
8640		return true
8641	}
8642	// match: (ORshiftLLreg x y (MOVWconst [c]))
8643	// cond: 0 <= c && c < 32
8644	// result: (ORshiftLL x y [c])
8645	for {
8646		x := v_0
8647		y := v_1
8648		if v_2.Op != OpARMMOVWconst {
8649			break
8650		}
8651		c := auxIntToInt32(v_2.AuxInt)
8652		if !(0 <= c && c < 32) {
8653			break
8654		}
8655		v.reset(OpARMORshiftLL)
8656		v.AuxInt = int32ToAuxInt(c)
8657		v.AddArg2(x, y)
8658		return true
8659	}
8660	return false
8661}
8662func rewriteValueARM_OpARMORshiftRA(v *Value) bool {
8663	v_1 := v.Args[1]
8664	v_0 := v.Args[0]
8665	b := v.Block
8666	// match: (ORshiftRA (MOVWconst [c]) x [d])
8667	// result: (ORconst [c] (SRAconst <x.Type> x [d]))
8668	for {
8669		d := auxIntToInt32(v.AuxInt)
8670		if v_0.Op != OpARMMOVWconst {
8671			break
8672		}
8673		c := auxIntToInt32(v_0.AuxInt)
8674		x := v_1
8675		v.reset(OpARMORconst)
8676		v.AuxInt = int32ToAuxInt(c)
8677		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
8678		v0.AuxInt = int32ToAuxInt(d)
8679		v0.AddArg(x)
8680		v.AddArg(v0)
8681		return true
8682	}
8683	// match: (ORshiftRA x (MOVWconst [c]) [d])
8684	// result: (ORconst x [c>>uint64(d)])
8685	for {
8686		d := auxIntToInt32(v.AuxInt)
8687		x := v_0
8688		if v_1.Op != OpARMMOVWconst {
8689			break
8690		}
8691		c := auxIntToInt32(v_1.AuxInt)
8692		v.reset(OpARMORconst)
8693		v.AuxInt = int32ToAuxInt(c >> uint64(d))
8694		v.AddArg(x)
8695		return true
8696	}
8697	// match: (ORshiftRA y:(SRAconst x [c]) x [c])
8698	// result: y
8699	for {
8700		c := auxIntToInt32(v.AuxInt)
8701		y := v_0
8702		if y.Op != OpARMSRAconst || auxIntToInt32(y.AuxInt) != c {
8703			break
8704		}
8705		x := y.Args[0]
8706		if x != v_1 {
8707			break
8708		}
8709		v.copyOf(y)
8710		return true
8711	}
8712	return false
8713}
8714func rewriteValueARM_OpARMORshiftRAreg(v *Value) bool {
8715	v_2 := v.Args[2]
8716	v_1 := v.Args[1]
8717	v_0 := v.Args[0]
8718	b := v.Block
8719	// match: (ORshiftRAreg (MOVWconst [c]) x y)
8720	// result: (ORconst [c] (SRA <x.Type> x y))
8721	for {
8722		if v_0.Op != OpARMMOVWconst {
8723			break
8724		}
8725		c := auxIntToInt32(v_0.AuxInt)
8726		x := v_1
8727		y := v_2
8728		v.reset(OpARMORconst)
8729		v.AuxInt = int32ToAuxInt(c)
8730		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
8731		v0.AddArg2(x, y)
8732		v.AddArg(v0)
8733		return true
8734	}
8735	// match: (ORshiftRAreg x y (MOVWconst [c]))
8736	// cond: 0 <= c && c < 32
8737	// result: (ORshiftRA x y [c])
8738	for {
8739		x := v_0
8740		y := v_1
8741		if v_2.Op != OpARMMOVWconst {
8742			break
8743		}
8744		c := auxIntToInt32(v_2.AuxInt)
8745		if !(0 <= c && c < 32) {
8746			break
8747		}
8748		v.reset(OpARMORshiftRA)
8749		v.AuxInt = int32ToAuxInt(c)
8750		v.AddArg2(x, y)
8751		return true
8752	}
8753	return false
8754}
8755func rewriteValueARM_OpARMORshiftRL(v *Value) bool {
8756	v_1 := v.Args[1]
8757	v_0 := v.Args[0]
8758	b := v.Block
8759	// match: (ORshiftRL (MOVWconst [c]) x [d])
8760	// result: (ORconst [c] (SRLconst <x.Type> x [d]))
8761	for {
8762		d := auxIntToInt32(v.AuxInt)
8763		if v_0.Op != OpARMMOVWconst {
8764			break
8765		}
8766		c := auxIntToInt32(v_0.AuxInt)
8767		x := v_1
8768		v.reset(OpARMORconst)
8769		v.AuxInt = int32ToAuxInt(c)
8770		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
8771		v0.AuxInt = int32ToAuxInt(d)
8772		v0.AddArg(x)
8773		v.AddArg(v0)
8774		return true
8775	}
8776	// match: (ORshiftRL x (MOVWconst [c]) [d])
8777	// result: (ORconst x [int32(uint32(c)>>uint64(d))])
8778	for {
8779		d := auxIntToInt32(v.AuxInt)
8780		x := v_0
8781		if v_1.Op != OpARMMOVWconst {
8782			break
8783		}
8784		c := auxIntToInt32(v_1.AuxInt)
8785		v.reset(OpARMORconst)
8786		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
8787		v.AddArg(x)
8788		return true
8789	}
8790	// match: (ORshiftRL y:(SRLconst x [c]) x [c])
8791	// result: y
8792	for {
8793		c := auxIntToInt32(v.AuxInt)
8794		y := v_0
8795		if y.Op != OpARMSRLconst || auxIntToInt32(y.AuxInt) != c {
8796			break
8797		}
8798		x := y.Args[0]
8799		if x != v_1 {
8800			break
8801		}
8802		v.copyOf(y)
8803		return true
8804	}
8805	return false
8806}
8807func rewriteValueARM_OpARMORshiftRLreg(v *Value) bool {
8808	v_2 := v.Args[2]
8809	v_1 := v.Args[1]
8810	v_0 := v.Args[0]
8811	b := v.Block
8812	// match: (ORshiftRLreg (MOVWconst [c]) x y)
8813	// result: (ORconst [c] (SRL <x.Type> x y))
8814	for {
8815		if v_0.Op != OpARMMOVWconst {
8816			break
8817		}
8818		c := auxIntToInt32(v_0.AuxInt)
8819		x := v_1
8820		y := v_2
8821		v.reset(OpARMORconst)
8822		v.AuxInt = int32ToAuxInt(c)
8823		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
8824		v0.AddArg2(x, y)
8825		v.AddArg(v0)
8826		return true
8827	}
8828	// match: (ORshiftRLreg x y (MOVWconst [c]))
8829	// cond: 0 <= c && c < 32
8830	// result: (ORshiftRL x y [c])
8831	for {
8832		x := v_0
8833		y := v_1
8834		if v_2.Op != OpARMMOVWconst {
8835			break
8836		}
8837		c := auxIntToInt32(v_2.AuxInt)
8838		if !(0 <= c && c < 32) {
8839			break
8840		}
8841		v.reset(OpARMORshiftRL)
8842		v.AuxInt = int32ToAuxInt(c)
8843		v.AddArg2(x, y)
8844		return true
8845	}
8846	return false
8847}
8848func rewriteValueARM_OpARMRSB(v *Value) bool {
8849	v_1 := v.Args[1]
8850	v_0 := v.Args[0]
8851	// match: (RSB (MOVWconst [c]) x)
8852	// result: (SUBconst [c] x)
8853	for {
8854		if v_0.Op != OpARMMOVWconst {
8855			break
8856		}
8857		c := auxIntToInt32(v_0.AuxInt)
8858		x := v_1
8859		v.reset(OpARMSUBconst)
8860		v.AuxInt = int32ToAuxInt(c)
8861		v.AddArg(x)
8862		return true
8863	}
8864	// match: (RSB x (MOVWconst [c]))
8865	// result: (RSBconst [c] x)
8866	for {
8867		x := v_0
8868		if v_1.Op != OpARMMOVWconst {
8869			break
8870		}
8871		c := auxIntToInt32(v_1.AuxInt)
8872		v.reset(OpARMRSBconst)
8873		v.AuxInt = int32ToAuxInt(c)
8874		v.AddArg(x)
8875		return true
8876	}
8877	// match: (RSB x (SLLconst [c] y))
8878	// result: (RSBshiftLL x y [c])
8879	for {
8880		x := v_0
8881		if v_1.Op != OpARMSLLconst {
8882			break
8883		}
8884		c := auxIntToInt32(v_1.AuxInt)
8885		y := v_1.Args[0]
8886		v.reset(OpARMRSBshiftLL)
8887		v.AuxInt = int32ToAuxInt(c)
8888		v.AddArg2(x, y)
8889		return true
8890	}
8891	// match: (RSB (SLLconst [c] y) x)
8892	// result: (SUBshiftLL x y [c])
8893	for {
8894		if v_0.Op != OpARMSLLconst {
8895			break
8896		}
8897		c := auxIntToInt32(v_0.AuxInt)
8898		y := v_0.Args[0]
8899		x := v_1
8900		v.reset(OpARMSUBshiftLL)
8901		v.AuxInt = int32ToAuxInt(c)
8902		v.AddArg2(x, y)
8903		return true
8904	}
8905	// match: (RSB x (SRLconst [c] y))
8906	// result: (RSBshiftRL x y [c])
8907	for {
8908		x := v_0
8909		if v_1.Op != OpARMSRLconst {
8910			break
8911		}
8912		c := auxIntToInt32(v_1.AuxInt)
8913		y := v_1.Args[0]
8914		v.reset(OpARMRSBshiftRL)
8915		v.AuxInt = int32ToAuxInt(c)
8916		v.AddArg2(x, y)
8917		return true
8918	}
8919	// match: (RSB (SRLconst [c] y) x)
8920	// result: (SUBshiftRL x y [c])
8921	for {
8922		if v_0.Op != OpARMSRLconst {
8923			break
8924		}
8925		c := auxIntToInt32(v_0.AuxInt)
8926		y := v_0.Args[0]
8927		x := v_1
8928		v.reset(OpARMSUBshiftRL)
8929		v.AuxInt = int32ToAuxInt(c)
8930		v.AddArg2(x, y)
8931		return true
8932	}
8933	// match: (RSB x (SRAconst [c] y))
8934	// result: (RSBshiftRA x y [c])
8935	for {
8936		x := v_0
8937		if v_1.Op != OpARMSRAconst {
8938			break
8939		}
8940		c := auxIntToInt32(v_1.AuxInt)
8941		y := v_1.Args[0]
8942		v.reset(OpARMRSBshiftRA)
8943		v.AuxInt = int32ToAuxInt(c)
8944		v.AddArg2(x, y)
8945		return true
8946	}
8947	// match: (RSB (SRAconst [c] y) x)
8948	// result: (SUBshiftRA x y [c])
8949	for {
8950		if v_0.Op != OpARMSRAconst {
8951			break
8952		}
8953		c := auxIntToInt32(v_0.AuxInt)
8954		y := v_0.Args[0]
8955		x := v_1
8956		v.reset(OpARMSUBshiftRA)
8957		v.AuxInt = int32ToAuxInt(c)
8958		v.AddArg2(x, y)
8959		return true
8960	}
8961	// match: (RSB x (SLL y z))
8962	// result: (RSBshiftLLreg x y z)
8963	for {
8964		x := v_0
8965		if v_1.Op != OpARMSLL {
8966			break
8967		}
8968		z := v_1.Args[1]
8969		y := v_1.Args[0]
8970		v.reset(OpARMRSBshiftLLreg)
8971		v.AddArg3(x, y, z)
8972		return true
8973	}
8974	// match: (RSB (SLL y z) x)
8975	// result: (SUBshiftLLreg x y z)
8976	for {
8977		if v_0.Op != OpARMSLL {
8978			break
8979		}
8980		z := v_0.Args[1]
8981		y := v_0.Args[0]
8982		x := v_1
8983		v.reset(OpARMSUBshiftLLreg)
8984		v.AddArg3(x, y, z)
8985		return true
8986	}
8987	// match: (RSB x (SRL y z))
8988	// result: (RSBshiftRLreg x y z)
8989	for {
8990		x := v_0
8991		if v_1.Op != OpARMSRL {
8992			break
8993		}
8994		z := v_1.Args[1]
8995		y := v_1.Args[0]
8996		v.reset(OpARMRSBshiftRLreg)
8997		v.AddArg3(x, y, z)
8998		return true
8999	}
9000	// match: (RSB (SRL y z) x)
9001	// result: (SUBshiftRLreg x y z)
9002	for {
9003		if v_0.Op != OpARMSRL {
9004			break
9005		}
9006		z := v_0.Args[1]
9007		y := v_0.Args[0]
9008		x := v_1
9009		v.reset(OpARMSUBshiftRLreg)
9010		v.AddArg3(x, y, z)
9011		return true
9012	}
9013	// match: (RSB x (SRA y z))
9014	// result: (RSBshiftRAreg x y z)
9015	for {
9016		x := v_0
9017		if v_1.Op != OpARMSRA {
9018			break
9019		}
9020		z := v_1.Args[1]
9021		y := v_1.Args[0]
9022		v.reset(OpARMRSBshiftRAreg)
9023		v.AddArg3(x, y, z)
9024		return true
9025	}
9026	// match: (RSB (SRA y z) x)
9027	// result: (SUBshiftRAreg x y z)
9028	for {
9029		if v_0.Op != OpARMSRA {
9030			break
9031		}
9032		z := v_0.Args[1]
9033		y := v_0.Args[0]
9034		x := v_1
9035		v.reset(OpARMSUBshiftRAreg)
9036		v.AddArg3(x, y, z)
9037		return true
9038	}
9039	// match: (RSB x x)
9040	// result: (MOVWconst [0])
9041	for {
9042		x := v_0
9043		if x != v_1 {
9044			break
9045		}
9046		v.reset(OpARMMOVWconst)
9047		v.AuxInt = int32ToAuxInt(0)
9048		return true
9049	}
9050	// match: (RSB (MUL x y) a)
9051	// cond: buildcfg.GOARM.Version == 7
9052	// result: (MULS x y a)
9053	for {
9054		if v_0.Op != OpARMMUL {
9055			break
9056		}
9057		y := v_0.Args[1]
9058		x := v_0.Args[0]
9059		a := v_1
9060		if !(buildcfg.GOARM.Version == 7) {
9061			break
9062		}
9063		v.reset(OpARMMULS)
9064		v.AddArg3(x, y, a)
9065		return true
9066	}
9067	return false
9068}
9069func rewriteValueARM_OpARMRSBSshiftLL(v *Value) bool {
9070	v_1 := v.Args[1]
9071	v_0 := v.Args[0]
9072	b := v.Block
9073	// match: (RSBSshiftLL (MOVWconst [c]) x [d])
9074	// result: (SUBSconst [c] (SLLconst <x.Type> x [d]))
9075	for {
9076		d := auxIntToInt32(v.AuxInt)
9077		if v_0.Op != OpARMMOVWconst {
9078			break
9079		}
9080		c := auxIntToInt32(v_0.AuxInt)
9081		x := v_1
9082		v.reset(OpARMSUBSconst)
9083		v.AuxInt = int32ToAuxInt(c)
9084		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
9085		v0.AuxInt = int32ToAuxInt(d)
9086		v0.AddArg(x)
9087		v.AddArg(v0)
9088		return true
9089	}
9090	// match: (RSBSshiftLL x (MOVWconst [c]) [d])
9091	// result: (RSBSconst x [c<<uint64(d)])
9092	for {
9093		d := auxIntToInt32(v.AuxInt)
9094		x := v_0
9095		if v_1.Op != OpARMMOVWconst {
9096			break
9097		}
9098		c := auxIntToInt32(v_1.AuxInt)
9099		v.reset(OpARMRSBSconst)
9100		v.AuxInt = int32ToAuxInt(c << uint64(d))
9101		v.AddArg(x)
9102		return true
9103	}
9104	return false
9105}
9106func rewriteValueARM_OpARMRSBSshiftLLreg(v *Value) bool {
9107	v_2 := v.Args[2]
9108	v_1 := v.Args[1]
9109	v_0 := v.Args[0]
9110	b := v.Block
9111	// match: (RSBSshiftLLreg (MOVWconst [c]) x y)
9112	// result: (SUBSconst [c] (SLL <x.Type> x y))
9113	for {
9114		if v_0.Op != OpARMMOVWconst {
9115			break
9116		}
9117		c := auxIntToInt32(v_0.AuxInt)
9118		x := v_1
9119		y := v_2
9120		v.reset(OpARMSUBSconst)
9121		v.AuxInt = int32ToAuxInt(c)
9122		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
9123		v0.AddArg2(x, y)
9124		v.AddArg(v0)
9125		return true
9126	}
9127	// match: (RSBSshiftLLreg x y (MOVWconst [c]))
9128	// cond: 0 <= c && c < 32
9129	// result: (RSBSshiftLL x y [c])
9130	for {
9131		x := v_0
9132		y := v_1
9133		if v_2.Op != OpARMMOVWconst {
9134			break
9135		}
9136		c := auxIntToInt32(v_2.AuxInt)
9137		if !(0 <= c && c < 32) {
9138			break
9139		}
9140		v.reset(OpARMRSBSshiftLL)
9141		v.AuxInt = int32ToAuxInt(c)
9142		v.AddArg2(x, y)
9143		return true
9144	}
9145	return false
9146}
9147func rewriteValueARM_OpARMRSBSshiftRA(v *Value) bool {
9148	v_1 := v.Args[1]
9149	v_0 := v.Args[0]
9150	b := v.Block
9151	// match: (RSBSshiftRA (MOVWconst [c]) x [d])
9152	// result: (SUBSconst [c] (SRAconst <x.Type> x [d]))
9153	for {
9154		d := auxIntToInt32(v.AuxInt)
9155		if v_0.Op != OpARMMOVWconst {
9156			break
9157		}
9158		c := auxIntToInt32(v_0.AuxInt)
9159		x := v_1
9160		v.reset(OpARMSUBSconst)
9161		v.AuxInt = int32ToAuxInt(c)
9162		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
9163		v0.AuxInt = int32ToAuxInt(d)
9164		v0.AddArg(x)
9165		v.AddArg(v0)
9166		return true
9167	}
9168	// match: (RSBSshiftRA x (MOVWconst [c]) [d])
9169	// result: (RSBSconst x [c>>uint64(d)])
9170	for {
9171		d := auxIntToInt32(v.AuxInt)
9172		x := v_0
9173		if v_1.Op != OpARMMOVWconst {
9174			break
9175		}
9176		c := auxIntToInt32(v_1.AuxInt)
9177		v.reset(OpARMRSBSconst)
9178		v.AuxInt = int32ToAuxInt(c >> uint64(d))
9179		v.AddArg(x)
9180		return true
9181	}
9182	return false
9183}
9184func rewriteValueARM_OpARMRSBSshiftRAreg(v *Value) bool {
9185	v_2 := v.Args[2]
9186	v_1 := v.Args[1]
9187	v_0 := v.Args[0]
9188	b := v.Block
9189	// match: (RSBSshiftRAreg (MOVWconst [c]) x y)
9190	// result: (SUBSconst [c] (SRA <x.Type> x y))
9191	for {
9192		if v_0.Op != OpARMMOVWconst {
9193			break
9194		}
9195		c := auxIntToInt32(v_0.AuxInt)
9196		x := v_1
9197		y := v_2
9198		v.reset(OpARMSUBSconst)
9199		v.AuxInt = int32ToAuxInt(c)
9200		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
9201		v0.AddArg2(x, y)
9202		v.AddArg(v0)
9203		return true
9204	}
9205	// match: (RSBSshiftRAreg x y (MOVWconst [c]))
9206	// cond: 0 <= c && c < 32
9207	// result: (RSBSshiftRA x y [c])
9208	for {
9209		x := v_0
9210		y := v_1
9211		if v_2.Op != OpARMMOVWconst {
9212			break
9213		}
9214		c := auxIntToInt32(v_2.AuxInt)
9215		if !(0 <= c && c < 32) {
9216			break
9217		}
9218		v.reset(OpARMRSBSshiftRA)
9219		v.AuxInt = int32ToAuxInt(c)
9220		v.AddArg2(x, y)
9221		return true
9222	}
9223	return false
9224}
9225func rewriteValueARM_OpARMRSBSshiftRL(v *Value) bool {
9226	v_1 := v.Args[1]
9227	v_0 := v.Args[0]
9228	b := v.Block
9229	// match: (RSBSshiftRL (MOVWconst [c]) x [d])
9230	// result: (SUBSconst [c] (SRLconst <x.Type> x [d]))
9231	for {
9232		d := auxIntToInt32(v.AuxInt)
9233		if v_0.Op != OpARMMOVWconst {
9234			break
9235		}
9236		c := auxIntToInt32(v_0.AuxInt)
9237		x := v_1
9238		v.reset(OpARMSUBSconst)
9239		v.AuxInt = int32ToAuxInt(c)
9240		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
9241		v0.AuxInt = int32ToAuxInt(d)
9242		v0.AddArg(x)
9243		v.AddArg(v0)
9244		return true
9245	}
9246	// match: (RSBSshiftRL x (MOVWconst [c]) [d])
9247	// result: (RSBSconst x [int32(uint32(c)>>uint64(d))])
9248	for {
9249		d := auxIntToInt32(v.AuxInt)
9250		x := v_0
9251		if v_1.Op != OpARMMOVWconst {
9252			break
9253		}
9254		c := auxIntToInt32(v_1.AuxInt)
9255		v.reset(OpARMRSBSconst)
9256		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
9257		v.AddArg(x)
9258		return true
9259	}
9260	return false
9261}
9262func rewriteValueARM_OpARMRSBSshiftRLreg(v *Value) bool {
9263	v_2 := v.Args[2]
9264	v_1 := v.Args[1]
9265	v_0 := v.Args[0]
9266	b := v.Block
9267	// match: (RSBSshiftRLreg (MOVWconst [c]) x y)
9268	// result: (SUBSconst [c] (SRL <x.Type> x y))
9269	for {
9270		if v_0.Op != OpARMMOVWconst {
9271			break
9272		}
9273		c := auxIntToInt32(v_0.AuxInt)
9274		x := v_1
9275		y := v_2
9276		v.reset(OpARMSUBSconst)
9277		v.AuxInt = int32ToAuxInt(c)
9278		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
9279		v0.AddArg2(x, y)
9280		v.AddArg(v0)
9281		return true
9282	}
9283	// match: (RSBSshiftRLreg x y (MOVWconst [c]))
9284	// cond: 0 <= c && c < 32
9285	// result: (RSBSshiftRL x y [c])
9286	for {
9287		x := v_0
9288		y := v_1
9289		if v_2.Op != OpARMMOVWconst {
9290			break
9291		}
9292		c := auxIntToInt32(v_2.AuxInt)
9293		if !(0 <= c && c < 32) {
9294			break
9295		}
9296		v.reset(OpARMRSBSshiftRL)
9297		v.AuxInt = int32ToAuxInt(c)
9298		v.AddArg2(x, y)
9299		return true
9300	}
9301	return false
9302}
9303func rewriteValueARM_OpARMRSBconst(v *Value) bool {
9304	v_0 := v.Args[0]
9305	// match: (RSBconst [c] (MOVWconst [d]))
9306	// result: (MOVWconst [c-d])
9307	for {
9308		c := auxIntToInt32(v.AuxInt)
9309		if v_0.Op != OpARMMOVWconst {
9310			break
9311		}
9312		d := auxIntToInt32(v_0.AuxInt)
9313		v.reset(OpARMMOVWconst)
9314		v.AuxInt = int32ToAuxInt(c - d)
9315		return true
9316	}
9317	// match: (RSBconst [c] (RSBconst [d] x))
9318	// result: (ADDconst [c-d] x)
9319	for {
9320		c := auxIntToInt32(v.AuxInt)
9321		if v_0.Op != OpARMRSBconst {
9322			break
9323		}
9324		d := auxIntToInt32(v_0.AuxInt)
9325		x := v_0.Args[0]
9326		v.reset(OpARMADDconst)
9327		v.AuxInt = int32ToAuxInt(c - d)
9328		v.AddArg(x)
9329		return true
9330	}
9331	// match: (RSBconst [c] (ADDconst [d] x))
9332	// result: (RSBconst [c-d] x)
9333	for {
9334		c := auxIntToInt32(v.AuxInt)
9335		if v_0.Op != OpARMADDconst {
9336			break
9337		}
9338		d := auxIntToInt32(v_0.AuxInt)
9339		x := v_0.Args[0]
9340		v.reset(OpARMRSBconst)
9341		v.AuxInt = int32ToAuxInt(c - d)
9342		v.AddArg(x)
9343		return true
9344	}
9345	// match: (RSBconst [c] (SUBconst [d] x))
9346	// result: (RSBconst [c+d] x)
9347	for {
9348		c := auxIntToInt32(v.AuxInt)
9349		if v_0.Op != OpARMSUBconst {
9350			break
9351		}
9352		d := auxIntToInt32(v_0.AuxInt)
9353		x := v_0.Args[0]
9354		v.reset(OpARMRSBconst)
9355		v.AuxInt = int32ToAuxInt(c + d)
9356		v.AddArg(x)
9357		return true
9358	}
9359	return false
9360}
9361func rewriteValueARM_OpARMRSBshiftLL(v *Value) bool {
9362	v_1 := v.Args[1]
9363	v_0 := v.Args[0]
9364	b := v.Block
9365	// match: (RSBshiftLL (MOVWconst [c]) x [d])
9366	// result: (SUBconst [c] (SLLconst <x.Type> x [d]))
9367	for {
9368		d := auxIntToInt32(v.AuxInt)
9369		if v_0.Op != OpARMMOVWconst {
9370			break
9371		}
9372		c := auxIntToInt32(v_0.AuxInt)
9373		x := v_1
9374		v.reset(OpARMSUBconst)
9375		v.AuxInt = int32ToAuxInt(c)
9376		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
9377		v0.AuxInt = int32ToAuxInt(d)
9378		v0.AddArg(x)
9379		v.AddArg(v0)
9380		return true
9381	}
9382	// match: (RSBshiftLL x (MOVWconst [c]) [d])
9383	// result: (RSBconst x [c<<uint64(d)])
9384	for {
9385		d := auxIntToInt32(v.AuxInt)
9386		x := v_0
9387		if v_1.Op != OpARMMOVWconst {
9388			break
9389		}
9390		c := auxIntToInt32(v_1.AuxInt)
9391		v.reset(OpARMRSBconst)
9392		v.AuxInt = int32ToAuxInt(c << uint64(d))
9393		v.AddArg(x)
9394		return true
9395	}
9396	// match: (RSBshiftLL (SLLconst x [c]) x [c])
9397	// result: (MOVWconst [0])
9398	for {
9399		c := auxIntToInt32(v.AuxInt)
9400		if v_0.Op != OpARMSLLconst || auxIntToInt32(v_0.AuxInt) != c {
9401			break
9402		}
9403		x := v_0.Args[0]
9404		if x != v_1 {
9405			break
9406		}
9407		v.reset(OpARMMOVWconst)
9408		v.AuxInt = int32ToAuxInt(0)
9409		return true
9410	}
9411	return false
9412}
9413func rewriteValueARM_OpARMRSBshiftLLreg(v *Value) bool {
9414	v_2 := v.Args[2]
9415	v_1 := v.Args[1]
9416	v_0 := v.Args[0]
9417	b := v.Block
9418	// match: (RSBshiftLLreg (MOVWconst [c]) x y)
9419	// result: (SUBconst [c] (SLL <x.Type> x y))
9420	for {
9421		if v_0.Op != OpARMMOVWconst {
9422			break
9423		}
9424		c := auxIntToInt32(v_0.AuxInt)
9425		x := v_1
9426		y := v_2
9427		v.reset(OpARMSUBconst)
9428		v.AuxInt = int32ToAuxInt(c)
9429		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
9430		v0.AddArg2(x, y)
9431		v.AddArg(v0)
9432		return true
9433	}
9434	// match: (RSBshiftLLreg x y (MOVWconst [c]))
9435	// cond: 0 <= c && c < 32
9436	// result: (RSBshiftLL x y [c])
9437	for {
9438		x := v_0
9439		y := v_1
9440		if v_2.Op != OpARMMOVWconst {
9441			break
9442		}
9443		c := auxIntToInt32(v_2.AuxInt)
9444		if !(0 <= c && c < 32) {
9445			break
9446		}
9447		v.reset(OpARMRSBshiftLL)
9448		v.AuxInt = int32ToAuxInt(c)
9449		v.AddArg2(x, y)
9450		return true
9451	}
9452	return false
9453}
9454func rewriteValueARM_OpARMRSBshiftRA(v *Value) bool {
9455	v_1 := v.Args[1]
9456	v_0 := v.Args[0]
9457	b := v.Block
9458	// match: (RSBshiftRA (MOVWconst [c]) x [d])
9459	// result: (SUBconst [c] (SRAconst <x.Type> x [d]))
9460	for {
9461		d := auxIntToInt32(v.AuxInt)
9462		if v_0.Op != OpARMMOVWconst {
9463			break
9464		}
9465		c := auxIntToInt32(v_0.AuxInt)
9466		x := v_1
9467		v.reset(OpARMSUBconst)
9468		v.AuxInt = int32ToAuxInt(c)
9469		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
9470		v0.AuxInt = int32ToAuxInt(d)
9471		v0.AddArg(x)
9472		v.AddArg(v0)
9473		return true
9474	}
9475	// match: (RSBshiftRA x (MOVWconst [c]) [d])
9476	// result: (RSBconst x [c>>uint64(d)])
9477	for {
9478		d := auxIntToInt32(v.AuxInt)
9479		x := v_0
9480		if v_1.Op != OpARMMOVWconst {
9481			break
9482		}
9483		c := auxIntToInt32(v_1.AuxInt)
9484		v.reset(OpARMRSBconst)
9485		v.AuxInt = int32ToAuxInt(c >> uint64(d))
9486		v.AddArg(x)
9487		return true
9488	}
9489	// match: (RSBshiftRA (SRAconst x [c]) x [c])
9490	// result: (MOVWconst [0])
9491	for {
9492		c := auxIntToInt32(v.AuxInt)
9493		if v_0.Op != OpARMSRAconst || auxIntToInt32(v_0.AuxInt) != c {
9494			break
9495		}
9496		x := v_0.Args[0]
9497		if x != v_1 {
9498			break
9499		}
9500		v.reset(OpARMMOVWconst)
9501		v.AuxInt = int32ToAuxInt(0)
9502		return true
9503	}
9504	return false
9505}
9506func rewriteValueARM_OpARMRSBshiftRAreg(v *Value) bool {
9507	v_2 := v.Args[2]
9508	v_1 := v.Args[1]
9509	v_0 := v.Args[0]
9510	b := v.Block
9511	// match: (RSBshiftRAreg (MOVWconst [c]) x y)
9512	// result: (SUBconst [c] (SRA <x.Type> x y))
9513	for {
9514		if v_0.Op != OpARMMOVWconst {
9515			break
9516		}
9517		c := auxIntToInt32(v_0.AuxInt)
9518		x := v_1
9519		y := v_2
9520		v.reset(OpARMSUBconst)
9521		v.AuxInt = int32ToAuxInt(c)
9522		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
9523		v0.AddArg2(x, y)
9524		v.AddArg(v0)
9525		return true
9526	}
9527	// match: (RSBshiftRAreg x y (MOVWconst [c]))
9528	// cond: 0 <= c && c < 32
9529	// result: (RSBshiftRA x y [c])
9530	for {
9531		x := v_0
9532		y := v_1
9533		if v_2.Op != OpARMMOVWconst {
9534			break
9535		}
9536		c := auxIntToInt32(v_2.AuxInt)
9537		if !(0 <= c && c < 32) {
9538			break
9539		}
9540		v.reset(OpARMRSBshiftRA)
9541		v.AuxInt = int32ToAuxInt(c)
9542		v.AddArg2(x, y)
9543		return true
9544	}
9545	return false
9546}
9547func rewriteValueARM_OpARMRSBshiftRL(v *Value) bool {
9548	v_1 := v.Args[1]
9549	v_0 := v.Args[0]
9550	b := v.Block
9551	// match: (RSBshiftRL (MOVWconst [c]) x [d])
9552	// result: (SUBconst [c] (SRLconst <x.Type> x [d]))
9553	for {
9554		d := auxIntToInt32(v.AuxInt)
9555		if v_0.Op != OpARMMOVWconst {
9556			break
9557		}
9558		c := auxIntToInt32(v_0.AuxInt)
9559		x := v_1
9560		v.reset(OpARMSUBconst)
9561		v.AuxInt = int32ToAuxInt(c)
9562		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
9563		v0.AuxInt = int32ToAuxInt(d)
9564		v0.AddArg(x)
9565		v.AddArg(v0)
9566		return true
9567	}
9568	// match: (RSBshiftRL x (MOVWconst [c]) [d])
9569	// result: (RSBconst x [int32(uint32(c)>>uint64(d))])
9570	for {
9571		d := auxIntToInt32(v.AuxInt)
9572		x := v_0
9573		if v_1.Op != OpARMMOVWconst {
9574			break
9575		}
9576		c := auxIntToInt32(v_1.AuxInt)
9577		v.reset(OpARMRSBconst)
9578		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
9579		v.AddArg(x)
9580		return true
9581	}
9582	// match: (RSBshiftRL (SRLconst x [c]) x [c])
9583	// result: (MOVWconst [0])
9584	for {
9585		c := auxIntToInt32(v.AuxInt)
9586		if v_0.Op != OpARMSRLconst || auxIntToInt32(v_0.AuxInt) != c {
9587			break
9588		}
9589		x := v_0.Args[0]
9590		if x != v_1 {
9591			break
9592		}
9593		v.reset(OpARMMOVWconst)
9594		v.AuxInt = int32ToAuxInt(0)
9595		return true
9596	}
9597	return false
9598}
9599func rewriteValueARM_OpARMRSBshiftRLreg(v *Value) bool {
9600	v_2 := v.Args[2]
9601	v_1 := v.Args[1]
9602	v_0 := v.Args[0]
9603	b := v.Block
9604	// match: (RSBshiftRLreg (MOVWconst [c]) x y)
9605	// result: (SUBconst [c] (SRL <x.Type> x y))
9606	for {
9607		if v_0.Op != OpARMMOVWconst {
9608			break
9609		}
9610		c := auxIntToInt32(v_0.AuxInt)
9611		x := v_1
9612		y := v_2
9613		v.reset(OpARMSUBconst)
9614		v.AuxInt = int32ToAuxInt(c)
9615		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
9616		v0.AddArg2(x, y)
9617		v.AddArg(v0)
9618		return true
9619	}
9620	// match: (RSBshiftRLreg x y (MOVWconst [c]))
9621	// cond: 0 <= c && c < 32
9622	// result: (RSBshiftRL x y [c])
9623	for {
9624		x := v_0
9625		y := v_1
9626		if v_2.Op != OpARMMOVWconst {
9627			break
9628		}
9629		c := auxIntToInt32(v_2.AuxInt)
9630		if !(0 <= c && c < 32) {
9631			break
9632		}
9633		v.reset(OpARMRSBshiftRL)
9634		v.AuxInt = int32ToAuxInt(c)
9635		v.AddArg2(x, y)
9636		return true
9637	}
9638	return false
9639}
9640func rewriteValueARM_OpARMRSCconst(v *Value) bool {
9641	v_1 := v.Args[1]
9642	v_0 := v.Args[0]
9643	// match: (RSCconst [c] (ADDconst [d] x) flags)
9644	// result: (RSCconst [c-d] x flags)
9645	for {
9646		c := auxIntToInt32(v.AuxInt)
9647		if v_0.Op != OpARMADDconst {
9648			break
9649		}
9650		d := auxIntToInt32(v_0.AuxInt)
9651		x := v_0.Args[0]
9652		flags := v_1
9653		v.reset(OpARMRSCconst)
9654		v.AuxInt = int32ToAuxInt(c - d)
9655		v.AddArg2(x, flags)
9656		return true
9657	}
9658	// match: (RSCconst [c] (SUBconst [d] x) flags)
9659	// result: (RSCconst [c+d] x flags)
9660	for {
9661		c := auxIntToInt32(v.AuxInt)
9662		if v_0.Op != OpARMSUBconst {
9663			break
9664		}
9665		d := auxIntToInt32(v_0.AuxInt)
9666		x := v_0.Args[0]
9667		flags := v_1
9668		v.reset(OpARMRSCconst)
9669		v.AuxInt = int32ToAuxInt(c + d)
9670		v.AddArg2(x, flags)
9671		return true
9672	}
9673	return false
9674}
9675func rewriteValueARM_OpARMRSCshiftLL(v *Value) bool {
9676	v_2 := v.Args[2]
9677	v_1 := v.Args[1]
9678	v_0 := v.Args[0]
9679	b := v.Block
9680	// match: (RSCshiftLL (MOVWconst [c]) x [d] flags)
9681	// result: (SBCconst [c] (SLLconst <x.Type> x [d]) flags)
9682	for {
9683		d := auxIntToInt32(v.AuxInt)
9684		if v_0.Op != OpARMMOVWconst {
9685			break
9686		}
9687		c := auxIntToInt32(v_0.AuxInt)
9688		x := v_1
9689		flags := v_2
9690		v.reset(OpARMSBCconst)
9691		v.AuxInt = int32ToAuxInt(c)
9692		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
9693		v0.AuxInt = int32ToAuxInt(d)
9694		v0.AddArg(x)
9695		v.AddArg2(v0, flags)
9696		return true
9697	}
9698	// match: (RSCshiftLL x (MOVWconst [c]) [d] flags)
9699	// result: (RSCconst x [c<<uint64(d)] flags)
9700	for {
9701		d := auxIntToInt32(v.AuxInt)
9702		x := v_0
9703		if v_1.Op != OpARMMOVWconst {
9704			break
9705		}
9706		c := auxIntToInt32(v_1.AuxInt)
9707		flags := v_2
9708		v.reset(OpARMRSCconst)
9709		v.AuxInt = int32ToAuxInt(c << uint64(d))
9710		v.AddArg2(x, flags)
9711		return true
9712	}
9713	return false
9714}
9715func rewriteValueARM_OpARMRSCshiftLLreg(v *Value) bool {
9716	v_3 := v.Args[3]
9717	v_2 := v.Args[2]
9718	v_1 := v.Args[1]
9719	v_0 := v.Args[0]
9720	b := v.Block
9721	// match: (RSCshiftLLreg (MOVWconst [c]) x y flags)
9722	// result: (SBCconst [c] (SLL <x.Type> x y) flags)
9723	for {
9724		if v_0.Op != OpARMMOVWconst {
9725			break
9726		}
9727		c := auxIntToInt32(v_0.AuxInt)
9728		x := v_1
9729		y := v_2
9730		flags := v_3
9731		v.reset(OpARMSBCconst)
9732		v.AuxInt = int32ToAuxInt(c)
9733		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
9734		v0.AddArg2(x, y)
9735		v.AddArg2(v0, flags)
9736		return true
9737	}
9738	// match: (RSCshiftLLreg x y (MOVWconst [c]) flags)
9739	// cond: 0 <= c && c < 32
9740	// result: (RSCshiftLL x y [c] flags)
9741	for {
9742		x := v_0
9743		y := v_1
9744		if v_2.Op != OpARMMOVWconst {
9745			break
9746		}
9747		c := auxIntToInt32(v_2.AuxInt)
9748		flags := v_3
9749		if !(0 <= c && c < 32) {
9750			break
9751		}
9752		v.reset(OpARMRSCshiftLL)
9753		v.AuxInt = int32ToAuxInt(c)
9754		v.AddArg3(x, y, flags)
9755		return true
9756	}
9757	return false
9758}
9759func rewriteValueARM_OpARMRSCshiftRA(v *Value) bool {
9760	v_2 := v.Args[2]
9761	v_1 := v.Args[1]
9762	v_0 := v.Args[0]
9763	b := v.Block
9764	// match: (RSCshiftRA (MOVWconst [c]) x [d] flags)
9765	// result: (SBCconst [c] (SRAconst <x.Type> x [d]) flags)
9766	for {
9767		d := auxIntToInt32(v.AuxInt)
9768		if v_0.Op != OpARMMOVWconst {
9769			break
9770		}
9771		c := auxIntToInt32(v_0.AuxInt)
9772		x := v_1
9773		flags := v_2
9774		v.reset(OpARMSBCconst)
9775		v.AuxInt = int32ToAuxInt(c)
9776		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
9777		v0.AuxInt = int32ToAuxInt(d)
9778		v0.AddArg(x)
9779		v.AddArg2(v0, flags)
9780		return true
9781	}
9782	// match: (RSCshiftRA x (MOVWconst [c]) [d] flags)
9783	// result: (RSCconst x [c>>uint64(d)] flags)
9784	for {
9785		d := auxIntToInt32(v.AuxInt)
9786		x := v_0
9787		if v_1.Op != OpARMMOVWconst {
9788			break
9789		}
9790		c := auxIntToInt32(v_1.AuxInt)
9791		flags := v_2
9792		v.reset(OpARMRSCconst)
9793		v.AuxInt = int32ToAuxInt(c >> uint64(d))
9794		v.AddArg2(x, flags)
9795		return true
9796	}
9797	return false
9798}
9799func rewriteValueARM_OpARMRSCshiftRAreg(v *Value) bool {
9800	v_3 := v.Args[3]
9801	v_2 := v.Args[2]
9802	v_1 := v.Args[1]
9803	v_0 := v.Args[0]
9804	b := v.Block
9805	// match: (RSCshiftRAreg (MOVWconst [c]) x y flags)
9806	// result: (SBCconst [c] (SRA <x.Type> x y) flags)
9807	for {
9808		if v_0.Op != OpARMMOVWconst {
9809			break
9810		}
9811		c := auxIntToInt32(v_0.AuxInt)
9812		x := v_1
9813		y := v_2
9814		flags := v_3
9815		v.reset(OpARMSBCconst)
9816		v.AuxInt = int32ToAuxInt(c)
9817		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
9818		v0.AddArg2(x, y)
9819		v.AddArg2(v0, flags)
9820		return true
9821	}
9822	// match: (RSCshiftRAreg x y (MOVWconst [c]) flags)
9823	// cond: 0 <= c && c < 32
9824	// result: (RSCshiftRA x y [c] flags)
9825	for {
9826		x := v_0
9827		y := v_1
9828		if v_2.Op != OpARMMOVWconst {
9829			break
9830		}
9831		c := auxIntToInt32(v_2.AuxInt)
9832		flags := v_3
9833		if !(0 <= c && c < 32) {
9834			break
9835		}
9836		v.reset(OpARMRSCshiftRA)
9837		v.AuxInt = int32ToAuxInt(c)
9838		v.AddArg3(x, y, flags)
9839		return true
9840	}
9841	return false
9842}
9843func rewriteValueARM_OpARMRSCshiftRL(v *Value) bool {
9844	v_2 := v.Args[2]
9845	v_1 := v.Args[1]
9846	v_0 := v.Args[0]
9847	b := v.Block
9848	// match: (RSCshiftRL (MOVWconst [c]) x [d] flags)
9849	// result: (SBCconst [c] (SRLconst <x.Type> x [d]) flags)
9850	for {
9851		d := auxIntToInt32(v.AuxInt)
9852		if v_0.Op != OpARMMOVWconst {
9853			break
9854		}
9855		c := auxIntToInt32(v_0.AuxInt)
9856		x := v_1
9857		flags := v_2
9858		v.reset(OpARMSBCconst)
9859		v.AuxInt = int32ToAuxInt(c)
9860		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
9861		v0.AuxInt = int32ToAuxInt(d)
9862		v0.AddArg(x)
9863		v.AddArg2(v0, flags)
9864		return true
9865	}
9866	// match: (RSCshiftRL x (MOVWconst [c]) [d] flags)
9867	// result: (RSCconst x [int32(uint32(c)>>uint64(d))] flags)
9868	for {
9869		d := auxIntToInt32(v.AuxInt)
9870		x := v_0
9871		if v_1.Op != OpARMMOVWconst {
9872			break
9873		}
9874		c := auxIntToInt32(v_1.AuxInt)
9875		flags := v_2
9876		v.reset(OpARMRSCconst)
9877		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
9878		v.AddArg2(x, flags)
9879		return true
9880	}
9881	return false
9882}
9883func rewriteValueARM_OpARMRSCshiftRLreg(v *Value) bool {
9884	v_3 := v.Args[3]
9885	v_2 := v.Args[2]
9886	v_1 := v.Args[1]
9887	v_0 := v.Args[0]
9888	b := v.Block
9889	// match: (RSCshiftRLreg (MOVWconst [c]) x y flags)
9890	// result: (SBCconst [c] (SRL <x.Type> x y) flags)
9891	for {
9892		if v_0.Op != OpARMMOVWconst {
9893			break
9894		}
9895		c := auxIntToInt32(v_0.AuxInt)
9896		x := v_1
9897		y := v_2
9898		flags := v_3
9899		v.reset(OpARMSBCconst)
9900		v.AuxInt = int32ToAuxInt(c)
9901		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
9902		v0.AddArg2(x, y)
9903		v.AddArg2(v0, flags)
9904		return true
9905	}
9906	// match: (RSCshiftRLreg x y (MOVWconst [c]) flags)
9907	// cond: 0 <= c && c < 32
9908	// result: (RSCshiftRL x y [c] flags)
9909	for {
9910		x := v_0
9911		y := v_1
9912		if v_2.Op != OpARMMOVWconst {
9913			break
9914		}
9915		c := auxIntToInt32(v_2.AuxInt)
9916		flags := v_3
9917		if !(0 <= c && c < 32) {
9918			break
9919		}
9920		v.reset(OpARMRSCshiftRL)
9921		v.AuxInt = int32ToAuxInt(c)
9922		v.AddArg3(x, y, flags)
9923		return true
9924	}
9925	return false
9926}
9927func rewriteValueARM_OpARMSBC(v *Value) bool {
9928	v_2 := v.Args[2]
9929	v_1 := v.Args[1]
9930	v_0 := v.Args[0]
9931	// match: (SBC (MOVWconst [c]) x flags)
9932	// result: (RSCconst [c] x flags)
9933	for {
9934		if v_0.Op != OpARMMOVWconst {
9935			break
9936		}
9937		c := auxIntToInt32(v_0.AuxInt)
9938		x := v_1
9939		flags := v_2
9940		v.reset(OpARMRSCconst)
9941		v.AuxInt = int32ToAuxInt(c)
9942		v.AddArg2(x, flags)
9943		return true
9944	}
9945	// match: (SBC x (MOVWconst [c]) flags)
9946	// result: (SBCconst [c] x flags)
9947	for {
9948		x := v_0
9949		if v_1.Op != OpARMMOVWconst {
9950			break
9951		}
9952		c := auxIntToInt32(v_1.AuxInt)
9953		flags := v_2
9954		v.reset(OpARMSBCconst)
9955		v.AuxInt = int32ToAuxInt(c)
9956		v.AddArg2(x, flags)
9957		return true
9958	}
9959	// match: (SBC x (SLLconst [c] y) flags)
9960	// result: (SBCshiftLL x y [c] flags)
9961	for {
9962		x := v_0
9963		if v_1.Op != OpARMSLLconst {
9964			break
9965		}
9966		c := auxIntToInt32(v_1.AuxInt)
9967		y := v_1.Args[0]
9968		flags := v_2
9969		v.reset(OpARMSBCshiftLL)
9970		v.AuxInt = int32ToAuxInt(c)
9971		v.AddArg3(x, y, flags)
9972		return true
9973	}
9974	// match: (SBC (SLLconst [c] y) x flags)
9975	// result: (RSCshiftLL x y [c] flags)
9976	for {
9977		if v_0.Op != OpARMSLLconst {
9978			break
9979		}
9980		c := auxIntToInt32(v_0.AuxInt)
9981		y := v_0.Args[0]
9982		x := v_1
9983		flags := v_2
9984		v.reset(OpARMRSCshiftLL)
9985		v.AuxInt = int32ToAuxInt(c)
9986		v.AddArg3(x, y, flags)
9987		return true
9988	}
9989	// match: (SBC x (SRLconst [c] y) flags)
9990	// result: (SBCshiftRL x y [c] flags)
9991	for {
9992		x := v_0
9993		if v_1.Op != OpARMSRLconst {
9994			break
9995		}
9996		c := auxIntToInt32(v_1.AuxInt)
9997		y := v_1.Args[0]
9998		flags := v_2
9999		v.reset(OpARMSBCshiftRL)
10000		v.AuxInt = int32ToAuxInt(c)
10001		v.AddArg3(x, y, flags)
10002		return true
10003	}
10004	// match: (SBC (SRLconst [c] y) x flags)
10005	// result: (RSCshiftRL x y [c] flags)
10006	for {
10007		if v_0.Op != OpARMSRLconst {
10008			break
10009		}
10010		c := auxIntToInt32(v_0.AuxInt)
10011		y := v_0.Args[0]
10012		x := v_1
10013		flags := v_2
10014		v.reset(OpARMRSCshiftRL)
10015		v.AuxInt = int32ToAuxInt(c)
10016		v.AddArg3(x, y, flags)
10017		return true
10018	}
10019	// match: (SBC x (SRAconst [c] y) flags)
10020	// result: (SBCshiftRA x y [c] flags)
10021	for {
10022		x := v_0
10023		if v_1.Op != OpARMSRAconst {
10024			break
10025		}
10026		c := auxIntToInt32(v_1.AuxInt)
10027		y := v_1.Args[0]
10028		flags := v_2
10029		v.reset(OpARMSBCshiftRA)
10030		v.AuxInt = int32ToAuxInt(c)
10031		v.AddArg3(x, y, flags)
10032		return true
10033	}
10034	// match: (SBC (SRAconst [c] y) x flags)
10035	// result: (RSCshiftRA x y [c] flags)
10036	for {
10037		if v_0.Op != OpARMSRAconst {
10038			break
10039		}
10040		c := auxIntToInt32(v_0.AuxInt)
10041		y := v_0.Args[0]
10042		x := v_1
10043		flags := v_2
10044		v.reset(OpARMRSCshiftRA)
10045		v.AuxInt = int32ToAuxInt(c)
10046		v.AddArg3(x, y, flags)
10047		return true
10048	}
10049	// match: (SBC x (SLL y z) flags)
10050	// result: (SBCshiftLLreg x y z flags)
10051	for {
10052		x := v_0
10053		if v_1.Op != OpARMSLL {
10054			break
10055		}
10056		z := v_1.Args[1]
10057		y := v_1.Args[0]
10058		flags := v_2
10059		v.reset(OpARMSBCshiftLLreg)
10060		v.AddArg4(x, y, z, flags)
10061		return true
10062	}
10063	// match: (SBC (SLL y z) x flags)
10064	// result: (RSCshiftLLreg x y z flags)
10065	for {
10066		if v_0.Op != OpARMSLL {
10067			break
10068		}
10069		z := v_0.Args[1]
10070		y := v_0.Args[0]
10071		x := v_1
10072		flags := v_2
10073		v.reset(OpARMRSCshiftLLreg)
10074		v.AddArg4(x, y, z, flags)
10075		return true
10076	}
10077	// match: (SBC x (SRL y z) flags)
10078	// result: (SBCshiftRLreg x y z flags)
10079	for {
10080		x := v_0
10081		if v_1.Op != OpARMSRL {
10082			break
10083		}
10084		z := v_1.Args[1]
10085		y := v_1.Args[0]
10086		flags := v_2
10087		v.reset(OpARMSBCshiftRLreg)
10088		v.AddArg4(x, y, z, flags)
10089		return true
10090	}
10091	// match: (SBC (SRL y z) x flags)
10092	// result: (RSCshiftRLreg x y z flags)
10093	for {
10094		if v_0.Op != OpARMSRL {
10095			break
10096		}
10097		z := v_0.Args[1]
10098		y := v_0.Args[0]
10099		x := v_1
10100		flags := v_2
10101		v.reset(OpARMRSCshiftRLreg)
10102		v.AddArg4(x, y, z, flags)
10103		return true
10104	}
10105	// match: (SBC x (SRA y z) flags)
10106	// result: (SBCshiftRAreg x y z flags)
10107	for {
10108		x := v_0
10109		if v_1.Op != OpARMSRA {
10110			break
10111		}
10112		z := v_1.Args[1]
10113		y := v_1.Args[0]
10114		flags := v_2
10115		v.reset(OpARMSBCshiftRAreg)
10116		v.AddArg4(x, y, z, flags)
10117		return true
10118	}
10119	// match: (SBC (SRA y z) x flags)
10120	// result: (RSCshiftRAreg x y z flags)
10121	for {
10122		if v_0.Op != OpARMSRA {
10123			break
10124		}
10125		z := v_0.Args[1]
10126		y := v_0.Args[0]
10127		x := v_1
10128		flags := v_2
10129		v.reset(OpARMRSCshiftRAreg)
10130		v.AddArg4(x, y, z, flags)
10131		return true
10132	}
10133	return false
10134}
10135func rewriteValueARM_OpARMSBCconst(v *Value) bool {
10136	v_1 := v.Args[1]
10137	v_0 := v.Args[0]
10138	// match: (SBCconst [c] (ADDconst [d] x) flags)
10139	// result: (SBCconst [c-d] x flags)
10140	for {
10141		c := auxIntToInt32(v.AuxInt)
10142		if v_0.Op != OpARMADDconst {
10143			break
10144		}
10145		d := auxIntToInt32(v_0.AuxInt)
10146		x := v_0.Args[0]
10147		flags := v_1
10148		v.reset(OpARMSBCconst)
10149		v.AuxInt = int32ToAuxInt(c - d)
10150		v.AddArg2(x, flags)
10151		return true
10152	}
10153	// match: (SBCconst [c] (SUBconst [d] x) flags)
10154	// result: (SBCconst [c+d] x flags)
10155	for {
10156		c := auxIntToInt32(v.AuxInt)
10157		if v_0.Op != OpARMSUBconst {
10158			break
10159		}
10160		d := auxIntToInt32(v_0.AuxInt)
10161		x := v_0.Args[0]
10162		flags := v_1
10163		v.reset(OpARMSBCconst)
10164		v.AuxInt = int32ToAuxInt(c + d)
10165		v.AddArg2(x, flags)
10166		return true
10167	}
10168	return false
10169}
10170func rewriteValueARM_OpARMSBCshiftLL(v *Value) bool {
10171	v_2 := v.Args[2]
10172	v_1 := v.Args[1]
10173	v_0 := v.Args[0]
10174	b := v.Block
10175	// match: (SBCshiftLL (MOVWconst [c]) x [d] flags)
10176	// result: (RSCconst [c] (SLLconst <x.Type> x [d]) flags)
10177	for {
10178		d := auxIntToInt32(v.AuxInt)
10179		if v_0.Op != OpARMMOVWconst {
10180			break
10181		}
10182		c := auxIntToInt32(v_0.AuxInt)
10183		x := v_1
10184		flags := v_2
10185		v.reset(OpARMRSCconst)
10186		v.AuxInt = int32ToAuxInt(c)
10187		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
10188		v0.AuxInt = int32ToAuxInt(d)
10189		v0.AddArg(x)
10190		v.AddArg2(v0, flags)
10191		return true
10192	}
10193	// match: (SBCshiftLL x (MOVWconst [c]) [d] flags)
10194	// result: (SBCconst x [c<<uint64(d)] flags)
10195	for {
10196		d := auxIntToInt32(v.AuxInt)
10197		x := v_0
10198		if v_1.Op != OpARMMOVWconst {
10199			break
10200		}
10201		c := auxIntToInt32(v_1.AuxInt)
10202		flags := v_2
10203		v.reset(OpARMSBCconst)
10204		v.AuxInt = int32ToAuxInt(c << uint64(d))
10205		v.AddArg2(x, flags)
10206		return true
10207	}
10208	return false
10209}
10210func rewriteValueARM_OpARMSBCshiftLLreg(v *Value) bool {
10211	v_3 := v.Args[3]
10212	v_2 := v.Args[2]
10213	v_1 := v.Args[1]
10214	v_0 := v.Args[0]
10215	b := v.Block
10216	// match: (SBCshiftLLreg (MOVWconst [c]) x y flags)
10217	// result: (RSCconst [c] (SLL <x.Type> x y) flags)
10218	for {
10219		if v_0.Op != OpARMMOVWconst {
10220			break
10221		}
10222		c := auxIntToInt32(v_0.AuxInt)
10223		x := v_1
10224		y := v_2
10225		flags := v_3
10226		v.reset(OpARMRSCconst)
10227		v.AuxInt = int32ToAuxInt(c)
10228		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
10229		v0.AddArg2(x, y)
10230		v.AddArg2(v0, flags)
10231		return true
10232	}
10233	// match: (SBCshiftLLreg x y (MOVWconst [c]) flags)
10234	// cond: 0 <= c && c < 32
10235	// result: (SBCshiftLL x y [c] flags)
10236	for {
10237		x := v_0
10238		y := v_1
10239		if v_2.Op != OpARMMOVWconst {
10240			break
10241		}
10242		c := auxIntToInt32(v_2.AuxInt)
10243		flags := v_3
10244		if !(0 <= c && c < 32) {
10245			break
10246		}
10247		v.reset(OpARMSBCshiftLL)
10248		v.AuxInt = int32ToAuxInt(c)
10249		v.AddArg3(x, y, flags)
10250		return true
10251	}
10252	return false
10253}
10254func rewriteValueARM_OpARMSBCshiftRA(v *Value) bool {
10255	v_2 := v.Args[2]
10256	v_1 := v.Args[1]
10257	v_0 := v.Args[0]
10258	b := v.Block
10259	// match: (SBCshiftRA (MOVWconst [c]) x [d] flags)
10260	// result: (RSCconst [c] (SRAconst <x.Type> x [d]) flags)
10261	for {
10262		d := auxIntToInt32(v.AuxInt)
10263		if v_0.Op != OpARMMOVWconst {
10264			break
10265		}
10266		c := auxIntToInt32(v_0.AuxInt)
10267		x := v_1
10268		flags := v_2
10269		v.reset(OpARMRSCconst)
10270		v.AuxInt = int32ToAuxInt(c)
10271		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
10272		v0.AuxInt = int32ToAuxInt(d)
10273		v0.AddArg(x)
10274		v.AddArg2(v0, flags)
10275		return true
10276	}
10277	// match: (SBCshiftRA x (MOVWconst [c]) [d] flags)
10278	// result: (SBCconst x [c>>uint64(d)] flags)
10279	for {
10280		d := auxIntToInt32(v.AuxInt)
10281		x := v_0
10282		if v_1.Op != OpARMMOVWconst {
10283			break
10284		}
10285		c := auxIntToInt32(v_1.AuxInt)
10286		flags := v_2
10287		v.reset(OpARMSBCconst)
10288		v.AuxInt = int32ToAuxInt(c >> uint64(d))
10289		v.AddArg2(x, flags)
10290		return true
10291	}
10292	return false
10293}
10294func rewriteValueARM_OpARMSBCshiftRAreg(v *Value) bool {
10295	v_3 := v.Args[3]
10296	v_2 := v.Args[2]
10297	v_1 := v.Args[1]
10298	v_0 := v.Args[0]
10299	b := v.Block
10300	// match: (SBCshiftRAreg (MOVWconst [c]) x y flags)
10301	// result: (RSCconst [c] (SRA <x.Type> x y) flags)
10302	for {
10303		if v_0.Op != OpARMMOVWconst {
10304			break
10305		}
10306		c := auxIntToInt32(v_0.AuxInt)
10307		x := v_1
10308		y := v_2
10309		flags := v_3
10310		v.reset(OpARMRSCconst)
10311		v.AuxInt = int32ToAuxInt(c)
10312		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
10313		v0.AddArg2(x, y)
10314		v.AddArg2(v0, flags)
10315		return true
10316	}
10317	// match: (SBCshiftRAreg x y (MOVWconst [c]) flags)
10318	// cond: 0 <= c && c < 32
10319	// result: (SBCshiftRA x y [c] flags)
10320	for {
10321		x := v_0
10322		y := v_1
10323		if v_2.Op != OpARMMOVWconst {
10324			break
10325		}
10326		c := auxIntToInt32(v_2.AuxInt)
10327		flags := v_3
10328		if !(0 <= c && c < 32) {
10329			break
10330		}
10331		v.reset(OpARMSBCshiftRA)
10332		v.AuxInt = int32ToAuxInt(c)
10333		v.AddArg3(x, y, flags)
10334		return true
10335	}
10336	return false
10337}
10338func rewriteValueARM_OpARMSBCshiftRL(v *Value) bool {
10339	v_2 := v.Args[2]
10340	v_1 := v.Args[1]
10341	v_0 := v.Args[0]
10342	b := v.Block
10343	// match: (SBCshiftRL (MOVWconst [c]) x [d] flags)
10344	// result: (RSCconst [c] (SRLconst <x.Type> x [d]) flags)
10345	for {
10346		d := auxIntToInt32(v.AuxInt)
10347		if v_0.Op != OpARMMOVWconst {
10348			break
10349		}
10350		c := auxIntToInt32(v_0.AuxInt)
10351		x := v_1
10352		flags := v_2
10353		v.reset(OpARMRSCconst)
10354		v.AuxInt = int32ToAuxInt(c)
10355		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
10356		v0.AuxInt = int32ToAuxInt(d)
10357		v0.AddArg(x)
10358		v.AddArg2(v0, flags)
10359		return true
10360	}
10361	// match: (SBCshiftRL x (MOVWconst [c]) [d] flags)
10362	// result: (SBCconst x [int32(uint32(c)>>uint64(d))] flags)
10363	for {
10364		d := auxIntToInt32(v.AuxInt)
10365		x := v_0
10366		if v_1.Op != OpARMMOVWconst {
10367			break
10368		}
10369		c := auxIntToInt32(v_1.AuxInt)
10370		flags := v_2
10371		v.reset(OpARMSBCconst)
10372		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
10373		v.AddArg2(x, flags)
10374		return true
10375	}
10376	return false
10377}
10378func rewriteValueARM_OpARMSBCshiftRLreg(v *Value) bool {
10379	v_3 := v.Args[3]
10380	v_2 := v.Args[2]
10381	v_1 := v.Args[1]
10382	v_0 := v.Args[0]
10383	b := v.Block
10384	// match: (SBCshiftRLreg (MOVWconst [c]) x y flags)
10385	// result: (RSCconst [c] (SRL <x.Type> x y) flags)
10386	for {
10387		if v_0.Op != OpARMMOVWconst {
10388			break
10389		}
10390		c := auxIntToInt32(v_0.AuxInt)
10391		x := v_1
10392		y := v_2
10393		flags := v_3
10394		v.reset(OpARMRSCconst)
10395		v.AuxInt = int32ToAuxInt(c)
10396		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
10397		v0.AddArg2(x, y)
10398		v.AddArg2(v0, flags)
10399		return true
10400	}
10401	// match: (SBCshiftRLreg x y (MOVWconst [c]) flags)
10402	// cond: 0 <= c && c < 32
10403	// result: (SBCshiftRL x y [c] flags)
10404	for {
10405		x := v_0
10406		y := v_1
10407		if v_2.Op != OpARMMOVWconst {
10408			break
10409		}
10410		c := auxIntToInt32(v_2.AuxInt)
10411		flags := v_3
10412		if !(0 <= c && c < 32) {
10413			break
10414		}
10415		v.reset(OpARMSBCshiftRL)
10416		v.AuxInt = int32ToAuxInt(c)
10417		v.AddArg3(x, y, flags)
10418		return true
10419	}
10420	return false
10421}
10422func rewriteValueARM_OpARMSLL(v *Value) bool {
10423	v_1 := v.Args[1]
10424	v_0 := v.Args[0]
10425	// match: (SLL x (MOVWconst [c]))
10426	// cond: 0 <= c && c < 32
10427	// result: (SLLconst x [c])
10428	for {
10429		x := v_0
10430		if v_1.Op != OpARMMOVWconst {
10431			break
10432		}
10433		c := auxIntToInt32(v_1.AuxInt)
10434		if !(0 <= c && c < 32) {
10435			break
10436		}
10437		v.reset(OpARMSLLconst)
10438		v.AuxInt = int32ToAuxInt(c)
10439		v.AddArg(x)
10440		return true
10441	}
10442	return false
10443}
10444func rewriteValueARM_OpARMSLLconst(v *Value) bool {
10445	v_0 := v.Args[0]
10446	// match: (SLLconst [c] (MOVWconst [d]))
10447	// result: (MOVWconst [d<<uint64(c)])
10448	for {
10449		c := auxIntToInt32(v.AuxInt)
10450		if v_0.Op != OpARMMOVWconst {
10451			break
10452		}
10453		d := auxIntToInt32(v_0.AuxInt)
10454		v.reset(OpARMMOVWconst)
10455		v.AuxInt = int32ToAuxInt(d << uint64(c))
10456		return true
10457	}
10458	return false
10459}
10460func rewriteValueARM_OpARMSRA(v *Value) bool {
10461	v_1 := v.Args[1]
10462	v_0 := v.Args[0]
10463	// match: (SRA x (MOVWconst [c]))
10464	// cond: 0 <= c && c < 32
10465	// result: (SRAconst x [c])
10466	for {
10467		x := v_0
10468		if v_1.Op != OpARMMOVWconst {
10469			break
10470		}
10471		c := auxIntToInt32(v_1.AuxInt)
10472		if !(0 <= c && c < 32) {
10473			break
10474		}
10475		v.reset(OpARMSRAconst)
10476		v.AuxInt = int32ToAuxInt(c)
10477		v.AddArg(x)
10478		return true
10479	}
10480	return false
10481}
10482func rewriteValueARM_OpARMSRAcond(v *Value) bool {
10483	v_2 := v.Args[2]
10484	v_1 := v.Args[1]
10485	v_0 := v.Args[0]
10486	// match: (SRAcond x _ (FlagConstant [fc]))
10487	// cond: fc.uge()
10488	// result: (SRAconst x [31])
10489	for {
10490		x := v_0
10491		if v_2.Op != OpARMFlagConstant {
10492			break
10493		}
10494		fc := auxIntToFlagConstant(v_2.AuxInt)
10495		if !(fc.uge()) {
10496			break
10497		}
10498		v.reset(OpARMSRAconst)
10499		v.AuxInt = int32ToAuxInt(31)
10500		v.AddArg(x)
10501		return true
10502	}
10503	// match: (SRAcond x y (FlagConstant [fc]))
10504	// cond: fc.ult()
10505	// result: (SRA x y)
10506	for {
10507		x := v_0
10508		y := v_1
10509		if v_2.Op != OpARMFlagConstant {
10510			break
10511		}
10512		fc := auxIntToFlagConstant(v_2.AuxInt)
10513		if !(fc.ult()) {
10514			break
10515		}
10516		v.reset(OpARMSRA)
10517		v.AddArg2(x, y)
10518		return true
10519	}
10520	return false
10521}
10522func rewriteValueARM_OpARMSRAconst(v *Value) bool {
10523	v_0 := v.Args[0]
10524	// match: (SRAconst [c] (MOVWconst [d]))
10525	// result: (MOVWconst [d>>uint64(c)])
10526	for {
10527		c := auxIntToInt32(v.AuxInt)
10528		if v_0.Op != OpARMMOVWconst {
10529			break
10530		}
10531		d := auxIntToInt32(v_0.AuxInt)
10532		v.reset(OpARMMOVWconst)
10533		v.AuxInt = int32ToAuxInt(d >> uint64(c))
10534		return true
10535	}
10536	// match: (SRAconst (SLLconst x [c]) [d])
10537	// cond: buildcfg.GOARM.Version==7 && uint64(d)>=uint64(c) && uint64(d)<=31
10538	// result: (BFX [(d-c)|(32-d)<<8] x)
10539	for {
10540		d := auxIntToInt32(v.AuxInt)
10541		if v_0.Op != OpARMSLLconst {
10542			break
10543		}
10544		c := auxIntToInt32(v_0.AuxInt)
10545		x := v_0.Args[0]
10546		if !(buildcfg.GOARM.Version == 7 && uint64(d) >= uint64(c) && uint64(d) <= 31) {
10547			break
10548		}
10549		v.reset(OpARMBFX)
10550		v.AuxInt = int32ToAuxInt((d - c) | (32-d)<<8)
10551		v.AddArg(x)
10552		return true
10553	}
10554	return false
10555}
10556func rewriteValueARM_OpARMSRL(v *Value) bool {
10557	v_1 := v.Args[1]
10558	v_0 := v.Args[0]
10559	// match: (SRL x (MOVWconst [c]))
10560	// cond: 0 <= c && c < 32
10561	// result: (SRLconst x [c])
10562	for {
10563		x := v_0
10564		if v_1.Op != OpARMMOVWconst {
10565			break
10566		}
10567		c := auxIntToInt32(v_1.AuxInt)
10568		if !(0 <= c && c < 32) {
10569			break
10570		}
10571		v.reset(OpARMSRLconst)
10572		v.AuxInt = int32ToAuxInt(c)
10573		v.AddArg(x)
10574		return true
10575	}
10576	return false
10577}
10578func rewriteValueARM_OpARMSRLconst(v *Value) bool {
10579	v_0 := v.Args[0]
10580	// match: (SRLconst [c] (MOVWconst [d]))
10581	// result: (MOVWconst [int32(uint32(d)>>uint64(c))])
10582	for {
10583		c := auxIntToInt32(v.AuxInt)
10584		if v_0.Op != OpARMMOVWconst {
10585			break
10586		}
10587		d := auxIntToInt32(v_0.AuxInt)
10588		v.reset(OpARMMOVWconst)
10589		v.AuxInt = int32ToAuxInt(int32(uint32(d) >> uint64(c)))
10590		return true
10591	}
10592	// match: (SRLconst (SLLconst x [c]) [d])
10593	// cond: buildcfg.GOARM.Version==7 && uint64(d)>=uint64(c) && uint64(d)<=31
10594	// result: (BFXU [(d-c)|(32-d)<<8] x)
10595	for {
10596		d := auxIntToInt32(v.AuxInt)
10597		if v_0.Op != OpARMSLLconst {
10598			break
10599		}
10600		c := auxIntToInt32(v_0.AuxInt)
10601		x := v_0.Args[0]
10602		if !(buildcfg.GOARM.Version == 7 && uint64(d) >= uint64(c) && uint64(d) <= 31) {
10603			break
10604		}
10605		v.reset(OpARMBFXU)
10606		v.AuxInt = int32ToAuxInt((d - c) | (32-d)<<8)
10607		v.AddArg(x)
10608		return true
10609	}
10610	return false
10611}
10612func rewriteValueARM_OpARMSRR(v *Value) bool {
10613	v_1 := v.Args[1]
10614	v_0 := v.Args[0]
10615	// match: (SRR x (MOVWconst [c]))
10616	// result: (SRRconst x [c&31])
10617	for {
10618		x := v_0
10619		if v_1.Op != OpARMMOVWconst {
10620			break
10621		}
10622		c := auxIntToInt32(v_1.AuxInt)
10623		v.reset(OpARMSRRconst)
10624		v.AuxInt = int32ToAuxInt(c & 31)
10625		v.AddArg(x)
10626		return true
10627	}
10628	return false
10629}
10630func rewriteValueARM_OpARMSUB(v *Value) bool {
10631	v_1 := v.Args[1]
10632	v_0 := v.Args[0]
10633	// match: (SUB (MOVWconst [c]) x)
10634	// result: (RSBconst [c] x)
10635	for {
10636		if v_0.Op != OpARMMOVWconst {
10637			break
10638		}
10639		c := auxIntToInt32(v_0.AuxInt)
10640		x := v_1
10641		v.reset(OpARMRSBconst)
10642		v.AuxInt = int32ToAuxInt(c)
10643		v.AddArg(x)
10644		return true
10645	}
10646	// match: (SUB x (MOVWconst [c]))
10647	// result: (SUBconst [c] x)
10648	for {
10649		x := v_0
10650		if v_1.Op != OpARMMOVWconst {
10651			break
10652		}
10653		c := auxIntToInt32(v_1.AuxInt)
10654		v.reset(OpARMSUBconst)
10655		v.AuxInt = int32ToAuxInt(c)
10656		v.AddArg(x)
10657		return true
10658	}
10659	// match: (SUB x (SLLconst [c] y))
10660	// result: (SUBshiftLL x y [c])
10661	for {
10662		x := v_0
10663		if v_1.Op != OpARMSLLconst {
10664			break
10665		}
10666		c := auxIntToInt32(v_1.AuxInt)
10667		y := v_1.Args[0]
10668		v.reset(OpARMSUBshiftLL)
10669		v.AuxInt = int32ToAuxInt(c)
10670		v.AddArg2(x, y)
10671		return true
10672	}
10673	// match: (SUB (SLLconst [c] y) x)
10674	// result: (RSBshiftLL x y [c])
10675	for {
10676		if v_0.Op != OpARMSLLconst {
10677			break
10678		}
10679		c := auxIntToInt32(v_0.AuxInt)
10680		y := v_0.Args[0]
10681		x := v_1
10682		v.reset(OpARMRSBshiftLL)
10683		v.AuxInt = int32ToAuxInt(c)
10684		v.AddArg2(x, y)
10685		return true
10686	}
10687	// match: (SUB x (SRLconst [c] y))
10688	// result: (SUBshiftRL x y [c])
10689	for {
10690		x := v_0
10691		if v_1.Op != OpARMSRLconst {
10692			break
10693		}
10694		c := auxIntToInt32(v_1.AuxInt)
10695		y := v_1.Args[0]
10696		v.reset(OpARMSUBshiftRL)
10697		v.AuxInt = int32ToAuxInt(c)
10698		v.AddArg2(x, y)
10699		return true
10700	}
10701	// match: (SUB (SRLconst [c] y) x)
10702	// result: (RSBshiftRL x y [c])
10703	for {
10704		if v_0.Op != OpARMSRLconst {
10705			break
10706		}
10707		c := auxIntToInt32(v_0.AuxInt)
10708		y := v_0.Args[0]
10709		x := v_1
10710		v.reset(OpARMRSBshiftRL)
10711		v.AuxInt = int32ToAuxInt(c)
10712		v.AddArg2(x, y)
10713		return true
10714	}
10715	// match: (SUB x (SRAconst [c] y))
10716	// result: (SUBshiftRA x y [c])
10717	for {
10718		x := v_0
10719		if v_1.Op != OpARMSRAconst {
10720			break
10721		}
10722		c := auxIntToInt32(v_1.AuxInt)
10723		y := v_1.Args[0]
10724		v.reset(OpARMSUBshiftRA)
10725		v.AuxInt = int32ToAuxInt(c)
10726		v.AddArg2(x, y)
10727		return true
10728	}
10729	// match: (SUB (SRAconst [c] y) x)
10730	// result: (RSBshiftRA x y [c])
10731	for {
10732		if v_0.Op != OpARMSRAconst {
10733			break
10734		}
10735		c := auxIntToInt32(v_0.AuxInt)
10736		y := v_0.Args[0]
10737		x := v_1
10738		v.reset(OpARMRSBshiftRA)
10739		v.AuxInt = int32ToAuxInt(c)
10740		v.AddArg2(x, y)
10741		return true
10742	}
10743	// match: (SUB x (SLL y z))
10744	// result: (SUBshiftLLreg x y z)
10745	for {
10746		x := v_0
10747		if v_1.Op != OpARMSLL {
10748			break
10749		}
10750		z := v_1.Args[1]
10751		y := v_1.Args[0]
10752		v.reset(OpARMSUBshiftLLreg)
10753		v.AddArg3(x, y, z)
10754		return true
10755	}
10756	// match: (SUB (SLL y z) x)
10757	// result: (RSBshiftLLreg x y z)
10758	for {
10759		if v_0.Op != OpARMSLL {
10760			break
10761		}
10762		z := v_0.Args[1]
10763		y := v_0.Args[0]
10764		x := v_1
10765		v.reset(OpARMRSBshiftLLreg)
10766		v.AddArg3(x, y, z)
10767		return true
10768	}
10769	// match: (SUB x (SRL y z))
10770	// result: (SUBshiftRLreg x y z)
10771	for {
10772		x := v_0
10773		if v_1.Op != OpARMSRL {
10774			break
10775		}
10776		z := v_1.Args[1]
10777		y := v_1.Args[0]
10778		v.reset(OpARMSUBshiftRLreg)
10779		v.AddArg3(x, y, z)
10780		return true
10781	}
10782	// match: (SUB (SRL y z) x)
10783	// result: (RSBshiftRLreg x y z)
10784	for {
10785		if v_0.Op != OpARMSRL {
10786			break
10787		}
10788		z := v_0.Args[1]
10789		y := v_0.Args[0]
10790		x := v_1
10791		v.reset(OpARMRSBshiftRLreg)
10792		v.AddArg3(x, y, z)
10793		return true
10794	}
10795	// match: (SUB x (SRA y z))
10796	// result: (SUBshiftRAreg x y z)
10797	for {
10798		x := v_0
10799		if v_1.Op != OpARMSRA {
10800			break
10801		}
10802		z := v_1.Args[1]
10803		y := v_1.Args[0]
10804		v.reset(OpARMSUBshiftRAreg)
10805		v.AddArg3(x, y, z)
10806		return true
10807	}
10808	// match: (SUB (SRA y z) x)
10809	// result: (RSBshiftRAreg x y z)
10810	for {
10811		if v_0.Op != OpARMSRA {
10812			break
10813		}
10814		z := v_0.Args[1]
10815		y := v_0.Args[0]
10816		x := v_1
10817		v.reset(OpARMRSBshiftRAreg)
10818		v.AddArg3(x, y, z)
10819		return true
10820	}
10821	// match: (SUB x x)
10822	// result: (MOVWconst [0])
10823	for {
10824		x := v_0
10825		if x != v_1 {
10826			break
10827		}
10828		v.reset(OpARMMOVWconst)
10829		v.AuxInt = int32ToAuxInt(0)
10830		return true
10831	}
10832	// match: (SUB a (MUL x y))
10833	// cond: buildcfg.GOARM.Version == 7
10834	// result: (MULS x y a)
10835	for {
10836		a := v_0
10837		if v_1.Op != OpARMMUL {
10838			break
10839		}
10840		y := v_1.Args[1]
10841		x := v_1.Args[0]
10842		if !(buildcfg.GOARM.Version == 7) {
10843			break
10844		}
10845		v.reset(OpARMMULS)
10846		v.AddArg3(x, y, a)
10847		return true
10848	}
10849	return false
10850}
10851func rewriteValueARM_OpARMSUBD(v *Value) bool {
10852	v_1 := v.Args[1]
10853	v_0 := v.Args[0]
10854	// match: (SUBD a (MULD x y))
10855	// cond: a.Uses == 1 && buildcfg.GOARM.Version >= 6
10856	// result: (MULSD a x y)
10857	for {
10858		a := v_0
10859		if v_1.Op != OpARMMULD {
10860			break
10861		}
10862		y := v_1.Args[1]
10863		x := v_1.Args[0]
10864		if !(a.Uses == 1 && buildcfg.GOARM.Version >= 6) {
10865			break
10866		}
10867		v.reset(OpARMMULSD)
10868		v.AddArg3(a, x, y)
10869		return true
10870	}
10871	// match: (SUBD a (NMULD x y))
10872	// cond: a.Uses == 1 && buildcfg.GOARM.Version >= 6
10873	// result: (MULAD a x y)
10874	for {
10875		a := v_0
10876		if v_1.Op != OpARMNMULD {
10877			break
10878		}
10879		y := v_1.Args[1]
10880		x := v_1.Args[0]
10881		if !(a.Uses == 1 && buildcfg.GOARM.Version >= 6) {
10882			break
10883		}
10884		v.reset(OpARMMULAD)
10885		v.AddArg3(a, x, y)
10886		return true
10887	}
10888	return false
10889}
10890func rewriteValueARM_OpARMSUBF(v *Value) bool {
10891	v_1 := v.Args[1]
10892	v_0 := v.Args[0]
10893	// match: (SUBF a (MULF x y))
10894	// cond: a.Uses == 1 && buildcfg.GOARM.Version >= 6
10895	// result: (MULSF a x y)
10896	for {
10897		a := v_0
10898		if v_1.Op != OpARMMULF {
10899			break
10900		}
10901		y := v_1.Args[1]
10902		x := v_1.Args[0]
10903		if !(a.Uses == 1 && buildcfg.GOARM.Version >= 6) {
10904			break
10905		}
10906		v.reset(OpARMMULSF)
10907		v.AddArg3(a, x, y)
10908		return true
10909	}
10910	// match: (SUBF a (NMULF x y))
10911	// cond: a.Uses == 1 && buildcfg.GOARM.Version >= 6
10912	// result: (MULAF a x y)
10913	for {
10914		a := v_0
10915		if v_1.Op != OpARMNMULF {
10916			break
10917		}
10918		y := v_1.Args[1]
10919		x := v_1.Args[0]
10920		if !(a.Uses == 1 && buildcfg.GOARM.Version >= 6) {
10921			break
10922		}
10923		v.reset(OpARMMULAF)
10924		v.AddArg3(a, x, y)
10925		return true
10926	}
10927	return false
10928}
10929func rewriteValueARM_OpARMSUBS(v *Value) bool {
10930	v_1 := v.Args[1]
10931	v_0 := v.Args[0]
10932	// match: (SUBS x (MOVWconst [c]))
10933	// result: (SUBSconst [c] x)
10934	for {
10935		x := v_0
10936		if v_1.Op != OpARMMOVWconst {
10937			break
10938		}
10939		c := auxIntToInt32(v_1.AuxInt)
10940		v.reset(OpARMSUBSconst)
10941		v.AuxInt = int32ToAuxInt(c)
10942		v.AddArg(x)
10943		return true
10944	}
10945	// match: (SUBS x (SLLconst [c] y))
10946	// result: (SUBSshiftLL x y [c])
10947	for {
10948		x := v_0
10949		if v_1.Op != OpARMSLLconst {
10950			break
10951		}
10952		c := auxIntToInt32(v_1.AuxInt)
10953		y := v_1.Args[0]
10954		v.reset(OpARMSUBSshiftLL)
10955		v.AuxInt = int32ToAuxInt(c)
10956		v.AddArg2(x, y)
10957		return true
10958	}
10959	// match: (SUBS (SLLconst [c] y) x)
10960	// result: (RSBSshiftLL x y [c])
10961	for {
10962		if v_0.Op != OpARMSLLconst {
10963			break
10964		}
10965		c := auxIntToInt32(v_0.AuxInt)
10966		y := v_0.Args[0]
10967		x := v_1
10968		v.reset(OpARMRSBSshiftLL)
10969		v.AuxInt = int32ToAuxInt(c)
10970		v.AddArg2(x, y)
10971		return true
10972	}
10973	// match: (SUBS x (SRLconst [c] y))
10974	// result: (SUBSshiftRL x y [c])
10975	for {
10976		x := v_0
10977		if v_1.Op != OpARMSRLconst {
10978			break
10979		}
10980		c := auxIntToInt32(v_1.AuxInt)
10981		y := v_1.Args[0]
10982		v.reset(OpARMSUBSshiftRL)
10983		v.AuxInt = int32ToAuxInt(c)
10984		v.AddArg2(x, y)
10985		return true
10986	}
10987	// match: (SUBS (SRLconst [c] y) x)
10988	// result: (RSBSshiftRL x y [c])
10989	for {
10990		if v_0.Op != OpARMSRLconst {
10991			break
10992		}
10993		c := auxIntToInt32(v_0.AuxInt)
10994		y := v_0.Args[0]
10995		x := v_1
10996		v.reset(OpARMRSBSshiftRL)
10997		v.AuxInt = int32ToAuxInt(c)
10998		v.AddArg2(x, y)
10999		return true
11000	}
11001	// match: (SUBS x (SRAconst [c] y))
11002	// result: (SUBSshiftRA x y [c])
11003	for {
11004		x := v_0
11005		if v_1.Op != OpARMSRAconst {
11006			break
11007		}
11008		c := auxIntToInt32(v_1.AuxInt)
11009		y := v_1.Args[0]
11010		v.reset(OpARMSUBSshiftRA)
11011		v.AuxInt = int32ToAuxInt(c)
11012		v.AddArg2(x, y)
11013		return true
11014	}
11015	// match: (SUBS (SRAconst [c] y) x)
11016	// result: (RSBSshiftRA x y [c])
11017	for {
11018		if v_0.Op != OpARMSRAconst {
11019			break
11020		}
11021		c := auxIntToInt32(v_0.AuxInt)
11022		y := v_0.Args[0]
11023		x := v_1
11024		v.reset(OpARMRSBSshiftRA)
11025		v.AuxInt = int32ToAuxInt(c)
11026		v.AddArg2(x, y)
11027		return true
11028	}
11029	// match: (SUBS x (SLL y z))
11030	// result: (SUBSshiftLLreg x y z)
11031	for {
11032		x := v_0
11033		if v_1.Op != OpARMSLL {
11034			break
11035		}
11036		z := v_1.Args[1]
11037		y := v_1.Args[0]
11038		v.reset(OpARMSUBSshiftLLreg)
11039		v.AddArg3(x, y, z)
11040		return true
11041	}
11042	// match: (SUBS (SLL y z) x)
11043	// result: (RSBSshiftLLreg x y z)
11044	for {
11045		if v_0.Op != OpARMSLL {
11046			break
11047		}
11048		z := v_0.Args[1]
11049		y := v_0.Args[0]
11050		x := v_1
11051		v.reset(OpARMRSBSshiftLLreg)
11052		v.AddArg3(x, y, z)
11053		return true
11054	}
11055	// match: (SUBS x (SRL y z))
11056	// result: (SUBSshiftRLreg x y z)
11057	for {
11058		x := v_0
11059		if v_1.Op != OpARMSRL {
11060			break
11061		}
11062		z := v_1.Args[1]
11063		y := v_1.Args[0]
11064		v.reset(OpARMSUBSshiftRLreg)
11065		v.AddArg3(x, y, z)
11066		return true
11067	}
11068	// match: (SUBS (SRL y z) x)
11069	// result: (RSBSshiftRLreg x y z)
11070	for {
11071		if v_0.Op != OpARMSRL {
11072			break
11073		}
11074		z := v_0.Args[1]
11075		y := v_0.Args[0]
11076		x := v_1
11077		v.reset(OpARMRSBSshiftRLreg)
11078		v.AddArg3(x, y, z)
11079		return true
11080	}
11081	// match: (SUBS x (SRA y z))
11082	// result: (SUBSshiftRAreg x y z)
11083	for {
11084		x := v_0
11085		if v_1.Op != OpARMSRA {
11086			break
11087		}
11088		z := v_1.Args[1]
11089		y := v_1.Args[0]
11090		v.reset(OpARMSUBSshiftRAreg)
11091		v.AddArg3(x, y, z)
11092		return true
11093	}
11094	// match: (SUBS (SRA y z) x)
11095	// result: (RSBSshiftRAreg x y z)
11096	for {
11097		if v_0.Op != OpARMSRA {
11098			break
11099		}
11100		z := v_0.Args[1]
11101		y := v_0.Args[0]
11102		x := v_1
11103		v.reset(OpARMRSBSshiftRAreg)
11104		v.AddArg3(x, y, z)
11105		return true
11106	}
11107	return false
11108}
11109func rewriteValueARM_OpARMSUBSshiftLL(v *Value) bool {
11110	v_1 := v.Args[1]
11111	v_0 := v.Args[0]
11112	b := v.Block
11113	// match: (SUBSshiftLL (MOVWconst [c]) x [d])
11114	// result: (RSBSconst [c] (SLLconst <x.Type> x [d]))
11115	for {
11116		d := auxIntToInt32(v.AuxInt)
11117		if v_0.Op != OpARMMOVWconst {
11118			break
11119		}
11120		c := auxIntToInt32(v_0.AuxInt)
11121		x := v_1
11122		v.reset(OpARMRSBSconst)
11123		v.AuxInt = int32ToAuxInt(c)
11124		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
11125		v0.AuxInt = int32ToAuxInt(d)
11126		v0.AddArg(x)
11127		v.AddArg(v0)
11128		return true
11129	}
11130	// match: (SUBSshiftLL x (MOVWconst [c]) [d])
11131	// result: (SUBSconst x [c<<uint64(d)])
11132	for {
11133		d := auxIntToInt32(v.AuxInt)
11134		x := v_0
11135		if v_1.Op != OpARMMOVWconst {
11136			break
11137		}
11138		c := auxIntToInt32(v_1.AuxInt)
11139		v.reset(OpARMSUBSconst)
11140		v.AuxInt = int32ToAuxInt(c << uint64(d))
11141		v.AddArg(x)
11142		return true
11143	}
11144	return false
11145}
11146func rewriteValueARM_OpARMSUBSshiftLLreg(v *Value) bool {
11147	v_2 := v.Args[2]
11148	v_1 := v.Args[1]
11149	v_0 := v.Args[0]
11150	b := v.Block
11151	// match: (SUBSshiftLLreg (MOVWconst [c]) x y)
11152	// result: (RSBSconst [c] (SLL <x.Type> x y))
11153	for {
11154		if v_0.Op != OpARMMOVWconst {
11155			break
11156		}
11157		c := auxIntToInt32(v_0.AuxInt)
11158		x := v_1
11159		y := v_2
11160		v.reset(OpARMRSBSconst)
11161		v.AuxInt = int32ToAuxInt(c)
11162		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
11163		v0.AddArg2(x, y)
11164		v.AddArg(v0)
11165		return true
11166	}
11167	// match: (SUBSshiftLLreg x y (MOVWconst [c]))
11168	// cond: 0 <= c && c < 32
11169	// result: (SUBSshiftLL x y [c])
11170	for {
11171		x := v_0
11172		y := v_1
11173		if v_2.Op != OpARMMOVWconst {
11174			break
11175		}
11176		c := auxIntToInt32(v_2.AuxInt)
11177		if !(0 <= c && c < 32) {
11178			break
11179		}
11180		v.reset(OpARMSUBSshiftLL)
11181		v.AuxInt = int32ToAuxInt(c)
11182		v.AddArg2(x, y)
11183		return true
11184	}
11185	return false
11186}
11187func rewriteValueARM_OpARMSUBSshiftRA(v *Value) bool {
11188	v_1 := v.Args[1]
11189	v_0 := v.Args[0]
11190	b := v.Block
11191	// match: (SUBSshiftRA (MOVWconst [c]) x [d])
11192	// result: (RSBSconst [c] (SRAconst <x.Type> x [d]))
11193	for {
11194		d := auxIntToInt32(v.AuxInt)
11195		if v_0.Op != OpARMMOVWconst {
11196			break
11197		}
11198		c := auxIntToInt32(v_0.AuxInt)
11199		x := v_1
11200		v.reset(OpARMRSBSconst)
11201		v.AuxInt = int32ToAuxInt(c)
11202		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
11203		v0.AuxInt = int32ToAuxInt(d)
11204		v0.AddArg(x)
11205		v.AddArg(v0)
11206		return true
11207	}
11208	// match: (SUBSshiftRA x (MOVWconst [c]) [d])
11209	// result: (SUBSconst x [c>>uint64(d)])
11210	for {
11211		d := auxIntToInt32(v.AuxInt)
11212		x := v_0
11213		if v_1.Op != OpARMMOVWconst {
11214			break
11215		}
11216		c := auxIntToInt32(v_1.AuxInt)
11217		v.reset(OpARMSUBSconst)
11218		v.AuxInt = int32ToAuxInt(c >> uint64(d))
11219		v.AddArg(x)
11220		return true
11221	}
11222	return false
11223}
11224func rewriteValueARM_OpARMSUBSshiftRAreg(v *Value) bool {
11225	v_2 := v.Args[2]
11226	v_1 := v.Args[1]
11227	v_0 := v.Args[0]
11228	b := v.Block
11229	// match: (SUBSshiftRAreg (MOVWconst [c]) x y)
11230	// result: (RSBSconst [c] (SRA <x.Type> x y))
11231	for {
11232		if v_0.Op != OpARMMOVWconst {
11233			break
11234		}
11235		c := auxIntToInt32(v_0.AuxInt)
11236		x := v_1
11237		y := v_2
11238		v.reset(OpARMRSBSconst)
11239		v.AuxInt = int32ToAuxInt(c)
11240		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
11241		v0.AddArg2(x, y)
11242		v.AddArg(v0)
11243		return true
11244	}
11245	// match: (SUBSshiftRAreg x y (MOVWconst [c]))
11246	// cond: 0 <= c && c < 32
11247	// result: (SUBSshiftRA x y [c])
11248	for {
11249		x := v_0
11250		y := v_1
11251		if v_2.Op != OpARMMOVWconst {
11252			break
11253		}
11254		c := auxIntToInt32(v_2.AuxInt)
11255		if !(0 <= c && c < 32) {
11256			break
11257		}
11258		v.reset(OpARMSUBSshiftRA)
11259		v.AuxInt = int32ToAuxInt(c)
11260		v.AddArg2(x, y)
11261		return true
11262	}
11263	return false
11264}
11265func rewriteValueARM_OpARMSUBSshiftRL(v *Value) bool {
11266	v_1 := v.Args[1]
11267	v_0 := v.Args[0]
11268	b := v.Block
11269	// match: (SUBSshiftRL (MOVWconst [c]) x [d])
11270	// result: (RSBSconst [c] (SRLconst <x.Type> x [d]))
11271	for {
11272		d := auxIntToInt32(v.AuxInt)
11273		if v_0.Op != OpARMMOVWconst {
11274			break
11275		}
11276		c := auxIntToInt32(v_0.AuxInt)
11277		x := v_1
11278		v.reset(OpARMRSBSconst)
11279		v.AuxInt = int32ToAuxInt(c)
11280		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
11281		v0.AuxInt = int32ToAuxInt(d)
11282		v0.AddArg(x)
11283		v.AddArg(v0)
11284		return true
11285	}
11286	// match: (SUBSshiftRL x (MOVWconst [c]) [d])
11287	// result: (SUBSconst x [int32(uint32(c)>>uint64(d))])
11288	for {
11289		d := auxIntToInt32(v.AuxInt)
11290		x := v_0
11291		if v_1.Op != OpARMMOVWconst {
11292			break
11293		}
11294		c := auxIntToInt32(v_1.AuxInt)
11295		v.reset(OpARMSUBSconst)
11296		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
11297		v.AddArg(x)
11298		return true
11299	}
11300	return false
11301}
11302func rewriteValueARM_OpARMSUBSshiftRLreg(v *Value) bool {
11303	v_2 := v.Args[2]
11304	v_1 := v.Args[1]
11305	v_0 := v.Args[0]
11306	b := v.Block
11307	// match: (SUBSshiftRLreg (MOVWconst [c]) x y)
11308	// result: (RSBSconst [c] (SRL <x.Type> x y))
11309	for {
11310		if v_0.Op != OpARMMOVWconst {
11311			break
11312		}
11313		c := auxIntToInt32(v_0.AuxInt)
11314		x := v_1
11315		y := v_2
11316		v.reset(OpARMRSBSconst)
11317		v.AuxInt = int32ToAuxInt(c)
11318		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
11319		v0.AddArg2(x, y)
11320		v.AddArg(v0)
11321		return true
11322	}
11323	// match: (SUBSshiftRLreg x y (MOVWconst [c]))
11324	// cond: 0 <= c && c < 32
11325	// result: (SUBSshiftRL x y [c])
11326	for {
11327		x := v_0
11328		y := v_1
11329		if v_2.Op != OpARMMOVWconst {
11330			break
11331		}
11332		c := auxIntToInt32(v_2.AuxInt)
11333		if !(0 <= c && c < 32) {
11334			break
11335		}
11336		v.reset(OpARMSUBSshiftRL)
11337		v.AuxInt = int32ToAuxInt(c)
11338		v.AddArg2(x, y)
11339		return true
11340	}
11341	return false
11342}
11343func rewriteValueARM_OpARMSUBconst(v *Value) bool {
11344	v_0 := v.Args[0]
11345	// match: (SUBconst [off1] (MOVWaddr [off2] {sym} ptr))
11346	// result: (MOVWaddr [off2-off1] {sym} ptr)
11347	for {
11348		off1 := auxIntToInt32(v.AuxInt)
11349		if v_0.Op != OpARMMOVWaddr {
11350			break
11351		}
11352		off2 := auxIntToInt32(v_0.AuxInt)
11353		sym := auxToSym(v_0.Aux)
11354		ptr := v_0.Args[0]
11355		v.reset(OpARMMOVWaddr)
11356		v.AuxInt = int32ToAuxInt(off2 - off1)
11357		v.Aux = symToAux(sym)
11358		v.AddArg(ptr)
11359		return true
11360	}
11361	// match: (SUBconst [0] x)
11362	// result: x
11363	for {
11364		if auxIntToInt32(v.AuxInt) != 0 {
11365			break
11366		}
11367		x := v_0
11368		v.copyOf(x)
11369		return true
11370	}
11371	// match: (SUBconst [c] x)
11372	// cond: !isARMImmRot(uint32(c)) && isARMImmRot(uint32(-c))
11373	// result: (ADDconst [-c] x)
11374	for {
11375		c := auxIntToInt32(v.AuxInt)
11376		x := v_0
11377		if !(!isARMImmRot(uint32(c)) && isARMImmRot(uint32(-c))) {
11378			break
11379		}
11380		v.reset(OpARMADDconst)
11381		v.AuxInt = int32ToAuxInt(-c)
11382		v.AddArg(x)
11383		return true
11384	}
11385	// match: (SUBconst [c] x)
11386	// cond: buildcfg.GOARM.Version==7 && !isARMImmRot(uint32(c)) && uint32(c)>0xffff && uint32(-c)<=0xffff
11387	// result: (ADDconst [-c] x)
11388	for {
11389		c := auxIntToInt32(v.AuxInt)
11390		x := v_0
11391		if !(buildcfg.GOARM.Version == 7 && !isARMImmRot(uint32(c)) && uint32(c) > 0xffff && uint32(-c) <= 0xffff) {
11392			break
11393		}
11394		v.reset(OpARMADDconst)
11395		v.AuxInt = int32ToAuxInt(-c)
11396		v.AddArg(x)
11397		return true
11398	}
11399	// match: (SUBconst [c] (MOVWconst [d]))
11400	// result: (MOVWconst [d-c])
11401	for {
11402		c := auxIntToInt32(v.AuxInt)
11403		if v_0.Op != OpARMMOVWconst {
11404			break
11405		}
11406		d := auxIntToInt32(v_0.AuxInt)
11407		v.reset(OpARMMOVWconst)
11408		v.AuxInt = int32ToAuxInt(d - c)
11409		return true
11410	}
11411	// match: (SUBconst [c] (SUBconst [d] x))
11412	// result: (ADDconst [-c-d] x)
11413	for {
11414		c := auxIntToInt32(v.AuxInt)
11415		if v_0.Op != OpARMSUBconst {
11416			break
11417		}
11418		d := auxIntToInt32(v_0.AuxInt)
11419		x := v_0.Args[0]
11420		v.reset(OpARMADDconst)
11421		v.AuxInt = int32ToAuxInt(-c - d)
11422		v.AddArg(x)
11423		return true
11424	}
11425	// match: (SUBconst [c] (ADDconst [d] x))
11426	// result: (ADDconst [-c+d] x)
11427	for {
11428		c := auxIntToInt32(v.AuxInt)
11429		if v_0.Op != OpARMADDconst {
11430			break
11431		}
11432		d := auxIntToInt32(v_0.AuxInt)
11433		x := v_0.Args[0]
11434		v.reset(OpARMADDconst)
11435		v.AuxInt = int32ToAuxInt(-c + d)
11436		v.AddArg(x)
11437		return true
11438	}
11439	// match: (SUBconst [c] (RSBconst [d] x))
11440	// result: (RSBconst [-c+d] x)
11441	for {
11442		c := auxIntToInt32(v.AuxInt)
11443		if v_0.Op != OpARMRSBconst {
11444			break
11445		}
11446		d := auxIntToInt32(v_0.AuxInt)
11447		x := v_0.Args[0]
11448		v.reset(OpARMRSBconst)
11449		v.AuxInt = int32ToAuxInt(-c + d)
11450		v.AddArg(x)
11451		return true
11452	}
11453	return false
11454}
11455func rewriteValueARM_OpARMSUBshiftLL(v *Value) bool {
11456	v_1 := v.Args[1]
11457	v_0 := v.Args[0]
11458	b := v.Block
11459	// match: (SUBshiftLL (MOVWconst [c]) x [d])
11460	// result: (RSBconst [c] (SLLconst <x.Type> x [d]))
11461	for {
11462		d := auxIntToInt32(v.AuxInt)
11463		if v_0.Op != OpARMMOVWconst {
11464			break
11465		}
11466		c := auxIntToInt32(v_0.AuxInt)
11467		x := v_1
11468		v.reset(OpARMRSBconst)
11469		v.AuxInt = int32ToAuxInt(c)
11470		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
11471		v0.AuxInt = int32ToAuxInt(d)
11472		v0.AddArg(x)
11473		v.AddArg(v0)
11474		return true
11475	}
11476	// match: (SUBshiftLL x (MOVWconst [c]) [d])
11477	// result: (SUBconst x [c<<uint64(d)])
11478	for {
11479		d := auxIntToInt32(v.AuxInt)
11480		x := v_0
11481		if v_1.Op != OpARMMOVWconst {
11482			break
11483		}
11484		c := auxIntToInt32(v_1.AuxInt)
11485		v.reset(OpARMSUBconst)
11486		v.AuxInt = int32ToAuxInt(c << uint64(d))
11487		v.AddArg(x)
11488		return true
11489	}
11490	// match: (SUBshiftLL (SLLconst x [c]) x [c])
11491	// result: (MOVWconst [0])
11492	for {
11493		c := auxIntToInt32(v.AuxInt)
11494		if v_0.Op != OpARMSLLconst || auxIntToInt32(v_0.AuxInt) != c {
11495			break
11496		}
11497		x := v_0.Args[0]
11498		if x != v_1 {
11499			break
11500		}
11501		v.reset(OpARMMOVWconst)
11502		v.AuxInt = int32ToAuxInt(0)
11503		return true
11504	}
11505	return false
11506}
11507func rewriteValueARM_OpARMSUBshiftLLreg(v *Value) bool {
11508	v_2 := v.Args[2]
11509	v_1 := v.Args[1]
11510	v_0 := v.Args[0]
11511	b := v.Block
11512	// match: (SUBshiftLLreg (MOVWconst [c]) x y)
11513	// result: (RSBconst [c] (SLL <x.Type> x y))
11514	for {
11515		if v_0.Op != OpARMMOVWconst {
11516			break
11517		}
11518		c := auxIntToInt32(v_0.AuxInt)
11519		x := v_1
11520		y := v_2
11521		v.reset(OpARMRSBconst)
11522		v.AuxInt = int32ToAuxInt(c)
11523		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
11524		v0.AddArg2(x, y)
11525		v.AddArg(v0)
11526		return true
11527	}
11528	// match: (SUBshiftLLreg x y (MOVWconst [c]))
11529	// cond: 0 <= c && c < 32
11530	// result: (SUBshiftLL x y [c])
11531	for {
11532		x := v_0
11533		y := v_1
11534		if v_2.Op != OpARMMOVWconst {
11535			break
11536		}
11537		c := auxIntToInt32(v_2.AuxInt)
11538		if !(0 <= c && c < 32) {
11539			break
11540		}
11541		v.reset(OpARMSUBshiftLL)
11542		v.AuxInt = int32ToAuxInt(c)
11543		v.AddArg2(x, y)
11544		return true
11545	}
11546	return false
11547}
11548func rewriteValueARM_OpARMSUBshiftRA(v *Value) bool {
11549	v_1 := v.Args[1]
11550	v_0 := v.Args[0]
11551	b := v.Block
11552	// match: (SUBshiftRA (MOVWconst [c]) x [d])
11553	// result: (RSBconst [c] (SRAconst <x.Type> x [d]))
11554	for {
11555		d := auxIntToInt32(v.AuxInt)
11556		if v_0.Op != OpARMMOVWconst {
11557			break
11558		}
11559		c := auxIntToInt32(v_0.AuxInt)
11560		x := v_1
11561		v.reset(OpARMRSBconst)
11562		v.AuxInt = int32ToAuxInt(c)
11563		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
11564		v0.AuxInt = int32ToAuxInt(d)
11565		v0.AddArg(x)
11566		v.AddArg(v0)
11567		return true
11568	}
11569	// match: (SUBshiftRA x (MOVWconst [c]) [d])
11570	// result: (SUBconst x [c>>uint64(d)])
11571	for {
11572		d := auxIntToInt32(v.AuxInt)
11573		x := v_0
11574		if v_1.Op != OpARMMOVWconst {
11575			break
11576		}
11577		c := auxIntToInt32(v_1.AuxInt)
11578		v.reset(OpARMSUBconst)
11579		v.AuxInt = int32ToAuxInt(c >> uint64(d))
11580		v.AddArg(x)
11581		return true
11582	}
11583	// match: (SUBshiftRA (SRAconst x [c]) x [c])
11584	// result: (MOVWconst [0])
11585	for {
11586		c := auxIntToInt32(v.AuxInt)
11587		if v_0.Op != OpARMSRAconst || auxIntToInt32(v_0.AuxInt) != c {
11588			break
11589		}
11590		x := v_0.Args[0]
11591		if x != v_1 {
11592			break
11593		}
11594		v.reset(OpARMMOVWconst)
11595		v.AuxInt = int32ToAuxInt(0)
11596		return true
11597	}
11598	return false
11599}
11600func rewriteValueARM_OpARMSUBshiftRAreg(v *Value) bool {
11601	v_2 := v.Args[2]
11602	v_1 := v.Args[1]
11603	v_0 := v.Args[0]
11604	b := v.Block
11605	// match: (SUBshiftRAreg (MOVWconst [c]) x y)
11606	// result: (RSBconst [c] (SRA <x.Type> x y))
11607	for {
11608		if v_0.Op != OpARMMOVWconst {
11609			break
11610		}
11611		c := auxIntToInt32(v_0.AuxInt)
11612		x := v_1
11613		y := v_2
11614		v.reset(OpARMRSBconst)
11615		v.AuxInt = int32ToAuxInt(c)
11616		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
11617		v0.AddArg2(x, y)
11618		v.AddArg(v0)
11619		return true
11620	}
11621	// match: (SUBshiftRAreg x y (MOVWconst [c]))
11622	// cond: 0 <= c && c < 32
11623	// result: (SUBshiftRA x y [c])
11624	for {
11625		x := v_0
11626		y := v_1
11627		if v_2.Op != OpARMMOVWconst {
11628			break
11629		}
11630		c := auxIntToInt32(v_2.AuxInt)
11631		if !(0 <= c && c < 32) {
11632			break
11633		}
11634		v.reset(OpARMSUBshiftRA)
11635		v.AuxInt = int32ToAuxInt(c)
11636		v.AddArg2(x, y)
11637		return true
11638	}
11639	return false
11640}
11641func rewriteValueARM_OpARMSUBshiftRL(v *Value) bool {
11642	v_1 := v.Args[1]
11643	v_0 := v.Args[0]
11644	b := v.Block
11645	// match: (SUBshiftRL (MOVWconst [c]) x [d])
11646	// result: (RSBconst [c] (SRLconst <x.Type> x [d]))
11647	for {
11648		d := auxIntToInt32(v.AuxInt)
11649		if v_0.Op != OpARMMOVWconst {
11650			break
11651		}
11652		c := auxIntToInt32(v_0.AuxInt)
11653		x := v_1
11654		v.reset(OpARMRSBconst)
11655		v.AuxInt = int32ToAuxInt(c)
11656		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
11657		v0.AuxInt = int32ToAuxInt(d)
11658		v0.AddArg(x)
11659		v.AddArg(v0)
11660		return true
11661	}
11662	// match: (SUBshiftRL x (MOVWconst [c]) [d])
11663	// result: (SUBconst x [int32(uint32(c)>>uint64(d))])
11664	for {
11665		d := auxIntToInt32(v.AuxInt)
11666		x := v_0
11667		if v_1.Op != OpARMMOVWconst {
11668			break
11669		}
11670		c := auxIntToInt32(v_1.AuxInt)
11671		v.reset(OpARMSUBconst)
11672		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
11673		v.AddArg(x)
11674		return true
11675	}
11676	// match: (SUBshiftRL (SRLconst x [c]) x [c])
11677	// result: (MOVWconst [0])
11678	for {
11679		c := auxIntToInt32(v.AuxInt)
11680		if v_0.Op != OpARMSRLconst || auxIntToInt32(v_0.AuxInt) != c {
11681			break
11682		}
11683		x := v_0.Args[0]
11684		if x != v_1 {
11685			break
11686		}
11687		v.reset(OpARMMOVWconst)
11688		v.AuxInt = int32ToAuxInt(0)
11689		return true
11690	}
11691	return false
11692}
11693func rewriteValueARM_OpARMSUBshiftRLreg(v *Value) bool {
11694	v_2 := v.Args[2]
11695	v_1 := v.Args[1]
11696	v_0 := v.Args[0]
11697	b := v.Block
11698	// match: (SUBshiftRLreg (MOVWconst [c]) x y)
11699	// result: (RSBconst [c] (SRL <x.Type> x y))
11700	for {
11701		if v_0.Op != OpARMMOVWconst {
11702			break
11703		}
11704		c := auxIntToInt32(v_0.AuxInt)
11705		x := v_1
11706		y := v_2
11707		v.reset(OpARMRSBconst)
11708		v.AuxInt = int32ToAuxInt(c)
11709		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
11710		v0.AddArg2(x, y)
11711		v.AddArg(v0)
11712		return true
11713	}
11714	// match: (SUBshiftRLreg x y (MOVWconst [c]))
11715	// cond: 0 <= c && c < 32
11716	// result: (SUBshiftRL x y [c])
11717	for {
11718		x := v_0
11719		y := v_1
11720		if v_2.Op != OpARMMOVWconst {
11721			break
11722		}
11723		c := auxIntToInt32(v_2.AuxInt)
11724		if !(0 <= c && c < 32) {
11725			break
11726		}
11727		v.reset(OpARMSUBshiftRL)
11728		v.AuxInt = int32ToAuxInt(c)
11729		v.AddArg2(x, y)
11730		return true
11731	}
11732	return false
11733}
11734func rewriteValueARM_OpARMTEQ(v *Value) bool {
11735	v_1 := v.Args[1]
11736	v_0 := v.Args[0]
11737	// match: (TEQ x (MOVWconst [c]))
11738	// result: (TEQconst [c] x)
11739	for {
11740		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
11741			x := v_0
11742			if v_1.Op != OpARMMOVWconst {
11743				continue
11744			}
11745			c := auxIntToInt32(v_1.AuxInt)
11746			v.reset(OpARMTEQconst)
11747			v.AuxInt = int32ToAuxInt(c)
11748			v.AddArg(x)
11749			return true
11750		}
11751		break
11752	}
11753	// match: (TEQ x (SLLconst [c] y))
11754	// result: (TEQshiftLL x y [c])
11755	for {
11756		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
11757			x := v_0
11758			if v_1.Op != OpARMSLLconst {
11759				continue
11760			}
11761			c := auxIntToInt32(v_1.AuxInt)
11762			y := v_1.Args[0]
11763			v.reset(OpARMTEQshiftLL)
11764			v.AuxInt = int32ToAuxInt(c)
11765			v.AddArg2(x, y)
11766			return true
11767		}
11768		break
11769	}
11770	// match: (TEQ x (SRLconst [c] y))
11771	// result: (TEQshiftRL x y [c])
11772	for {
11773		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
11774			x := v_0
11775			if v_1.Op != OpARMSRLconst {
11776				continue
11777			}
11778			c := auxIntToInt32(v_1.AuxInt)
11779			y := v_1.Args[0]
11780			v.reset(OpARMTEQshiftRL)
11781			v.AuxInt = int32ToAuxInt(c)
11782			v.AddArg2(x, y)
11783			return true
11784		}
11785		break
11786	}
11787	// match: (TEQ x (SRAconst [c] y))
11788	// result: (TEQshiftRA x y [c])
11789	for {
11790		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
11791			x := v_0
11792			if v_1.Op != OpARMSRAconst {
11793				continue
11794			}
11795			c := auxIntToInt32(v_1.AuxInt)
11796			y := v_1.Args[0]
11797			v.reset(OpARMTEQshiftRA)
11798			v.AuxInt = int32ToAuxInt(c)
11799			v.AddArg2(x, y)
11800			return true
11801		}
11802		break
11803	}
11804	// match: (TEQ x (SLL y z))
11805	// result: (TEQshiftLLreg x y z)
11806	for {
11807		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
11808			x := v_0
11809			if v_1.Op != OpARMSLL {
11810				continue
11811			}
11812			z := v_1.Args[1]
11813			y := v_1.Args[0]
11814			v.reset(OpARMTEQshiftLLreg)
11815			v.AddArg3(x, y, z)
11816			return true
11817		}
11818		break
11819	}
11820	// match: (TEQ x (SRL y z))
11821	// result: (TEQshiftRLreg x y z)
11822	for {
11823		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
11824			x := v_0
11825			if v_1.Op != OpARMSRL {
11826				continue
11827			}
11828			z := v_1.Args[1]
11829			y := v_1.Args[0]
11830			v.reset(OpARMTEQshiftRLreg)
11831			v.AddArg3(x, y, z)
11832			return true
11833		}
11834		break
11835	}
11836	// match: (TEQ x (SRA y z))
11837	// result: (TEQshiftRAreg x y z)
11838	for {
11839		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
11840			x := v_0
11841			if v_1.Op != OpARMSRA {
11842				continue
11843			}
11844			z := v_1.Args[1]
11845			y := v_1.Args[0]
11846			v.reset(OpARMTEQshiftRAreg)
11847			v.AddArg3(x, y, z)
11848			return true
11849		}
11850		break
11851	}
11852	return false
11853}
11854func rewriteValueARM_OpARMTEQconst(v *Value) bool {
11855	v_0 := v.Args[0]
11856	// match: (TEQconst (MOVWconst [x]) [y])
11857	// result: (FlagConstant [logicFlags32(x^y)])
11858	for {
11859		y := auxIntToInt32(v.AuxInt)
11860		if v_0.Op != OpARMMOVWconst {
11861			break
11862		}
11863		x := auxIntToInt32(v_0.AuxInt)
11864		v.reset(OpARMFlagConstant)
11865		v.AuxInt = flagConstantToAuxInt(logicFlags32(x ^ y))
11866		return true
11867	}
11868	return false
11869}
11870func rewriteValueARM_OpARMTEQshiftLL(v *Value) bool {
11871	v_1 := v.Args[1]
11872	v_0 := v.Args[0]
11873	b := v.Block
11874	// match: (TEQshiftLL (MOVWconst [c]) x [d])
11875	// result: (TEQconst [c] (SLLconst <x.Type> x [d]))
11876	for {
11877		d := auxIntToInt32(v.AuxInt)
11878		if v_0.Op != OpARMMOVWconst {
11879			break
11880		}
11881		c := auxIntToInt32(v_0.AuxInt)
11882		x := v_1
11883		v.reset(OpARMTEQconst)
11884		v.AuxInt = int32ToAuxInt(c)
11885		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
11886		v0.AuxInt = int32ToAuxInt(d)
11887		v0.AddArg(x)
11888		v.AddArg(v0)
11889		return true
11890	}
11891	// match: (TEQshiftLL x (MOVWconst [c]) [d])
11892	// result: (TEQconst x [c<<uint64(d)])
11893	for {
11894		d := auxIntToInt32(v.AuxInt)
11895		x := v_0
11896		if v_1.Op != OpARMMOVWconst {
11897			break
11898		}
11899		c := auxIntToInt32(v_1.AuxInt)
11900		v.reset(OpARMTEQconst)
11901		v.AuxInt = int32ToAuxInt(c << uint64(d))
11902		v.AddArg(x)
11903		return true
11904	}
11905	return false
11906}
11907func rewriteValueARM_OpARMTEQshiftLLreg(v *Value) bool {
11908	v_2 := v.Args[2]
11909	v_1 := v.Args[1]
11910	v_0 := v.Args[0]
11911	b := v.Block
11912	// match: (TEQshiftLLreg (MOVWconst [c]) x y)
11913	// result: (TEQconst [c] (SLL <x.Type> x y))
11914	for {
11915		if v_0.Op != OpARMMOVWconst {
11916			break
11917		}
11918		c := auxIntToInt32(v_0.AuxInt)
11919		x := v_1
11920		y := v_2
11921		v.reset(OpARMTEQconst)
11922		v.AuxInt = int32ToAuxInt(c)
11923		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
11924		v0.AddArg2(x, y)
11925		v.AddArg(v0)
11926		return true
11927	}
11928	// match: (TEQshiftLLreg x y (MOVWconst [c]))
11929	// cond: 0 <= c && c < 32
11930	// result: (TEQshiftLL x y [c])
11931	for {
11932		x := v_0
11933		y := v_1
11934		if v_2.Op != OpARMMOVWconst {
11935			break
11936		}
11937		c := auxIntToInt32(v_2.AuxInt)
11938		if !(0 <= c && c < 32) {
11939			break
11940		}
11941		v.reset(OpARMTEQshiftLL)
11942		v.AuxInt = int32ToAuxInt(c)
11943		v.AddArg2(x, y)
11944		return true
11945	}
11946	return false
11947}
11948func rewriteValueARM_OpARMTEQshiftRA(v *Value) bool {
11949	v_1 := v.Args[1]
11950	v_0 := v.Args[0]
11951	b := v.Block
11952	// match: (TEQshiftRA (MOVWconst [c]) x [d])
11953	// result: (TEQconst [c] (SRAconst <x.Type> x [d]))
11954	for {
11955		d := auxIntToInt32(v.AuxInt)
11956		if v_0.Op != OpARMMOVWconst {
11957			break
11958		}
11959		c := auxIntToInt32(v_0.AuxInt)
11960		x := v_1
11961		v.reset(OpARMTEQconst)
11962		v.AuxInt = int32ToAuxInt(c)
11963		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
11964		v0.AuxInt = int32ToAuxInt(d)
11965		v0.AddArg(x)
11966		v.AddArg(v0)
11967		return true
11968	}
11969	// match: (TEQshiftRA x (MOVWconst [c]) [d])
11970	// result: (TEQconst x [c>>uint64(d)])
11971	for {
11972		d := auxIntToInt32(v.AuxInt)
11973		x := v_0
11974		if v_1.Op != OpARMMOVWconst {
11975			break
11976		}
11977		c := auxIntToInt32(v_1.AuxInt)
11978		v.reset(OpARMTEQconst)
11979		v.AuxInt = int32ToAuxInt(c >> uint64(d))
11980		v.AddArg(x)
11981		return true
11982	}
11983	return false
11984}
11985func rewriteValueARM_OpARMTEQshiftRAreg(v *Value) bool {
11986	v_2 := v.Args[2]
11987	v_1 := v.Args[1]
11988	v_0 := v.Args[0]
11989	b := v.Block
11990	// match: (TEQshiftRAreg (MOVWconst [c]) x y)
11991	// result: (TEQconst [c] (SRA <x.Type> x y))
11992	for {
11993		if v_0.Op != OpARMMOVWconst {
11994			break
11995		}
11996		c := auxIntToInt32(v_0.AuxInt)
11997		x := v_1
11998		y := v_2
11999		v.reset(OpARMTEQconst)
12000		v.AuxInt = int32ToAuxInt(c)
12001		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
12002		v0.AddArg2(x, y)
12003		v.AddArg(v0)
12004		return true
12005	}
12006	// match: (TEQshiftRAreg x y (MOVWconst [c]))
12007	// cond: 0 <= c && c < 32
12008	// result: (TEQshiftRA x y [c])
12009	for {
12010		x := v_0
12011		y := v_1
12012		if v_2.Op != OpARMMOVWconst {
12013			break
12014		}
12015		c := auxIntToInt32(v_2.AuxInt)
12016		if !(0 <= c && c < 32) {
12017			break
12018		}
12019		v.reset(OpARMTEQshiftRA)
12020		v.AuxInt = int32ToAuxInt(c)
12021		v.AddArg2(x, y)
12022		return true
12023	}
12024	return false
12025}
12026func rewriteValueARM_OpARMTEQshiftRL(v *Value) bool {
12027	v_1 := v.Args[1]
12028	v_0 := v.Args[0]
12029	b := v.Block
12030	// match: (TEQshiftRL (MOVWconst [c]) x [d])
12031	// result: (TEQconst [c] (SRLconst <x.Type> x [d]))
12032	for {
12033		d := auxIntToInt32(v.AuxInt)
12034		if v_0.Op != OpARMMOVWconst {
12035			break
12036		}
12037		c := auxIntToInt32(v_0.AuxInt)
12038		x := v_1
12039		v.reset(OpARMTEQconst)
12040		v.AuxInt = int32ToAuxInt(c)
12041		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
12042		v0.AuxInt = int32ToAuxInt(d)
12043		v0.AddArg(x)
12044		v.AddArg(v0)
12045		return true
12046	}
12047	// match: (TEQshiftRL x (MOVWconst [c]) [d])
12048	// result: (TEQconst x [int32(uint32(c)>>uint64(d))])
12049	for {
12050		d := auxIntToInt32(v.AuxInt)
12051		x := v_0
12052		if v_1.Op != OpARMMOVWconst {
12053			break
12054		}
12055		c := auxIntToInt32(v_1.AuxInt)
12056		v.reset(OpARMTEQconst)
12057		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
12058		v.AddArg(x)
12059		return true
12060	}
12061	return false
12062}
12063func rewriteValueARM_OpARMTEQshiftRLreg(v *Value) bool {
12064	v_2 := v.Args[2]
12065	v_1 := v.Args[1]
12066	v_0 := v.Args[0]
12067	b := v.Block
12068	// match: (TEQshiftRLreg (MOVWconst [c]) x y)
12069	// result: (TEQconst [c] (SRL <x.Type> x y))
12070	for {
12071		if v_0.Op != OpARMMOVWconst {
12072			break
12073		}
12074		c := auxIntToInt32(v_0.AuxInt)
12075		x := v_1
12076		y := v_2
12077		v.reset(OpARMTEQconst)
12078		v.AuxInt = int32ToAuxInt(c)
12079		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
12080		v0.AddArg2(x, y)
12081		v.AddArg(v0)
12082		return true
12083	}
12084	// match: (TEQshiftRLreg x y (MOVWconst [c]))
12085	// cond: 0 <= c && c < 32
12086	// result: (TEQshiftRL x y [c])
12087	for {
12088		x := v_0
12089		y := v_1
12090		if v_2.Op != OpARMMOVWconst {
12091			break
12092		}
12093		c := auxIntToInt32(v_2.AuxInt)
12094		if !(0 <= c && c < 32) {
12095			break
12096		}
12097		v.reset(OpARMTEQshiftRL)
12098		v.AuxInt = int32ToAuxInt(c)
12099		v.AddArg2(x, y)
12100		return true
12101	}
12102	return false
12103}
12104func rewriteValueARM_OpARMTST(v *Value) bool {
12105	v_1 := v.Args[1]
12106	v_0 := v.Args[0]
12107	// match: (TST x (MOVWconst [c]))
12108	// result: (TSTconst [c] x)
12109	for {
12110		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
12111			x := v_0
12112			if v_1.Op != OpARMMOVWconst {
12113				continue
12114			}
12115			c := auxIntToInt32(v_1.AuxInt)
12116			v.reset(OpARMTSTconst)
12117			v.AuxInt = int32ToAuxInt(c)
12118			v.AddArg(x)
12119			return true
12120		}
12121		break
12122	}
12123	// match: (TST x (SLLconst [c] y))
12124	// result: (TSTshiftLL x y [c])
12125	for {
12126		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
12127			x := v_0
12128			if v_1.Op != OpARMSLLconst {
12129				continue
12130			}
12131			c := auxIntToInt32(v_1.AuxInt)
12132			y := v_1.Args[0]
12133			v.reset(OpARMTSTshiftLL)
12134			v.AuxInt = int32ToAuxInt(c)
12135			v.AddArg2(x, y)
12136			return true
12137		}
12138		break
12139	}
12140	// match: (TST x (SRLconst [c] y))
12141	// result: (TSTshiftRL x y [c])
12142	for {
12143		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
12144			x := v_0
12145			if v_1.Op != OpARMSRLconst {
12146				continue
12147			}
12148			c := auxIntToInt32(v_1.AuxInt)
12149			y := v_1.Args[0]
12150			v.reset(OpARMTSTshiftRL)
12151			v.AuxInt = int32ToAuxInt(c)
12152			v.AddArg2(x, y)
12153			return true
12154		}
12155		break
12156	}
12157	// match: (TST x (SRAconst [c] y))
12158	// result: (TSTshiftRA x y [c])
12159	for {
12160		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
12161			x := v_0
12162			if v_1.Op != OpARMSRAconst {
12163				continue
12164			}
12165			c := auxIntToInt32(v_1.AuxInt)
12166			y := v_1.Args[0]
12167			v.reset(OpARMTSTshiftRA)
12168			v.AuxInt = int32ToAuxInt(c)
12169			v.AddArg2(x, y)
12170			return true
12171		}
12172		break
12173	}
12174	// match: (TST x (SLL y z))
12175	// result: (TSTshiftLLreg x y z)
12176	for {
12177		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
12178			x := v_0
12179			if v_1.Op != OpARMSLL {
12180				continue
12181			}
12182			z := v_1.Args[1]
12183			y := v_1.Args[0]
12184			v.reset(OpARMTSTshiftLLreg)
12185			v.AddArg3(x, y, z)
12186			return true
12187		}
12188		break
12189	}
12190	// match: (TST x (SRL y z))
12191	// result: (TSTshiftRLreg x y z)
12192	for {
12193		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
12194			x := v_0
12195			if v_1.Op != OpARMSRL {
12196				continue
12197			}
12198			z := v_1.Args[1]
12199			y := v_1.Args[0]
12200			v.reset(OpARMTSTshiftRLreg)
12201			v.AddArg3(x, y, z)
12202			return true
12203		}
12204		break
12205	}
12206	// match: (TST x (SRA y z))
12207	// result: (TSTshiftRAreg x y z)
12208	for {
12209		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
12210			x := v_0
12211			if v_1.Op != OpARMSRA {
12212				continue
12213			}
12214			z := v_1.Args[1]
12215			y := v_1.Args[0]
12216			v.reset(OpARMTSTshiftRAreg)
12217			v.AddArg3(x, y, z)
12218			return true
12219		}
12220		break
12221	}
12222	return false
12223}
12224func rewriteValueARM_OpARMTSTconst(v *Value) bool {
12225	v_0 := v.Args[0]
12226	// match: (TSTconst (MOVWconst [x]) [y])
12227	// result: (FlagConstant [logicFlags32(x&y)])
12228	for {
12229		y := auxIntToInt32(v.AuxInt)
12230		if v_0.Op != OpARMMOVWconst {
12231			break
12232		}
12233		x := auxIntToInt32(v_0.AuxInt)
12234		v.reset(OpARMFlagConstant)
12235		v.AuxInt = flagConstantToAuxInt(logicFlags32(x & y))
12236		return true
12237	}
12238	return false
12239}
12240func rewriteValueARM_OpARMTSTshiftLL(v *Value) bool {
12241	v_1 := v.Args[1]
12242	v_0 := v.Args[0]
12243	b := v.Block
12244	// match: (TSTshiftLL (MOVWconst [c]) x [d])
12245	// result: (TSTconst [c] (SLLconst <x.Type> x [d]))
12246	for {
12247		d := auxIntToInt32(v.AuxInt)
12248		if v_0.Op != OpARMMOVWconst {
12249			break
12250		}
12251		c := auxIntToInt32(v_0.AuxInt)
12252		x := v_1
12253		v.reset(OpARMTSTconst)
12254		v.AuxInt = int32ToAuxInt(c)
12255		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
12256		v0.AuxInt = int32ToAuxInt(d)
12257		v0.AddArg(x)
12258		v.AddArg(v0)
12259		return true
12260	}
12261	// match: (TSTshiftLL x (MOVWconst [c]) [d])
12262	// result: (TSTconst x [c<<uint64(d)])
12263	for {
12264		d := auxIntToInt32(v.AuxInt)
12265		x := v_0
12266		if v_1.Op != OpARMMOVWconst {
12267			break
12268		}
12269		c := auxIntToInt32(v_1.AuxInt)
12270		v.reset(OpARMTSTconst)
12271		v.AuxInt = int32ToAuxInt(c << uint64(d))
12272		v.AddArg(x)
12273		return true
12274	}
12275	return false
12276}
12277func rewriteValueARM_OpARMTSTshiftLLreg(v *Value) bool {
12278	v_2 := v.Args[2]
12279	v_1 := v.Args[1]
12280	v_0 := v.Args[0]
12281	b := v.Block
12282	// match: (TSTshiftLLreg (MOVWconst [c]) x y)
12283	// result: (TSTconst [c] (SLL <x.Type> x y))
12284	for {
12285		if v_0.Op != OpARMMOVWconst {
12286			break
12287		}
12288		c := auxIntToInt32(v_0.AuxInt)
12289		x := v_1
12290		y := v_2
12291		v.reset(OpARMTSTconst)
12292		v.AuxInt = int32ToAuxInt(c)
12293		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
12294		v0.AddArg2(x, y)
12295		v.AddArg(v0)
12296		return true
12297	}
12298	// match: (TSTshiftLLreg x y (MOVWconst [c]))
12299	// cond: 0 <= c && c < 32
12300	// result: (TSTshiftLL x y [c])
12301	for {
12302		x := v_0
12303		y := v_1
12304		if v_2.Op != OpARMMOVWconst {
12305			break
12306		}
12307		c := auxIntToInt32(v_2.AuxInt)
12308		if !(0 <= c && c < 32) {
12309			break
12310		}
12311		v.reset(OpARMTSTshiftLL)
12312		v.AuxInt = int32ToAuxInt(c)
12313		v.AddArg2(x, y)
12314		return true
12315	}
12316	return false
12317}
12318func rewriteValueARM_OpARMTSTshiftRA(v *Value) bool {
12319	v_1 := v.Args[1]
12320	v_0 := v.Args[0]
12321	b := v.Block
12322	// match: (TSTshiftRA (MOVWconst [c]) x [d])
12323	// result: (TSTconst [c] (SRAconst <x.Type> x [d]))
12324	for {
12325		d := auxIntToInt32(v.AuxInt)
12326		if v_0.Op != OpARMMOVWconst {
12327			break
12328		}
12329		c := auxIntToInt32(v_0.AuxInt)
12330		x := v_1
12331		v.reset(OpARMTSTconst)
12332		v.AuxInt = int32ToAuxInt(c)
12333		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
12334		v0.AuxInt = int32ToAuxInt(d)
12335		v0.AddArg(x)
12336		v.AddArg(v0)
12337		return true
12338	}
12339	// match: (TSTshiftRA x (MOVWconst [c]) [d])
12340	// result: (TSTconst x [c>>uint64(d)])
12341	for {
12342		d := auxIntToInt32(v.AuxInt)
12343		x := v_0
12344		if v_1.Op != OpARMMOVWconst {
12345			break
12346		}
12347		c := auxIntToInt32(v_1.AuxInt)
12348		v.reset(OpARMTSTconst)
12349		v.AuxInt = int32ToAuxInt(c >> uint64(d))
12350		v.AddArg(x)
12351		return true
12352	}
12353	return false
12354}
12355func rewriteValueARM_OpARMTSTshiftRAreg(v *Value) bool {
12356	v_2 := v.Args[2]
12357	v_1 := v.Args[1]
12358	v_0 := v.Args[0]
12359	b := v.Block
12360	// match: (TSTshiftRAreg (MOVWconst [c]) x y)
12361	// result: (TSTconst [c] (SRA <x.Type> x y))
12362	for {
12363		if v_0.Op != OpARMMOVWconst {
12364			break
12365		}
12366		c := auxIntToInt32(v_0.AuxInt)
12367		x := v_1
12368		y := v_2
12369		v.reset(OpARMTSTconst)
12370		v.AuxInt = int32ToAuxInt(c)
12371		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
12372		v0.AddArg2(x, y)
12373		v.AddArg(v0)
12374		return true
12375	}
12376	// match: (TSTshiftRAreg x y (MOVWconst [c]))
12377	// cond: 0 <= c && c < 32
12378	// result: (TSTshiftRA x y [c])
12379	for {
12380		x := v_0
12381		y := v_1
12382		if v_2.Op != OpARMMOVWconst {
12383			break
12384		}
12385		c := auxIntToInt32(v_2.AuxInt)
12386		if !(0 <= c && c < 32) {
12387			break
12388		}
12389		v.reset(OpARMTSTshiftRA)
12390		v.AuxInt = int32ToAuxInt(c)
12391		v.AddArg2(x, y)
12392		return true
12393	}
12394	return false
12395}
12396func rewriteValueARM_OpARMTSTshiftRL(v *Value) bool {
12397	v_1 := v.Args[1]
12398	v_0 := v.Args[0]
12399	b := v.Block
12400	// match: (TSTshiftRL (MOVWconst [c]) x [d])
12401	// result: (TSTconst [c] (SRLconst <x.Type> x [d]))
12402	for {
12403		d := auxIntToInt32(v.AuxInt)
12404		if v_0.Op != OpARMMOVWconst {
12405			break
12406		}
12407		c := auxIntToInt32(v_0.AuxInt)
12408		x := v_1
12409		v.reset(OpARMTSTconst)
12410		v.AuxInt = int32ToAuxInt(c)
12411		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
12412		v0.AuxInt = int32ToAuxInt(d)
12413		v0.AddArg(x)
12414		v.AddArg(v0)
12415		return true
12416	}
12417	// match: (TSTshiftRL x (MOVWconst [c]) [d])
12418	// result: (TSTconst x [int32(uint32(c)>>uint64(d))])
12419	for {
12420		d := auxIntToInt32(v.AuxInt)
12421		x := v_0
12422		if v_1.Op != OpARMMOVWconst {
12423			break
12424		}
12425		c := auxIntToInt32(v_1.AuxInt)
12426		v.reset(OpARMTSTconst)
12427		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
12428		v.AddArg(x)
12429		return true
12430	}
12431	return false
12432}
12433func rewriteValueARM_OpARMTSTshiftRLreg(v *Value) bool {
12434	v_2 := v.Args[2]
12435	v_1 := v.Args[1]
12436	v_0 := v.Args[0]
12437	b := v.Block
12438	// match: (TSTshiftRLreg (MOVWconst [c]) x y)
12439	// result: (TSTconst [c] (SRL <x.Type> x y))
12440	for {
12441		if v_0.Op != OpARMMOVWconst {
12442			break
12443		}
12444		c := auxIntToInt32(v_0.AuxInt)
12445		x := v_1
12446		y := v_2
12447		v.reset(OpARMTSTconst)
12448		v.AuxInt = int32ToAuxInt(c)
12449		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
12450		v0.AddArg2(x, y)
12451		v.AddArg(v0)
12452		return true
12453	}
12454	// match: (TSTshiftRLreg x y (MOVWconst [c]))
12455	// cond: 0 <= c && c < 32
12456	// result: (TSTshiftRL x y [c])
12457	for {
12458		x := v_0
12459		y := v_1
12460		if v_2.Op != OpARMMOVWconst {
12461			break
12462		}
12463		c := auxIntToInt32(v_2.AuxInt)
12464		if !(0 <= c && c < 32) {
12465			break
12466		}
12467		v.reset(OpARMTSTshiftRL)
12468		v.AuxInt = int32ToAuxInt(c)
12469		v.AddArg2(x, y)
12470		return true
12471	}
12472	return false
12473}
12474func rewriteValueARM_OpARMXOR(v *Value) bool {
12475	v_1 := v.Args[1]
12476	v_0 := v.Args[0]
12477	// match: (XOR x (MOVWconst [c]))
12478	// result: (XORconst [c] x)
12479	for {
12480		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
12481			x := v_0
12482			if v_1.Op != OpARMMOVWconst {
12483				continue
12484			}
12485			c := auxIntToInt32(v_1.AuxInt)
12486			v.reset(OpARMXORconst)
12487			v.AuxInt = int32ToAuxInt(c)
12488			v.AddArg(x)
12489			return true
12490		}
12491		break
12492	}
12493	// match: (XOR x (SLLconst [c] y))
12494	// result: (XORshiftLL x y [c])
12495	for {
12496		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
12497			x := v_0
12498			if v_1.Op != OpARMSLLconst {
12499				continue
12500			}
12501			c := auxIntToInt32(v_1.AuxInt)
12502			y := v_1.Args[0]
12503			v.reset(OpARMXORshiftLL)
12504			v.AuxInt = int32ToAuxInt(c)
12505			v.AddArg2(x, y)
12506			return true
12507		}
12508		break
12509	}
12510	// match: (XOR x (SRLconst [c] y))
12511	// result: (XORshiftRL x y [c])
12512	for {
12513		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
12514			x := v_0
12515			if v_1.Op != OpARMSRLconst {
12516				continue
12517			}
12518			c := auxIntToInt32(v_1.AuxInt)
12519			y := v_1.Args[0]
12520			v.reset(OpARMXORshiftRL)
12521			v.AuxInt = int32ToAuxInt(c)
12522			v.AddArg2(x, y)
12523			return true
12524		}
12525		break
12526	}
12527	// match: (XOR x (SRAconst [c] y))
12528	// result: (XORshiftRA x y [c])
12529	for {
12530		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
12531			x := v_0
12532			if v_1.Op != OpARMSRAconst {
12533				continue
12534			}
12535			c := auxIntToInt32(v_1.AuxInt)
12536			y := v_1.Args[0]
12537			v.reset(OpARMXORshiftRA)
12538			v.AuxInt = int32ToAuxInt(c)
12539			v.AddArg2(x, y)
12540			return true
12541		}
12542		break
12543	}
12544	// match: (XOR x (SRRconst [c] y))
12545	// result: (XORshiftRR x y [c])
12546	for {
12547		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
12548			x := v_0
12549			if v_1.Op != OpARMSRRconst {
12550				continue
12551			}
12552			c := auxIntToInt32(v_1.AuxInt)
12553			y := v_1.Args[0]
12554			v.reset(OpARMXORshiftRR)
12555			v.AuxInt = int32ToAuxInt(c)
12556			v.AddArg2(x, y)
12557			return true
12558		}
12559		break
12560	}
12561	// match: (XOR x (SLL y z))
12562	// result: (XORshiftLLreg x y z)
12563	for {
12564		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
12565			x := v_0
12566			if v_1.Op != OpARMSLL {
12567				continue
12568			}
12569			z := v_1.Args[1]
12570			y := v_1.Args[0]
12571			v.reset(OpARMXORshiftLLreg)
12572			v.AddArg3(x, y, z)
12573			return true
12574		}
12575		break
12576	}
12577	// match: (XOR x (SRL y z))
12578	// result: (XORshiftRLreg x y z)
12579	for {
12580		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
12581			x := v_0
12582			if v_1.Op != OpARMSRL {
12583				continue
12584			}
12585			z := v_1.Args[1]
12586			y := v_1.Args[0]
12587			v.reset(OpARMXORshiftRLreg)
12588			v.AddArg3(x, y, z)
12589			return true
12590		}
12591		break
12592	}
12593	// match: (XOR x (SRA y z))
12594	// result: (XORshiftRAreg x y z)
12595	for {
12596		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
12597			x := v_0
12598			if v_1.Op != OpARMSRA {
12599				continue
12600			}
12601			z := v_1.Args[1]
12602			y := v_1.Args[0]
12603			v.reset(OpARMXORshiftRAreg)
12604			v.AddArg3(x, y, z)
12605			return true
12606		}
12607		break
12608	}
12609	// match: (XOR x x)
12610	// result: (MOVWconst [0])
12611	for {
12612		x := v_0
12613		if x != v_1 {
12614			break
12615		}
12616		v.reset(OpARMMOVWconst)
12617		v.AuxInt = int32ToAuxInt(0)
12618		return true
12619	}
12620	return false
12621}
12622func rewriteValueARM_OpARMXORconst(v *Value) bool {
12623	v_0 := v.Args[0]
12624	// match: (XORconst [0] x)
12625	// result: x
12626	for {
12627		if auxIntToInt32(v.AuxInt) != 0 {
12628			break
12629		}
12630		x := v_0
12631		v.copyOf(x)
12632		return true
12633	}
12634	// match: (XORconst [c] (MOVWconst [d]))
12635	// result: (MOVWconst [c^d])
12636	for {
12637		c := auxIntToInt32(v.AuxInt)
12638		if v_0.Op != OpARMMOVWconst {
12639			break
12640		}
12641		d := auxIntToInt32(v_0.AuxInt)
12642		v.reset(OpARMMOVWconst)
12643		v.AuxInt = int32ToAuxInt(c ^ d)
12644		return true
12645	}
12646	// match: (XORconst [c] (XORconst [d] x))
12647	// result: (XORconst [c^d] x)
12648	for {
12649		c := auxIntToInt32(v.AuxInt)
12650		if v_0.Op != OpARMXORconst {
12651			break
12652		}
12653		d := auxIntToInt32(v_0.AuxInt)
12654		x := v_0.Args[0]
12655		v.reset(OpARMXORconst)
12656		v.AuxInt = int32ToAuxInt(c ^ d)
12657		v.AddArg(x)
12658		return true
12659	}
12660	return false
12661}
12662func rewriteValueARM_OpARMXORshiftLL(v *Value) bool {
12663	v_1 := v.Args[1]
12664	v_0 := v.Args[0]
12665	b := v.Block
12666	typ := &b.Func.Config.Types
12667	// match: (XORshiftLL (MOVWconst [c]) x [d])
12668	// result: (XORconst [c] (SLLconst <x.Type> x [d]))
12669	for {
12670		d := auxIntToInt32(v.AuxInt)
12671		if v_0.Op != OpARMMOVWconst {
12672			break
12673		}
12674		c := auxIntToInt32(v_0.AuxInt)
12675		x := v_1
12676		v.reset(OpARMXORconst)
12677		v.AuxInt = int32ToAuxInt(c)
12678		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
12679		v0.AuxInt = int32ToAuxInt(d)
12680		v0.AddArg(x)
12681		v.AddArg(v0)
12682		return true
12683	}
12684	// match: (XORshiftLL x (MOVWconst [c]) [d])
12685	// result: (XORconst x [c<<uint64(d)])
12686	for {
12687		d := auxIntToInt32(v.AuxInt)
12688		x := v_0
12689		if v_1.Op != OpARMMOVWconst {
12690			break
12691		}
12692		c := auxIntToInt32(v_1.AuxInt)
12693		v.reset(OpARMXORconst)
12694		v.AuxInt = int32ToAuxInt(c << uint64(d))
12695		v.AddArg(x)
12696		return true
12697	}
12698	// match: (XORshiftLL <typ.UInt16> [8] (BFXU <typ.UInt16> [int32(armBFAuxInt(8, 8))] x) x)
12699	// result: (REV16 x)
12700	for {
12701		if v.Type != typ.UInt16 || auxIntToInt32(v.AuxInt) != 8 || v_0.Op != OpARMBFXU || v_0.Type != typ.UInt16 || auxIntToInt32(v_0.AuxInt) != int32(armBFAuxInt(8, 8)) {
12702			break
12703		}
12704		x := v_0.Args[0]
12705		if x != v_1 {
12706			break
12707		}
12708		v.reset(OpARMREV16)
12709		v.AddArg(x)
12710		return true
12711	}
12712	// match: (XORshiftLL <typ.UInt16> [8] (SRLconst <typ.UInt16> [24] (SLLconst [16] x)) x)
12713	// cond: buildcfg.GOARM.Version>=6
12714	// result: (REV16 x)
12715	for {
12716		if v.Type != typ.UInt16 || auxIntToInt32(v.AuxInt) != 8 || v_0.Op != OpARMSRLconst || v_0.Type != typ.UInt16 || auxIntToInt32(v_0.AuxInt) != 24 {
12717			break
12718		}
12719		v_0_0 := v_0.Args[0]
12720		if v_0_0.Op != OpARMSLLconst || auxIntToInt32(v_0_0.AuxInt) != 16 {
12721			break
12722		}
12723		x := v_0_0.Args[0]
12724		if x != v_1 || !(buildcfg.GOARM.Version >= 6) {
12725			break
12726		}
12727		v.reset(OpARMREV16)
12728		v.AddArg(x)
12729		return true
12730	}
12731	// match: (XORshiftLL (SLLconst x [c]) x [c])
12732	// result: (MOVWconst [0])
12733	for {
12734		c := auxIntToInt32(v.AuxInt)
12735		if v_0.Op != OpARMSLLconst || auxIntToInt32(v_0.AuxInt) != c {
12736			break
12737		}
12738		x := v_0.Args[0]
12739		if x != v_1 {
12740			break
12741		}
12742		v.reset(OpARMMOVWconst)
12743		v.AuxInt = int32ToAuxInt(0)
12744		return true
12745	}
12746	return false
12747}
12748func rewriteValueARM_OpARMXORshiftLLreg(v *Value) bool {
12749	v_2 := v.Args[2]
12750	v_1 := v.Args[1]
12751	v_0 := v.Args[0]
12752	b := v.Block
12753	// match: (XORshiftLLreg (MOVWconst [c]) x y)
12754	// result: (XORconst [c] (SLL <x.Type> x y))
12755	for {
12756		if v_0.Op != OpARMMOVWconst {
12757			break
12758		}
12759		c := auxIntToInt32(v_0.AuxInt)
12760		x := v_1
12761		y := v_2
12762		v.reset(OpARMXORconst)
12763		v.AuxInt = int32ToAuxInt(c)
12764		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
12765		v0.AddArg2(x, y)
12766		v.AddArg(v0)
12767		return true
12768	}
12769	// match: (XORshiftLLreg x y (MOVWconst [c]))
12770	// cond: 0 <= c && c < 32
12771	// result: (XORshiftLL x y [c])
12772	for {
12773		x := v_0
12774		y := v_1
12775		if v_2.Op != OpARMMOVWconst {
12776			break
12777		}
12778		c := auxIntToInt32(v_2.AuxInt)
12779		if !(0 <= c && c < 32) {
12780			break
12781		}
12782		v.reset(OpARMXORshiftLL)
12783		v.AuxInt = int32ToAuxInt(c)
12784		v.AddArg2(x, y)
12785		return true
12786	}
12787	return false
12788}
12789func rewriteValueARM_OpARMXORshiftRA(v *Value) bool {
12790	v_1 := v.Args[1]
12791	v_0 := v.Args[0]
12792	b := v.Block
12793	// match: (XORshiftRA (MOVWconst [c]) x [d])
12794	// result: (XORconst [c] (SRAconst <x.Type> x [d]))
12795	for {
12796		d := auxIntToInt32(v.AuxInt)
12797		if v_0.Op != OpARMMOVWconst {
12798			break
12799		}
12800		c := auxIntToInt32(v_0.AuxInt)
12801		x := v_1
12802		v.reset(OpARMXORconst)
12803		v.AuxInt = int32ToAuxInt(c)
12804		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
12805		v0.AuxInt = int32ToAuxInt(d)
12806		v0.AddArg(x)
12807		v.AddArg(v0)
12808		return true
12809	}
12810	// match: (XORshiftRA x (MOVWconst [c]) [d])
12811	// result: (XORconst x [c>>uint64(d)])
12812	for {
12813		d := auxIntToInt32(v.AuxInt)
12814		x := v_0
12815		if v_1.Op != OpARMMOVWconst {
12816			break
12817		}
12818		c := auxIntToInt32(v_1.AuxInt)
12819		v.reset(OpARMXORconst)
12820		v.AuxInt = int32ToAuxInt(c >> uint64(d))
12821		v.AddArg(x)
12822		return true
12823	}
12824	// match: (XORshiftRA (SRAconst x [c]) x [c])
12825	// result: (MOVWconst [0])
12826	for {
12827		c := auxIntToInt32(v.AuxInt)
12828		if v_0.Op != OpARMSRAconst || auxIntToInt32(v_0.AuxInt) != c {
12829			break
12830		}
12831		x := v_0.Args[0]
12832		if x != v_1 {
12833			break
12834		}
12835		v.reset(OpARMMOVWconst)
12836		v.AuxInt = int32ToAuxInt(0)
12837		return true
12838	}
12839	return false
12840}
12841func rewriteValueARM_OpARMXORshiftRAreg(v *Value) bool {
12842	v_2 := v.Args[2]
12843	v_1 := v.Args[1]
12844	v_0 := v.Args[0]
12845	b := v.Block
12846	// match: (XORshiftRAreg (MOVWconst [c]) x y)
12847	// result: (XORconst [c] (SRA <x.Type> x y))
12848	for {
12849		if v_0.Op != OpARMMOVWconst {
12850			break
12851		}
12852		c := auxIntToInt32(v_0.AuxInt)
12853		x := v_1
12854		y := v_2
12855		v.reset(OpARMXORconst)
12856		v.AuxInt = int32ToAuxInt(c)
12857		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
12858		v0.AddArg2(x, y)
12859		v.AddArg(v0)
12860		return true
12861	}
12862	// match: (XORshiftRAreg x y (MOVWconst [c]))
12863	// cond: 0 <= c && c < 32
12864	// result: (XORshiftRA x y [c])
12865	for {
12866		x := v_0
12867		y := v_1
12868		if v_2.Op != OpARMMOVWconst {
12869			break
12870		}
12871		c := auxIntToInt32(v_2.AuxInt)
12872		if !(0 <= c && c < 32) {
12873			break
12874		}
12875		v.reset(OpARMXORshiftRA)
12876		v.AuxInt = int32ToAuxInt(c)
12877		v.AddArg2(x, y)
12878		return true
12879	}
12880	return false
12881}
12882func rewriteValueARM_OpARMXORshiftRL(v *Value) bool {
12883	v_1 := v.Args[1]
12884	v_0 := v.Args[0]
12885	b := v.Block
12886	// match: (XORshiftRL (MOVWconst [c]) x [d])
12887	// result: (XORconst [c] (SRLconst <x.Type> x [d]))
12888	for {
12889		d := auxIntToInt32(v.AuxInt)
12890		if v_0.Op != OpARMMOVWconst {
12891			break
12892		}
12893		c := auxIntToInt32(v_0.AuxInt)
12894		x := v_1
12895		v.reset(OpARMXORconst)
12896		v.AuxInt = int32ToAuxInt(c)
12897		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
12898		v0.AuxInt = int32ToAuxInt(d)
12899		v0.AddArg(x)
12900		v.AddArg(v0)
12901		return true
12902	}
12903	// match: (XORshiftRL x (MOVWconst [c]) [d])
12904	// result: (XORconst x [int32(uint32(c)>>uint64(d))])
12905	for {
12906		d := auxIntToInt32(v.AuxInt)
12907		x := v_0
12908		if v_1.Op != OpARMMOVWconst {
12909			break
12910		}
12911		c := auxIntToInt32(v_1.AuxInt)
12912		v.reset(OpARMXORconst)
12913		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))
12914		v.AddArg(x)
12915		return true
12916	}
12917	// match: (XORshiftRL (SRLconst x [c]) x [c])
12918	// result: (MOVWconst [0])
12919	for {
12920		c := auxIntToInt32(v.AuxInt)
12921		if v_0.Op != OpARMSRLconst || auxIntToInt32(v_0.AuxInt) != c {
12922			break
12923		}
12924		x := v_0.Args[0]
12925		if x != v_1 {
12926			break
12927		}
12928		v.reset(OpARMMOVWconst)
12929		v.AuxInt = int32ToAuxInt(0)
12930		return true
12931	}
12932	return false
12933}
12934func rewriteValueARM_OpARMXORshiftRLreg(v *Value) bool {
12935	v_2 := v.Args[2]
12936	v_1 := v.Args[1]
12937	v_0 := v.Args[0]
12938	b := v.Block
12939	// match: (XORshiftRLreg (MOVWconst [c]) x y)
12940	// result: (XORconst [c] (SRL <x.Type> x y))
12941	for {
12942		if v_0.Op != OpARMMOVWconst {
12943			break
12944		}
12945		c := auxIntToInt32(v_0.AuxInt)
12946		x := v_1
12947		y := v_2
12948		v.reset(OpARMXORconst)
12949		v.AuxInt = int32ToAuxInt(c)
12950		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
12951		v0.AddArg2(x, y)
12952		v.AddArg(v0)
12953		return true
12954	}
12955	// match: (XORshiftRLreg x y (MOVWconst [c]))
12956	// cond: 0 <= c && c < 32
12957	// result: (XORshiftRL x y [c])
12958	for {
12959		x := v_0
12960		y := v_1
12961		if v_2.Op != OpARMMOVWconst {
12962			break
12963		}
12964		c := auxIntToInt32(v_2.AuxInt)
12965		if !(0 <= c && c < 32) {
12966			break
12967		}
12968		v.reset(OpARMXORshiftRL)
12969		v.AuxInt = int32ToAuxInt(c)
12970		v.AddArg2(x, y)
12971		return true
12972	}
12973	return false
12974}
12975func rewriteValueARM_OpARMXORshiftRR(v *Value) bool {
12976	v_1 := v.Args[1]
12977	v_0 := v.Args[0]
12978	b := v.Block
12979	// match: (XORshiftRR (MOVWconst [c]) x [d])
12980	// result: (XORconst [c] (SRRconst <x.Type> x [d]))
12981	for {
12982		d := auxIntToInt32(v.AuxInt)
12983		if v_0.Op != OpARMMOVWconst {
12984			break
12985		}
12986		c := auxIntToInt32(v_0.AuxInt)
12987		x := v_1
12988		v.reset(OpARMXORconst)
12989		v.AuxInt = int32ToAuxInt(c)
12990		v0 := b.NewValue0(v.Pos, OpARMSRRconst, x.Type)
12991		v0.AuxInt = int32ToAuxInt(d)
12992		v0.AddArg(x)
12993		v.AddArg(v0)
12994		return true
12995	}
12996	// match: (XORshiftRR x (MOVWconst [c]) [d])
12997	// result: (XORconst x [int32(uint32(c)>>uint64(d)|uint32(c)<<uint64(32-d))])
12998	for {
12999		d := auxIntToInt32(v.AuxInt)
13000		x := v_0
13001		if v_1.Op != OpARMMOVWconst {
13002			break
13003		}
13004		c := auxIntToInt32(v_1.AuxInt)
13005		v.reset(OpARMXORconst)
13006		v.AuxInt = int32ToAuxInt(int32(uint32(c)>>uint64(d) | uint32(c)<<uint64(32-d)))
13007		v.AddArg(x)
13008		return true
13009	}
13010	return false
13011}
13012func rewriteValueARM_OpAddr(v *Value) bool {
13013	v_0 := v.Args[0]
13014	// match: (Addr {sym} base)
13015	// result: (MOVWaddr {sym} base)
13016	for {
13017		sym := auxToSym(v.Aux)
13018		base := v_0
13019		v.reset(OpARMMOVWaddr)
13020		v.Aux = symToAux(sym)
13021		v.AddArg(base)
13022		return true
13023	}
13024}
13025func rewriteValueARM_OpAvg32u(v *Value) bool {
13026	v_1 := v.Args[1]
13027	v_0 := v.Args[0]
13028	b := v.Block
13029	// match: (Avg32u <t> x y)
13030	// result: (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
13031	for {
13032		t := v.Type
13033		x := v_0
13034		y := v_1
13035		v.reset(OpARMADD)
13036		v0 := b.NewValue0(v.Pos, OpARMSRLconst, t)
13037		v0.AuxInt = int32ToAuxInt(1)
13038		v1 := b.NewValue0(v.Pos, OpARMSUB, t)
13039		v1.AddArg2(x, y)
13040		v0.AddArg(v1)
13041		v.AddArg2(v0, y)
13042		return true
13043	}
13044}
13045func rewriteValueARM_OpBitLen32(v *Value) bool {
13046	v_0 := v.Args[0]
13047	b := v.Block
13048	// match: (BitLen32 <t> x)
13049	// result: (RSBconst [32] (CLZ <t> x))
13050	for {
13051		t := v.Type
13052		x := v_0
13053		v.reset(OpARMRSBconst)
13054		v.AuxInt = int32ToAuxInt(32)
13055		v0 := b.NewValue0(v.Pos, OpARMCLZ, t)
13056		v0.AddArg(x)
13057		v.AddArg(v0)
13058		return true
13059	}
13060}
13061func rewriteValueARM_OpBswap32(v *Value) bool {
13062	v_0 := v.Args[0]
13063	b := v.Block
13064	// match: (Bswap32 <t> x)
13065	// cond: buildcfg.GOARM.Version==5
13066	// result: (XOR <t> (SRLconst <t> (BICconst <t> (XOR <t> x (SRRconst <t> [16] x)) [0xff0000]) [8]) (SRRconst <t> x [8]))
13067	for {
13068		t := v.Type
13069		x := v_0
13070		if !(buildcfg.GOARM.Version == 5) {
13071			break
13072		}
13073		v.reset(OpARMXOR)
13074		v.Type = t
13075		v0 := b.NewValue0(v.Pos, OpARMSRLconst, t)
13076		v0.AuxInt = int32ToAuxInt(8)
13077		v1 := b.NewValue0(v.Pos, OpARMBICconst, t)
13078		v1.AuxInt = int32ToAuxInt(0xff0000)
13079		v2 := b.NewValue0(v.Pos, OpARMXOR, t)
13080		v3 := b.NewValue0(v.Pos, OpARMSRRconst, t)
13081		v3.AuxInt = int32ToAuxInt(16)
13082		v3.AddArg(x)
13083		v2.AddArg2(x, v3)
13084		v1.AddArg(v2)
13085		v0.AddArg(v1)
13086		v4 := b.NewValue0(v.Pos, OpARMSRRconst, t)
13087		v4.AuxInt = int32ToAuxInt(8)
13088		v4.AddArg(x)
13089		v.AddArg2(v0, v4)
13090		return true
13091	}
13092	// match: (Bswap32 x)
13093	// cond: buildcfg.GOARM.Version>=6
13094	// result: (REV x)
13095	for {
13096		x := v_0
13097		if !(buildcfg.GOARM.Version >= 6) {
13098			break
13099		}
13100		v.reset(OpARMREV)
13101		v.AddArg(x)
13102		return true
13103	}
13104	return false
13105}
13106func rewriteValueARM_OpConst16(v *Value) bool {
13107	// match: (Const16 [val])
13108	// result: (MOVWconst [int32(val)])
13109	for {
13110		val := auxIntToInt16(v.AuxInt)
13111		v.reset(OpARMMOVWconst)
13112		v.AuxInt = int32ToAuxInt(int32(val))
13113		return true
13114	}
13115}
13116func rewriteValueARM_OpConst32(v *Value) bool {
13117	// match: (Const32 [val])
13118	// result: (MOVWconst [int32(val)])
13119	for {
13120		val := auxIntToInt32(v.AuxInt)
13121		v.reset(OpARMMOVWconst)
13122		v.AuxInt = int32ToAuxInt(int32(val))
13123		return true
13124	}
13125}
13126func rewriteValueARM_OpConst32F(v *Value) bool {
13127	// match: (Const32F [val])
13128	// result: (MOVFconst [float64(val)])
13129	for {
13130		val := auxIntToFloat32(v.AuxInt)
13131		v.reset(OpARMMOVFconst)
13132		v.AuxInt = float64ToAuxInt(float64(val))
13133		return true
13134	}
13135}
13136func rewriteValueARM_OpConst64F(v *Value) bool {
13137	// match: (Const64F [val])
13138	// result: (MOVDconst [float64(val)])
13139	for {
13140		val := auxIntToFloat64(v.AuxInt)
13141		v.reset(OpARMMOVDconst)
13142		v.AuxInt = float64ToAuxInt(float64(val))
13143		return true
13144	}
13145}
13146func rewriteValueARM_OpConst8(v *Value) bool {
13147	// match: (Const8 [val])
13148	// result: (MOVWconst [int32(val)])
13149	for {
13150		val := auxIntToInt8(v.AuxInt)
13151		v.reset(OpARMMOVWconst)
13152		v.AuxInt = int32ToAuxInt(int32(val))
13153		return true
13154	}
13155}
13156func rewriteValueARM_OpConstBool(v *Value) bool {
13157	// match: (ConstBool [t])
13158	// result: (MOVWconst [b2i32(t)])
13159	for {
13160		t := auxIntToBool(v.AuxInt)
13161		v.reset(OpARMMOVWconst)
13162		v.AuxInt = int32ToAuxInt(b2i32(t))
13163		return true
13164	}
13165}
13166func rewriteValueARM_OpConstNil(v *Value) bool {
13167	// match: (ConstNil)
13168	// result: (MOVWconst [0])
13169	for {
13170		v.reset(OpARMMOVWconst)
13171		v.AuxInt = int32ToAuxInt(0)
13172		return true
13173	}
13174}
13175func rewriteValueARM_OpCtz16(v *Value) bool {
13176	v_0 := v.Args[0]
13177	b := v.Block
13178	typ := &b.Func.Config.Types
13179	// match: (Ctz16 <t> x)
13180	// cond: buildcfg.GOARM.Version<=6
13181	// result: (RSBconst [32] (CLZ <t> (SUBconst <typ.UInt32> (AND <typ.UInt32> (ORconst <typ.UInt32> [0x10000] x) (RSBconst <typ.UInt32> [0] (ORconst <typ.UInt32> [0x10000] x))) [1])))
13182	for {
13183		t := v.Type
13184		x := v_0
13185		if !(buildcfg.GOARM.Version <= 6) {
13186			break
13187		}
13188		v.reset(OpARMRSBconst)
13189		v.AuxInt = int32ToAuxInt(32)
13190		v0 := b.NewValue0(v.Pos, OpARMCLZ, t)
13191		v1 := b.NewValue0(v.Pos, OpARMSUBconst, typ.UInt32)
13192		v1.AuxInt = int32ToAuxInt(1)
13193		v2 := b.NewValue0(v.Pos, OpARMAND, typ.UInt32)
13194		v3 := b.NewValue0(v.Pos, OpARMORconst, typ.UInt32)
13195		v3.AuxInt = int32ToAuxInt(0x10000)
13196		v3.AddArg(x)
13197		v4 := b.NewValue0(v.Pos, OpARMRSBconst, typ.UInt32)
13198		v4.AuxInt = int32ToAuxInt(0)
13199		v4.AddArg(v3)
13200		v2.AddArg2(v3, v4)
13201		v1.AddArg(v2)
13202		v0.AddArg(v1)
13203		v.AddArg(v0)
13204		return true
13205	}
13206	// match: (Ctz16 <t> x)
13207	// cond: buildcfg.GOARM.Version==7
13208	// result: (CLZ <t> (RBIT <typ.UInt32> (ORconst <typ.UInt32> [0x10000] x)))
13209	for {
13210		t := v.Type
13211		x := v_0
13212		if !(buildcfg.GOARM.Version == 7) {
13213			break
13214		}
13215		v.reset(OpARMCLZ)
13216		v.Type = t
13217		v0 := b.NewValue0(v.Pos, OpARMRBIT, typ.UInt32)
13218		v1 := b.NewValue0(v.Pos, OpARMORconst, typ.UInt32)
13219		v1.AuxInt = int32ToAuxInt(0x10000)
13220		v1.AddArg(x)
13221		v0.AddArg(v1)
13222		v.AddArg(v0)
13223		return true
13224	}
13225	return false
13226}
13227func rewriteValueARM_OpCtz32(v *Value) bool {
13228	v_0 := v.Args[0]
13229	b := v.Block
13230	// match: (Ctz32 <t> x)
13231	// cond: buildcfg.GOARM.Version<=6
13232	// result: (RSBconst [32] (CLZ <t> (SUBconst <t> (AND <t> x (RSBconst <t> [0] x)) [1])))
13233	for {
13234		t := v.Type
13235		x := v_0
13236		if !(buildcfg.GOARM.Version <= 6) {
13237			break
13238		}
13239		v.reset(OpARMRSBconst)
13240		v.AuxInt = int32ToAuxInt(32)
13241		v0 := b.NewValue0(v.Pos, OpARMCLZ, t)
13242		v1 := b.NewValue0(v.Pos, OpARMSUBconst, t)
13243		v1.AuxInt = int32ToAuxInt(1)
13244		v2 := b.NewValue0(v.Pos, OpARMAND, t)
13245		v3 := b.NewValue0(v.Pos, OpARMRSBconst, t)
13246		v3.AuxInt = int32ToAuxInt(0)
13247		v3.AddArg(x)
13248		v2.AddArg2(x, v3)
13249		v1.AddArg(v2)
13250		v0.AddArg(v1)
13251		v.AddArg(v0)
13252		return true
13253	}
13254	// match: (Ctz32 <t> x)
13255	// cond: buildcfg.GOARM.Version==7
13256	// result: (CLZ <t> (RBIT <t> x))
13257	for {
13258		t := v.Type
13259		x := v_0
13260		if !(buildcfg.GOARM.Version == 7) {
13261			break
13262		}
13263		v.reset(OpARMCLZ)
13264		v.Type = t
13265		v0 := b.NewValue0(v.Pos, OpARMRBIT, t)
13266		v0.AddArg(x)
13267		v.AddArg(v0)
13268		return true
13269	}
13270	return false
13271}
13272func rewriteValueARM_OpCtz8(v *Value) bool {
13273	v_0 := v.Args[0]
13274	b := v.Block
13275	typ := &b.Func.Config.Types
13276	// match: (Ctz8 <t> x)
13277	// cond: buildcfg.GOARM.Version<=6
13278	// result: (RSBconst [32] (CLZ <t> (SUBconst <typ.UInt32> (AND <typ.UInt32> (ORconst <typ.UInt32> [0x100] x) (RSBconst <typ.UInt32> [0] (ORconst <typ.UInt32> [0x100] x))) [1])))
13279	for {
13280		t := v.Type
13281		x := v_0
13282		if !(buildcfg.GOARM.Version <= 6) {
13283			break
13284		}
13285		v.reset(OpARMRSBconst)
13286		v.AuxInt = int32ToAuxInt(32)
13287		v0 := b.NewValue0(v.Pos, OpARMCLZ, t)
13288		v1 := b.NewValue0(v.Pos, OpARMSUBconst, typ.UInt32)
13289		v1.AuxInt = int32ToAuxInt(1)
13290		v2 := b.NewValue0(v.Pos, OpARMAND, typ.UInt32)
13291		v3 := b.NewValue0(v.Pos, OpARMORconst, typ.UInt32)
13292		v3.AuxInt = int32ToAuxInt(0x100)
13293		v3.AddArg(x)
13294		v4 := b.NewValue0(v.Pos, OpARMRSBconst, typ.UInt32)
13295		v4.AuxInt = int32ToAuxInt(0)
13296		v4.AddArg(v3)
13297		v2.AddArg2(v3, v4)
13298		v1.AddArg(v2)
13299		v0.AddArg(v1)
13300		v.AddArg(v0)
13301		return true
13302	}
13303	// match: (Ctz8 <t> x)
13304	// cond: buildcfg.GOARM.Version==7
13305	// result: (CLZ <t> (RBIT <typ.UInt32> (ORconst <typ.UInt32> [0x100] x)))
13306	for {
13307		t := v.Type
13308		x := v_0
13309		if !(buildcfg.GOARM.Version == 7) {
13310			break
13311		}
13312		v.reset(OpARMCLZ)
13313		v.Type = t
13314		v0 := b.NewValue0(v.Pos, OpARMRBIT, typ.UInt32)
13315		v1 := b.NewValue0(v.Pos, OpARMORconst, typ.UInt32)
13316		v1.AuxInt = int32ToAuxInt(0x100)
13317		v1.AddArg(x)
13318		v0.AddArg(v1)
13319		v.AddArg(v0)
13320		return true
13321	}
13322	return false
13323}
13324func rewriteValueARM_OpDiv16(v *Value) bool {
13325	v_1 := v.Args[1]
13326	v_0 := v.Args[0]
13327	b := v.Block
13328	typ := &b.Func.Config.Types
13329	// match: (Div16 x y)
13330	// result: (Div32 (SignExt16to32 x) (SignExt16to32 y))
13331	for {
13332		x := v_0
13333		y := v_1
13334		v.reset(OpDiv32)
13335		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
13336		v0.AddArg(x)
13337		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
13338		v1.AddArg(y)
13339		v.AddArg2(v0, v1)
13340		return true
13341	}
13342}
13343func rewriteValueARM_OpDiv16u(v *Value) bool {
13344	v_1 := v.Args[1]
13345	v_0 := v.Args[0]
13346	b := v.Block
13347	typ := &b.Func.Config.Types
13348	// match: (Div16u x y)
13349	// result: (Div32u (ZeroExt16to32 x) (ZeroExt16to32 y))
13350	for {
13351		x := v_0
13352		y := v_1
13353		v.reset(OpDiv32u)
13354		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
13355		v0.AddArg(x)
13356		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
13357		v1.AddArg(y)
13358		v.AddArg2(v0, v1)
13359		return true
13360	}
13361}
13362func rewriteValueARM_OpDiv32(v *Value) bool {
13363	v_1 := v.Args[1]
13364	v_0 := v.Args[0]
13365	b := v.Block
13366	typ := &b.Func.Config.Types
13367	// match: (Div32 x y)
13368	// result: (SUB (XOR <typ.UInt32> (Select0 <typ.UInt32> (CALLudiv (SUB <typ.UInt32> (XOR x <typ.UInt32> (Signmask x)) (Signmask x)) (SUB <typ.UInt32> (XOR y <typ.UInt32> (Signmask y)) (Signmask y)))) (Signmask (XOR <typ.UInt32> x y))) (Signmask (XOR <typ.UInt32> x y)))
13369	for {
13370		x := v_0
13371		y := v_1
13372		v.reset(OpARMSUB)
13373		v0 := b.NewValue0(v.Pos, OpARMXOR, typ.UInt32)
13374		v1 := b.NewValue0(v.Pos, OpSelect0, typ.UInt32)
13375		v2 := b.NewValue0(v.Pos, OpARMCALLudiv, types.NewTuple(typ.UInt32, typ.UInt32))
13376		v3 := b.NewValue0(v.Pos, OpARMSUB, typ.UInt32)
13377		v4 := b.NewValue0(v.Pos, OpARMXOR, typ.UInt32)
13378		v5 := b.NewValue0(v.Pos, OpSignmask, typ.Int32)
13379		v5.AddArg(x)
13380		v4.AddArg2(x, v5)
13381		v3.AddArg2(v4, v5)
13382		v6 := b.NewValue0(v.Pos, OpARMSUB, typ.UInt32)
13383		v7 := b.NewValue0(v.Pos, OpARMXOR, typ.UInt32)
13384		v8 := b.NewValue0(v.Pos, OpSignmask, typ.Int32)
13385		v8.AddArg(y)
13386		v7.AddArg2(y, v8)
13387		v6.AddArg2(v7, v8)
13388		v2.AddArg2(v3, v6)
13389		v1.AddArg(v2)
13390		v9 := b.NewValue0(v.Pos, OpSignmask, typ.Int32)
13391		v10 := b.NewValue0(v.Pos, OpARMXOR, typ.UInt32)
13392		v10.AddArg2(x, y)
13393		v9.AddArg(v10)
13394		v0.AddArg2(v1, v9)
13395		v.AddArg2(v0, v9)
13396		return true
13397	}
13398}
13399func rewriteValueARM_OpDiv32u(v *Value) bool {
13400	v_1 := v.Args[1]
13401	v_0 := v.Args[0]
13402	b := v.Block
13403	typ := &b.Func.Config.Types
13404	// match: (Div32u x y)
13405	// result: (Select0 <typ.UInt32> (CALLudiv x y))
13406	for {
13407		x := v_0
13408		y := v_1
13409		v.reset(OpSelect0)
13410		v.Type = typ.UInt32
13411		v0 := b.NewValue0(v.Pos, OpARMCALLudiv, types.NewTuple(typ.UInt32, typ.UInt32))
13412		v0.AddArg2(x, y)
13413		v.AddArg(v0)
13414		return true
13415	}
13416}
13417func rewriteValueARM_OpDiv8(v *Value) bool {
13418	v_1 := v.Args[1]
13419	v_0 := v.Args[0]
13420	b := v.Block
13421	typ := &b.Func.Config.Types
13422	// match: (Div8 x y)
13423	// result: (Div32 (SignExt8to32 x) (SignExt8to32 y))
13424	for {
13425		x := v_0
13426		y := v_1
13427		v.reset(OpDiv32)
13428		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
13429		v0.AddArg(x)
13430		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
13431		v1.AddArg(y)
13432		v.AddArg2(v0, v1)
13433		return true
13434	}
13435}
13436func rewriteValueARM_OpDiv8u(v *Value) bool {
13437	v_1 := v.Args[1]
13438	v_0 := v.Args[0]
13439	b := v.Block
13440	typ := &b.Func.Config.Types
13441	// match: (Div8u x y)
13442	// result: (Div32u (ZeroExt8to32 x) (ZeroExt8to32 y))
13443	for {
13444		x := v_0
13445		y := v_1
13446		v.reset(OpDiv32u)
13447		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
13448		v0.AddArg(x)
13449		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
13450		v1.AddArg(y)
13451		v.AddArg2(v0, v1)
13452		return true
13453	}
13454}
13455func rewriteValueARM_OpEq16(v *Value) bool {
13456	v_1 := v.Args[1]
13457	v_0 := v.Args[0]
13458	b := v.Block
13459	typ := &b.Func.Config.Types
13460	// match: (Eq16 x y)
13461	// result: (Equal (CMP (ZeroExt16to32 x) (ZeroExt16to32 y)))
13462	for {
13463		x := v_0
13464		y := v_1
13465		v.reset(OpARMEqual)
13466		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
13467		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
13468		v1.AddArg(x)
13469		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
13470		v2.AddArg(y)
13471		v0.AddArg2(v1, v2)
13472		v.AddArg(v0)
13473		return true
13474	}
13475}
13476func rewriteValueARM_OpEq32(v *Value) bool {
13477	v_1 := v.Args[1]
13478	v_0 := v.Args[0]
13479	b := v.Block
13480	// match: (Eq32 x y)
13481	// result: (Equal (CMP x y))
13482	for {
13483		x := v_0
13484		y := v_1
13485		v.reset(OpARMEqual)
13486		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
13487		v0.AddArg2(x, y)
13488		v.AddArg(v0)
13489		return true
13490	}
13491}
13492func rewriteValueARM_OpEq32F(v *Value) bool {
13493	v_1 := v.Args[1]
13494	v_0 := v.Args[0]
13495	b := v.Block
13496	// match: (Eq32F x y)
13497	// result: (Equal (CMPF x y))
13498	for {
13499		x := v_0
13500		y := v_1
13501		v.reset(OpARMEqual)
13502		v0 := b.NewValue0(v.Pos, OpARMCMPF, types.TypeFlags)
13503		v0.AddArg2(x, y)
13504		v.AddArg(v0)
13505		return true
13506	}
13507}
13508func rewriteValueARM_OpEq64F(v *Value) bool {
13509	v_1 := v.Args[1]
13510	v_0 := v.Args[0]
13511	b := v.Block
13512	// match: (Eq64F x y)
13513	// result: (Equal (CMPD x y))
13514	for {
13515		x := v_0
13516		y := v_1
13517		v.reset(OpARMEqual)
13518		v0 := b.NewValue0(v.Pos, OpARMCMPD, types.TypeFlags)
13519		v0.AddArg2(x, y)
13520		v.AddArg(v0)
13521		return true
13522	}
13523}
13524func rewriteValueARM_OpEq8(v *Value) bool {
13525	v_1 := v.Args[1]
13526	v_0 := v.Args[0]
13527	b := v.Block
13528	typ := &b.Func.Config.Types
13529	// match: (Eq8 x y)
13530	// result: (Equal (CMP (ZeroExt8to32 x) (ZeroExt8to32 y)))
13531	for {
13532		x := v_0
13533		y := v_1
13534		v.reset(OpARMEqual)
13535		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
13536		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
13537		v1.AddArg(x)
13538		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
13539		v2.AddArg(y)
13540		v0.AddArg2(v1, v2)
13541		v.AddArg(v0)
13542		return true
13543	}
13544}
13545func rewriteValueARM_OpEqB(v *Value) bool {
13546	v_1 := v.Args[1]
13547	v_0 := v.Args[0]
13548	b := v.Block
13549	typ := &b.Func.Config.Types
13550	// match: (EqB x y)
13551	// result: (XORconst [1] (XOR <typ.Bool> x y))
13552	for {
13553		x := v_0
13554		y := v_1
13555		v.reset(OpARMXORconst)
13556		v.AuxInt = int32ToAuxInt(1)
13557		v0 := b.NewValue0(v.Pos, OpARMXOR, typ.Bool)
13558		v0.AddArg2(x, y)
13559		v.AddArg(v0)
13560		return true
13561	}
13562}
13563func rewriteValueARM_OpEqPtr(v *Value) bool {
13564	v_1 := v.Args[1]
13565	v_0 := v.Args[0]
13566	b := v.Block
13567	// match: (EqPtr x y)
13568	// result: (Equal (CMP x y))
13569	for {
13570		x := v_0
13571		y := v_1
13572		v.reset(OpARMEqual)
13573		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
13574		v0.AddArg2(x, y)
13575		v.AddArg(v0)
13576		return true
13577	}
13578}
13579func rewriteValueARM_OpFMA(v *Value) bool {
13580	v_2 := v.Args[2]
13581	v_1 := v.Args[1]
13582	v_0 := v.Args[0]
13583	// match: (FMA x y z)
13584	// result: (FMULAD z x y)
13585	for {
13586		x := v_0
13587		y := v_1
13588		z := v_2
13589		v.reset(OpARMFMULAD)
13590		v.AddArg3(z, x, y)
13591		return true
13592	}
13593}
13594func rewriteValueARM_OpIsInBounds(v *Value) bool {
13595	v_1 := v.Args[1]
13596	v_0 := v.Args[0]
13597	b := v.Block
13598	// match: (IsInBounds idx len)
13599	// result: (LessThanU (CMP idx len))
13600	for {
13601		idx := v_0
13602		len := v_1
13603		v.reset(OpARMLessThanU)
13604		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
13605		v0.AddArg2(idx, len)
13606		v.AddArg(v0)
13607		return true
13608	}
13609}
13610func rewriteValueARM_OpIsNonNil(v *Value) bool {
13611	v_0 := v.Args[0]
13612	b := v.Block
13613	// match: (IsNonNil ptr)
13614	// result: (NotEqual (CMPconst [0] ptr))
13615	for {
13616		ptr := v_0
13617		v.reset(OpARMNotEqual)
13618		v0 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
13619		v0.AuxInt = int32ToAuxInt(0)
13620		v0.AddArg(ptr)
13621		v.AddArg(v0)
13622		return true
13623	}
13624}
13625func rewriteValueARM_OpIsSliceInBounds(v *Value) bool {
13626	v_1 := v.Args[1]
13627	v_0 := v.Args[0]
13628	b := v.Block
13629	// match: (IsSliceInBounds idx len)
13630	// result: (LessEqualU (CMP idx len))
13631	for {
13632		idx := v_0
13633		len := v_1
13634		v.reset(OpARMLessEqualU)
13635		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
13636		v0.AddArg2(idx, len)
13637		v.AddArg(v0)
13638		return true
13639	}
13640}
13641func rewriteValueARM_OpLeq16(v *Value) bool {
13642	v_1 := v.Args[1]
13643	v_0 := v.Args[0]
13644	b := v.Block
13645	typ := &b.Func.Config.Types
13646	// match: (Leq16 x y)
13647	// result: (LessEqual (CMP (SignExt16to32 x) (SignExt16to32 y)))
13648	for {
13649		x := v_0
13650		y := v_1
13651		v.reset(OpARMLessEqual)
13652		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
13653		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
13654		v1.AddArg(x)
13655		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
13656		v2.AddArg(y)
13657		v0.AddArg2(v1, v2)
13658		v.AddArg(v0)
13659		return true
13660	}
13661}
13662func rewriteValueARM_OpLeq16U(v *Value) bool {
13663	v_1 := v.Args[1]
13664	v_0 := v.Args[0]
13665	b := v.Block
13666	typ := &b.Func.Config.Types
13667	// match: (Leq16U x y)
13668	// result: (LessEqualU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y)))
13669	for {
13670		x := v_0
13671		y := v_1
13672		v.reset(OpARMLessEqualU)
13673		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
13674		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
13675		v1.AddArg(x)
13676		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
13677		v2.AddArg(y)
13678		v0.AddArg2(v1, v2)
13679		v.AddArg(v0)
13680		return true
13681	}
13682}
13683func rewriteValueARM_OpLeq32(v *Value) bool {
13684	v_1 := v.Args[1]
13685	v_0 := v.Args[0]
13686	b := v.Block
13687	// match: (Leq32 x y)
13688	// result: (LessEqual (CMP x y))
13689	for {
13690		x := v_0
13691		y := v_1
13692		v.reset(OpARMLessEqual)
13693		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
13694		v0.AddArg2(x, y)
13695		v.AddArg(v0)
13696		return true
13697	}
13698}
13699func rewriteValueARM_OpLeq32F(v *Value) bool {
13700	v_1 := v.Args[1]
13701	v_0 := v.Args[0]
13702	b := v.Block
13703	// match: (Leq32F x y)
13704	// result: (GreaterEqual (CMPF y x))
13705	for {
13706		x := v_0
13707		y := v_1
13708		v.reset(OpARMGreaterEqual)
13709		v0 := b.NewValue0(v.Pos, OpARMCMPF, types.TypeFlags)
13710		v0.AddArg2(y, x)
13711		v.AddArg(v0)
13712		return true
13713	}
13714}
13715func rewriteValueARM_OpLeq32U(v *Value) bool {
13716	v_1 := v.Args[1]
13717	v_0 := v.Args[0]
13718	b := v.Block
13719	// match: (Leq32U x y)
13720	// result: (LessEqualU (CMP x y))
13721	for {
13722		x := v_0
13723		y := v_1
13724		v.reset(OpARMLessEqualU)
13725		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
13726		v0.AddArg2(x, y)
13727		v.AddArg(v0)
13728		return true
13729	}
13730}
13731func rewriteValueARM_OpLeq64F(v *Value) bool {
13732	v_1 := v.Args[1]
13733	v_0 := v.Args[0]
13734	b := v.Block
13735	// match: (Leq64F x y)
13736	// result: (GreaterEqual (CMPD y x))
13737	for {
13738		x := v_0
13739		y := v_1
13740		v.reset(OpARMGreaterEqual)
13741		v0 := b.NewValue0(v.Pos, OpARMCMPD, types.TypeFlags)
13742		v0.AddArg2(y, x)
13743		v.AddArg(v0)
13744		return true
13745	}
13746}
13747func rewriteValueARM_OpLeq8(v *Value) bool {
13748	v_1 := v.Args[1]
13749	v_0 := v.Args[0]
13750	b := v.Block
13751	typ := &b.Func.Config.Types
13752	// match: (Leq8 x y)
13753	// result: (LessEqual (CMP (SignExt8to32 x) (SignExt8to32 y)))
13754	for {
13755		x := v_0
13756		y := v_1
13757		v.reset(OpARMLessEqual)
13758		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
13759		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
13760		v1.AddArg(x)
13761		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
13762		v2.AddArg(y)
13763		v0.AddArg2(v1, v2)
13764		v.AddArg(v0)
13765		return true
13766	}
13767}
13768func rewriteValueARM_OpLeq8U(v *Value) bool {
13769	v_1 := v.Args[1]
13770	v_0 := v.Args[0]
13771	b := v.Block
13772	typ := &b.Func.Config.Types
13773	// match: (Leq8U x y)
13774	// result: (LessEqualU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y)))
13775	for {
13776		x := v_0
13777		y := v_1
13778		v.reset(OpARMLessEqualU)
13779		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
13780		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
13781		v1.AddArg(x)
13782		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
13783		v2.AddArg(y)
13784		v0.AddArg2(v1, v2)
13785		v.AddArg(v0)
13786		return true
13787	}
13788}
13789func rewriteValueARM_OpLess16(v *Value) bool {
13790	v_1 := v.Args[1]
13791	v_0 := v.Args[0]
13792	b := v.Block
13793	typ := &b.Func.Config.Types
13794	// match: (Less16 x y)
13795	// result: (LessThan (CMP (SignExt16to32 x) (SignExt16to32 y)))
13796	for {
13797		x := v_0
13798		y := v_1
13799		v.reset(OpARMLessThan)
13800		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
13801		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
13802		v1.AddArg(x)
13803		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
13804		v2.AddArg(y)
13805		v0.AddArg2(v1, v2)
13806		v.AddArg(v0)
13807		return true
13808	}
13809}
13810func rewriteValueARM_OpLess16U(v *Value) bool {
13811	v_1 := v.Args[1]
13812	v_0 := v.Args[0]
13813	b := v.Block
13814	typ := &b.Func.Config.Types
13815	// match: (Less16U x y)
13816	// result: (LessThanU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y)))
13817	for {
13818		x := v_0
13819		y := v_1
13820		v.reset(OpARMLessThanU)
13821		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
13822		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
13823		v1.AddArg(x)
13824		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
13825		v2.AddArg(y)
13826		v0.AddArg2(v1, v2)
13827		v.AddArg(v0)
13828		return true
13829	}
13830}
13831func rewriteValueARM_OpLess32(v *Value) bool {
13832	v_1 := v.Args[1]
13833	v_0 := v.Args[0]
13834	b := v.Block
13835	// match: (Less32 x y)
13836	// result: (LessThan (CMP x y))
13837	for {
13838		x := v_0
13839		y := v_1
13840		v.reset(OpARMLessThan)
13841		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
13842		v0.AddArg2(x, y)
13843		v.AddArg(v0)
13844		return true
13845	}
13846}
13847func rewriteValueARM_OpLess32F(v *Value) bool {
13848	v_1 := v.Args[1]
13849	v_0 := v.Args[0]
13850	b := v.Block
13851	// match: (Less32F x y)
13852	// result: (GreaterThan (CMPF y x))
13853	for {
13854		x := v_0
13855		y := v_1
13856		v.reset(OpARMGreaterThan)
13857		v0 := b.NewValue0(v.Pos, OpARMCMPF, types.TypeFlags)
13858		v0.AddArg2(y, x)
13859		v.AddArg(v0)
13860		return true
13861	}
13862}
13863func rewriteValueARM_OpLess32U(v *Value) bool {
13864	v_1 := v.Args[1]
13865	v_0 := v.Args[0]
13866	b := v.Block
13867	// match: (Less32U x y)
13868	// result: (LessThanU (CMP x y))
13869	for {
13870		x := v_0
13871		y := v_1
13872		v.reset(OpARMLessThanU)
13873		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
13874		v0.AddArg2(x, y)
13875		v.AddArg(v0)
13876		return true
13877	}
13878}
13879func rewriteValueARM_OpLess64F(v *Value) bool {
13880	v_1 := v.Args[1]
13881	v_0 := v.Args[0]
13882	b := v.Block
13883	// match: (Less64F x y)
13884	// result: (GreaterThan (CMPD y x))
13885	for {
13886		x := v_0
13887		y := v_1
13888		v.reset(OpARMGreaterThan)
13889		v0 := b.NewValue0(v.Pos, OpARMCMPD, types.TypeFlags)
13890		v0.AddArg2(y, x)
13891		v.AddArg(v0)
13892		return true
13893	}
13894}
13895func rewriteValueARM_OpLess8(v *Value) bool {
13896	v_1 := v.Args[1]
13897	v_0 := v.Args[0]
13898	b := v.Block
13899	typ := &b.Func.Config.Types
13900	// match: (Less8 x y)
13901	// result: (LessThan (CMP (SignExt8to32 x) (SignExt8to32 y)))
13902	for {
13903		x := v_0
13904		y := v_1
13905		v.reset(OpARMLessThan)
13906		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
13907		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
13908		v1.AddArg(x)
13909		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
13910		v2.AddArg(y)
13911		v0.AddArg2(v1, v2)
13912		v.AddArg(v0)
13913		return true
13914	}
13915}
13916func rewriteValueARM_OpLess8U(v *Value) bool {
13917	v_1 := v.Args[1]
13918	v_0 := v.Args[0]
13919	b := v.Block
13920	typ := &b.Func.Config.Types
13921	// match: (Less8U x y)
13922	// result: (LessThanU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y)))
13923	for {
13924		x := v_0
13925		y := v_1
13926		v.reset(OpARMLessThanU)
13927		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
13928		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
13929		v1.AddArg(x)
13930		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
13931		v2.AddArg(y)
13932		v0.AddArg2(v1, v2)
13933		v.AddArg(v0)
13934		return true
13935	}
13936}
13937func rewriteValueARM_OpLoad(v *Value) bool {
13938	v_1 := v.Args[1]
13939	v_0 := v.Args[0]
13940	// match: (Load <t> ptr mem)
13941	// cond: t.IsBoolean()
13942	// result: (MOVBUload ptr mem)
13943	for {
13944		t := v.Type
13945		ptr := v_0
13946		mem := v_1
13947		if !(t.IsBoolean()) {
13948			break
13949		}
13950		v.reset(OpARMMOVBUload)
13951		v.AddArg2(ptr, mem)
13952		return true
13953	}
13954	// match: (Load <t> ptr mem)
13955	// cond: (is8BitInt(t) && t.IsSigned())
13956	// result: (MOVBload ptr mem)
13957	for {
13958		t := v.Type
13959		ptr := v_0
13960		mem := v_1
13961		if !(is8BitInt(t) && t.IsSigned()) {
13962			break
13963		}
13964		v.reset(OpARMMOVBload)
13965		v.AddArg2(ptr, mem)
13966		return true
13967	}
13968	// match: (Load <t> ptr mem)
13969	// cond: (is8BitInt(t) && !t.IsSigned())
13970	// result: (MOVBUload ptr mem)
13971	for {
13972		t := v.Type
13973		ptr := v_0
13974		mem := v_1
13975		if !(is8BitInt(t) && !t.IsSigned()) {
13976			break
13977		}
13978		v.reset(OpARMMOVBUload)
13979		v.AddArg2(ptr, mem)
13980		return true
13981	}
13982	// match: (Load <t> ptr mem)
13983	// cond: (is16BitInt(t) && t.IsSigned())
13984	// result: (MOVHload ptr mem)
13985	for {
13986		t := v.Type
13987		ptr := v_0
13988		mem := v_1
13989		if !(is16BitInt(t) && t.IsSigned()) {
13990			break
13991		}
13992		v.reset(OpARMMOVHload)
13993		v.AddArg2(ptr, mem)
13994		return true
13995	}
13996	// match: (Load <t> ptr mem)
13997	// cond: (is16BitInt(t) && !t.IsSigned())
13998	// result: (MOVHUload ptr mem)
13999	for {
14000		t := v.Type
14001		ptr := v_0
14002		mem := v_1
14003		if !(is16BitInt(t) && !t.IsSigned()) {
14004			break
14005		}
14006		v.reset(OpARMMOVHUload)
14007		v.AddArg2(ptr, mem)
14008		return true
14009	}
14010	// match: (Load <t> ptr mem)
14011	// cond: (is32BitInt(t) || isPtr(t))
14012	// result: (MOVWload ptr mem)
14013	for {
14014		t := v.Type
14015		ptr := v_0
14016		mem := v_1
14017		if !(is32BitInt(t) || isPtr(t)) {
14018			break
14019		}
14020		v.reset(OpARMMOVWload)
14021		v.AddArg2(ptr, mem)
14022		return true
14023	}
14024	// match: (Load <t> ptr mem)
14025	// cond: is32BitFloat(t)
14026	// result: (MOVFload ptr mem)
14027	for {
14028		t := v.Type
14029		ptr := v_0
14030		mem := v_1
14031		if !(is32BitFloat(t)) {
14032			break
14033		}
14034		v.reset(OpARMMOVFload)
14035		v.AddArg2(ptr, mem)
14036		return true
14037	}
14038	// match: (Load <t> ptr mem)
14039	// cond: is64BitFloat(t)
14040	// result: (MOVDload ptr mem)
14041	for {
14042		t := v.Type
14043		ptr := v_0
14044		mem := v_1
14045		if !(is64BitFloat(t)) {
14046			break
14047		}
14048		v.reset(OpARMMOVDload)
14049		v.AddArg2(ptr, mem)
14050		return true
14051	}
14052	return false
14053}
14054func rewriteValueARM_OpLocalAddr(v *Value) bool {
14055	v_1 := v.Args[1]
14056	v_0 := v.Args[0]
14057	b := v.Block
14058	typ := &b.Func.Config.Types
14059	// match: (LocalAddr <t> {sym} base mem)
14060	// cond: t.Elem().HasPointers()
14061	// result: (MOVWaddr {sym} (SPanchored base mem))
14062	for {
14063		t := v.Type
14064		sym := auxToSym(v.Aux)
14065		base := v_0
14066		mem := v_1
14067		if !(t.Elem().HasPointers()) {
14068			break
14069		}
14070		v.reset(OpARMMOVWaddr)
14071		v.Aux = symToAux(sym)
14072		v0 := b.NewValue0(v.Pos, OpSPanchored, typ.Uintptr)
14073		v0.AddArg2(base, mem)
14074		v.AddArg(v0)
14075		return true
14076	}
14077	// match: (LocalAddr <t> {sym} base _)
14078	// cond: !t.Elem().HasPointers()
14079	// result: (MOVWaddr {sym} base)
14080	for {
14081		t := v.Type
14082		sym := auxToSym(v.Aux)
14083		base := v_0
14084		if !(!t.Elem().HasPointers()) {
14085			break
14086		}
14087		v.reset(OpARMMOVWaddr)
14088		v.Aux = symToAux(sym)
14089		v.AddArg(base)
14090		return true
14091	}
14092	return false
14093}
14094func rewriteValueARM_OpLsh16x16(v *Value) bool {
14095	v_1 := v.Args[1]
14096	v_0 := v.Args[0]
14097	b := v.Block
14098	typ := &b.Func.Config.Types
14099	// match: (Lsh16x16 x y)
14100	// result: (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0])
14101	for {
14102		x := v_0
14103		y := v_1
14104		v.reset(OpARMCMOVWHSconst)
14105		v.AuxInt = int32ToAuxInt(0)
14106		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
14107		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
14108		v1.AddArg(y)
14109		v0.AddArg2(x, v1)
14110		v2 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
14111		v2.AuxInt = int32ToAuxInt(256)
14112		v2.AddArg(v1)
14113		v.AddArg2(v0, v2)
14114		return true
14115	}
14116}
14117func rewriteValueARM_OpLsh16x32(v *Value) bool {
14118	v_1 := v.Args[1]
14119	v_0 := v.Args[0]
14120	b := v.Block
14121	// match: (Lsh16x32 x y)
14122	// result: (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0])
14123	for {
14124		x := v_0
14125		y := v_1
14126		v.reset(OpARMCMOVWHSconst)
14127		v.AuxInt = int32ToAuxInt(0)
14128		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
14129		v0.AddArg2(x, y)
14130		v1 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
14131		v1.AuxInt = int32ToAuxInt(256)
14132		v1.AddArg(y)
14133		v.AddArg2(v0, v1)
14134		return true
14135	}
14136}
14137func rewriteValueARM_OpLsh16x64(v *Value) bool {
14138	v_1 := v.Args[1]
14139	v_0 := v.Args[0]
14140	// match: (Lsh16x64 x (Const64 [c]))
14141	// cond: uint64(c) < 16
14142	// result: (SLLconst x [int32(c)])
14143	for {
14144		x := v_0
14145		if v_1.Op != OpConst64 {
14146			break
14147		}
14148		c := auxIntToInt64(v_1.AuxInt)
14149		if !(uint64(c) < 16) {
14150			break
14151		}
14152		v.reset(OpARMSLLconst)
14153		v.AuxInt = int32ToAuxInt(int32(c))
14154		v.AddArg(x)
14155		return true
14156	}
14157	// match: (Lsh16x64 _ (Const64 [c]))
14158	// cond: uint64(c) >= 16
14159	// result: (Const16 [0])
14160	for {
14161		if v_1.Op != OpConst64 {
14162			break
14163		}
14164		c := auxIntToInt64(v_1.AuxInt)
14165		if !(uint64(c) >= 16) {
14166			break
14167		}
14168		v.reset(OpConst16)
14169		v.AuxInt = int16ToAuxInt(0)
14170		return true
14171	}
14172	return false
14173}
14174func rewriteValueARM_OpLsh16x8(v *Value) bool {
14175	v_1 := v.Args[1]
14176	v_0 := v.Args[0]
14177	b := v.Block
14178	typ := &b.Func.Config.Types
14179	// match: (Lsh16x8 x y)
14180	// result: (SLL x (ZeroExt8to32 y))
14181	for {
14182		x := v_0
14183		y := v_1
14184		v.reset(OpARMSLL)
14185		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
14186		v0.AddArg(y)
14187		v.AddArg2(x, v0)
14188		return true
14189	}
14190}
14191func rewriteValueARM_OpLsh32x16(v *Value) bool {
14192	v_1 := v.Args[1]
14193	v_0 := v.Args[0]
14194	b := v.Block
14195	typ := &b.Func.Config.Types
14196	// match: (Lsh32x16 x y)
14197	// result: (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0])
14198	for {
14199		x := v_0
14200		y := v_1
14201		v.reset(OpARMCMOVWHSconst)
14202		v.AuxInt = int32ToAuxInt(0)
14203		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
14204		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
14205		v1.AddArg(y)
14206		v0.AddArg2(x, v1)
14207		v2 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
14208		v2.AuxInt = int32ToAuxInt(256)
14209		v2.AddArg(v1)
14210		v.AddArg2(v0, v2)
14211		return true
14212	}
14213}
14214func rewriteValueARM_OpLsh32x32(v *Value) bool {
14215	v_1 := v.Args[1]
14216	v_0 := v.Args[0]
14217	b := v.Block
14218	// match: (Lsh32x32 x y)
14219	// result: (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0])
14220	for {
14221		x := v_0
14222		y := v_1
14223		v.reset(OpARMCMOVWHSconst)
14224		v.AuxInt = int32ToAuxInt(0)
14225		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
14226		v0.AddArg2(x, y)
14227		v1 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
14228		v1.AuxInt = int32ToAuxInt(256)
14229		v1.AddArg(y)
14230		v.AddArg2(v0, v1)
14231		return true
14232	}
14233}
14234func rewriteValueARM_OpLsh32x64(v *Value) bool {
14235	v_1 := v.Args[1]
14236	v_0 := v.Args[0]
14237	// match: (Lsh32x64 x (Const64 [c]))
14238	// cond: uint64(c) < 32
14239	// result: (SLLconst x [int32(c)])
14240	for {
14241		x := v_0
14242		if v_1.Op != OpConst64 {
14243			break
14244		}
14245		c := auxIntToInt64(v_1.AuxInt)
14246		if !(uint64(c) < 32) {
14247			break
14248		}
14249		v.reset(OpARMSLLconst)
14250		v.AuxInt = int32ToAuxInt(int32(c))
14251		v.AddArg(x)
14252		return true
14253	}
14254	// match: (Lsh32x64 _ (Const64 [c]))
14255	// cond: uint64(c) >= 32
14256	// result: (Const32 [0])
14257	for {
14258		if v_1.Op != OpConst64 {
14259			break
14260		}
14261		c := auxIntToInt64(v_1.AuxInt)
14262		if !(uint64(c) >= 32) {
14263			break
14264		}
14265		v.reset(OpConst32)
14266		v.AuxInt = int32ToAuxInt(0)
14267		return true
14268	}
14269	return false
14270}
14271func rewriteValueARM_OpLsh32x8(v *Value) bool {
14272	v_1 := v.Args[1]
14273	v_0 := v.Args[0]
14274	b := v.Block
14275	typ := &b.Func.Config.Types
14276	// match: (Lsh32x8 x y)
14277	// result: (SLL x (ZeroExt8to32 y))
14278	for {
14279		x := v_0
14280		y := v_1
14281		v.reset(OpARMSLL)
14282		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
14283		v0.AddArg(y)
14284		v.AddArg2(x, v0)
14285		return true
14286	}
14287}
14288func rewriteValueARM_OpLsh8x16(v *Value) bool {
14289	v_1 := v.Args[1]
14290	v_0 := v.Args[0]
14291	b := v.Block
14292	typ := &b.Func.Config.Types
14293	// match: (Lsh8x16 x y)
14294	// result: (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0])
14295	for {
14296		x := v_0
14297		y := v_1
14298		v.reset(OpARMCMOVWHSconst)
14299		v.AuxInt = int32ToAuxInt(0)
14300		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
14301		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
14302		v1.AddArg(y)
14303		v0.AddArg2(x, v1)
14304		v2 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
14305		v2.AuxInt = int32ToAuxInt(256)
14306		v2.AddArg(v1)
14307		v.AddArg2(v0, v2)
14308		return true
14309	}
14310}
14311func rewriteValueARM_OpLsh8x32(v *Value) bool {
14312	v_1 := v.Args[1]
14313	v_0 := v.Args[0]
14314	b := v.Block
14315	// match: (Lsh8x32 x y)
14316	// result: (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0])
14317	for {
14318		x := v_0
14319		y := v_1
14320		v.reset(OpARMCMOVWHSconst)
14321		v.AuxInt = int32ToAuxInt(0)
14322		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
14323		v0.AddArg2(x, y)
14324		v1 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
14325		v1.AuxInt = int32ToAuxInt(256)
14326		v1.AddArg(y)
14327		v.AddArg2(v0, v1)
14328		return true
14329	}
14330}
14331func rewriteValueARM_OpLsh8x64(v *Value) bool {
14332	v_1 := v.Args[1]
14333	v_0 := v.Args[0]
14334	// match: (Lsh8x64 x (Const64 [c]))
14335	// cond: uint64(c) < 8
14336	// result: (SLLconst x [int32(c)])
14337	for {
14338		x := v_0
14339		if v_1.Op != OpConst64 {
14340			break
14341		}
14342		c := auxIntToInt64(v_1.AuxInt)
14343		if !(uint64(c) < 8) {
14344			break
14345		}
14346		v.reset(OpARMSLLconst)
14347		v.AuxInt = int32ToAuxInt(int32(c))
14348		v.AddArg(x)
14349		return true
14350	}
14351	// match: (Lsh8x64 _ (Const64 [c]))
14352	// cond: uint64(c) >= 8
14353	// result: (Const8 [0])
14354	for {
14355		if v_1.Op != OpConst64 {
14356			break
14357		}
14358		c := auxIntToInt64(v_1.AuxInt)
14359		if !(uint64(c) >= 8) {
14360			break
14361		}
14362		v.reset(OpConst8)
14363		v.AuxInt = int8ToAuxInt(0)
14364		return true
14365	}
14366	return false
14367}
14368func rewriteValueARM_OpLsh8x8(v *Value) bool {
14369	v_1 := v.Args[1]
14370	v_0 := v.Args[0]
14371	b := v.Block
14372	typ := &b.Func.Config.Types
14373	// match: (Lsh8x8 x y)
14374	// result: (SLL x (ZeroExt8to32 y))
14375	for {
14376		x := v_0
14377		y := v_1
14378		v.reset(OpARMSLL)
14379		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
14380		v0.AddArg(y)
14381		v.AddArg2(x, v0)
14382		return true
14383	}
14384}
14385func rewriteValueARM_OpMod16(v *Value) bool {
14386	v_1 := v.Args[1]
14387	v_0 := v.Args[0]
14388	b := v.Block
14389	typ := &b.Func.Config.Types
14390	// match: (Mod16 x y)
14391	// result: (Mod32 (SignExt16to32 x) (SignExt16to32 y))
14392	for {
14393		x := v_0
14394		y := v_1
14395		v.reset(OpMod32)
14396		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
14397		v0.AddArg(x)
14398		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
14399		v1.AddArg(y)
14400		v.AddArg2(v0, v1)
14401		return true
14402	}
14403}
14404func rewriteValueARM_OpMod16u(v *Value) bool {
14405	v_1 := v.Args[1]
14406	v_0 := v.Args[0]
14407	b := v.Block
14408	typ := &b.Func.Config.Types
14409	// match: (Mod16u x y)
14410	// result: (Mod32u (ZeroExt16to32 x) (ZeroExt16to32 y))
14411	for {
14412		x := v_0
14413		y := v_1
14414		v.reset(OpMod32u)
14415		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
14416		v0.AddArg(x)
14417		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
14418		v1.AddArg(y)
14419		v.AddArg2(v0, v1)
14420		return true
14421	}
14422}
14423func rewriteValueARM_OpMod32(v *Value) bool {
14424	v_1 := v.Args[1]
14425	v_0 := v.Args[0]
14426	b := v.Block
14427	typ := &b.Func.Config.Types
14428	// match: (Mod32 x y)
14429	// result: (SUB (XOR <typ.UInt32> (Select1 <typ.UInt32> (CALLudiv (SUB <typ.UInt32> (XOR <typ.UInt32> x (Signmask x)) (Signmask x)) (SUB <typ.UInt32> (XOR <typ.UInt32> y (Signmask y)) (Signmask y)))) (Signmask x)) (Signmask x))
14430	for {
14431		x := v_0
14432		y := v_1
14433		v.reset(OpARMSUB)
14434		v0 := b.NewValue0(v.Pos, OpARMXOR, typ.UInt32)
14435		v1 := b.NewValue0(v.Pos, OpSelect1, typ.UInt32)
14436		v2 := b.NewValue0(v.Pos, OpARMCALLudiv, types.NewTuple(typ.UInt32, typ.UInt32))
14437		v3 := b.NewValue0(v.Pos, OpARMSUB, typ.UInt32)
14438		v4 := b.NewValue0(v.Pos, OpARMXOR, typ.UInt32)
14439		v5 := b.NewValue0(v.Pos, OpSignmask, typ.Int32)
14440		v5.AddArg(x)
14441		v4.AddArg2(x, v5)
14442		v3.AddArg2(v4, v5)
14443		v6 := b.NewValue0(v.Pos, OpARMSUB, typ.UInt32)
14444		v7 := b.NewValue0(v.Pos, OpARMXOR, typ.UInt32)
14445		v8 := b.NewValue0(v.Pos, OpSignmask, typ.Int32)
14446		v8.AddArg(y)
14447		v7.AddArg2(y, v8)
14448		v6.AddArg2(v7, v8)
14449		v2.AddArg2(v3, v6)
14450		v1.AddArg(v2)
14451		v0.AddArg2(v1, v5)
14452		v.AddArg2(v0, v5)
14453		return true
14454	}
14455}
14456func rewriteValueARM_OpMod32u(v *Value) bool {
14457	v_1 := v.Args[1]
14458	v_0 := v.Args[0]
14459	b := v.Block
14460	typ := &b.Func.Config.Types
14461	// match: (Mod32u x y)
14462	// result: (Select1 <typ.UInt32> (CALLudiv x y))
14463	for {
14464		x := v_0
14465		y := v_1
14466		v.reset(OpSelect1)
14467		v.Type = typ.UInt32
14468		v0 := b.NewValue0(v.Pos, OpARMCALLudiv, types.NewTuple(typ.UInt32, typ.UInt32))
14469		v0.AddArg2(x, y)
14470		v.AddArg(v0)
14471		return true
14472	}
14473}
14474func rewriteValueARM_OpMod8(v *Value) bool {
14475	v_1 := v.Args[1]
14476	v_0 := v.Args[0]
14477	b := v.Block
14478	typ := &b.Func.Config.Types
14479	// match: (Mod8 x y)
14480	// result: (Mod32 (SignExt8to32 x) (SignExt8to32 y))
14481	for {
14482		x := v_0
14483		y := v_1
14484		v.reset(OpMod32)
14485		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
14486		v0.AddArg(x)
14487		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
14488		v1.AddArg(y)
14489		v.AddArg2(v0, v1)
14490		return true
14491	}
14492}
14493func rewriteValueARM_OpMod8u(v *Value) bool {
14494	v_1 := v.Args[1]
14495	v_0 := v.Args[0]
14496	b := v.Block
14497	typ := &b.Func.Config.Types
14498	// match: (Mod8u x y)
14499	// result: (Mod32u (ZeroExt8to32 x) (ZeroExt8to32 y))
14500	for {
14501		x := v_0
14502		y := v_1
14503		v.reset(OpMod32u)
14504		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
14505		v0.AddArg(x)
14506		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
14507		v1.AddArg(y)
14508		v.AddArg2(v0, v1)
14509		return true
14510	}
14511}
14512func rewriteValueARM_OpMove(v *Value) bool {
14513	v_2 := v.Args[2]
14514	v_1 := v.Args[1]
14515	v_0 := v.Args[0]
14516	b := v.Block
14517	config := b.Func.Config
14518	typ := &b.Func.Config.Types
14519	// match: (Move [0] _ _ mem)
14520	// result: mem
14521	for {
14522		if auxIntToInt64(v.AuxInt) != 0 {
14523			break
14524		}
14525		mem := v_2
14526		v.copyOf(mem)
14527		return true
14528	}
14529	// match: (Move [1] dst src mem)
14530	// result: (MOVBstore dst (MOVBUload src mem) mem)
14531	for {
14532		if auxIntToInt64(v.AuxInt) != 1 {
14533			break
14534		}
14535		dst := v_0
14536		src := v_1
14537		mem := v_2
14538		v.reset(OpARMMOVBstore)
14539		v0 := b.NewValue0(v.Pos, OpARMMOVBUload, typ.UInt8)
14540		v0.AddArg2(src, mem)
14541		v.AddArg3(dst, v0, mem)
14542		return true
14543	}
14544	// match: (Move [2] {t} dst src mem)
14545	// cond: t.Alignment()%2 == 0
14546	// result: (MOVHstore dst (MOVHUload src mem) mem)
14547	for {
14548		if auxIntToInt64(v.AuxInt) != 2 {
14549			break
14550		}
14551		t := auxToType(v.Aux)
14552		dst := v_0
14553		src := v_1
14554		mem := v_2
14555		if !(t.Alignment()%2 == 0) {
14556			break
14557		}
14558		v.reset(OpARMMOVHstore)
14559		v0 := b.NewValue0(v.Pos, OpARMMOVHUload, typ.UInt16)
14560		v0.AddArg2(src, mem)
14561		v.AddArg3(dst, v0, mem)
14562		return true
14563	}
14564	// match: (Move [2] dst src mem)
14565	// result: (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem))
14566	for {
14567		if auxIntToInt64(v.AuxInt) != 2 {
14568			break
14569		}
14570		dst := v_0
14571		src := v_1
14572		mem := v_2
14573		v.reset(OpARMMOVBstore)
14574		v.AuxInt = int32ToAuxInt(1)
14575		v0 := b.NewValue0(v.Pos, OpARMMOVBUload, typ.UInt8)
14576		v0.AuxInt = int32ToAuxInt(1)
14577		v0.AddArg2(src, mem)
14578		v1 := b.NewValue0(v.Pos, OpARMMOVBstore, types.TypeMem)
14579		v2 := b.NewValue0(v.Pos, OpARMMOVBUload, typ.UInt8)
14580		v2.AddArg2(src, mem)
14581		v1.AddArg3(dst, v2, mem)
14582		v.AddArg3(dst, v0, v1)
14583		return true
14584	}
14585	// match: (Move [4] {t} dst src mem)
14586	// cond: t.Alignment()%4 == 0
14587	// result: (MOVWstore dst (MOVWload src mem) mem)
14588	for {
14589		if auxIntToInt64(v.AuxInt) != 4 {
14590			break
14591		}
14592		t := auxToType(v.Aux)
14593		dst := v_0
14594		src := v_1
14595		mem := v_2
14596		if !(t.Alignment()%4 == 0) {
14597			break
14598		}
14599		v.reset(OpARMMOVWstore)
14600		v0 := b.NewValue0(v.Pos, OpARMMOVWload, typ.UInt32)
14601		v0.AddArg2(src, mem)
14602		v.AddArg3(dst, v0, mem)
14603		return true
14604	}
14605	// match: (Move [4] {t} dst src mem)
14606	// cond: t.Alignment()%2 == 0
14607	// result: (MOVHstore [2] dst (MOVHUload [2] src mem) (MOVHstore dst (MOVHUload src mem) mem))
14608	for {
14609		if auxIntToInt64(v.AuxInt) != 4 {
14610			break
14611		}
14612		t := auxToType(v.Aux)
14613		dst := v_0
14614		src := v_1
14615		mem := v_2
14616		if !(t.Alignment()%2 == 0) {
14617			break
14618		}
14619		v.reset(OpARMMOVHstore)
14620		v.AuxInt = int32ToAuxInt(2)
14621		v0 := b.NewValue0(v.Pos, OpARMMOVHUload, typ.UInt16)
14622		v0.AuxInt = int32ToAuxInt(2)
14623		v0.AddArg2(src, mem)
14624		v1 := b.NewValue0(v.Pos, OpARMMOVHstore, types.TypeMem)
14625		v2 := b.NewValue0(v.Pos, OpARMMOVHUload, typ.UInt16)
14626		v2.AddArg2(src, mem)
14627		v1.AddArg3(dst, v2, mem)
14628		v.AddArg3(dst, v0, v1)
14629		return true
14630	}
14631	// match: (Move [4] dst src mem)
14632	// result: (MOVBstore [3] dst (MOVBUload [3] src mem) (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem))))
14633	for {
14634		if auxIntToInt64(v.AuxInt) != 4 {
14635			break
14636		}
14637		dst := v_0
14638		src := v_1
14639		mem := v_2
14640		v.reset(OpARMMOVBstore)
14641		v.AuxInt = int32ToAuxInt(3)
14642		v0 := b.NewValue0(v.Pos, OpARMMOVBUload, typ.UInt8)
14643		v0.AuxInt = int32ToAuxInt(3)
14644		v0.AddArg2(src, mem)
14645		v1 := b.NewValue0(v.Pos, OpARMMOVBstore, types.TypeMem)
14646		v1.AuxInt = int32ToAuxInt(2)
14647		v2 := b.NewValue0(v.Pos, OpARMMOVBUload, typ.UInt8)
14648		v2.AuxInt = int32ToAuxInt(2)
14649		v2.AddArg2(src, mem)
14650		v3 := b.NewValue0(v.Pos, OpARMMOVBstore, types.TypeMem)
14651		v3.AuxInt = int32ToAuxInt(1)
14652		v4 := b.NewValue0(v.Pos, OpARMMOVBUload, typ.UInt8)
14653		v4.AuxInt = int32ToAuxInt(1)
14654		v4.AddArg2(src, mem)
14655		v5 := b.NewValue0(v.Pos, OpARMMOVBstore, types.TypeMem)
14656		v6 := b.NewValue0(v.Pos, OpARMMOVBUload, typ.UInt8)
14657		v6.AddArg2(src, mem)
14658		v5.AddArg3(dst, v6, mem)
14659		v3.AddArg3(dst, v4, v5)
14660		v1.AddArg3(dst, v2, v3)
14661		v.AddArg3(dst, v0, v1)
14662		return true
14663	}
14664	// match: (Move [3] dst src mem)
14665	// result: (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem)))
14666	for {
14667		if auxIntToInt64(v.AuxInt) != 3 {
14668			break
14669		}
14670		dst := v_0
14671		src := v_1
14672		mem := v_2
14673		v.reset(OpARMMOVBstore)
14674		v.AuxInt = int32ToAuxInt(2)
14675		v0 := b.NewValue0(v.Pos, OpARMMOVBUload, typ.UInt8)
14676		v0.AuxInt = int32ToAuxInt(2)
14677		v0.AddArg2(src, mem)
14678		v1 := b.NewValue0(v.Pos, OpARMMOVBstore, types.TypeMem)
14679		v1.AuxInt = int32ToAuxInt(1)
14680		v2 := b.NewValue0(v.Pos, OpARMMOVBUload, typ.UInt8)
14681		v2.AuxInt = int32ToAuxInt(1)
14682		v2.AddArg2(src, mem)
14683		v3 := b.NewValue0(v.Pos, OpARMMOVBstore, types.TypeMem)
14684		v4 := b.NewValue0(v.Pos, OpARMMOVBUload, typ.UInt8)
14685		v4.AddArg2(src, mem)
14686		v3.AddArg3(dst, v4, mem)
14687		v1.AddArg3(dst, v2, v3)
14688		v.AddArg3(dst, v0, v1)
14689		return true
14690	}
14691	// match: (Move [s] {t} dst src mem)
14692	// cond: s%4 == 0 && s > 4 && s <= 512 && t.Alignment()%4 == 0 && !config.noDuffDevice && logLargeCopy(v, s)
14693	// result: (DUFFCOPY [8 * (128 - s/4)] dst src mem)
14694	for {
14695		s := auxIntToInt64(v.AuxInt)
14696		t := auxToType(v.Aux)
14697		dst := v_0
14698		src := v_1
14699		mem := v_2
14700		if !(s%4 == 0 && s > 4 && s <= 512 && t.Alignment()%4 == 0 && !config.noDuffDevice && logLargeCopy(v, s)) {
14701			break
14702		}
14703		v.reset(OpARMDUFFCOPY)
14704		v.AuxInt = int64ToAuxInt(8 * (128 - s/4))
14705		v.AddArg3(dst, src, mem)
14706		return true
14707	}
14708	// match: (Move [s] {t} dst src mem)
14709	// cond: ((s > 512 || config.noDuffDevice) || t.Alignment()%4 != 0) && logLargeCopy(v, s)
14710	// result: (LoweredMove [t.Alignment()] dst src (ADDconst <src.Type> src [int32(s-moveSize(t.Alignment(), config))]) mem)
14711	for {
14712		s := auxIntToInt64(v.AuxInt)
14713		t := auxToType(v.Aux)
14714		dst := v_0
14715		src := v_1
14716		mem := v_2
14717		if !(((s > 512 || config.noDuffDevice) || t.Alignment()%4 != 0) && logLargeCopy(v, s)) {
14718			break
14719		}
14720		v.reset(OpARMLoweredMove)
14721		v.AuxInt = int64ToAuxInt(t.Alignment())
14722		v0 := b.NewValue0(v.Pos, OpARMADDconst, src.Type)
14723		v0.AuxInt = int32ToAuxInt(int32(s - moveSize(t.Alignment(), config)))
14724		v0.AddArg(src)
14725		v.AddArg4(dst, src, v0, mem)
14726		return true
14727	}
14728	return false
14729}
14730func rewriteValueARM_OpNeg16(v *Value) bool {
14731	v_0 := v.Args[0]
14732	// match: (Neg16 x)
14733	// result: (RSBconst [0] x)
14734	for {
14735		x := v_0
14736		v.reset(OpARMRSBconst)
14737		v.AuxInt = int32ToAuxInt(0)
14738		v.AddArg(x)
14739		return true
14740	}
14741}
14742func rewriteValueARM_OpNeg32(v *Value) bool {
14743	v_0 := v.Args[0]
14744	// match: (Neg32 x)
14745	// result: (RSBconst [0] x)
14746	for {
14747		x := v_0
14748		v.reset(OpARMRSBconst)
14749		v.AuxInt = int32ToAuxInt(0)
14750		v.AddArg(x)
14751		return true
14752	}
14753}
14754func rewriteValueARM_OpNeg8(v *Value) bool {
14755	v_0 := v.Args[0]
14756	// match: (Neg8 x)
14757	// result: (RSBconst [0] x)
14758	for {
14759		x := v_0
14760		v.reset(OpARMRSBconst)
14761		v.AuxInt = int32ToAuxInt(0)
14762		v.AddArg(x)
14763		return true
14764	}
14765}
14766func rewriteValueARM_OpNeq16(v *Value) bool {
14767	v_1 := v.Args[1]
14768	v_0 := v.Args[0]
14769	b := v.Block
14770	typ := &b.Func.Config.Types
14771	// match: (Neq16 x y)
14772	// result: (NotEqual (CMP (ZeroExt16to32 x) (ZeroExt16to32 y)))
14773	for {
14774		x := v_0
14775		y := v_1
14776		v.reset(OpARMNotEqual)
14777		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
14778		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
14779		v1.AddArg(x)
14780		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
14781		v2.AddArg(y)
14782		v0.AddArg2(v1, v2)
14783		v.AddArg(v0)
14784		return true
14785	}
14786}
14787func rewriteValueARM_OpNeq32(v *Value) bool {
14788	v_1 := v.Args[1]
14789	v_0 := v.Args[0]
14790	b := v.Block
14791	// match: (Neq32 x y)
14792	// result: (NotEqual (CMP x y))
14793	for {
14794		x := v_0
14795		y := v_1
14796		v.reset(OpARMNotEqual)
14797		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
14798		v0.AddArg2(x, y)
14799		v.AddArg(v0)
14800		return true
14801	}
14802}
14803func rewriteValueARM_OpNeq32F(v *Value) bool {
14804	v_1 := v.Args[1]
14805	v_0 := v.Args[0]
14806	b := v.Block
14807	// match: (Neq32F x y)
14808	// result: (NotEqual (CMPF x y))
14809	for {
14810		x := v_0
14811		y := v_1
14812		v.reset(OpARMNotEqual)
14813		v0 := b.NewValue0(v.Pos, OpARMCMPF, types.TypeFlags)
14814		v0.AddArg2(x, y)
14815		v.AddArg(v0)
14816		return true
14817	}
14818}
14819func rewriteValueARM_OpNeq64F(v *Value) bool {
14820	v_1 := v.Args[1]
14821	v_0 := v.Args[0]
14822	b := v.Block
14823	// match: (Neq64F x y)
14824	// result: (NotEqual (CMPD x y))
14825	for {
14826		x := v_0
14827		y := v_1
14828		v.reset(OpARMNotEqual)
14829		v0 := b.NewValue0(v.Pos, OpARMCMPD, types.TypeFlags)
14830		v0.AddArg2(x, y)
14831		v.AddArg(v0)
14832		return true
14833	}
14834}
14835func rewriteValueARM_OpNeq8(v *Value) bool {
14836	v_1 := v.Args[1]
14837	v_0 := v.Args[0]
14838	b := v.Block
14839	typ := &b.Func.Config.Types
14840	// match: (Neq8 x y)
14841	// result: (NotEqual (CMP (ZeroExt8to32 x) (ZeroExt8to32 y)))
14842	for {
14843		x := v_0
14844		y := v_1
14845		v.reset(OpARMNotEqual)
14846		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
14847		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
14848		v1.AddArg(x)
14849		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
14850		v2.AddArg(y)
14851		v0.AddArg2(v1, v2)
14852		v.AddArg(v0)
14853		return true
14854	}
14855}
14856func rewriteValueARM_OpNeqPtr(v *Value) bool {
14857	v_1 := v.Args[1]
14858	v_0 := v.Args[0]
14859	b := v.Block
14860	// match: (NeqPtr x y)
14861	// result: (NotEqual (CMP x y))
14862	for {
14863		x := v_0
14864		y := v_1
14865		v.reset(OpARMNotEqual)
14866		v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
14867		v0.AddArg2(x, y)
14868		v.AddArg(v0)
14869		return true
14870	}
14871}
14872func rewriteValueARM_OpNot(v *Value) bool {
14873	v_0 := v.Args[0]
14874	// match: (Not x)
14875	// result: (XORconst [1] x)
14876	for {
14877		x := v_0
14878		v.reset(OpARMXORconst)
14879		v.AuxInt = int32ToAuxInt(1)
14880		v.AddArg(x)
14881		return true
14882	}
14883}
14884func rewriteValueARM_OpOffPtr(v *Value) bool {
14885	v_0 := v.Args[0]
14886	// match: (OffPtr [off] ptr:(SP))
14887	// result: (MOVWaddr [int32(off)] ptr)
14888	for {
14889		off := auxIntToInt64(v.AuxInt)
14890		ptr := v_0
14891		if ptr.Op != OpSP {
14892			break
14893		}
14894		v.reset(OpARMMOVWaddr)
14895		v.AuxInt = int32ToAuxInt(int32(off))
14896		v.AddArg(ptr)
14897		return true
14898	}
14899	// match: (OffPtr [off] ptr)
14900	// result: (ADDconst [int32(off)] ptr)
14901	for {
14902		off := auxIntToInt64(v.AuxInt)
14903		ptr := v_0
14904		v.reset(OpARMADDconst)
14905		v.AuxInt = int32ToAuxInt(int32(off))
14906		v.AddArg(ptr)
14907		return true
14908	}
14909}
14910func rewriteValueARM_OpPanicBounds(v *Value) bool {
14911	v_2 := v.Args[2]
14912	v_1 := v.Args[1]
14913	v_0 := v.Args[0]
14914	// match: (PanicBounds [kind] x y mem)
14915	// cond: boundsABI(kind) == 0
14916	// result: (LoweredPanicBoundsA [kind] x y mem)
14917	for {
14918		kind := auxIntToInt64(v.AuxInt)
14919		x := v_0
14920		y := v_1
14921		mem := v_2
14922		if !(boundsABI(kind) == 0) {
14923			break
14924		}
14925		v.reset(OpARMLoweredPanicBoundsA)
14926		v.AuxInt = int64ToAuxInt(kind)
14927		v.AddArg3(x, y, mem)
14928		return true
14929	}
14930	// match: (PanicBounds [kind] x y mem)
14931	// cond: boundsABI(kind) == 1
14932	// result: (LoweredPanicBoundsB [kind] x y mem)
14933	for {
14934		kind := auxIntToInt64(v.AuxInt)
14935		x := v_0
14936		y := v_1
14937		mem := v_2
14938		if !(boundsABI(kind) == 1) {
14939			break
14940		}
14941		v.reset(OpARMLoweredPanicBoundsB)
14942		v.AuxInt = int64ToAuxInt(kind)
14943		v.AddArg3(x, y, mem)
14944		return true
14945	}
14946	// match: (PanicBounds [kind] x y mem)
14947	// cond: boundsABI(kind) == 2
14948	// result: (LoweredPanicBoundsC [kind] x y mem)
14949	for {
14950		kind := auxIntToInt64(v.AuxInt)
14951		x := v_0
14952		y := v_1
14953		mem := v_2
14954		if !(boundsABI(kind) == 2) {
14955			break
14956		}
14957		v.reset(OpARMLoweredPanicBoundsC)
14958		v.AuxInt = int64ToAuxInt(kind)
14959		v.AddArg3(x, y, mem)
14960		return true
14961	}
14962	return false
14963}
14964func rewriteValueARM_OpPanicExtend(v *Value) bool {
14965	v_3 := v.Args[3]
14966	v_2 := v.Args[2]
14967	v_1 := v.Args[1]
14968	v_0 := v.Args[0]
14969	// match: (PanicExtend [kind] hi lo y mem)
14970	// cond: boundsABI(kind) == 0
14971	// result: (LoweredPanicExtendA [kind] hi lo y mem)
14972	for {
14973		kind := auxIntToInt64(v.AuxInt)
14974		hi := v_0
14975		lo := v_1
14976		y := v_2
14977		mem := v_3
14978		if !(boundsABI(kind) == 0) {
14979			break
14980		}
14981		v.reset(OpARMLoweredPanicExtendA)
14982		v.AuxInt = int64ToAuxInt(kind)
14983		v.AddArg4(hi, lo, y, mem)
14984		return true
14985	}
14986	// match: (PanicExtend [kind] hi lo y mem)
14987	// cond: boundsABI(kind) == 1
14988	// result: (LoweredPanicExtendB [kind] hi lo y mem)
14989	for {
14990		kind := auxIntToInt64(v.AuxInt)
14991		hi := v_0
14992		lo := v_1
14993		y := v_2
14994		mem := v_3
14995		if !(boundsABI(kind) == 1) {
14996			break
14997		}
14998		v.reset(OpARMLoweredPanicExtendB)
14999		v.AuxInt = int64ToAuxInt(kind)
15000		v.AddArg4(hi, lo, y, mem)
15001		return true
15002	}
15003	// match: (PanicExtend [kind] hi lo y mem)
15004	// cond: boundsABI(kind) == 2
15005	// result: (LoweredPanicExtendC [kind] hi lo y mem)
15006	for {
15007		kind := auxIntToInt64(v.AuxInt)
15008		hi := v_0
15009		lo := v_1
15010		y := v_2
15011		mem := v_3
15012		if !(boundsABI(kind) == 2) {
15013			break
15014		}
15015		v.reset(OpARMLoweredPanicExtendC)
15016		v.AuxInt = int64ToAuxInt(kind)
15017		v.AddArg4(hi, lo, y, mem)
15018		return true
15019	}
15020	return false
15021}
15022func rewriteValueARM_OpRotateLeft16(v *Value) bool {
15023	v_1 := v.Args[1]
15024	v_0 := v.Args[0]
15025	b := v.Block
15026	typ := &b.Func.Config.Types
15027	// match: (RotateLeft16 <t> x (MOVWconst [c]))
15028	// result: (Or16 (Lsh16x32 <t> x (MOVWconst [c&15])) (Rsh16Ux32 <t> x (MOVWconst [-c&15])))
15029	for {
15030		t := v.Type
15031		x := v_0
15032		if v_1.Op != OpARMMOVWconst {
15033			break
15034		}
15035		c := auxIntToInt32(v_1.AuxInt)
15036		v.reset(OpOr16)
15037		v0 := b.NewValue0(v.Pos, OpLsh16x32, t)
15038		v1 := b.NewValue0(v.Pos, OpARMMOVWconst, typ.UInt32)
15039		v1.AuxInt = int32ToAuxInt(c & 15)
15040		v0.AddArg2(x, v1)
15041		v2 := b.NewValue0(v.Pos, OpRsh16Ux32, t)
15042		v3 := b.NewValue0(v.Pos, OpARMMOVWconst, typ.UInt32)
15043		v3.AuxInt = int32ToAuxInt(-c & 15)
15044		v2.AddArg2(x, v3)
15045		v.AddArg2(v0, v2)
15046		return true
15047	}
15048	return false
15049}
15050func rewriteValueARM_OpRotateLeft32(v *Value) bool {
15051	v_1 := v.Args[1]
15052	v_0 := v.Args[0]
15053	b := v.Block
15054	// match: (RotateLeft32 x y)
15055	// result: (SRR x (RSBconst [0] <y.Type> y))
15056	for {
15057		x := v_0
15058		y := v_1
15059		v.reset(OpARMSRR)
15060		v0 := b.NewValue0(v.Pos, OpARMRSBconst, y.Type)
15061		v0.AuxInt = int32ToAuxInt(0)
15062		v0.AddArg(y)
15063		v.AddArg2(x, v0)
15064		return true
15065	}
15066}
15067func rewriteValueARM_OpRotateLeft8(v *Value) bool {
15068	v_1 := v.Args[1]
15069	v_0 := v.Args[0]
15070	b := v.Block
15071	typ := &b.Func.Config.Types
15072	// match: (RotateLeft8 <t> x (MOVWconst [c]))
15073	// result: (Or8 (Lsh8x32 <t> x (MOVWconst [c&7])) (Rsh8Ux32 <t> x (MOVWconst [-c&7])))
15074	for {
15075		t := v.Type
15076		x := v_0
15077		if v_1.Op != OpARMMOVWconst {
15078			break
15079		}
15080		c := auxIntToInt32(v_1.AuxInt)
15081		v.reset(OpOr8)
15082		v0 := b.NewValue0(v.Pos, OpLsh8x32, t)
15083		v1 := b.NewValue0(v.Pos, OpARMMOVWconst, typ.UInt32)
15084		v1.AuxInt = int32ToAuxInt(c & 7)
15085		v0.AddArg2(x, v1)
15086		v2 := b.NewValue0(v.Pos, OpRsh8Ux32, t)
15087		v3 := b.NewValue0(v.Pos, OpARMMOVWconst, typ.UInt32)
15088		v3.AuxInt = int32ToAuxInt(-c & 7)
15089		v2.AddArg2(x, v3)
15090		v.AddArg2(v0, v2)
15091		return true
15092	}
15093	return false
15094}
15095func rewriteValueARM_OpRsh16Ux16(v *Value) bool {
15096	v_1 := v.Args[1]
15097	v_0 := v.Args[0]
15098	b := v.Block
15099	typ := &b.Func.Config.Types
15100	// match: (Rsh16Ux16 x y)
15101	// result: (CMOVWHSconst (SRL <x.Type> (ZeroExt16to32 x) (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0])
15102	for {
15103		x := v_0
15104		y := v_1
15105		v.reset(OpARMCMOVWHSconst)
15106		v.AuxInt = int32ToAuxInt(0)
15107		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
15108		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
15109		v1.AddArg(x)
15110		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
15111		v2.AddArg(y)
15112		v0.AddArg2(v1, v2)
15113		v3 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
15114		v3.AuxInt = int32ToAuxInt(256)
15115		v3.AddArg(v2)
15116		v.AddArg2(v0, v3)
15117		return true
15118	}
15119}
15120func rewriteValueARM_OpRsh16Ux32(v *Value) bool {
15121	v_1 := v.Args[1]
15122	v_0 := v.Args[0]
15123	b := v.Block
15124	typ := &b.Func.Config.Types
15125	// match: (Rsh16Ux32 x y)
15126	// result: (CMOVWHSconst (SRL <x.Type> (ZeroExt16to32 x) y) (CMPconst [256] y) [0])
15127	for {
15128		x := v_0
15129		y := v_1
15130		v.reset(OpARMCMOVWHSconst)
15131		v.AuxInt = int32ToAuxInt(0)
15132		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
15133		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
15134		v1.AddArg(x)
15135		v0.AddArg2(v1, y)
15136		v2 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
15137		v2.AuxInt = int32ToAuxInt(256)
15138		v2.AddArg(y)
15139		v.AddArg2(v0, v2)
15140		return true
15141	}
15142}
15143func rewriteValueARM_OpRsh16Ux64(v *Value) bool {
15144	v_1 := v.Args[1]
15145	v_0 := v.Args[0]
15146	b := v.Block
15147	typ := &b.Func.Config.Types
15148	// match: (Rsh16Ux64 x (Const64 [c]))
15149	// cond: uint64(c) < 16
15150	// result: (SRLconst (SLLconst <typ.UInt32> x [16]) [int32(c+16)])
15151	for {
15152		x := v_0
15153		if v_1.Op != OpConst64 {
15154			break
15155		}
15156		c := auxIntToInt64(v_1.AuxInt)
15157		if !(uint64(c) < 16) {
15158			break
15159		}
15160		v.reset(OpARMSRLconst)
15161		v.AuxInt = int32ToAuxInt(int32(c + 16))
15162		v0 := b.NewValue0(v.Pos, OpARMSLLconst, typ.UInt32)
15163		v0.AuxInt = int32ToAuxInt(16)
15164		v0.AddArg(x)
15165		v.AddArg(v0)
15166		return true
15167	}
15168	// match: (Rsh16Ux64 _ (Const64 [c]))
15169	// cond: uint64(c) >= 16
15170	// result: (Const16 [0])
15171	for {
15172		if v_1.Op != OpConst64 {
15173			break
15174		}
15175		c := auxIntToInt64(v_1.AuxInt)
15176		if !(uint64(c) >= 16) {
15177			break
15178		}
15179		v.reset(OpConst16)
15180		v.AuxInt = int16ToAuxInt(0)
15181		return true
15182	}
15183	return false
15184}
15185func rewriteValueARM_OpRsh16Ux8(v *Value) bool {
15186	v_1 := v.Args[1]
15187	v_0 := v.Args[0]
15188	b := v.Block
15189	typ := &b.Func.Config.Types
15190	// match: (Rsh16Ux8 x y)
15191	// result: (SRL (ZeroExt16to32 x) (ZeroExt8to32 y))
15192	for {
15193		x := v_0
15194		y := v_1
15195		v.reset(OpARMSRL)
15196		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
15197		v0.AddArg(x)
15198		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
15199		v1.AddArg(y)
15200		v.AddArg2(v0, v1)
15201		return true
15202	}
15203}
15204func rewriteValueARM_OpRsh16x16(v *Value) bool {
15205	v_1 := v.Args[1]
15206	v_0 := v.Args[0]
15207	b := v.Block
15208	typ := &b.Func.Config.Types
15209	// match: (Rsh16x16 x y)
15210	// result: (SRAcond (SignExt16to32 x) (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y)))
15211	for {
15212		x := v_0
15213		y := v_1
15214		v.reset(OpARMSRAcond)
15215		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
15216		v0.AddArg(x)
15217		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
15218		v1.AddArg(y)
15219		v2 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
15220		v2.AuxInt = int32ToAuxInt(256)
15221		v2.AddArg(v1)
15222		v.AddArg3(v0, v1, v2)
15223		return true
15224	}
15225}
15226func rewriteValueARM_OpRsh16x32(v *Value) bool {
15227	v_1 := v.Args[1]
15228	v_0 := v.Args[0]
15229	b := v.Block
15230	typ := &b.Func.Config.Types
15231	// match: (Rsh16x32 x y)
15232	// result: (SRAcond (SignExt16to32 x) y (CMPconst [256] y))
15233	for {
15234		x := v_0
15235		y := v_1
15236		v.reset(OpARMSRAcond)
15237		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
15238		v0.AddArg(x)
15239		v1 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
15240		v1.AuxInt = int32ToAuxInt(256)
15241		v1.AddArg(y)
15242		v.AddArg3(v0, y, v1)
15243		return true
15244	}
15245}
15246func rewriteValueARM_OpRsh16x64(v *Value) bool {
15247	v_1 := v.Args[1]
15248	v_0 := v.Args[0]
15249	b := v.Block
15250	typ := &b.Func.Config.Types
15251	// match: (Rsh16x64 x (Const64 [c]))
15252	// cond: uint64(c) < 16
15253	// result: (SRAconst (SLLconst <typ.UInt32> x [16]) [int32(c+16)])
15254	for {
15255		x := v_0
15256		if v_1.Op != OpConst64 {
15257			break
15258		}
15259		c := auxIntToInt64(v_1.AuxInt)
15260		if !(uint64(c) < 16) {
15261			break
15262		}
15263		v.reset(OpARMSRAconst)
15264		v.AuxInt = int32ToAuxInt(int32(c + 16))
15265		v0 := b.NewValue0(v.Pos, OpARMSLLconst, typ.UInt32)
15266		v0.AuxInt = int32ToAuxInt(16)
15267		v0.AddArg(x)
15268		v.AddArg(v0)
15269		return true
15270	}
15271	// match: (Rsh16x64 x (Const64 [c]))
15272	// cond: uint64(c) >= 16
15273	// result: (SRAconst (SLLconst <typ.UInt32> x [16]) [31])
15274	for {
15275		x := v_0
15276		if v_1.Op != OpConst64 {
15277			break
15278		}
15279		c := auxIntToInt64(v_1.AuxInt)
15280		if !(uint64(c) >= 16) {
15281			break
15282		}
15283		v.reset(OpARMSRAconst)
15284		v.AuxInt = int32ToAuxInt(31)
15285		v0 := b.NewValue0(v.Pos, OpARMSLLconst, typ.UInt32)
15286		v0.AuxInt = int32ToAuxInt(16)
15287		v0.AddArg(x)
15288		v.AddArg(v0)
15289		return true
15290	}
15291	return false
15292}
15293func rewriteValueARM_OpRsh16x8(v *Value) bool {
15294	v_1 := v.Args[1]
15295	v_0 := v.Args[0]
15296	b := v.Block
15297	typ := &b.Func.Config.Types
15298	// match: (Rsh16x8 x y)
15299	// result: (SRA (SignExt16to32 x) (ZeroExt8to32 y))
15300	for {
15301		x := v_0
15302		y := v_1
15303		v.reset(OpARMSRA)
15304		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
15305		v0.AddArg(x)
15306		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
15307		v1.AddArg(y)
15308		v.AddArg2(v0, v1)
15309		return true
15310	}
15311}
15312func rewriteValueARM_OpRsh32Ux16(v *Value) bool {
15313	v_1 := v.Args[1]
15314	v_0 := v.Args[0]
15315	b := v.Block
15316	typ := &b.Func.Config.Types
15317	// match: (Rsh32Ux16 x y)
15318	// result: (CMOVWHSconst (SRL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0])
15319	for {
15320		x := v_0
15321		y := v_1
15322		v.reset(OpARMCMOVWHSconst)
15323		v.AuxInt = int32ToAuxInt(0)
15324		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
15325		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
15326		v1.AddArg(y)
15327		v0.AddArg2(x, v1)
15328		v2 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
15329		v2.AuxInt = int32ToAuxInt(256)
15330		v2.AddArg(v1)
15331		v.AddArg2(v0, v2)
15332		return true
15333	}
15334}
15335func rewriteValueARM_OpRsh32Ux32(v *Value) bool {
15336	v_1 := v.Args[1]
15337	v_0 := v.Args[0]
15338	b := v.Block
15339	// match: (Rsh32Ux32 x y)
15340	// result: (CMOVWHSconst (SRL <x.Type> x y) (CMPconst [256] y) [0])
15341	for {
15342		x := v_0
15343		y := v_1
15344		v.reset(OpARMCMOVWHSconst)
15345		v.AuxInt = int32ToAuxInt(0)
15346		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
15347		v0.AddArg2(x, y)
15348		v1 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
15349		v1.AuxInt = int32ToAuxInt(256)
15350		v1.AddArg(y)
15351		v.AddArg2(v0, v1)
15352		return true
15353	}
15354}
15355func rewriteValueARM_OpRsh32Ux64(v *Value) bool {
15356	v_1 := v.Args[1]
15357	v_0 := v.Args[0]
15358	// match: (Rsh32Ux64 x (Const64 [c]))
15359	// cond: uint64(c) < 32
15360	// result: (SRLconst x [int32(c)])
15361	for {
15362		x := v_0
15363		if v_1.Op != OpConst64 {
15364			break
15365		}
15366		c := auxIntToInt64(v_1.AuxInt)
15367		if !(uint64(c) < 32) {
15368			break
15369		}
15370		v.reset(OpARMSRLconst)
15371		v.AuxInt = int32ToAuxInt(int32(c))
15372		v.AddArg(x)
15373		return true
15374	}
15375	// match: (Rsh32Ux64 _ (Const64 [c]))
15376	// cond: uint64(c) >= 32
15377	// result: (Const32 [0])
15378	for {
15379		if v_1.Op != OpConst64 {
15380			break
15381		}
15382		c := auxIntToInt64(v_1.AuxInt)
15383		if !(uint64(c) >= 32) {
15384			break
15385		}
15386		v.reset(OpConst32)
15387		v.AuxInt = int32ToAuxInt(0)
15388		return true
15389	}
15390	return false
15391}
15392func rewriteValueARM_OpRsh32Ux8(v *Value) bool {
15393	v_1 := v.Args[1]
15394	v_0 := v.Args[0]
15395	b := v.Block
15396	typ := &b.Func.Config.Types
15397	// match: (Rsh32Ux8 x y)
15398	// result: (SRL x (ZeroExt8to32 y))
15399	for {
15400		x := v_0
15401		y := v_1
15402		v.reset(OpARMSRL)
15403		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
15404		v0.AddArg(y)
15405		v.AddArg2(x, v0)
15406		return true
15407	}
15408}
15409func rewriteValueARM_OpRsh32x16(v *Value) bool {
15410	v_1 := v.Args[1]
15411	v_0 := v.Args[0]
15412	b := v.Block
15413	typ := &b.Func.Config.Types
15414	// match: (Rsh32x16 x y)
15415	// result: (SRAcond x (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y)))
15416	for {
15417		x := v_0
15418		y := v_1
15419		v.reset(OpARMSRAcond)
15420		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
15421		v0.AddArg(y)
15422		v1 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
15423		v1.AuxInt = int32ToAuxInt(256)
15424		v1.AddArg(v0)
15425		v.AddArg3(x, v0, v1)
15426		return true
15427	}
15428}
15429func rewriteValueARM_OpRsh32x32(v *Value) bool {
15430	v_1 := v.Args[1]
15431	v_0 := v.Args[0]
15432	b := v.Block
15433	// match: (Rsh32x32 x y)
15434	// result: (SRAcond x y (CMPconst [256] y))
15435	for {
15436		x := v_0
15437		y := v_1
15438		v.reset(OpARMSRAcond)
15439		v0 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
15440		v0.AuxInt = int32ToAuxInt(256)
15441		v0.AddArg(y)
15442		v.AddArg3(x, y, v0)
15443		return true
15444	}
15445}
15446func rewriteValueARM_OpRsh32x64(v *Value) bool {
15447	v_1 := v.Args[1]
15448	v_0 := v.Args[0]
15449	// match: (Rsh32x64 x (Const64 [c]))
15450	// cond: uint64(c) < 32
15451	// result: (SRAconst x [int32(c)])
15452	for {
15453		x := v_0
15454		if v_1.Op != OpConst64 {
15455			break
15456		}
15457		c := auxIntToInt64(v_1.AuxInt)
15458		if !(uint64(c) < 32) {
15459			break
15460		}
15461		v.reset(OpARMSRAconst)
15462		v.AuxInt = int32ToAuxInt(int32(c))
15463		v.AddArg(x)
15464		return true
15465	}
15466	// match: (Rsh32x64 x (Const64 [c]))
15467	// cond: uint64(c) >= 32
15468	// result: (SRAconst x [31])
15469	for {
15470		x := v_0
15471		if v_1.Op != OpConst64 {
15472			break
15473		}
15474		c := auxIntToInt64(v_1.AuxInt)
15475		if !(uint64(c) >= 32) {
15476			break
15477		}
15478		v.reset(OpARMSRAconst)
15479		v.AuxInt = int32ToAuxInt(31)
15480		v.AddArg(x)
15481		return true
15482	}
15483	return false
15484}
15485func rewriteValueARM_OpRsh32x8(v *Value) bool {
15486	v_1 := v.Args[1]
15487	v_0 := v.Args[0]
15488	b := v.Block
15489	typ := &b.Func.Config.Types
15490	// match: (Rsh32x8 x y)
15491	// result: (SRA x (ZeroExt8to32 y))
15492	for {
15493		x := v_0
15494		y := v_1
15495		v.reset(OpARMSRA)
15496		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
15497		v0.AddArg(y)
15498		v.AddArg2(x, v0)
15499		return true
15500	}
15501}
15502func rewriteValueARM_OpRsh8Ux16(v *Value) bool {
15503	v_1 := v.Args[1]
15504	v_0 := v.Args[0]
15505	b := v.Block
15506	typ := &b.Func.Config.Types
15507	// match: (Rsh8Ux16 x y)
15508	// result: (CMOVWHSconst (SRL <x.Type> (ZeroExt8to32 x) (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0])
15509	for {
15510		x := v_0
15511		y := v_1
15512		v.reset(OpARMCMOVWHSconst)
15513		v.AuxInt = int32ToAuxInt(0)
15514		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
15515		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
15516		v1.AddArg(x)
15517		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
15518		v2.AddArg(y)
15519		v0.AddArg2(v1, v2)
15520		v3 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
15521		v3.AuxInt = int32ToAuxInt(256)
15522		v3.AddArg(v2)
15523		v.AddArg2(v0, v3)
15524		return true
15525	}
15526}
15527func rewriteValueARM_OpRsh8Ux32(v *Value) bool {
15528	v_1 := v.Args[1]
15529	v_0 := v.Args[0]
15530	b := v.Block
15531	typ := &b.Func.Config.Types
15532	// match: (Rsh8Ux32 x y)
15533	// result: (CMOVWHSconst (SRL <x.Type> (ZeroExt8to32 x) y) (CMPconst [256] y) [0])
15534	for {
15535		x := v_0
15536		y := v_1
15537		v.reset(OpARMCMOVWHSconst)
15538		v.AuxInt = int32ToAuxInt(0)
15539		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
15540		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
15541		v1.AddArg(x)
15542		v0.AddArg2(v1, y)
15543		v2 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
15544		v2.AuxInt = int32ToAuxInt(256)
15545		v2.AddArg(y)
15546		v.AddArg2(v0, v2)
15547		return true
15548	}
15549}
15550func rewriteValueARM_OpRsh8Ux64(v *Value) bool {
15551	v_1 := v.Args[1]
15552	v_0 := v.Args[0]
15553	b := v.Block
15554	typ := &b.Func.Config.Types
15555	// match: (Rsh8Ux64 x (Const64 [c]))
15556	// cond: uint64(c) < 8
15557	// result: (SRLconst (SLLconst <typ.UInt32> x [24]) [int32(c+24)])
15558	for {
15559		x := v_0
15560		if v_1.Op != OpConst64 {
15561			break
15562		}
15563		c := auxIntToInt64(v_1.AuxInt)
15564		if !(uint64(c) < 8) {
15565			break
15566		}
15567		v.reset(OpARMSRLconst)
15568		v.AuxInt = int32ToAuxInt(int32(c + 24))
15569		v0 := b.NewValue0(v.Pos, OpARMSLLconst, typ.UInt32)
15570		v0.AuxInt = int32ToAuxInt(24)
15571		v0.AddArg(x)
15572		v.AddArg(v0)
15573		return true
15574	}
15575	// match: (Rsh8Ux64 _ (Const64 [c]))
15576	// cond: uint64(c) >= 8
15577	// result: (Const8 [0])
15578	for {
15579		if v_1.Op != OpConst64 {
15580			break
15581		}
15582		c := auxIntToInt64(v_1.AuxInt)
15583		if !(uint64(c) >= 8) {
15584			break
15585		}
15586		v.reset(OpConst8)
15587		v.AuxInt = int8ToAuxInt(0)
15588		return true
15589	}
15590	return false
15591}
15592func rewriteValueARM_OpRsh8Ux8(v *Value) bool {
15593	v_1 := v.Args[1]
15594	v_0 := v.Args[0]
15595	b := v.Block
15596	typ := &b.Func.Config.Types
15597	// match: (Rsh8Ux8 x y)
15598	// result: (SRL (ZeroExt8to32 x) (ZeroExt8to32 y))
15599	for {
15600		x := v_0
15601		y := v_1
15602		v.reset(OpARMSRL)
15603		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
15604		v0.AddArg(x)
15605		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
15606		v1.AddArg(y)
15607		v.AddArg2(v0, v1)
15608		return true
15609	}
15610}
15611func rewriteValueARM_OpRsh8x16(v *Value) bool {
15612	v_1 := v.Args[1]
15613	v_0 := v.Args[0]
15614	b := v.Block
15615	typ := &b.Func.Config.Types
15616	// match: (Rsh8x16 x y)
15617	// result: (SRAcond (SignExt8to32 x) (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y)))
15618	for {
15619		x := v_0
15620		y := v_1
15621		v.reset(OpARMSRAcond)
15622		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
15623		v0.AddArg(x)
15624		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
15625		v1.AddArg(y)
15626		v2 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
15627		v2.AuxInt = int32ToAuxInt(256)
15628		v2.AddArg(v1)
15629		v.AddArg3(v0, v1, v2)
15630		return true
15631	}
15632}
15633func rewriteValueARM_OpRsh8x32(v *Value) bool {
15634	v_1 := v.Args[1]
15635	v_0 := v.Args[0]
15636	b := v.Block
15637	typ := &b.Func.Config.Types
15638	// match: (Rsh8x32 x y)
15639	// result: (SRAcond (SignExt8to32 x) y (CMPconst [256] y))
15640	for {
15641		x := v_0
15642		y := v_1
15643		v.reset(OpARMSRAcond)
15644		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
15645		v0.AddArg(x)
15646		v1 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
15647		v1.AuxInt = int32ToAuxInt(256)
15648		v1.AddArg(y)
15649		v.AddArg3(v0, y, v1)
15650		return true
15651	}
15652}
15653func rewriteValueARM_OpRsh8x64(v *Value) bool {
15654	v_1 := v.Args[1]
15655	v_0 := v.Args[0]
15656	b := v.Block
15657	typ := &b.Func.Config.Types
15658	// match: (Rsh8x64 x (Const64 [c]))
15659	// cond: uint64(c) < 8
15660	// result: (SRAconst (SLLconst <typ.UInt32> x [24]) [int32(c+24)])
15661	for {
15662		x := v_0
15663		if v_1.Op != OpConst64 {
15664			break
15665		}
15666		c := auxIntToInt64(v_1.AuxInt)
15667		if !(uint64(c) < 8) {
15668			break
15669		}
15670		v.reset(OpARMSRAconst)
15671		v.AuxInt = int32ToAuxInt(int32(c + 24))
15672		v0 := b.NewValue0(v.Pos, OpARMSLLconst, typ.UInt32)
15673		v0.AuxInt = int32ToAuxInt(24)
15674		v0.AddArg(x)
15675		v.AddArg(v0)
15676		return true
15677	}
15678	// match: (Rsh8x64 x (Const64 [c]))
15679	// cond: uint64(c) >= 8
15680	// result: (SRAconst (SLLconst <typ.UInt32> x [24]) [31])
15681	for {
15682		x := v_0
15683		if v_1.Op != OpConst64 {
15684			break
15685		}
15686		c := auxIntToInt64(v_1.AuxInt)
15687		if !(uint64(c) >= 8) {
15688			break
15689		}
15690		v.reset(OpARMSRAconst)
15691		v.AuxInt = int32ToAuxInt(31)
15692		v0 := b.NewValue0(v.Pos, OpARMSLLconst, typ.UInt32)
15693		v0.AuxInt = int32ToAuxInt(24)
15694		v0.AddArg(x)
15695		v.AddArg(v0)
15696		return true
15697	}
15698	return false
15699}
15700func rewriteValueARM_OpRsh8x8(v *Value) bool {
15701	v_1 := v.Args[1]
15702	v_0 := v.Args[0]
15703	b := v.Block
15704	typ := &b.Func.Config.Types
15705	// match: (Rsh8x8 x y)
15706	// result: (SRA (SignExt8to32 x) (ZeroExt8to32 y))
15707	for {
15708		x := v_0
15709		y := v_1
15710		v.reset(OpARMSRA)
15711		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
15712		v0.AddArg(x)
15713		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
15714		v1.AddArg(y)
15715		v.AddArg2(v0, v1)
15716		return true
15717	}
15718}
15719func rewriteValueARM_OpSelect0(v *Value) bool {
15720	v_0 := v.Args[0]
15721	// match: (Select0 (CALLudiv x (MOVWconst [1])))
15722	// result: x
15723	for {
15724		if v_0.Op != OpARMCALLudiv {
15725			break
15726		}
15727		_ = v_0.Args[1]
15728		x := v_0.Args[0]
15729		v_0_1 := v_0.Args[1]
15730		if v_0_1.Op != OpARMMOVWconst || auxIntToInt32(v_0_1.AuxInt) != 1 {
15731			break
15732		}
15733		v.copyOf(x)
15734		return true
15735	}
15736	// match: (Select0 (CALLudiv x (MOVWconst [c])))
15737	// cond: isPowerOfTwo32(c)
15738	// result: (SRLconst [int32(log32(c))] x)
15739	for {
15740		if v_0.Op != OpARMCALLudiv {
15741			break
15742		}
15743		_ = v_0.Args[1]
15744		x := v_0.Args[0]
15745		v_0_1 := v_0.Args[1]
15746		if v_0_1.Op != OpARMMOVWconst {
15747			break
15748		}
15749		c := auxIntToInt32(v_0_1.AuxInt)
15750		if !(isPowerOfTwo32(c)) {
15751			break
15752		}
15753		v.reset(OpARMSRLconst)
15754		v.AuxInt = int32ToAuxInt(int32(log32(c)))
15755		v.AddArg(x)
15756		return true
15757	}
15758	// match: (Select0 (CALLudiv (MOVWconst [c]) (MOVWconst [d])))
15759	// cond: d != 0
15760	// result: (MOVWconst [int32(uint32(c)/uint32(d))])
15761	for {
15762		if v_0.Op != OpARMCALLudiv {
15763			break
15764		}
15765		_ = v_0.Args[1]
15766		v_0_0 := v_0.Args[0]
15767		if v_0_0.Op != OpARMMOVWconst {
15768			break
15769		}
15770		c := auxIntToInt32(v_0_0.AuxInt)
15771		v_0_1 := v_0.Args[1]
15772		if v_0_1.Op != OpARMMOVWconst {
15773			break
15774		}
15775		d := auxIntToInt32(v_0_1.AuxInt)
15776		if !(d != 0) {
15777			break
15778		}
15779		v.reset(OpARMMOVWconst)
15780		v.AuxInt = int32ToAuxInt(int32(uint32(c) / uint32(d)))
15781		return true
15782	}
15783	return false
15784}
15785func rewriteValueARM_OpSelect1(v *Value) bool {
15786	v_0 := v.Args[0]
15787	// match: (Select1 (CALLudiv _ (MOVWconst [1])))
15788	// result: (MOVWconst [0])
15789	for {
15790		if v_0.Op != OpARMCALLudiv {
15791			break
15792		}
15793		_ = v_0.Args[1]
15794		v_0_1 := v_0.Args[1]
15795		if v_0_1.Op != OpARMMOVWconst || auxIntToInt32(v_0_1.AuxInt) != 1 {
15796			break
15797		}
15798		v.reset(OpARMMOVWconst)
15799		v.AuxInt = int32ToAuxInt(0)
15800		return true
15801	}
15802	// match: (Select1 (CALLudiv x (MOVWconst [c])))
15803	// cond: isPowerOfTwo32(c)
15804	// result: (ANDconst [c-1] x)
15805	for {
15806		if v_0.Op != OpARMCALLudiv {
15807			break
15808		}
15809		_ = v_0.Args[1]
15810		x := v_0.Args[0]
15811		v_0_1 := v_0.Args[1]
15812		if v_0_1.Op != OpARMMOVWconst {
15813			break
15814		}
15815		c := auxIntToInt32(v_0_1.AuxInt)
15816		if !(isPowerOfTwo32(c)) {
15817			break
15818		}
15819		v.reset(OpARMANDconst)
15820		v.AuxInt = int32ToAuxInt(c - 1)
15821		v.AddArg(x)
15822		return true
15823	}
15824	// match: (Select1 (CALLudiv (MOVWconst [c]) (MOVWconst [d])))
15825	// cond: d != 0
15826	// result: (MOVWconst [int32(uint32(c)%uint32(d))])
15827	for {
15828		if v_0.Op != OpARMCALLudiv {
15829			break
15830		}
15831		_ = v_0.Args[1]
15832		v_0_0 := v_0.Args[0]
15833		if v_0_0.Op != OpARMMOVWconst {
15834			break
15835		}
15836		c := auxIntToInt32(v_0_0.AuxInt)
15837		v_0_1 := v_0.Args[1]
15838		if v_0_1.Op != OpARMMOVWconst {
15839			break
15840		}
15841		d := auxIntToInt32(v_0_1.AuxInt)
15842		if !(d != 0) {
15843			break
15844		}
15845		v.reset(OpARMMOVWconst)
15846		v.AuxInt = int32ToAuxInt(int32(uint32(c) % uint32(d)))
15847		return true
15848	}
15849	return false
15850}
15851func rewriteValueARM_OpSignmask(v *Value) bool {
15852	v_0 := v.Args[0]
15853	// match: (Signmask x)
15854	// result: (SRAconst x [31])
15855	for {
15856		x := v_0
15857		v.reset(OpARMSRAconst)
15858		v.AuxInt = int32ToAuxInt(31)
15859		v.AddArg(x)
15860		return true
15861	}
15862}
15863func rewriteValueARM_OpSlicemask(v *Value) bool {
15864	v_0 := v.Args[0]
15865	b := v.Block
15866	// match: (Slicemask <t> x)
15867	// result: (SRAconst (RSBconst <t> [0] x) [31])
15868	for {
15869		t := v.Type
15870		x := v_0
15871		v.reset(OpARMSRAconst)
15872		v.AuxInt = int32ToAuxInt(31)
15873		v0 := b.NewValue0(v.Pos, OpARMRSBconst, t)
15874		v0.AuxInt = int32ToAuxInt(0)
15875		v0.AddArg(x)
15876		v.AddArg(v0)
15877		return true
15878	}
15879}
15880func rewriteValueARM_OpStore(v *Value) bool {
15881	v_2 := v.Args[2]
15882	v_1 := v.Args[1]
15883	v_0 := v.Args[0]
15884	// match: (Store {t} ptr val mem)
15885	// cond: t.Size() == 1
15886	// result: (MOVBstore ptr val mem)
15887	for {
15888		t := auxToType(v.Aux)
15889		ptr := v_0
15890		val := v_1
15891		mem := v_2
15892		if !(t.Size() == 1) {
15893			break
15894		}
15895		v.reset(OpARMMOVBstore)
15896		v.AddArg3(ptr, val, mem)
15897		return true
15898	}
15899	// match: (Store {t} ptr val mem)
15900	// cond: t.Size() == 2
15901	// result: (MOVHstore ptr val mem)
15902	for {
15903		t := auxToType(v.Aux)
15904		ptr := v_0
15905		val := v_1
15906		mem := v_2
15907		if !(t.Size() == 2) {
15908			break
15909		}
15910		v.reset(OpARMMOVHstore)
15911		v.AddArg3(ptr, val, mem)
15912		return true
15913	}
15914	// match: (Store {t} ptr val mem)
15915	// cond: t.Size() == 4 && !t.IsFloat()
15916	// result: (MOVWstore ptr val mem)
15917	for {
15918		t := auxToType(v.Aux)
15919		ptr := v_0
15920		val := v_1
15921		mem := v_2
15922		if !(t.Size() == 4 && !t.IsFloat()) {
15923			break
15924		}
15925		v.reset(OpARMMOVWstore)
15926		v.AddArg3(ptr, val, mem)
15927		return true
15928	}
15929	// match: (Store {t} ptr val mem)
15930	// cond: t.Size() == 4 && t.IsFloat()
15931	// result: (MOVFstore ptr val mem)
15932	for {
15933		t := auxToType(v.Aux)
15934		ptr := v_0
15935		val := v_1
15936		mem := v_2
15937		if !(t.Size() == 4 && t.IsFloat()) {
15938			break
15939		}
15940		v.reset(OpARMMOVFstore)
15941		v.AddArg3(ptr, val, mem)
15942		return true
15943	}
15944	// match: (Store {t} ptr val mem)
15945	// cond: t.Size() == 8 && t.IsFloat()
15946	// result: (MOVDstore ptr val mem)
15947	for {
15948		t := auxToType(v.Aux)
15949		ptr := v_0
15950		val := v_1
15951		mem := v_2
15952		if !(t.Size() == 8 && t.IsFloat()) {
15953			break
15954		}
15955		v.reset(OpARMMOVDstore)
15956		v.AddArg3(ptr, val, mem)
15957		return true
15958	}
15959	return false
15960}
15961func rewriteValueARM_OpZero(v *Value) bool {
15962	v_1 := v.Args[1]
15963	v_0 := v.Args[0]
15964	b := v.Block
15965	config := b.Func.Config
15966	typ := &b.Func.Config.Types
15967	// match: (Zero [0] _ mem)
15968	// result: mem
15969	for {
15970		if auxIntToInt64(v.AuxInt) != 0 {
15971			break
15972		}
15973		mem := v_1
15974		v.copyOf(mem)
15975		return true
15976	}
15977	// match: (Zero [1] ptr mem)
15978	// result: (MOVBstore ptr (MOVWconst [0]) mem)
15979	for {
15980		if auxIntToInt64(v.AuxInt) != 1 {
15981			break
15982		}
15983		ptr := v_0
15984		mem := v_1
15985		v.reset(OpARMMOVBstore)
15986		v0 := b.NewValue0(v.Pos, OpARMMOVWconst, typ.UInt32)
15987		v0.AuxInt = int32ToAuxInt(0)
15988		v.AddArg3(ptr, v0, mem)
15989		return true
15990	}
15991	// match: (Zero [2] {t} ptr mem)
15992	// cond: t.Alignment()%2 == 0
15993	// result: (MOVHstore ptr (MOVWconst [0]) mem)
15994	for {
15995		if auxIntToInt64(v.AuxInt) != 2 {
15996			break
15997		}
15998		t := auxToType(v.Aux)
15999		ptr := v_0
16000		mem := v_1
16001		if !(t.Alignment()%2 == 0) {
16002			break
16003		}
16004		v.reset(OpARMMOVHstore)
16005		v0 := b.NewValue0(v.Pos, OpARMMOVWconst, typ.UInt32)
16006		v0.AuxInt = int32ToAuxInt(0)
16007		v.AddArg3(ptr, v0, mem)
16008		return true
16009	}
16010	// match: (Zero [2] ptr mem)
16011	// result: (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem))
16012	for {
16013		if auxIntToInt64(v.AuxInt) != 2 {
16014			break
16015		}
16016		ptr := v_0
16017		mem := v_1
16018		v.reset(OpARMMOVBstore)
16019		v.AuxInt = int32ToAuxInt(1)
16020		v0 := b.NewValue0(v.Pos, OpARMMOVWconst, typ.UInt32)
16021		v0.AuxInt = int32ToAuxInt(0)
16022		v1 := b.NewValue0(v.Pos, OpARMMOVBstore, types.TypeMem)
16023		v1.AuxInt = int32ToAuxInt(0)
16024		v1.AddArg3(ptr, v0, mem)
16025		v.AddArg3(ptr, v0, v1)
16026		return true
16027	}
16028	// match: (Zero [4] {t} ptr mem)
16029	// cond: t.Alignment()%4 == 0
16030	// result: (MOVWstore ptr (MOVWconst [0]) mem)
16031	for {
16032		if auxIntToInt64(v.AuxInt) != 4 {
16033			break
16034		}
16035		t := auxToType(v.Aux)
16036		ptr := v_0
16037		mem := v_1
16038		if !(t.Alignment()%4 == 0) {
16039			break
16040		}
16041		v.reset(OpARMMOVWstore)
16042		v0 := b.NewValue0(v.Pos, OpARMMOVWconst, typ.UInt32)
16043		v0.AuxInt = int32ToAuxInt(0)
16044		v.AddArg3(ptr, v0, mem)
16045		return true
16046	}
16047	// match: (Zero [4] {t} ptr mem)
16048	// cond: t.Alignment()%2 == 0
16049	// result: (MOVHstore [2] ptr (MOVWconst [0]) (MOVHstore [0] ptr (MOVWconst [0]) mem))
16050	for {
16051		if auxIntToInt64(v.AuxInt) != 4 {
16052			break
16053		}
16054		t := auxToType(v.Aux)
16055		ptr := v_0
16056		mem := v_1
16057		if !(t.Alignment()%2 == 0) {
16058			break
16059		}
16060		v.reset(OpARMMOVHstore)
16061		v.AuxInt = int32ToAuxInt(2)
16062		v0 := b.NewValue0(v.Pos, OpARMMOVWconst, typ.UInt32)
16063		v0.AuxInt = int32ToAuxInt(0)
16064		v1 := b.NewValue0(v.Pos, OpARMMOVHstore, types.TypeMem)
16065		v1.AuxInt = int32ToAuxInt(0)
16066		v1.AddArg3(ptr, v0, mem)
16067		v.AddArg3(ptr, v0, v1)
16068		return true
16069	}
16070	// match: (Zero [4] ptr mem)
16071	// result: (MOVBstore [3] ptr (MOVWconst [0]) (MOVBstore [2] ptr (MOVWconst [0]) (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem))))
16072	for {
16073		if auxIntToInt64(v.AuxInt) != 4 {
16074			break
16075		}
16076		ptr := v_0
16077		mem := v_1
16078		v.reset(OpARMMOVBstore)
16079		v.AuxInt = int32ToAuxInt(3)
16080		v0 := b.NewValue0(v.Pos, OpARMMOVWconst, typ.UInt32)
16081		v0.AuxInt = int32ToAuxInt(0)
16082		v1 := b.NewValue0(v.Pos, OpARMMOVBstore, types.TypeMem)
16083		v1.AuxInt = int32ToAuxInt(2)
16084		v2 := b.NewValue0(v.Pos, OpARMMOVBstore, types.TypeMem)
16085		v2.AuxInt = int32ToAuxInt(1)
16086		v3 := b.NewValue0(v.Pos, OpARMMOVBstore, types.TypeMem)
16087		v3.AuxInt = int32ToAuxInt(0)
16088		v3.AddArg3(ptr, v0, mem)
16089		v2.AddArg3(ptr, v0, v3)
16090		v1.AddArg3(ptr, v0, v2)
16091		v.AddArg3(ptr, v0, v1)
16092		return true
16093	}
16094	// match: (Zero [3] ptr mem)
16095	// result: (MOVBstore [2] ptr (MOVWconst [0]) (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem)))
16096	for {
16097		if auxIntToInt64(v.AuxInt) != 3 {
16098			break
16099		}
16100		ptr := v_0
16101		mem := v_1
16102		v.reset(OpARMMOVBstore)
16103		v.AuxInt = int32ToAuxInt(2)
16104		v0 := b.NewValue0(v.Pos, OpARMMOVWconst, typ.UInt32)
16105		v0.AuxInt = int32ToAuxInt(0)
16106		v1 := b.NewValue0(v.Pos, OpARMMOVBstore, types.TypeMem)
16107		v1.AuxInt = int32ToAuxInt(1)
16108		v2 := b.NewValue0(v.Pos, OpARMMOVBstore, types.TypeMem)
16109		v2.AuxInt = int32ToAuxInt(0)
16110		v2.AddArg3(ptr, v0, mem)
16111		v1.AddArg3(ptr, v0, v2)
16112		v.AddArg3(ptr, v0, v1)
16113		return true
16114	}
16115	// match: (Zero [s] {t} ptr mem)
16116	// cond: s%4 == 0 && s > 4 && s <= 512 && t.Alignment()%4 == 0 && !config.noDuffDevice
16117	// result: (DUFFZERO [4 * (128 - s/4)] ptr (MOVWconst [0]) mem)
16118	for {
16119		s := auxIntToInt64(v.AuxInt)
16120		t := auxToType(v.Aux)
16121		ptr := v_0
16122		mem := v_1
16123		if !(s%4 == 0 && s > 4 && s <= 512 && t.Alignment()%4 == 0 && !config.noDuffDevice) {
16124			break
16125		}
16126		v.reset(OpARMDUFFZERO)
16127		v.AuxInt = int64ToAuxInt(4 * (128 - s/4))
16128		v0 := b.NewValue0(v.Pos, OpARMMOVWconst, typ.UInt32)
16129		v0.AuxInt = int32ToAuxInt(0)
16130		v.AddArg3(ptr, v0, mem)
16131		return true
16132	}
16133	// match: (Zero [s] {t} ptr mem)
16134	// cond: (s > 512 || config.noDuffDevice) || t.Alignment()%4 != 0
16135	// result: (LoweredZero [t.Alignment()] ptr (ADDconst <ptr.Type> ptr [int32(s-moveSize(t.Alignment(), config))]) (MOVWconst [0]) mem)
16136	for {
16137		s := auxIntToInt64(v.AuxInt)
16138		t := auxToType(v.Aux)
16139		ptr := v_0
16140		mem := v_1
16141		if !((s > 512 || config.noDuffDevice) || t.Alignment()%4 != 0) {
16142			break
16143		}
16144		v.reset(OpARMLoweredZero)
16145		v.AuxInt = int64ToAuxInt(t.Alignment())
16146		v0 := b.NewValue0(v.Pos, OpARMADDconst, ptr.Type)
16147		v0.AuxInt = int32ToAuxInt(int32(s - moveSize(t.Alignment(), config)))
16148		v0.AddArg(ptr)
16149		v1 := b.NewValue0(v.Pos, OpARMMOVWconst, typ.UInt32)
16150		v1.AuxInt = int32ToAuxInt(0)
16151		v.AddArg4(ptr, v0, v1, mem)
16152		return true
16153	}
16154	return false
16155}
16156func rewriteValueARM_OpZeromask(v *Value) bool {
16157	v_0 := v.Args[0]
16158	b := v.Block
16159	typ := &b.Func.Config.Types
16160	// match: (Zeromask x)
16161	// result: (SRAconst (RSBshiftRL <typ.Int32> x x [1]) [31])
16162	for {
16163		x := v_0
16164		v.reset(OpARMSRAconst)
16165		v.AuxInt = int32ToAuxInt(31)
16166		v0 := b.NewValue0(v.Pos, OpARMRSBshiftRL, typ.Int32)
16167		v0.AuxInt = int32ToAuxInt(1)
16168		v0.AddArg2(x, x)
16169		v.AddArg(v0)
16170		return true
16171	}
16172}
16173func rewriteBlockARM(b *Block) bool {
16174	switch b.Kind {
16175	case BlockARMEQ:
16176		// match: (EQ (FlagConstant [fc]) yes no)
16177		// cond: fc.eq()
16178		// result: (First yes no)
16179		for b.Controls[0].Op == OpARMFlagConstant {
16180			v_0 := b.Controls[0]
16181			fc := auxIntToFlagConstant(v_0.AuxInt)
16182			if !(fc.eq()) {
16183				break
16184			}
16185			b.Reset(BlockFirst)
16186			return true
16187		}
16188		// match: (EQ (FlagConstant [fc]) yes no)
16189		// cond: !fc.eq()
16190		// result: (First no yes)
16191		for b.Controls[0].Op == OpARMFlagConstant {
16192			v_0 := b.Controls[0]
16193			fc := auxIntToFlagConstant(v_0.AuxInt)
16194			if !(!fc.eq()) {
16195				break
16196			}
16197			b.Reset(BlockFirst)
16198			b.swapSuccessors()
16199			return true
16200		}
16201		// match: (EQ (InvertFlags cmp) yes no)
16202		// result: (EQ cmp yes no)
16203		for b.Controls[0].Op == OpARMInvertFlags {
16204			v_0 := b.Controls[0]
16205			cmp := v_0.Args[0]
16206			b.resetWithControl(BlockARMEQ, cmp)
16207			return true
16208		}
16209		// match: (EQ (CMP x (RSBconst [0] y)))
16210		// result: (EQ (CMN x y))
16211		for b.Controls[0].Op == OpARMCMP {
16212			v_0 := b.Controls[0]
16213			_ = v_0.Args[1]
16214			x := v_0.Args[0]
16215			v_0_1 := v_0.Args[1]
16216			if v_0_1.Op != OpARMRSBconst || auxIntToInt32(v_0_1.AuxInt) != 0 {
16217				break
16218			}
16219			y := v_0_1.Args[0]
16220			v0 := b.NewValue0(v_0.Pos, OpARMCMN, types.TypeFlags)
16221			v0.AddArg2(x, y)
16222			b.resetWithControl(BlockARMEQ, v0)
16223			return true
16224		}
16225		// match: (EQ (CMN x (RSBconst [0] y)))
16226		// result: (EQ (CMP x y))
16227		for b.Controls[0].Op == OpARMCMN {
16228			v_0 := b.Controls[0]
16229			_ = v_0.Args[1]
16230			v_0_0 := v_0.Args[0]
16231			v_0_1 := v_0.Args[1]
16232			for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
16233				x := v_0_0
16234				if v_0_1.Op != OpARMRSBconst || auxIntToInt32(v_0_1.AuxInt) != 0 {
16235					continue
16236				}
16237				y := v_0_1.Args[0]
16238				v0 := b.NewValue0(v_0.Pos, OpARMCMP, types.TypeFlags)
16239				v0.AddArg2(x, y)
16240				b.resetWithControl(BlockARMEQ, v0)
16241				return true
16242			}
16243			break
16244		}
16245		// match: (EQ (CMPconst [0] l:(SUB x y)) yes no)
16246		// cond: l.Uses==1
16247		// result: (EQ (CMP x y) yes no)
16248		for b.Controls[0].Op == OpARMCMPconst {
16249			v_0 := b.Controls[0]
16250			if auxIntToInt32(v_0.AuxInt) != 0 {
16251				break
16252			}
16253			l := v_0.Args[0]
16254			if l.Op != OpARMSUB {
16255				break
16256			}
16257			y := l.Args[1]
16258			x := l.Args[0]
16259			if !(l.Uses == 1) {
16260				break
16261			}
16262			v0 := b.NewValue0(v_0.Pos, OpARMCMP, types.TypeFlags)
16263			v0.AddArg2(x, y)
16264			b.resetWithControl(BlockARMEQ, v0)
16265			return true
16266		}
16267		// match: (EQ (CMPconst [0] l:(MULS x y a)) yes no)
16268		// cond: l.Uses==1
16269		// result: (EQ (CMP a (MUL <x.Type> x y)) yes no)
16270		for b.Controls[0].Op == OpARMCMPconst {
16271			v_0 := b.Controls[0]
16272			if auxIntToInt32(v_0.AuxInt) != 0 {
16273				break
16274			}
16275			l := v_0.Args[0]
16276			if l.Op != OpARMMULS {
16277				break
16278			}
16279			a := l.Args[2]
16280			x := l.Args[0]
16281			y := l.Args[1]
16282			if !(l.Uses == 1) {
16283				break
16284			}
16285			v0 := b.NewValue0(v_0.Pos, OpARMCMP, types.TypeFlags)
16286			v1 := b.NewValue0(v_0.Pos, OpARMMUL, x.Type)
16287			v1.AddArg2(x, y)
16288			v0.AddArg2(a, v1)
16289			b.resetWithControl(BlockARMEQ, v0)
16290			return true
16291		}
16292		// match: (EQ (CMPconst [0] l:(SUBconst [c] x)) yes no)
16293		// cond: l.Uses==1
16294		// result: (EQ (CMPconst [c] x) yes no)
16295		for b.Controls[0].Op == OpARMCMPconst {
16296			v_0 := b.Controls[0]
16297			if auxIntToInt32(v_0.AuxInt) != 0 {
16298				break
16299			}
16300			l := v_0.Args[0]
16301			if l.Op != OpARMSUBconst {
16302				break
16303			}
16304			c := auxIntToInt32(l.AuxInt)
16305			x := l.Args[0]
16306			if !(l.Uses == 1) {
16307				break
16308			}
16309			v0 := b.NewValue0(v_0.Pos, OpARMCMPconst, types.TypeFlags)
16310			v0.AuxInt = int32ToAuxInt(c)
16311			v0.AddArg(x)
16312			b.resetWithControl(BlockARMEQ, v0)
16313			return true
16314		}
16315		// match: (EQ (CMPconst [0] l:(SUBshiftLL x y [c])) yes no)
16316		// cond: l.Uses==1
16317		// result: (EQ (CMPshiftLL x y [c]) yes no)
16318		for b.Controls[0].Op == OpARMCMPconst {
16319			v_0 := b.Controls[0]
16320			if auxIntToInt32(v_0.AuxInt) != 0 {
16321				break
16322			}
16323			l := v_0.Args[0]
16324			if l.Op != OpARMSUBshiftLL {
16325				break
16326			}
16327			c := auxIntToInt32(l.AuxInt)
16328			y := l.Args[1]
16329			x := l.Args[0]
16330			if !(l.Uses == 1) {
16331				break
16332			}
16333			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftLL, types.TypeFlags)
16334			v0.AuxInt = int32ToAuxInt(c)
16335			v0.AddArg2(x, y)
16336			b.resetWithControl(BlockARMEQ, v0)
16337			return true
16338		}
16339		// match: (EQ (CMPconst [0] l:(SUBshiftRL x y [c])) yes no)
16340		// cond: l.Uses==1
16341		// result: (EQ (CMPshiftRL x y [c]) yes no)
16342		for b.Controls[0].Op == OpARMCMPconst {
16343			v_0 := b.Controls[0]
16344			if auxIntToInt32(v_0.AuxInt) != 0 {
16345				break
16346			}
16347			l := v_0.Args[0]
16348			if l.Op != OpARMSUBshiftRL {
16349				break
16350			}
16351			c := auxIntToInt32(l.AuxInt)
16352			y := l.Args[1]
16353			x := l.Args[0]
16354			if !(l.Uses == 1) {
16355				break
16356			}
16357			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRL, types.TypeFlags)
16358			v0.AuxInt = int32ToAuxInt(c)
16359			v0.AddArg2(x, y)
16360			b.resetWithControl(BlockARMEQ, v0)
16361			return true
16362		}
16363		// match: (EQ (CMPconst [0] l:(SUBshiftRA x y [c])) yes no)
16364		// cond: l.Uses==1
16365		// result: (EQ (CMPshiftRA x y [c]) yes no)
16366		for b.Controls[0].Op == OpARMCMPconst {
16367			v_0 := b.Controls[0]
16368			if auxIntToInt32(v_0.AuxInt) != 0 {
16369				break
16370			}
16371			l := v_0.Args[0]
16372			if l.Op != OpARMSUBshiftRA {
16373				break
16374			}
16375			c := auxIntToInt32(l.AuxInt)
16376			y := l.Args[1]
16377			x := l.Args[0]
16378			if !(l.Uses == 1) {
16379				break
16380			}
16381			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRA, types.TypeFlags)
16382			v0.AuxInt = int32ToAuxInt(c)
16383			v0.AddArg2(x, y)
16384			b.resetWithControl(BlockARMEQ, v0)
16385			return true
16386		}
16387		// match: (EQ (CMPconst [0] l:(SUBshiftLLreg x y z)) yes no)
16388		// cond: l.Uses==1
16389		// result: (EQ (CMPshiftLLreg x y z) yes no)
16390		for b.Controls[0].Op == OpARMCMPconst {
16391			v_0 := b.Controls[0]
16392			if auxIntToInt32(v_0.AuxInt) != 0 {
16393				break
16394			}
16395			l := v_0.Args[0]
16396			if l.Op != OpARMSUBshiftLLreg {
16397				break
16398			}
16399			z := l.Args[2]
16400			x := l.Args[0]
16401			y := l.Args[1]
16402			if !(l.Uses == 1) {
16403				break
16404			}
16405			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftLLreg, types.TypeFlags)
16406			v0.AddArg3(x, y, z)
16407			b.resetWithControl(BlockARMEQ, v0)
16408			return true
16409		}
16410		// match: (EQ (CMPconst [0] l:(SUBshiftRLreg x y z)) yes no)
16411		// cond: l.Uses==1
16412		// result: (EQ (CMPshiftRLreg x y z) yes no)
16413		for b.Controls[0].Op == OpARMCMPconst {
16414			v_0 := b.Controls[0]
16415			if auxIntToInt32(v_0.AuxInt) != 0 {
16416				break
16417			}
16418			l := v_0.Args[0]
16419			if l.Op != OpARMSUBshiftRLreg {
16420				break
16421			}
16422			z := l.Args[2]
16423			x := l.Args[0]
16424			y := l.Args[1]
16425			if !(l.Uses == 1) {
16426				break
16427			}
16428			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRLreg, types.TypeFlags)
16429			v0.AddArg3(x, y, z)
16430			b.resetWithControl(BlockARMEQ, v0)
16431			return true
16432		}
16433		// match: (EQ (CMPconst [0] l:(SUBshiftRAreg x y z)) yes no)
16434		// cond: l.Uses==1
16435		// result: (EQ (CMPshiftRAreg x y z) yes no)
16436		for b.Controls[0].Op == OpARMCMPconst {
16437			v_0 := b.Controls[0]
16438			if auxIntToInt32(v_0.AuxInt) != 0 {
16439				break
16440			}
16441			l := v_0.Args[0]
16442			if l.Op != OpARMSUBshiftRAreg {
16443				break
16444			}
16445			z := l.Args[2]
16446			x := l.Args[0]
16447			y := l.Args[1]
16448			if !(l.Uses == 1) {
16449				break
16450			}
16451			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRAreg, types.TypeFlags)
16452			v0.AddArg3(x, y, z)
16453			b.resetWithControl(BlockARMEQ, v0)
16454			return true
16455		}
16456		// match: (EQ (CMPconst [0] l:(ADD x y)) yes no)
16457		// cond: l.Uses==1
16458		// result: (EQ (CMN x y) yes no)
16459		for b.Controls[0].Op == OpARMCMPconst {
16460			v_0 := b.Controls[0]
16461			if auxIntToInt32(v_0.AuxInt) != 0 {
16462				break
16463			}
16464			l := v_0.Args[0]
16465			if l.Op != OpARMADD {
16466				break
16467			}
16468			_ = l.Args[1]
16469			l_0 := l.Args[0]
16470			l_1 := l.Args[1]
16471			for _i0 := 0; _i0 <= 1; _i0, l_0, l_1 = _i0+1, l_1, l_0 {
16472				x := l_0
16473				y := l_1
16474				if !(l.Uses == 1) {
16475					continue
16476				}
16477				v0 := b.NewValue0(v_0.Pos, OpARMCMN, types.TypeFlags)
16478				v0.AddArg2(x, y)
16479				b.resetWithControl(BlockARMEQ, v0)
16480				return true
16481			}
16482			break
16483		}
16484		// match: (EQ (CMPconst [0] l:(MULA x y a)) yes no)
16485		// cond: l.Uses==1
16486		// result: (EQ (CMN a (MUL <x.Type> x y)) yes no)
16487		for b.Controls[0].Op == OpARMCMPconst {
16488			v_0 := b.Controls[0]
16489			if auxIntToInt32(v_0.AuxInt) != 0 {
16490				break
16491			}
16492			l := v_0.Args[0]
16493			if l.Op != OpARMMULA {
16494				break
16495			}
16496			a := l.Args[2]
16497			x := l.Args[0]
16498			y := l.Args[1]
16499			if !(l.Uses == 1) {
16500				break
16501			}
16502			v0 := b.NewValue0(v_0.Pos, OpARMCMN, types.TypeFlags)
16503			v1 := b.NewValue0(v_0.Pos, OpARMMUL, x.Type)
16504			v1.AddArg2(x, y)
16505			v0.AddArg2(a, v1)
16506			b.resetWithControl(BlockARMEQ, v0)
16507			return true
16508		}
16509		// match: (EQ (CMPconst [0] l:(ADDconst [c] x)) yes no)
16510		// cond: l.Uses==1
16511		// result: (EQ (CMNconst [c] x) yes no)
16512		for b.Controls[0].Op == OpARMCMPconst {
16513			v_0 := b.Controls[0]
16514			if auxIntToInt32(v_0.AuxInt) != 0 {
16515				break
16516			}
16517			l := v_0.Args[0]
16518			if l.Op != OpARMADDconst {
16519				break
16520			}
16521			c := auxIntToInt32(l.AuxInt)
16522			x := l.Args[0]
16523			if !(l.Uses == 1) {
16524				break
16525			}
16526			v0 := b.NewValue0(v_0.Pos, OpARMCMNconst, types.TypeFlags)
16527			v0.AuxInt = int32ToAuxInt(c)
16528			v0.AddArg(x)
16529			b.resetWithControl(BlockARMEQ, v0)
16530			return true
16531		}
16532		// match: (EQ (CMPconst [0] l:(ADDshiftLL x y [c])) yes no)
16533		// cond: l.Uses==1
16534		// result: (EQ (CMNshiftLL x y [c]) yes no)
16535		for b.Controls[0].Op == OpARMCMPconst {
16536			v_0 := b.Controls[0]
16537			if auxIntToInt32(v_0.AuxInt) != 0 {
16538				break
16539			}
16540			l := v_0.Args[0]
16541			if l.Op != OpARMADDshiftLL {
16542				break
16543			}
16544			c := auxIntToInt32(l.AuxInt)
16545			y := l.Args[1]
16546			x := l.Args[0]
16547			if !(l.Uses == 1) {
16548				break
16549			}
16550			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftLL, types.TypeFlags)
16551			v0.AuxInt = int32ToAuxInt(c)
16552			v0.AddArg2(x, y)
16553			b.resetWithControl(BlockARMEQ, v0)
16554			return true
16555		}
16556		// match: (EQ (CMPconst [0] l:(ADDshiftRL x y [c])) yes no)
16557		// cond: l.Uses==1
16558		// result: (EQ (CMNshiftRL x y [c]) yes no)
16559		for b.Controls[0].Op == OpARMCMPconst {
16560			v_0 := b.Controls[0]
16561			if auxIntToInt32(v_0.AuxInt) != 0 {
16562				break
16563			}
16564			l := v_0.Args[0]
16565			if l.Op != OpARMADDshiftRL {
16566				break
16567			}
16568			c := auxIntToInt32(l.AuxInt)
16569			y := l.Args[1]
16570			x := l.Args[0]
16571			if !(l.Uses == 1) {
16572				break
16573			}
16574			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRL, types.TypeFlags)
16575			v0.AuxInt = int32ToAuxInt(c)
16576			v0.AddArg2(x, y)
16577			b.resetWithControl(BlockARMEQ, v0)
16578			return true
16579		}
16580		// match: (EQ (CMPconst [0] l:(ADDshiftRA x y [c])) yes no)
16581		// cond: l.Uses==1
16582		// result: (EQ (CMNshiftRA x y [c]) yes no)
16583		for b.Controls[0].Op == OpARMCMPconst {
16584			v_0 := b.Controls[0]
16585			if auxIntToInt32(v_0.AuxInt) != 0 {
16586				break
16587			}
16588			l := v_0.Args[0]
16589			if l.Op != OpARMADDshiftRA {
16590				break
16591			}
16592			c := auxIntToInt32(l.AuxInt)
16593			y := l.Args[1]
16594			x := l.Args[0]
16595			if !(l.Uses == 1) {
16596				break
16597			}
16598			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRA, types.TypeFlags)
16599			v0.AuxInt = int32ToAuxInt(c)
16600			v0.AddArg2(x, y)
16601			b.resetWithControl(BlockARMEQ, v0)
16602			return true
16603		}
16604		// match: (EQ (CMPconst [0] l:(ADDshiftLLreg x y z)) yes no)
16605		// cond: l.Uses==1
16606		// result: (EQ (CMNshiftLLreg x y z) yes no)
16607		for b.Controls[0].Op == OpARMCMPconst {
16608			v_0 := b.Controls[0]
16609			if auxIntToInt32(v_0.AuxInt) != 0 {
16610				break
16611			}
16612			l := v_0.Args[0]
16613			if l.Op != OpARMADDshiftLLreg {
16614				break
16615			}
16616			z := l.Args[2]
16617			x := l.Args[0]
16618			y := l.Args[1]
16619			if !(l.Uses == 1) {
16620				break
16621			}
16622			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftLLreg, types.TypeFlags)
16623			v0.AddArg3(x, y, z)
16624			b.resetWithControl(BlockARMEQ, v0)
16625			return true
16626		}
16627		// match: (EQ (CMPconst [0] l:(ADDshiftRLreg x y z)) yes no)
16628		// cond: l.Uses==1
16629		// result: (EQ (CMNshiftRLreg x y z) yes no)
16630		for b.Controls[0].Op == OpARMCMPconst {
16631			v_0 := b.Controls[0]
16632			if auxIntToInt32(v_0.AuxInt) != 0 {
16633				break
16634			}
16635			l := v_0.Args[0]
16636			if l.Op != OpARMADDshiftRLreg {
16637				break
16638			}
16639			z := l.Args[2]
16640			x := l.Args[0]
16641			y := l.Args[1]
16642			if !(l.Uses == 1) {
16643				break
16644			}
16645			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRLreg, types.TypeFlags)
16646			v0.AddArg3(x, y, z)
16647			b.resetWithControl(BlockARMEQ, v0)
16648			return true
16649		}
16650		// match: (EQ (CMPconst [0] l:(ADDshiftRAreg x y z)) yes no)
16651		// cond: l.Uses==1
16652		// result: (EQ (CMNshiftRAreg x y z) yes no)
16653		for b.Controls[0].Op == OpARMCMPconst {
16654			v_0 := b.Controls[0]
16655			if auxIntToInt32(v_0.AuxInt) != 0 {
16656				break
16657			}
16658			l := v_0.Args[0]
16659			if l.Op != OpARMADDshiftRAreg {
16660				break
16661			}
16662			z := l.Args[2]
16663			x := l.Args[0]
16664			y := l.Args[1]
16665			if !(l.Uses == 1) {
16666				break
16667			}
16668			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRAreg, types.TypeFlags)
16669			v0.AddArg3(x, y, z)
16670			b.resetWithControl(BlockARMEQ, v0)
16671			return true
16672		}
16673		// match: (EQ (CMPconst [0] l:(AND x y)) yes no)
16674		// cond: l.Uses==1
16675		// result: (EQ (TST x y) yes no)
16676		for b.Controls[0].Op == OpARMCMPconst {
16677			v_0 := b.Controls[0]
16678			if auxIntToInt32(v_0.AuxInt) != 0 {
16679				break
16680			}
16681			l := v_0.Args[0]
16682			if l.Op != OpARMAND {
16683				break
16684			}
16685			_ = l.Args[1]
16686			l_0 := l.Args[0]
16687			l_1 := l.Args[1]
16688			for _i0 := 0; _i0 <= 1; _i0, l_0, l_1 = _i0+1, l_1, l_0 {
16689				x := l_0
16690				y := l_1
16691				if !(l.Uses == 1) {
16692					continue
16693				}
16694				v0 := b.NewValue0(v_0.Pos, OpARMTST, types.TypeFlags)
16695				v0.AddArg2(x, y)
16696				b.resetWithControl(BlockARMEQ, v0)
16697				return true
16698			}
16699			break
16700		}
16701		// match: (EQ (CMPconst [0] l:(ANDconst [c] x)) yes no)
16702		// cond: l.Uses==1
16703		// result: (EQ (TSTconst [c] x) yes no)
16704		for b.Controls[0].Op == OpARMCMPconst {
16705			v_0 := b.Controls[0]
16706			if auxIntToInt32(v_0.AuxInt) != 0 {
16707				break
16708			}
16709			l := v_0.Args[0]
16710			if l.Op != OpARMANDconst {
16711				break
16712			}
16713			c := auxIntToInt32(l.AuxInt)
16714			x := l.Args[0]
16715			if !(l.Uses == 1) {
16716				break
16717			}
16718			v0 := b.NewValue0(v_0.Pos, OpARMTSTconst, types.TypeFlags)
16719			v0.AuxInt = int32ToAuxInt(c)
16720			v0.AddArg(x)
16721			b.resetWithControl(BlockARMEQ, v0)
16722			return true
16723		}
16724		// match: (EQ (CMPconst [0] l:(ANDshiftLL x y [c])) yes no)
16725		// cond: l.Uses==1
16726		// result: (EQ (TSTshiftLL x y [c]) yes no)
16727		for b.Controls[0].Op == OpARMCMPconst {
16728			v_0 := b.Controls[0]
16729			if auxIntToInt32(v_0.AuxInt) != 0 {
16730				break
16731			}
16732			l := v_0.Args[0]
16733			if l.Op != OpARMANDshiftLL {
16734				break
16735			}
16736			c := auxIntToInt32(l.AuxInt)
16737			y := l.Args[1]
16738			x := l.Args[0]
16739			if !(l.Uses == 1) {
16740				break
16741			}
16742			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftLL, types.TypeFlags)
16743			v0.AuxInt = int32ToAuxInt(c)
16744			v0.AddArg2(x, y)
16745			b.resetWithControl(BlockARMEQ, v0)
16746			return true
16747		}
16748		// match: (EQ (CMPconst [0] l:(ANDshiftRL x y [c])) yes no)
16749		// cond: l.Uses==1
16750		// result: (EQ (TSTshiftRL x y [c]) yes no)
16751		for b.Controls[0].Op == OpARMCMPconst {
16752			v_0 := b.Controls[0]
16753			if auxIntToInt32(v_0.AuxInt) != 0 {
16754				break
16755			}
16756			l := v_0.Args[0]
16757			if l.Op != OpARMANDshiftRL {
16758				break
16759			}
16760			c := auxIntToInt32(l.AuxInt)
16761			y := l.Args[1]
16762			x := l.Args[0]
16763			if !(l.Uses == 1) {
16764				break
16765			}
16766			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRL, types.TypeFlags)
16767			v0.AuxInt = int32ToAuxInt(c)
16768			v0.AddArg2(x, y)
16769			b.resetWithControl(BlockARMEQ, v0)
16770			return true
16771		}
16772		// match: (EQ (CMPconst [0] l:(ANDshiftRA x y [c])) yes no)
16773		// cond: l.Uses==1
16774		// result: (EQ (TSTshiftRA x y [c]) yes no)
16775		for b.Controls[0].Op == OpARMCMPconst {
16776			v_0 := b.Controls[0]
16777			if auxIntToInt32(v_0.AuxInt) != 0 {
16778				break
16779			}
16780			l := v_0.Args[0]
16781			if l.Op != OpARMANDshiftRA {
16782				break
16783			}
16784			c := auxIntToInt32(l.AuxInt)
16785			y := l.Args[1]
16786			x := l.Args[0]
16787			if !(l.Uses == 1) {
16788				break
16789			}
16790			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRA, types.TypeFlags)
16791			v0.AuxInt = int32ToAuxInt(c)
16792			v0.AddArg2(x, y)
16793			b.resetWithControl(BlockARMEQ, v0)
16794			return true
16795		}
16796		// match: (EQ (CMPconst [0] l:(ANDshiftLLreg x y z)) yes no)
16797		// cond: l.Uses==1
16798		// result: (EQ (TSTshiftLLreg x y z) yes no)
16799		for b.Controls[0].Op == OpARMCMPconst {
16800			v_0 := b.Controls[0]
16801			if auxIntToInt32(v_0.AuxInt) != 0 {
16802				break
16803			}
16804			l := v_0.Args[0]
16805			if l.Op != OpARMANDshiftLLreg {
16806				break
16807			}
16808			z := l.Args[2]
16809			x := l.Args[0]
16810			y := l.Args[1]
16811			if !(l.Uses == 1) {
16812				break
16813			}
16814			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftLLreg, types.TypeFlags)
16815			v0.AddArg3(x, y, z)
16816			b.resetWithControl(BlockARMEQ, v0)
16817			return true
16818		}
16819		// match: (EQ (CMPconst [0] l:(ANDshiftRLreg x y z)) yes no)
16820		// cond: l.Uses==1
16821		// result: (EQ (TSTshiftRLreg x y z) yes no)
16822		for b.Controls[0].Op == OpARMCMPconst {
16823			v_0 := b.Controls[0]
16824			if auxIntToInt32(v_0.AuxInt) != 0 {
16825				break
16826			}
16827			l := v_0.Args[0]
16828			if l.Op != OpARMANDshiftRLreg {
16829				break
16830			}
16831			z := l.Args[2]
16832			x := l.Args[0]
16833			y := l.Args[1]
16834			if !(l.Uses == 1) {
16835				break
16836			}
16837			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRLreg, types.TypeFlags)
16838			v0.AddArg3(x, y, z)
16839			b.resetWithControl(BlockARMEQ, v0)
16840			return true
16841		}
16842		// match: (EQ (CMPconst [0] l:(ANDshiftRAreg x y z)) yes no)
16843		// cond: l.Uses==1
16844		// result: (EQ (TSTshiftRAreg x y z) yes no)
16845		for b.Controls[0].Op == OpARMCMPconst {
16846			v_0 := b.Controls[0]
16847			if auxIntToInt32(v_0.AuxInt) != 0 {
16848				break
16849			}
16850			l := v_0.Args[0]
16851			if l.Op != OpARMANDshiftRAreg {
16852				break
16853			}
16854			z := l.Args[2]
16855			x := l.Args[0]
16856			y := l.Args[1]
16857			if !(l.Uses == 1) {
16858				break
16859			}
16860			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRAreg, types.TypeFlags)
16861			v0.AddArg3(x, y, z)
16862			b.resetWithControl(BlockARMEQ, v0)
16863			return true
16864		}
16865		// match: (EQ (CMPconst [0] l:(XOR x y)) yes no)
16866		// cond: l.Uses==1
16867		// result: (EQ (TEQ x y) yes no)
16868		for b.Controls[0].Op == OpARMCMPconst {
16869			v_0 := b.Controls[0]
16870			if auxIntToInt32(v_0.AuxInt) != 0 {
16871				break
16872			}
16873			l := v_0.Args[0]
16874			if l.Op != OpARMXOR {
16875				break
16876			}
16877			_ = l.Args[1]
16878			l_0 := l.Args[0]
16879			l_1 := l.Args[1]
16880			for _i0 := 0; _i0 <= 1; _i0, l_0, l_1 = _i0+1, l_1, l_0 {
16881				x := l_0
16882				y := l_1
16883				if !(l.Uses == 1) {
16884					continue
16885				}
16886				v0 := b.NewValue0(v_0.Pos, OpARMTEQ, types.TypeFlags)
16887				v0.AddArg2(x, y)
16888				b.resetWithControl(BlockARMEQ, v0)
16889				return true
16890			}
16891			break
16892		}
16893		// match: (EQ (CMPconst [0] l:(XORconst [c] x)) yes no)
16894		// cond: l.Uses==1
16895		// result: (EQ (TEQconst [c] x) yes no)
16896		for b.Controls[0].Op == OpARMCMPconst {
16897			v_0 := b.Controls[0]
16898			if auxIntToInt32(v_0.AuxInt) != 0 {
16899				break
16900			}
16901			l := v_0.Args[0]
16902			if l.Op != OpARMXORconst {
16903				break
16904			}
16905			c := auxIntToInt32(l.AuxInt)
16906			x := l.Args[0]
16907			if !(l.Uses == 1) {
16908				break
16909			}
16910			v0 := b.NewValue0(v_0.Pos, OpARMTEQconst, types.TypeFlags)
16911			v0.AuxInt = int32ToAuxInt(c)
16912			v0.AddArg(x)
16913			b.resetWithControl(BlockARMEQ, v0)
16914			return true
16915		}
16916		// match: (EQ (CMPconst [0] l:(XORshiftLL x y [c])) yes no)
16917		// cond: l.Uses==1
16918		// result: (EQ (TEQshiftLL x y [c]) yes no)
16919		for b.Controls[0].Op == OpARMCMPconst {
16920			v_0 := b.Controls[0]
16921			if auxIntToInt32(v_0.AuxInt) != 0 {
16922				break
16923			}
16924			l := v_0.Args[0]
16925			if l.Op != OpARMXORshiftLL {
16926				break
16927			}
16928			c := auxIntToInt32(l.AuxInt)
16929			y := l.Args[1]
16930			x := l.Args[0]
16931			if !(l.Uses == 1) {
16932				break
16933			}
16934			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftLL, types.TypeFlags)
16935			v0.AuxInt = int32ToAuxInt(c)
16936			v0.AddArg2(x, y)
16937			b.resetWithControl(BlockARMEQ, v0)
16938			return true
16939		}
16940		// match: (EQ (CMPconst [0] l:(XORshiftRL x y [c])) yes no)
16941		// cond: l.Uses==1
16942		// result: (EQ (TEQshiftRL x y [c]) yes no)
16943		for b.Controls[0].Op == OpARMCMPconst {
16944			v_0 := b.Controls[0]
16945			if auxIntToInt32(v_0.AuxInt) != 0 {
16946				break
16947			}
16948			l := v_0.Args[0]
16949			if l.Op != OpARMXORshiftRL {
16950				break
16951			}
16952			c := auxIntToInt32(l.AuxInt)
16953			y := l.Args[1]
16954			x := l.Args[0]
16955			if !(l.Uses == 1) {
16956				break
16957			}
16958			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRL, types.TypeFlags)
16959			v0.AuxInt = int32ToAuxInt(c)
16960			v0.AddArg2(x, y)
16961			b.resetWithControl(BlockARMEQ, v0)
16962			return true
16963		}
16964		// match: (EQ (CMPconst [0] l:(XORshiftRA x y [c])) yes no)
16965		// cond: l.Uses==1
16966		// result: (EQ (TEQshiftRA x y [c]) yes no)
16967		for b.Controls[0].Op == OpARMCMPconst {
16968			v_0 := b.Controls[0]
16969			if auxIntToInt32(v_0.AuxInt) != 0 {
16970				break
16971			}
16972			l := v_0.Args[0]
16973			if l.Op != OpARMXORshiftRA {
16974				break
16975			}
16976			c := auxIntToInt32(l.AuxInt)
16977			y := l.Args[1]
16978			x := l.Args[0]
16979			if !(l.Uses == 1) {
16980				break
16981			}
16982			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRA, types.TypeFlags)
16983			v0.AuxInt = int32ToAuxInt(c)
16984			v0.AddArg2(x, y)
16985			b.resetWithControl(BlockARMEQ, v0)
16986			return true
16987		}
16988		// match: (EQ (CMPconst [0] l:(XORshiftLLreg x y z)) yes no)
16989		// cond: l.Uses==1
16990		// result: (EQ (TEQshiftLLreg x y z) yes no)
16991		for b.Controls[0].Op == OpARMCMPconst {
16992			v_0 := b.Controls[0]
16993			if auxIntToInt32(v_0.AuxInt) != 0 {
16994				break
16995			}
16996			l := v_0.Args[0]
16997			if l.Op != OpARMXORshiftLLreg {
16998				break
16999			}
17000			z := l.Args[2]
17001			x := l.Args[0]
17002			y := l.Args[1]
17003			if !(l.Uses == 1) {
17004				break
17005			}
17006			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftLLreg, types.TypeFlags)
17007			v0.AddArg3(x, y, z)
17008			b.resetWithControl(BlockARMEQ, v0)
17009			return true
17010		}
17011		// match: (EQ (CMPconst [0] l:(XORshiftRLreg x y z)) yes no)
17012		// cond: l.Uses==1
17013		// result: (EQ (TEQshiftRLreg x y z) yes no)
17014		for b.Controls[0].Op == OpARMCMPconst {
17015			v_0 := b.Controls[0]
17016			if auxIntToInt32(v_0.AuxInt) != 0 {
17017				break
17018			}
17019			l := v_0.Args[0]
17020			if l.Op != OpARMXORshiftRLreg {
17021				break
17022			}
17023			z := l.Args[2]
17024			x := l.Args[0]
17025			y := l.Args[1]
17026			if !(l.Uses == 1) {
17027				break
17028			}
17029			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRLreg, types.TypeFlags)
17030			v0.AddArg3(x, y, z)
17031			b.resetWithControl(BlockARMEQ, v0)
17032			return true
17033		}
17034		// match: (EQ (CMPconst [0] l:(XORshiftRAreg x y z)) yes no)
17035		// cond: l.Uses==1
17036		// result: (EQ (TEQshiftRAreg x y z) yes no)
17037		for b.Controls[0].Op == OpARMCMPconst {
17038			v_0 := b.Controls[0]
17039			if auxIntToInt32(v_0.AuxInt) != 0 {
17040				break
17041			}
17042			l := v_0.Args[0]
17043			if l.Op != OpARMXORshiftRAreg {
17044				break
17045			}
17046			z := l.Args[2]
17047			x := l.Args[0]
17048			y := l.Args[1]
17049			if !(l.Uses == 1) {
17050				break
17051			}
17052			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRAreg, types.TypeFlags)
17053			v0.AddArg3(x, y, z)
17054			b.resetWithControl(BlockARMEQ, v0)
17055			return true
17056		}
17057	case BlockARMGE:
17058		// match: (GE (FlagConstant [fc]) yes no)
17059		// cond: fc.ge()
17060		// result: (First yes no)
17061		for b.Controls[0].Op == OpARMFlagConstant {
17062			v_0 := b.Controls[0]
17063			fc := auxIntToFlagConstant(v_0.AuxInt)
17064			if !(fc.ge()) {
17065				break
17066			}
17067			b.Reset(BlockFirst)
17068			return true
17069		}
17070		// match: (GE (FlagConstant [fc]) yes no)
17071		// cond: !fc.ge()
17072		// result: (First no yes)
17073		for b.Controls[0].Op == OpARMFlagConstant {
17074			v_0 := b.Controls[0]
17075			fc := auxIntToFlagConstant(v_0.AuxInt)
17076			if !(!fc.ge()) {
17077				break
17078			}
17079			b.Reset(BlockFirst)
17080			b.swapSuccessors()
17081			return true
17082		}
17083		// match: (GE (InvertFlags cmp) yes no)
17084		// result: (LE cmp yes no)
17085		for b.Controls[0].Op == OpARMInvertFlags {
17086			v_0 := b.Controls[0]
17087			cmp := v_0.Args[0]
17088			b.resetWithControl(BlockARMLE, cmp)
17089			return true
17090		}
17091		// match: (GE (CMPconst [0] l:(SUB x y)) yes no)
17092		// cond: l.Uses==1
17093		// result: (GEnoov (CMP x y) yes no)
17094		for b.Controls[0].Op == OpARMCMPconst {
17095			v_0 := b.Controls[0]
17096			if auxIntToInt32(v_0.AuxInt) != 0 {
17097				break
17098			}
17099			l := v_0.Args[0]
17100			if l.Op != OpARMSUB {
17101				break
17102			}
17103			y := l.Args[1]
17104			x := l.Args[0]
17105			if !(l.Uses == 1) {
17106				break
17107			}
17108			v0 := b.NewValue0(v_0.Pos, OpARMCMP, types.TypeFlags)
17109			v0.AddArg2(x, y)
17110			b.resetWithControl(BlockARMGEnoov, v0)
17111			return true
17112		}
17113		// match: (GE (CMPconst [0] l:(MULS x y a)) yes no)
17114		// cond: l.Uses==1
17115		// result: (GEnoov (CMP a (MUL <x.Type> x y)) yes no)
17116		for b.Controls[0].Op == OpARMCMPconst {
17117			v_0 := b.Controls[0]
17118			if auxIntToInt32(v_0.AuxInt) != 0 {
17119				break
17120			}
17121			l := v_0.Args[0]
17122			if l.Op != OpARMMULS {
17123				break
17124			}
17125			a := l.Args[2]
17126			x := l.Args[0]
17127			y := l.Args[1]
17128			if !(l.Uses == 1) {
17129				break
17130			}
17131			v0 := b.NewValue0(v_0.Pos, OpARMCMP, types.TypeFlags)
17132			v1 := b.NewValue0(v_0.Pos, OpARMMUL, x.Type)
17133			v1.AddArg2(x, y)
17134			v0.AddArg2(a, v1)
17135			b.resetWithControl(BlockARMGEnoov, v0)
17136			return true
17137		}
17138		// match: (GE (CMPconst [0] l:(SUBconst [c] x)) yes no)
17139		// cond: l.Uses==1
17140		// result: (GEnoov (CMPconst [c] x) yes no)
17141		for b.Controls[0].Op == OpARMCMPconst {
17142			v_0 := b.Controls[0]
17143			if auxIntToInt32(v_0.AuxInt) != 0 {
17144				break
17145			}
17146			l := v_0.Args[0]
17147			if l.Op != OpARMSUBconst {
17148				break
17149			}
17150			c := auxIntToInt32(l.AuxInt)
17151			x := l.Args[0]
17152			if !(l.Uses == 1) {
17153				break
17154			}
17155			v0 := b.NewValue0(v_0.Pos, OpARMCMPconst, types.TypeFlags)
17156			v0.AuxInt = int32ToAuxInt(c)
17157			v0.AddArg(x)
17158			b.resetWithControl(BlockARMGEnoov, v0)
17159			return true
17160		}
17161		// match: (GE (CMPconst [0] l:(SUBshiftLL x y [c])) yes no)
17162		// cond: l.Uses==1
17163		// result: (GEnoov (CMPshiftLL x y [c]) yes no)
17164		for b.Controls[0].Op == OpARMCMPconst {
17165			v_0 := b.Controls[0]
17166			if auxIntToInt32(v_0.AuxInt) != 0 {
17167				break
17168			}
17169			l := v_0.Args[0]
17170			if l.Op != OpARMSUBshiftLL {
17171				break
17172			}
17173			c := auxIntToInt32(l.AuxInt)
17174			y := l.Args[1]
17175			x := l.Args[0]
17176			if !(l.Uses == 1) {
17177				break
17178			}
17179			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftLL, types.TypeFlags)
17180			v0.AuxInt = int32ToAuxInt(c)
17181			v0.AddArg2(x, y)
17182			b.resetWithControl(BlockARMGEnoov, v0)
17183			return true
17184		}
17185		// match: (GE (CMPconst [0] l:(SUBshiftRL x y [c])) yes no)
17186		// cond: l.Uses==1
17187		// result: (GEnoov (CMPshiftRL x y [c]) yes no)
17188		for b.Controls[0].Op == OpARMCMPconst {
17189			v_0 := b.Controls[0]
17190			if auxIntToInt32(v_0.AuxInt) != 0 {
17191				break
17192			}
17193			l := v_0.Args[0]
17194			if l.Op != OpARMSUBshiftRL {
17195				break
17196			}
17197			c := auxIntToInt32(l.AuxInt)
17198			y := l.Args[1]
17199			x := l.Args[0]
17200			if !(l.Uses == 1) {
17201				break
17202			}
17203			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRL, types.TypeFlags)
17204			v0.AuxInt = int32ToAuxInt(c)
17205			v0.AddArg2(x, y)
17206			b.resetWithControl(BlockARMGEnoov, v0)
17207			return true
17208		}
17209		// match: (GE (CMPconst [0] l:(SUBshiftRA x y [c])) yes no)
17210		// cond: l.Uses==1
17211		// result: (GEnoov (CMPshiftRA x y [c]) yes no)
17212		for b.Controls[0].Op == OpARMCMPconst {
17213			v_0 := b.Controls[0]
17214			if auxIntToInt32(v_0.AuxInt) != 0 {
17215				break
17216			}
17217			l := v_0.Args[0]
17218			if l.Op != OpARMSUBshiftRA {
17219				break
17220			}
17221			c := auxIntToInt32(l.AuxInt)
17222			y := l.Args[1]
17223			x := l.Args[0]
17224			if !(l.Uses == 1) {
17225				break
17226			}
17227			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRA, types.TypeFlags)
17228			v0.AuxInt = int32ToAuxInt(c)
17229			v0.AddArg2(x, y)
17230			b.resetWithControl(BlockARMGEnoov, v0)
17231			return true
17232		}
17233		// match: (GE (CMPconst [0] l:(SUBshiftLLreg x y z)) yes no)
17234		// cond: l.Uses==1
17235		// result: (GEnoov (CMPshiftLLreg x y z) yes no)
17236		for b.Controls[0].Op == OpARMCMPconst {
17237			v_0 := b.Controls[0]
17238			if auxIntToInt32(v_0.AuxInt) != 0 {
17239				break
17240			}
17241			l := v_0.Args[0]
17242			if l.Op != OpARMSUBshiftLLreg {
17243				break
17244			}
17245			z := l.Args[2]
17246			x := l.Args[0]
17247			y := l.Args[1]
17248			if !(l.Uses == 1) {
17249				break
17250			}
17251			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftLLreg, types.TypeFlags)
17252			v0.AddArg3(x, y, z)
17253			b.resetWithControl(BlockARMGEnoov, v0)
17254			return true
17255		}
17256		// match: (GE (CMPconst [0] l:(SUBshiftRLreg x y z)) yes no)
17257		// cond: l.Uses==1
17258		// result: (GEnoov (CMPshiftRLreg x y z) yes no)
17259		for b.Controls[0].Op == OpARMCMPconst {
17260			v_0 := b.Controls[0]
17261			if auxIntToInt32(v_0.AuxInt) != 0 {
17262				break
17263			}
17264			l := v_0.Args[0]
17265			if l.Op != OpARMSUBshiftRLreg {
17266				break
17267			}
17268			z := l.Args[2]
17269			x := l.Args[0]
17270			y := l.Args[1]
17271			if !(l.Uses == 1) {
17272				break
17273			}
17274			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRLreg, types.TypeFlags)
17275			v0.AddArg3(x, y, z)
17276			b.resetWithControl(BlockARMGEnoov, v0)
17277			return true
17278		}
17279		// match: (GE (CMPconst [0] l:(SUBshiftRAreg x y z)) yes no)
17280		// cond: l.Uses==1
17281		// result: (GEnoov (CMPshiftRAreg x y z) yes no)
17282		for b.Controls[0].Op == OpARMCMPconst {
17283			v_0 := b.Controls[0]
17284			if auxIntToInt32(v_0.AuxInt) != 0 {
17285				break
17286			}
17287			l := v_0.Args[0]
17288			if l.Op != OpARMSUBshiftRAreg {
17289				break
17290			}
17291			z := l.Args[2]
17292			x := l.Args[0]
17293			y := l.Args[1]
17294			if !(l.Uses == 1) {
17295				break
17296			}
17297			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRAreg, types.TypeFlags)
17298			v0.AddArg3(x, y, z)
17299			b.resetWithControl(BlockARMGEnoov, v0)
17300			return true
17301		}
17302		// match: (GE (CMPconst [0] l:(ADD x y)) yes no)
17303		// cond: l.Uses==1
17304		// result: (GEnoov (CMN x y) yes no)
17305		for b.Controls[0].Op == OpARMCMPconst {
17306			v_0 := b.Controls[0]
17307			if auxIntToInt32(v_0.AuxInt) != 0 {
17308				break
17309			}
17310			l := v_0.Args[0]
17311			if l.Op != OpARMADD {
17312				break
17313			}
17314			_ = l.Args[1]
17315			l_0 := l.Args[0]
17316			l_1 := l.Args[1]
17317			for _i0 := 0; _i0 <= 1; _i0, l_0, l_1 = _i0+1, l_1, l_0 {
17318				x := l_0
17319				y := l_1
17320				if !(l.Uses == 1) {
17321					continue
17322				}
17323				v0 := b.NewValue0(v_0.Pos, OpARMCMN, types.TypeFlags)
17324				v0.AddArg2(x, y)
17325				b.resetWithControl(BlockARMGEnoov, v0)
17326				return true
17327			}
17328			break
17329		}
17330		// match: (GE (CMPconst [0] l:(MULA x y a)) yes no)
17331		// cond: l.Uses==1
17332		// result: (GEnoov (CMN a (MUL <x.Type> x y)) yes no)
17333		for b.Controls[0].Op == OpARMCMPconst {
17334			v_0 := b.Controls[0]
17335			if auxIntToInt32(v_0.AuxInt) != 0 {
17336				break
17337			}
17338			l := v_0.Args[0]
17339			if l.Op != OpARMMULA {
17340				break
17341			}
17342			a := l.Args[2]
17343			x := l.Args[0]
17344			y := l.Args[1]
17345			if !(l.Uses == 1) {
17346				break
17347			}
17348			v0 := b.NewValue0(v_0.Pos, OpARMCMN, types.TypeFlags)
17349			v1 := b.NewValue0(v_0.Pos, OpARMMUL, x.Type)
17350			v1.AddArg2(x, y)
17351			v0.AddArg2(a, v1)
17352			b.resetWithControl(BlockARMGEnoov, v0)
17353			return true
17354		}
17355		// match: (GE (CMPconst [0] l:(ADDconst [c] x)) yes no)
17356		// cond: l.Uses==1
17357		// result: (GEnoov (CMNconst [c] x) yes no)
17358		for b.Controls[0].Op == OpARMCMPconst {
17359			v_0 := b.Controls[0]
17360			if auxIntToInt32(v_0.AuxInt) != 0 {
17361				break
17362			}
17363			l := v_0.Args[0]
17364			if l.Op != OpARMADDconst {
17365				break
17366			}
17367			c := auxIntToInt32(l.AuxInt)
17368			x := l.Args[0]
17369			if !(l.Uses == 1) {
17370				break
17371			}
17372			v0 := b.NewValue0(v_0.Pos, OpARMCMNconst, types.TypeFlags)
17373			v0.AuxInt = int32ToAuxInt(c)
17374			v0.AddArg(x)
17375			b.resetWithControl(BlockARMGEnoov, v0)
17376			return true
17377		}
17378		// match: (GE (CMPconst [0] l:(ADDshiftLL x y [c])) yes no)
17379		// cond: l.Uses==1
17380		// result: (GEnoov (CMNshiftLL x y [c]) yes no)
17381		for b.Controls[0].Op == OpARMCMPconst {
17382			v_0 := b.Controls[0]
17383			if auxIntToInt32(v_0.AuxInt) != 0 {
17384				break
17385			}
17386			l := v_0.Args[0]
17387			if l.Op != OpARMADDshiftLL {
17388				break
17389			}
17390			c := auxIntToInt32(l.AuxInt)
17391			y := l.Args[1]
17392			x := l.Args[0]
17393			if !(l.Uses == 1) {
17394				break
17395			}
17396			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftLL, types.TypeFlags)
17397			v0.AuxInt = int32ToAuxInt(c)
17398			v0.AddArg2(x, y)
17399			b.resetWithControl(BlockARMGEnoov, v0)
17400			return true
17401		}
17402		// match: (GE (CMPconst [0] l:(ADDshiftRL x y [c])) yes no)
17403		// cond: l.Uses==1
17404		// result: (GEnoov (CMNshiftRL x y [c]) yes no)
17405		for b.Controls[0].Op == OpARMCMPconst {
17406			v_0 := b.Controls[0]
17407			if auxIntToInt32(v_0.AuxInt) != 0 {
17408				break
17409			}
17410			l := v_0.Args[0]
17411			if l.Op != OpARMADDshiftRL {
17412				break
17413			}
17414			c := auxIntToInt32(l.AuxInt)
17415			y := l.Args[1]
17416			x := l.Args[0]
17417			if !(l.Uses == 1) {
17418				break
17419			}
17420			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRL, types.TypeFlags)
17421			v0.AuxInt = int32ToAuxInt(c)
17422			v0.AddArg2(x, y)
17423			b.resetWithControl(BlockARMGEnoov, v0)
17424			return true
17425		}
17426		// match: (GE (CMPconst [0] l:(ADDshiftRA x y [c])) yes no)
17427		// cond: l.Uses==1
17428		// result: (GEnoov (CMNshiftRA x y [c]) yes no)
17429		for b.Controls[0].Op == OpARMCMPconst {
17430			v_0 := b.Controls[0]
17431			if auxIntToInt32(v_0.AuxInt) != 0 {
17432				break
17433			}
17434			l := v_0.Args[0]
17435			if l.Op != OpARMADDshiftRA {
17436				break
17437			}
17438			c := auxIntToInt32(l.AuxInt)
17439			y := l.Args[1]
17440			x := l.Args[0]
17441			if !(l.Uses == 1) {
17442				break
17443			}
17444			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRA, types.TypeFlags)
17445			v0.AuxInt = int32ToAuxInt(c)
17446			v0.AddArg2(x, y)
17447			b.resetWithControl(BlockARMGEnoov, v0)
17448			return true
17449		}
17450		// match: (GE (CMPconst [0] l:(ADDshiftLLreg x y z)) yes no)
17451		// cond: l.Uses==1
17452		// result: (GEnoov (CMNshiftLLreg x y z) yes no)
17453		for b.Controls[0].Op == OpARMCMPconst {
17454			v_0 := b.Controls[0]
17455			if auxIntToInt32(v_0.AuxInt) != 0 {
17456				break
17457			}
17458			l := v_0.Args[0]
17459			if l.Op != OpARMADDshiftLLreg {
17460				break
17461			}
17462			z := l.Args[2]
17463			x := l.Args[0]
17464			y := l.Args[1]
17465			if !(l.Uses == 1) {
17466				break
17467			}
17468			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftLLreg, types.TypeFlags)
17469			v0.AddArg3(x, y, z)
17470			b.resetWithControl(BlockARMGEnoov, v0)
17471			return true
17472		}
17473		// match: (GE (CMPconst [0] l:(ADDshiftRLreg x y z)) yes no)
17474		// cond: l.Uses==1
17475		// result: (GEnoov (CMNshiftRLreg x y z) yes no)
17476		for b.Controls[0].Op == OpARMCMPconst {
17477			v_0 := b.Controls[0]
17478			if auxIntToInt32(v_0.AuxInt) != 0 {
17479				break
17480			}
17481			l := v_0.Args[0]
17482			if l.Op != OpARMADDshiftRLreg {
17483				break
17484			}
17485			z := l.Args[2]
17486			x := l.Args[0]
17487			y := l.Args[1]
17488			if !(l.Uses == 1) {
17489				break
17490			}
17491			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRLreg, types.TypeFlags)
17492			v0.AddArg3(x, y, z)
17493			b.resetWithControl(BlockARMGEnoov, v0)
17494			return true
17495		}
17496		// match: (GE (CMPconst [0] l:(ADDshiftRAreg x y z)) yes no)
17497		// cond: l.Uses==1
17498		// result: (GEnoov (CMNshiftRAreg x y z) yes no)
17499		for b.Controls[0].Op == OpARMCMPconst {
17500			v_0 := b.Controls[0]
17501			if auxIntToInt32(v_0.AuxInt) != 0 {
17502				break
17503			}
17504			l := v_0.Args[0]
17505			if l.Op != OpARMADDshiftRAreg {
17506				break
17507			}
17508			z := l.Args[2]
17509			x := l.Args[0]
17510			y := l.Args[1]
17511			if !(l.Uses == 1) {
17512				break
17513			}
17514			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRAreg, types.TypeFlags)
17515			v0.AddArg3(x, y, z)
17516			b.resetWithControl(BlockARMGEnoov, v0)
17517			return true
17518		}
17519		// match: (GE (CMPconst [0] l:(AND x y)) yes no)
17520		// cond: l.Uses==1
17521		// result: (GEnoov (TST x y) yes no)
17522		for b.Controls[0].Op == OpARMCMPconst {
17523			v_0 := b.Controls[0]
17524			if auxIntToInt32(v_0.AuxInt) != 0 {
17525				break
17526			}
17527			l := v_0.Args[0]
17528			if l.Op != OpARMAND {
17529				break
17530			}
17531			_ = l.Args[1]
17532			l_0 := l.Args[0]
17533			l_1 := l.Args[1]
17534			for _i0 := 0; _i0 <= 1; _i0, l_0, l_1 = _i0+1, l_1, l_0 {
17535				x := l_0
17536				y := l_1
17537				if !(l.Uses == 1) {
17538					continue
17539				}
17540				v0 := b.NewValue0(v_0.Pos, OpARMTST, types.TypeFlags)
17541				v0.AddArg2(x, y)
17542				b.resetWithControl(BlockARMGEnoov, v0)
17543				return true
17544			}
17545			break
17546		}
17547		// match: (GE (CMPconst [0] l:(ANDconst [c] x)) yes no)
17548		// cond: l.Uses==1
17549		// result: (GEnoov (TSTconst [c] x) yes no)
17550		for b.Controls[0].Op == OpARMCMPconst {
17551			v_0 := b.Controls[0]
17552			if auxIntToInt32(v_0.AuxInt) != 0 {
17553				break
17554			}
17555			l := v_0.Args[0]
17556			if l.Op != OpARMANDconst {
17557				break
17558			}
17559			c := auxIntToInt32(l.AuxInt)
17560			x := l.Args[0]
17561			if !(l.Uses == 1) {
17562				break
17563			}
17564			v0 := b.NewValue0(v_0.Pos, OpARMTSTconst, types.TypeFlags)
17565			v0.AuxInt = int32ToAuxInt(c)
17566			v0.AddArg(x)
17567			b.resetWithControl(BlockARMGEnoov, v0)
17568			return true
17569		}
17570		// match: (GE (CMPconst [0] l:(ANDshiftLL x y [c])) yes no)
17571		// cond: l.Uses==1
17572		// result: (GEnoov (TSTshiftLL x y [c]) yes no)
17573		for b.Controls[0].Op == OpARMCMPconst {
17574			v_0 := b.Controls[0]
17575			if auxIntToInt32(v_0.AuxInt) != 0 {
17576				break
17577			}
17578			l := v_0.Args[0]
17579			if l.Op != OpARMANDshiftLL {
17580				break
17581			}
17582			c := auxIntToInt32(l.AuxInt)
17583			y := l.Args[1]
17584			x := l.Args[0]
17585			if !(l.Uses == 1) {
17586				break
17587			}
17588			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftLL, types.TypeFlags)
17589			v0.AuxInt = int32ToAuxInt(c)
17590			v0.AddArg2(x, y)
17591			b.resetWithControl(BlockARMGEnoov, v0)
17592			return true
17593		}
17594		// match: (GE (CMPconst [0] l:(ANDshiftRL x y [c])) yes no)
17595		// cond: l.Uses==1
17596		// result: (GEnoov (TSTshiftRL x y [c]) yes no)
17597		for b.Controls[0].Op == OpARMCMPconst {
17598			v_0 := b.Controls[0]
17599			if auxIntToInt32(v_0.AuxInt) != 0 {
17600				break
17601			}
17602			l := v_0.Args[0]
17603			if l.Op != OpARMANDshiftRL {
17604				break
17605			}
17606			c := auxIntToInt32(l.AuxInt)
17607			y := l.Args[1]
17608			x := l.Args[0]
17609			if !(l.Uses == 1) {
17610				break
17611			}
17612			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRL, types.TypeFlags)
17613			v0.AuxInt = int32ToAuxInt(c)
17614			v0.AddArg2(x, y)
17615			b.resetWithControl(BlockARMGEnoov, v0)
17616			return true
17617		}
17618		// match: (GE (CMPconst [0] l:(ANDshiftRA x y [c])) yes no)
17619		// cond: l.Uses==1
17620		// result: (GEnoov (TSTshiftRA x y [c]) yes no)
17621		for b.Controls[0].Op == OpARMCMPconst {
17622			v_0 := b.Controls[0]
17623			if auxIntToInt32(v_0.AuxInt) != 0 {
17624				break
17625			}
17626			l := v_0.Args[0]
17627			if l.Op != OpARMANDshiftRA {
17628				break
17629			}
17630			c := auxIntToInt32(l.AuxInt)
17631			y := l.Args[1]
17632			x := l.Args[0]
17633			if !(l.Uses == 1) {
17634				break
17635			}
17636			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRA, types.TypeFlags)
17637			v0.AuxInt = int32ToAuxInt(c)
17638			v0.AddArg2(x, y)
17639			b.resetWithControl(BlockARMGEnoov, v0)
17640			return true
17641		}
17642		// match: (GE (CMPconst [0] l:(ANDshiftLLreg x y z)) yes no)
17643		// cond: l.Uses==1
17644		// result: (GEnoov (TSTshiftLLreg x y z) yes no)
17645		for b.Controls[0].Op == OpARMCMPconst {
17646			v_0 := b.Controls[0]
17647			if auxIntToInt32(v_0.AuxInt) != 0 {
17648				break
17649			}
17650			l := v_0.Args[0]
17651			if l.Op != OpARMANDshiftLLreg {
17652				break
17653			}
17654			z := l.Args[2]
17655			x := l.Args[0]
17656			y := l.Args[1]
17657			if !(l.Uses == 1) {
17658				break
17659			}
17660			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftLLreg, types.TypeFlags)
17661			v0.AddArg3(x, y, z)
17662			b.resetWithControl(BlockARMGEnoov, v0)
17663			return true
17664		}
17665		// match: (GE (CMPconst [0] l:(ANDshiftRLreg x y z)) yes no)
17666		// cond: l.Uses==1
17667		// result: (GEnoov (TSTshiftRLreg x y z) yes no)
17668		for b.Controls[0].Op == OpARMCMPconst {
17669			v_0 := b.Controls[0]
17670			if auxIntToInt32(v_0.AuxInt) != 0 {
17671				break
17672			}
17673			l := v_0.Args[0]
17674			if l.Op != OpARMANDshiftRLreg {
17675				break
17676			}
17677			z := l.Args[2]
17678			x := l.Args[0]
17679			y := l.Args[1]
17680			if !(l.Uses == 1) {
17681				break
17682			}
17683			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRLreg, types.TypeFlags)
17684			v0.AddArg3(x, y, z)
17685			b.resetWithControl(BlockARMGEnoov, v0)
17686			return true
17687		}
17688		// match: (GE (CMPconst [0] l:(ANDshiftRAreg x y z)) yes no)
17689		// cond: l.Uses==1
17690		// result: (GEnoov (TSTshiftRAreg x y z) yes no)
17691		for b.Controls[0].Op == OpARMCMPconst {
17692			v_0 := b.Controls[0]
17693			if auxIntToInt32(v_0.AuxInt) != 0 {
17694				break
17695			}
17696			l := v_0.Args[0]
17697			if l.Op != OpARMANDshiftRAreg {
17698				break
17699			}
17700			z := l.Args[2]
17701			x := l.Args[0]
17702			y := l.Args[1]
17703			if !(l.Uses == 1) {
17704				break
17705			}
17706			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRAreg, types.TypeFlags)
17707			v0.AddArg3(x, y, z)
17708			b.resetWithControl(BlockARMGEnoov, v0)
17709			return true
17710		}
17711		// match: (GE (CMPconst [0] l:(XOR x y)) yes no)
17712		// cond: l.Uses==1
17713		// result: (GEnoov (TEQ x y) yes no)
17714		for b.Controls[0].Op == OpARMCMPconst {
17715			v_0 := b.Controls[0]
17716			if auxIntToInt32(v_0.AuxInt) != 0 {
17717				break
17718			}
17719			l := v_0.Args[0]
17720			if l.Op != OpARMXOR {
17721				break
17722			}
17723			_ = l.Args[1]
17724			l_0 := l.Args[0]
17725			l_1 := l.Args[1]
17726			for _i0 := 0; _i0 <= 1; _i0, l_0, l_1 = _i0+1, l_1, l_0 {
17727				x := l_0
17728				y := l_1
17729				if !(l.Uses == 1) {
17730					continue
17731				}
17732				v0 := b.NewValue0(v_0.Pos, OpARMTEQ, types.TypeFlags)
17733				v0.AddArg2(x, y)
17734				b.resetWithControl(BlockARMGEnoov, v0)
17735				return true
17736			}
17737			break
17738		}
17739		// match: (GE (CMPconst [0] l:(XORconst [c] x)) yes no)
17740		// cond: l.Uses==1
17741		// result: (GEnoov (TEQconst [c] x) yes no)
17742		for b.Controls[0].Op == OpARMCMPconst {
17743			v_0 := b.Controls[0]
17744			if auxIntToInt32(v_0.AuxInt) != 0 {
17745				break
17746			}
17747			l := v_0.Args[0]
17748			if l.Op != OpARMXORconst {
17749				break
17750			}
17751			c := auxIntToInt32(l.AuxInt)
17752			x := l.Args[0]
17753			if !(l.Uses == 1) {
17754				break
17755			}
17756			v0 := b.NewValue0(v_0.Pos, OpARMTEQconst, types.TypeFlags)
17757			v0.AuxInt = int32ToAuxInt(c)
17758			v0.AddArg(x)
17759			b.resetWithControl(BlockARMGEnoov, v0)
17760			return true
17761		}
17762		// match: (GE (CMPconst [0] l:(XORshiftLL x y [c])) yes no)
17763		// cond: l.Uses==1
17764		// result: (GEnoov (TEQshiftLL x y [c]) yes no)
17765		for b.Controls[0].Op == OpARMCMPconst {
17766			v_0 := b.Controls[0]
17767			if auxIntToInt32(v_0.AuxInt) != 0 {
17768				break
17769			}
17770			l := v_0.Args[0]
17771			if l.Op != OpARMXORshiftLL {
17772				break
17773			}
17774			c := auxIntToInt32(l.AuxInt)
17775			y := l.Args[1]
17776			x := l.Args[0]
17777			if !(l.Uses == 1) {
17778				break
17779			}
17780			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftLL, types.TypeFlags)
17781			v0.AuxInt = int32ToAuxInt(c)
17782			v0.AddArg2(x, y)
17783			b.resetWithControl(BlockARMGEnoov, v0)
17784			return true
17785		}
17786		// match: (GE (CMPconst [0] l:(XORshiftRL x y [c])) yes no)
17787		// cond: l.Uses==1
17788		// result: (GEnoov (TEQshiftRL x y [c]) yes no)
17789		for b.Controls[0].Op == OpARMCMPconst {
17790			v_0 := b.Controls[0]
17791			if auxIntToInt32(v_0.AuxInt) != 0 {
17792				break
17793			}
17794			l := v_0.Args[0]
17795			if l.Op != OpARMXORshiftRL {
17796				break
17797			}
17798			c := auxIntToInt32(l.AuxInt)
17799			y := l.Args[1]
17800			x := l.Args[0]
17801			if !(l.Uses == 1) {
17802				break
17803			}
17804			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRL, types.TypeFlags)
17805			v0.AuxInt = int32ToAuxInt(c)
17806			v0.AddArg2(x, y)
17807			b.resetWithControl(BlockARMGEnoov, v0)
17808			return true
17809		}
17810		// match: (GE (CMPconst [0] l:(XORshiftRA x y [c])) yes no)
17811		// cond: l.Uses==1
17812		// result: (GEnoov (TEQshiftRA x y [c]) yes no)
17813		for b.Controls[0].Op == OpARMCMPconst {
17814			v_0 := b.Controls[0]
17815			if auxIntToInt32(v_0.AuxInt) != 0 {
17816				break
17817			}
17818			l := v_0.Args[0]
17819			if l.Op != OpARMXORshiftRA {
17820				break
17821			}
17822			c := auxIntToInt32(l.AuxInt)
17823			y := l.Args[1]
17824			x := l.Args[0]
17825			if !(l.Uses == 1) {
17826				break
17827			}
17828			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRA, types.TypeFlags)
17829			v0.AuxInt = int32ToAuxInt(c)
17830			v0.AddArg2(x, y)
17831			b.resetWithControl(BlockARMGEnoov, v0)
17832			return true
17833		}
17834		// match: (GE (CMPconst [0] l:(XORshiftLLreg x y z)) yes no)
17835		// cond: l.Uses==1
17836		// result: (GEnoov (TEQshiftLLreg x y z) yes no)
17837		for b.Controls[0].Op == OpARMCMPconst {
17838			v_0 := b.Controls[0]
17839			if auxIntToInt32(v_0.AuxInt) != 0 {
17840				break
17841			}
17842			l := v_0.Args[0]
17843			if l.Op != OpARMXORshiftLLreg {
17844				break
17845			}
17846			z := l.Args[2]
17847			x := l.Args[0]
17848			y := l.Args[1]
17849			if !(l.Uses == 1) {
17850				break
17851			}
17852			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftLLreg, types.TypeFlags)
17853			v0.AddArg3(x, y, z)
17854			b.resetWithControl(BlockARMGEnoov, v0)
17855			return true
17856		}
17857		// match: (GE (CMPconst [0] l:(XORshiftRLreg x y z)) yes no)
17858		// cond: l.Uses==1
17859		// result: (GEnoov (TEQshiftRLreg x y z) yes no)
17860		for b.Controls[0].Op == OpARMCMPconst {
17861			v_0 := b.Controls[0]
17862			if auxIntToInt32(v_0.AuxInt) != 0 {
17863				break
17864			}
17865			l := v_0.Args[0]
17866			if l.Op != OpARMXORshiftRLreg {
17867				break
17868			}
17869			z := l.Args[2]
17870			x := l.Args[0]
17871			y := l.Args[1]
17872			if !(l.Uses == 1) {
17873				break
17874			}
17875			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRLreg, types.TypeFlags)
17876			v0.AddArg3(x, y, z)
17877			b.resetWithControl(BlockARMGEnoov, v0)
17878			return true
17879		}
17880		// match: (GE (CMPconst [0] l:(XORshiftRAreg x y z)) yes no)
17881		// cond: l.Uses==1
17882		// result: (GEnoov (TEQshiftRAreg x y z) yes no)
17883		for b.Controls[0].Op == OpARMCMPconst {
17884			v_0 := b.Controls[0]
17885			if auxIntToInt32(v_0.AuxInt) != 0 {
17886				break
17887			}
17888			l := v_0.Args[0]
17889			if l.Op != OpARMXORshiftRAreg {
17890				break
17891			}
17892			z := l.Args[2]
17893			x := l.Args[0]
17894			y := l.Args[1]
17895			if !(l.Uses == 1) {
17896				break
17897			}
17898			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRAreg, types.TypeFlags)
17899			v0.AddArg3(x, y, z)
17900			b.resetWithControl(BlockARMGEnoov, v0)
17901			return true
17902		}
17903	case BlockARMGEnoov:
17904		// match: (GEnoov (FlagConstant [fc]) yes no)
17905		// cond: fc.geNoov()
17906		// result: (First yes no)
17907		for b.Controls[0].Op == OpARMFlagConstant {
17908			v_0 := b.Controls[0]
17909			fc := auxIntToFlagConstant(v_0.AuxInt)
17910			if !(fc.geNoov()) {
17911				break
17912			}
17913			b.Reset(BlockFirst)
17914			return true
17915		}
17916		// match: (GEnoov (FlagConstant [fc]) yes no)
17917		// cond: !fc.geNoov()
17918		// result: (First no yes)
17919		for b.Controls[0].Op == OpARMFlagConstant {
17920			v_0 := b.Controls[0]
17921			fc := auxIntToFlagConstant(v_0.AuxInt)
17922			if !(!fc.geNoov()) {
17923				break
17924			}
17925			b.Reset(BlockFirst)
17926			b.swapSuccessors()
17927			return true
17928		}
17929		// match: (GEnoov (InvertFlags cmp) yes no)
17930		// result: (LEnoov cmp yes no)
17931		for b.Controls[0].Op == OpARMInvertFlags {
17932			v_0 := b.Controls[0]
17933			cmp := v_0.Args[0]
17934			b.resetWithControl(BlockARMLEnoov, cmp)
17935			return true
17936		}
17937	case BlockARMGT:
17938		// match: (GT (FlagConstant [fc]) yes no)
17939		// cond: fc.gt()
17940		// result: (First yes no)
17941		for b.Controls[0].Op == OpARMFlagConstant {
17942			v_0 := b.Controls[0]
17943			fc := auxIntToFlagConstant(v_0.AuxInt)
17944			if !(fc.gt()) {
17945				break
17946			}
17947			b.Reset(BlockFirst)
17948			return true
17949		}
17950		// match: (GT (FlagConstant [fc]) yes no)
17951		// cond: !fc.gt()
17952		// result: (First no yes)
17953		for b.Controls[0].Op == OpARMFlagConstant {
17954			v_0 := b.Controls[0]
17955			fc := auxIntToFlagConstant(v_0.AuxInt)
17956			if !(!fc.gt()) {
17957				break
17958			}
17959			b.Reset(BlockFirst)
17960			b.swapSuccessors()
17961			return true
17962		}
17963		// match: (GT (InvertFlags cmp) yes no)
17964		// result: (LT cmp yes no)
17965		for b.Controls[0].Op == OpARMInvertFlags {
17966			v_0 := b.Controls[0]
17967			cmp := v_0.Args[0]
17968			b.resetWithControl(BlockARMLT, cmp)
17969			return true
17970		}
17971		// match: (GT (CMPconst [0] l:(SUB x y)) yes no)
17972		// cond: l.Uses==1
17973		// result: (GTnoov (CMP x y) yes no)
17974		for b.Controls[0].Op == OpARMCMPconst {
17975			v_0 := b.Controls[0]
17976			if auxIntToInt32(v_0.AuxInt) != 0 {
17977				break
17978			}
17979			l := v_0.Args[0]
17980			if l.Op != OpARMSUB {
17981				break
17982			}
17983			y := l.Args[1]
17984			x := l.Args[0]
17985			if !(l.Uses == 1) {
17986				break
17987			}
17988			v0 := b.NewValue0(v_0.Pos, OpARMCMP, types.TypeFlags)
17989			v0.AddArg2(x, y)
17990			b.resetWithControl(BlockARMGTnoov, v0)
17991			return true
17992		}
17993		// match: (GT (CMPconst [0] l:(MULS x y a)) yes no)
17994		// cond: l.Uses==1
17995		// result: (GTnoov (CMP a (MUL <x.Type> x y)) yes no)
17996		for b.Controls[0].Op == OpARMCMPconst {
17997			v_0 := b.Controls[0]
17998			if auxIntToInt32(v_0.AuxInt) != 0 {
17999				break
18000			}
18001			l := v_0.Args[0]
18002			if l.Op != OpARMMULS {
18003				break
18004			}
18005			a := l.Args[2]
18006			x := l.Args[0]
18007			y := l.Args[1]
18008			if !(l.Uses == 1) {
18009				break
18010			}
18011			v0 := b.NewValue0(v_0.Pos, OpARMCMP, types.TypeFlags)
18012			v1 := b.NewValue0(v_0.Pos, OpARMMUL, x.Type)
18013			v1.AddArg2(x, y)
18014			v0.AddArg2(a, v1)
18015			b.resetWithControl(BlockARMGTnoov, v0)
18016			return true
18017		}
18018		// match: (GT (CMPconst [0] l:(SUBconst [c] x)) yes no)
18019		// cond: l.Uses==1
18020		// result: (GTnoov (CMPconst [c] x) yes no)
18021		for b.Controls[0].Op == OpARMCMPconst {
18022			v_0 := b.Controls[0]
18023			if auxIntToInt32(v_0.AuxInt) != 0 {
18024				break
18025			}
18026			l := v_0.Args[0]
18027			if l.Op != OpARMSUBconst {
18028				break
18029			}
18030			c := auxIntToInt32(l.AuxInt)
18031			x := l.Args[0]
18032			if !(l.Uses == 1) {
18033				break
18034			}
18035			v0 := b.NewValue0(v_0.Pos, OpARMCMPconst, types.TypeFlags)
18036			v0.AuxInt = int32ToAuxInt(c)
18037			v0.AddArg(x)
18038			b.resetWithControl(BlockARMGTnoov, v0)
18039			return true
18040		}
18041		// match: (GT (CMPconst [0] l:(SUBshiftLL x y [c])) yes no)
18042		// cond: l.Uses==1
18043		// result: (GTnoov (CMPshiftLL x y [c]) yes no)
18044		for b.Controls[0].Op == OpARMCMPconst {
18045			v_0 := b.Controls[0]
18046			if auxIntToInt32(v_0.AuxInt) != 0 {
18047				break
18048			}
18049			l := v_0.Args[0]
18050			if l.Op != OpARMSUBshiftLL {
18051				break
18052			}
18053			c := auxIntToInt32(l.AuxInt)
18054			y := l.Args[1]
18055			x := l.Args[0]
18056			if !(l.Uses == 1) {
18057				break
18058			}
18059			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftLL, types.TypeFlags)
18060			v0.AuxInt = int32ToAuxInt(c)
18061			v0.AddArg2(x, y)
18062			b.resetWithControl(BlockARMGTnoov, v0)
18063			return true
18064		}
18065		// match: (GT (CMPconst [0] l:(SUBshiftRL x y [c])) yes no)
18066		// cond: l.Uses==1
18067		// result: (GTnoov (CMPshiftRL x y [c]) yes no)
18068		for b.Controls[0].Op == OpARMCMPconst {
18069			v_0 := b.Controls[0]
18070			if auxIntToInt32(v_0.AuxInt) != 0 {
18071				break
18072			}
18073			l := v_0.Args[0]
18074			if l.Op != OpARMSUBshiftRL {
18075				break
18076			}
18077			c := auxIntToInt32(l.AuxInt)
18078			y := l.Args[1]
18079			x := l.Args[0]
18080			if !(l.Uses == 1) {
18081				break
18082			}
18083			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRL, types.TypeFlags)
18084			v0.AuxInt = int32ToAuxInt(c)
18085			v0.AddArg2(x, y)
18086			b.resetWithControl(BlockARMGTnoov, v0)
18087			return true
18088		}
18089		// match: (GT (CMPconst [0] l:(SUBshiftRA x y [c])) yes no)
18090		// cond: l.Uses==1
18091		// result: (GTnoov (CMPshiftRA x y [c]) yes no)
18092		for b.Controls[0].Op == OpARMCMPconst {
18093			v_0 := b.Controls[0]
18094			if auxIntToInt32(v_0.AuxInt) != 0 {
18095				break
18096			}
18097			l := v_0.Args[0]
18098			if l.Op != OpARMSUBshiftRA {
18099				break
18100			}
18101			c := auxIntToInt32(l.AuxInt)
18102			y := l.Args[1]
18103			x := l.Args[0]
18104			if !(l.Uses == 1) {
18105				break
18106			}
18107			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRA, types.TypeFlags)
18108			v0.AuxInt = int32ToAuxInt(c)
18109			v0.AddArg2(x, y)
18110			b.resetWithControl(BlockARMGTnoov, v0)
18111			return true
18112		}
18113		// match: (GT (CMPconst [0] l:(SUBshiftLLreg x y z)) yes no)
18114		// cond: l.Uses==1
18115		// result: (GTnoov (CMPshiftLLreg x y z) yes no)
18116		for b.Controls[0].Op == OpARMCMPconst {
18117			v_0 := b.Controls[0]
18118			if auxIntToInt32(v_0.AuxInt) != 0 {
18119				break
18120			}
18121			l := v_0.Args[0]
18122			if l.Op != OpARMSUBshiftLLreg {
18123				break
18124			}
18125			z := l.Args[2]
18126			x := l.Args[0]
18127			y := l.Args[1]
18128			if !(l.Uses == 1) {
18129				break
18130			}
18131			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftLLreg, types.TypeFlags)
18132			v0.AddArg3(x, y, z)
18133			b.resetWithControl(BlockARMGTnoov, v0)
18134			return true
18135		}
18136		// match: (GT (CMPconst [0] l:(SUBshiftRLreg x y z)) yes no)
18137		// cond: l.Uses==1
18138		// result: (GTnoov (CMPshiftRLreg x y z) yes no)
18139		for b.Controls[0].Op == OpARMCMPconst {
18140			v_0 := b.Controls[0]
18141			if auxIntToInt32(v_0.AuxInt) != 0 {
18142				break
18143			}
18144			l := v_0.Args[0]
18145			if l.Op != OpARMSUBshiftRLreg {
18146				break
18147			}
18148			z := l.Args[2]
18149			x := l.Args[0]
18150			y := l.Args[1]
18151			if !(l.Uses == 1) {
18152				break
18153			}
18154			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRLreg, types.TypeFlags)
18155			v0.AddArg3(x, y, z)
18156			b.resetWithControl(BlockARMGTnoov, v0)
18157			return true
18158		}
18159		// match: (GT (CMPconst [0] l:(SUBshiftRAreg x y z)) yes no)
18160		// cond: l.Uses==1
18161		// result: (GTnoov (CMPshiftRAreg x y z) yes no)
18162		for b.Controls[0].Op == OpARMCMPconst {
18163			v_0 := b.Controls[0]
18164			if auxIntToInt32(v_0.AuxInt) != 0 {
18165				break
18166			}
18167			l := v_0.Args[0]
18168			if l.Op != OpARMSUBshiftRAreg {
18169				break
18170			}
18171			z := l.Args[2]
18172			x := l.Args[0]
18173			y := l.Args[1]
18174			if !(l.Uses == 1) {
18175				break
18176			}
18177			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRAreg, types.TypeFlags)
18178			v0.AddArg3(x, y, z)
18179			b.resetWithControl(BlockARMGTnoov, v0)
18180			return true
18181		}
18182		// match: (GT (CMPconst [0] l:(ADD x y)) yes no)
18183		// cond: l.Uses==1
18184		// result: (GTnoov (CMN x y) yes no)
18185		for b.Controls[0].Op == OpARMCMPconst {
18186			v_0 := b.Controls[0]
18187			if auxIntToInt32(v_0.AuxInt) != 0 {
18188				break
18189			}
18190			l := v_0.Args[0]
18191			if l.Op != OpARMADD {
18192				break
18193			}
18194			_ = l.Args[1]
18195			l_0 := l.Args[0]
18196			l_1 := l.Args[1]
18197			for _i0 := 0; _i0 <= 1; _i0, l_0, l_1 = _i0+1, l_1, l_0 {
18198				x := l_0
18199				y := l_1
18200				if !(l.Uses == 1) {
18201					continue
18202				}
18203				v0 := b.NewValue0(v_0.Pos, OpARMCMN, types.TypeFlags)
18204				v0.AddArg2(x, y)
18205				b.resetWithControl(BlockARMGTnoov, v0)
18206				return true
18207			}
18208			break
18209		}
18210		// match: (GT (CMPconst [0] l:(ADDconst [c] x)) yes no)
18211		// cond: l.Uses==1
18212		// result: (GTnoov (CMNconst [c] x) yes no)
18213		for b.Controls[0].Op == OpARMCMPconst {
18214			v_0 := b.Controls[0]
18215			if auxIntToInt32(v_0.AuxInt) != 0 {
18216				break
18217			}
18218			l := v_0.Args[0]
18219			if l.Op != OpARMADDconst {
18220				break
18221			}
18222			c := auxIntToInt32(l.AuxInt)
18223			x := l.Args[0]
18224			if !(l.Uses == 1) {
18225				break
18226			}
18227			v0 := b.NewValue0(v_0.Pos, OpARMCMNconst, types.TypeFlags)
18228			v0.AuxInt = int32ToAuxInt(c)
18229			v0.AddArg(x)
18230			b.resetWithControl(BlockARMGTnoov, v0)
18231			return true
18232		}
18233		// match: (GT (CMPconst [0] l:(ADDshiftLL x y [c])) yes no)
18234		// cond: l.Uses==1
18235		// result: (GTnoov (CMNshiftLL x y [c]) yes no)
18236		for b.Controls[0].Op == OpARMCMPconst {
18237			v_0 := b.Controls[0]
18238			if auxIntToInt32(v_0.AuxInt) != 0 {
18239				break
18240			}
18241			l := v_0.Args[0]
18242			if l.Op != OpARMADDshiftLL {
18243				break
18244			}
18245			c := auxIntToInt32(l.AuxInt)
18246			y := l.Args[1]
18247			x := l.Args[0]
18248			if !(l.Uses == 1) {
18249				break
18250			}
18251			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftLL, types.TypeFlags)
18252			v0.AuxInt = int32ToAuxInt(c)
18253			v0.AddArg2(x, y)
18254			b.resetWithControl(BlockARMGTnoov, v0)
18255			return true
18256		}
18257		// match: (GT (CMPconst [0] l:(ADDshiftRL x y [c])) yes no)
18258		// cond: l.Uses==1
18259		// result: (GTnoov (CMNshiftRL x y [c]) yes no)
18260		for b.Controls[0].Op == OpARMCMPconst {
18261			v_0 := b.Controls[0]
18262			if auxIntToInt32(v_0.AuxInt) != 0 {
18263				break
18264			}
18265			l := v_0.Args[0]
18266			if l.Op != OpARMADDshiftRL {
18267				break
18268			}
18269			c := auxIntToInt32(l.AuxInt)
18270			y := l.Args[1]
18271			x := l.Args[0]
18272			if !(l.Uses == 1) {
18273				break
18274			}
18275			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRL, types.TypeFlags)
18276			v0.AuxInt = int32ToAuxInt(c)
18277			v0.AddArg2(x, y)
18278			b.resetWithControl(BlockARMGTnoov, v0)
18279			return true
18280		}
18281		// match: (GT (CMPconst [0] l:(ADDshiftRA x y [c])) yes no)
18282		// cond: l.Uses==1
18283		// result: (GTnoov (CMNshiftRA x y [c]) yes no)
18284		for b.Controls[0].Op == OpARMCMPconst {
18285			v_0 := b.Controls[0]
18286			if auxIntToInt32(v_0.AuxInt) != 0 {
18287				break
18288			}
18289			l := v_0.Args[0]
18290			if l.Op != OpARMADDshiftRA {
18291				break
18292			}
18293			c := auxIntToInt32(l.AuxInt)
18294			y := l.Args[1]
18295			x := l.Args[0]
18296			if !(l.Uses == 1) {
18297				break
18298			}
18299			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRA, types.TypeFlags)
18300			v0.AuxInt = int32ToAuxInt(c)
18301			v0.AddArg2(x, y)
18302			b.resetWithControl(BlockARMGTnoov, v0)
18303			return true
18304		}
18305		// match: (GT (CMPconst [0] l:(ADDshiftLLreg x y z)) yes no)
18306		// cond: l.Uses==1
18307		// result: (GTnoov (CMNshiftLLreg x y z) yes no)
18308		for b.Controls[0].Op == OpARMCMPconst {
18309			v_0 := b.Controls[0]
18310			if auxIntToInt32(v_0.AuxInt) != 0 {
18311				break
18312			}
18313			l := v_0.Args[0]
18314			if l.Op != OpARMADDshiftLLreg {
18315				break
18316			}
18317			z := l.Args[2]
18318			x := l.Args[0]
18319			y := l.Args[1]
18320			if !(l.Uses == 1) {
18321				break
18322			}
18323			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftLLreg, types.TypeFlags)
18324			v0.AddArg3(x, y, z)
18325			b.resetWithControl(BlockARMGTnoov, v0)
18326			return true
18327		}
18328		// match: (GT (CMPconst [0] l:(ADDshiftRLreg x y z)) yes no)
18329		// cond: l.Uses==1
18330		// result: (GTnoov (CMNshiftRLreg x y z) yes no)
18331		for b.Controls[0].Op == OpARMCMPconst {
18332			v_0 := b.Controls[0]
18333			if auxIntToInt32(v_0.AuxInt) != 0 {
18334				break
18335			}
18336			l := v_0.Args[0]
18337			if l.Op != OpARMADDshiftRLreg {
18338				break
18339			}
18340			z := l.Args[2]
18341			x := l.Args[0]
18342			y := l.Args[1]
18343			if !(l.Uses == 1) {
18344				break
18345			}
18346			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRLreg, types.TypeFlags)
18347			v0.AddArg3(x, y, z)
18348			b.resetWithControl(BlockARMGTnoov, v0)
18349			return true
18350		}
18351		// match: (GT (CMPconst [0] l:(ADDshiftRAreg x y z)) yes no)
18352		// cond: l.Uses==1
18353		// result: (GTnoov (CMNshiftRAreg x y z) yes no)
18354		for b.Controls[0].Op == OpARMCMPconst {
18355			v_0 := b.Controls[0]
18356			if auxIntToInt32(v_0.AuxInt) != 0 {
18357				break
18358			}
18359			l := v_0.Args[0]
18360			if l.Op != OpARMADDshiftRAreg {
18361				break
18362			}
18363			z := l.Args[2]
18364			x := l.Args[0]
18365			y := l.Args[1]
18366			if !(l.Uses == 1) {
18367				break
18368			}
18369			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRAreg, types.TypeFlags)
18370			v0.AddArg3(x, y, z)
18371			b.resetWithControl(BlockARMGTnoov, v0)
18372			return true
18373		}
18374		// match: (GT (CMPconst [0] l:(MULA x y a)) yes no)
18375		// cond: l.Uses==1
18376		// result: (GTnoov (CMN a (MUL <x.Type> x y)) yes no)
18377		for b.Controls[0].Op == OpARMCMPconst {
18378			v_0 := b.Controls[0]
18379			if auxIntToInt32(v_0.AuxInt) != 0 {
18380				break
18381			}
18382			l := v_0.Args[0]
18383			if l.Op != OpARMMULA {
18384				break
18385			}
18386			a := l.Args[2]
18387			x := l.Args[0]
18388			y := l.Args[1]
18389			if !(l.Uses == 1) {
18390				break
18391			}
18392			v0 := b.NewValue0(v_0.Pos, OpARMCMN, types.TypeFlags)
18393			v1 := b.NewValue0(v_0.Pos, OpARMMUL, x.Type)
18394			v1.AddArg2(x, y)
18395			v0.AddArg2(a, v1)
18396			b.resetWithControl(BlockARMGTnoov, v0)
18397			return true
18398		}
18399		// match: (GT (CMPconst [0] l:(AND x y)) yes no)
18400		// cond: l.Uses==1
18401		// result: (GTnoov (TST x y) yes no)
18402		for b.Controls[0].Op == OpARMCMPconst {
18403			v_0 := b.Controls[0]
18404			if auxIntToInt32(v_0.AuxInt) != 0 {
18405				break
18406			}
18407			l := v_0.Args[0]
18408			if l.Op != OpARMAND {
18409				break
18410			}
18411			_ = l.Args[1]
18412			l_0 := l.Args[0]
18413			l_1 := l.Args[1]
18414			for _i0 := 0; _i0 <= 1; _i0, l_0, l_1 = _i0+1, l_1, l_0 {
18415				x := l_0
18416				y := l_1
18417				if !(l.Uses == 1) {
18418					continue
18419				}
18420				v0 := b.NewValue0(v_0.Pos, OpARMTST, types.TypeFlags)
18421				v0.AddArg2(x, y)
18422				b.resetWithControl(BlockARMGTnoov, v0)
18423				return true
18424			}
18425			break
18426		}
18427		// match: (GT (CMPconst [0] l:(ANDconst [c] x)) yes no)
18428		// cond: l.Uses==1
18429		// result: (GTnoov (TSTconst [c] x) yes no)
18430		for b.Controls[0].Op == OpARMCMPconst {
18431			v_0 := b.Controls[0]
18432			if auxIntToInt32(v_0.AuxInt) != 0 {
18433				break
18434			}
18435			l := v_0.Args[0]
18436			if l.Op != OpARMANDconst {
18437				break
18438			}
18439			c := auxIntToInt32(l.AuxInt)
18440			x := l.Args[0]
18441			if !(l.Uses == 1) {
18442				break
18443			}
18444			v0 := b.NewValue0(v_0.Pos, OpARMTSTconst, types.TypeFlags)
18445			v0.AuxInt = int32ToAuxInt(c)
18446			v0.AddArg(x)
18447			b.resetWithControl(BlockARMGTnoov, v0)
18448			return true
18449		}
18450		// match: (GT (CMPconst [0] l:(ANDshiftLL x y [c])) yes no)
18451		// cond: l.Uses==1
18452		// result: (GTnoov (TSTshiftLL x y [c]) yes no)
18453		for b.Controls[0].Op == OpARMCMPconst {
18454			v_0 := b.Controls[0]
18455			if auxIntToInt32(v_0.AuxInt) != 0 {
18456				break
18457			}
18458			l := v_0.Args[0]
18459			if l.Op != OpARMANDshiftLL {
18460				break
18461			}
18462			c := auxIntToInt32(l.AuxInt)
18463			y := l.Args[1]
18464			x := l.Args[0]
18465			if !(l.Uses == 1) {
18466				break
18467			}
18468			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftLL, types.TypeFlags)
18469			v0.AuxInt = int32ToAuxInt(c)
18470			v0.AddArg2(x, y)
18471			b.resetWithControl(BlockARMGTnoov, v0)
18472			return true
18473		}
18474		// match: (GT (CMPconst [0] l:(ANDshiftRL x y [c])) yes no)
18475		// cond: l.Uses==1
18476		// result: (GTnoov (TSTshiftRL x y [c]) yes no)
18477		for b.Controls[0].Op == OpARMCMPconst {
18478			v_0 := b.Controls[0]
18479			if auxIntToInt32(v_0.AuxInt) != 0 {
18480				break
18481			}
18482			l := v_0.Args[0]
18483			if l.Op != OpARMANDshiftRL {
18484				break
18485			}
18486			c := auxIntToInt32(l.AuxInt)
18487			y := l.Args[1]
18488			x := l.Args[0]
18489			if !(l.Uses == 1) {
18490				break
18491			}
18492			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRL, types.TypeFlags)
18493			v0.AuxInt = int32ToAuxInt(c)
18494			v0.AddArg2(x, y)
18495			b.resetWithControl(BlockARMGTnoov, v0)
18496			return true
18497		}
18498		// match: (GT (CMPconst [0] l:(ANDshiftRA x y [c])) yes no)
18499		// cond: l.Uses==1
18500		// result: (GTnoov (TSTshiftRA x y [c]) yes no)
18501		for b.Controls[0].Op == OpARMCMPconst {
18502			v_0 := b.Controls[0]
18503			if auxIntToInt32(v_0.AuxInt) != 0 {
18504				break
18505			}
18506			l := v_0.Args[0]
18507			if l.Op != OpARMANDshiftRA {
18508				break
18509			}
18510			c := auxIntToInt32(l.AuxInt)
18511			y := l.Args[1]
18512			x := l.Args[0]
18513			if !(l.Uses == 1) {
18514				break
18515			}
18516			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRA, types.TypeFlags)
18517			v0.AuxInt = int32ToAuxInt(c)
18518			v0.AddArg2(x, y)
18519			b.resetWithControl(BlockARMGTnoov, v0)
18520			return true
18521		}
18522		// match: (GT (CMPconst [0] l:(ANDshiftLLreg x y z)) yes no)
18523		// cond: l.Uses==1
18524		// result: (GTnoov (TSTshiftLLreg x y z) yes no)
18525		for b.Controls[0].Op == OpARMCMPconst {
18526			v_0 := b.Controls[0]
18527			if auxIntToInt32(v_0.AuxInt) != 0 {
18528				break
18529			}
18530			l := v_0.Args[0]
18531			if l.Op != OpARMANDshiftLLreg {
18532				break
18533			}
18534			z := l.Args[2]
18535			x := l.Args[0]
18536			y := l.Args[1]
18537			if !(l.Uses == 1) {
18538				break
18539			}
18540			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftLLreg, types.TypeFlags)
18541			v0.AddArg3(x, y, z)
18542			b.resetWithControl(BlockARMGTnoov, v0)
18543			return true
18544		}
18545		// match: (GT (CMPconst [0] l:(ANDshiftRLreg x y z)) yes no)
18546		// cond: l.Uses==1
18547		// result: (GTnoov (TSTshiftRLreg x y z) yes no)
18548		for b.Controls[0].Op == OpARMCMPconst {
18549			v_0 := b.Controls[0]
18550			if auxIntToInt32(v_0.AuxInt) != 0 {
18551				break
18552			}
18553			l := v_0.Args[0]
18554			if l.Op != OpARMANDshiftRLreg {
18555				break
18556			}
18557			z := l.Args[2]
18558			x := l.Args[0]
18559			y := l.Args[1]
18560			if !(l.Uses == 1) {
18561				break
18562			}
18563			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRLreg, types.TypeFlags)
18564			v0.AddArg3(x, y, z)
18565			b.resetWithControl(BlockARMGTnoov, v0)
18566			return true
18567		}
18568		// match: (GT (CMPconst [0] l:(ANDshiftRAreg x y z)) yes no)
18569		// cond: l.Uses==1
18570		// result: (GTnoov (TSTshiftRAreg x y z) yes no)
18571		for b.Controls[0].Op == OpARMCMPconst {
18572			v_0 := b.Controls[0]
18573			if auxIntToInt32(v_0.AuxInt) != 0 {
18574				break
18575			}
18576			l := v_0.Args[0]
18577			if l.Op != OpARMANDshiftRAreg {
18578				break
18579			}
18580			z := l.Args[2]
18581			x := l.Args[0]
18582			y := l.Args[1]
18583			if !(l.Uses == 1) {
18584				break
18585			}
18586			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRAreg, types.TypeFlags)
18587			v0.AddArg3(x, y, z)
18588			b.resetWithControl(BlockARMGTnoov, v0)
18589			return true
18590		}
18591		// match: (GT (CMPconst [0] l:(XOR x y)) yes no)
18592		// cond: l.Uses==1
18593		// result: (GTnoov (TEQ x y) yes no)
18594		for b.Controls[0].Op == OpARMCMPconst {
18595			v_0 := b.Controls[0]
18596			if auxIntToInt32(v_0.AuxInt) != 0 {
18597				break
18598			}
18599			l := v_0.Args[0]
18600			if l.Op != OpARMXOR {
18601				break
18602			}
18603			_ = l.Args[1]
18604			l_0 := l.Args[0]
18605			l_1 := l.Args[1]
18606			for _i0 := 0; _i0 <= 1; _i0, l_0, l_1 = _i0+1, l_1, l_0 {
18607				x := l_0
18608				y := l_1
18609				if !(l.Uses == 1) {
18610					continue
18611				}
18612				v0 := b.NewValue0(v_0.Pos, OpARMTEQ, types.TypeFlags)
18613				v0.AddArg2(x, y)
18614				b.resetWithControl(BlockARMGTnoov, v0)
18615				return true
18616			}
18617			break
18618		}
18619		// match: (GT (CMPconst [0] l:(XORconst [c] x)) yes no)
18620		// cond: l.Uses==1
18621		// result: (GTnoov (TEQconst [c] x) yes no)
18622		for b.Controls[0].Op == OpARMCMPconst {
18623			v_0 := b.Controls[0]
18624			if auxIntToInt32(v_0.AuxInt) != 0 {
18625				break
18626			}
18627			l := v_0.Args[0]
18628			if l.Op != OpARMXORconst {
18629				break
18630			}
18631			c := auxIntToInt32(l.AuxInt)
18632			x := l.Args[0]
18633			if !(l.Uses == 1) {
18634				break
18635			}
18636			v0 := b.NewValue0(v_0.Pos, OpARMTEQconst, types.TypeFlags)
18637			v0.AuxInt = int32ToAuxInt(c)
18638			v0.AddArg(x)
18639			b.resetWithControl(BlockARMGTnoov, v0)
18640			return true
18641		}
18642		// match: (GT (CMPconst [0] l:(XORshiftLL x y [c])) yes no)
18643		// cond: l.Uses==1
18644		// result: (GTnoov (TEQshiftLL x y [c]) yes no)
18645		for b.Controls[0].Op == OpARMCMPconst {
18646			v_0 := b.Controls[0]
18647			if auxIntToInt32(v_0.AuxInt) != 0 {
18648				break
18649			}
18650			l := v_0.Args[0]
18651			if l.Op != OpARMXORshiftLL {
18652				break
18653			}
18654			c := auxIntToInt32(l.AuxInt)
18655			y := l.Args[1]
18656			x := l.Args[0]
18657			if !(l.Uses == 1) {
18658				break
18659			}
18660			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftLL, types.TypeFlags)
18661			v0.AuxInt = int32ToAuxInt(c)
18662			v0.AddArg2(x, y)
18663			b.resetWithControl(BlockARMGTnoov, v0)
18664			return true
18665		}
18666		// match: (GT (CMPconst [0] l:(XORshiftRL x y [c])) yes no)
18667		// cond: l.Uses==1
18668		// result: (GTnoov (TEQshiftRL x y [c]) yes no)
18669		for b.Controls[0].Op == OpARMCMPconst {
18670			v_0 := b.Controls[0]
18671			if auxIntToInt32(v_0.AuxInt) != 0 {
18672				break
18673			}
18674			l := v_0.Args[0]
18675			if l.Op != OpARMXORshiftRL {
18676				break
18677			}
18678			c := auxIntToInt32(l.AuxInt)
18679			y := l.Args[1]
18680			x := l.Args[0]
18681			if !(l.Uses == 1) {
18682				break
18683			}
18684			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRL, types.TypeFlags)
18685			v0.AuxInt = int32ToAuxInt(c)
18686			v0.AddArg2(x, y)
18687			b.resetWithControl(BlockARMGTnoov, v0)
18688			return true
18689		}
18690		// match: (GT (CMPconst [0] l:(XORshiftRA x y [c])) yes no)
18691		// cond: l.Uses==1
18692		// result: (GTnoov (TEQshiftRA x y [c]) yes no)
18693		for b.Controls[0].Op == OpARMCMPconst {
18694			v_0 := b.Controls[0]
18695			if auxIntToInt32(v_0.AuxInt) != 0 {
18696				break
18697			}
18698			l := v_0.Args[0]
18699			if l.Op != OpARMXORshiftRA {
18700				break
18701			}
18702			c := auxIntToInt32(l.AuxInt)
18703			y := l.Args[1]
18704			x := l.Args[0]
18705			if !(l.Uses == 1) {
18706				break
18707			}
18708			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRA, types.TypeFlags)
18709			v0.AuxInt = int32ToAuxInt(c)
18710			v0.AddArg2(x, y)
18711			b.resetWithControl(BlockARMGTnoov, v0)
18712			return true
18713		}
18714		// match: (GT (CMPconst [0] l:(XORshiftLLreg x y z)) yes no)
18715		// cond: l.Uses==1
18716		// result: (GTnoov (TEQshiftLLreg x y z) yes no)
18717		for b.Controls[0].Op == OpARMCMPconst {
18718			v_0 := b.Controls[0]
18719			if auxIntToInt32(v_0.AuxInt) != 0 {
18720				break
18721			}
18722			l := v_0.Args[0]
18723			if l.Op != OpARMXORshiftLLreg {
18724				break
18725			}
18726			z := l.Args[2]
18727			x := l.Args[0]
18728			y := l.Args[1]
18729			if !(l.Uses == 1) {
18730				break
18731			}
18732			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftLLreg, types.TypeFlags)
18733			v0.AddArg3(x, y, z)
18734			b.resetWithControl(BlockARMGTnoov, v0)
18735			return true
18736		}
18737		// match: (GT (CMPconst [0] l:(XORshiftRLreg x y z)) yes no)
18738		// cond: l.Uses==1
18739		// result: (GTnoov (TEQshiftRLreg x y z) yes no)
18740		for b.Controls[0].Op == OpARMCMPconst {
18741			v_0 := b.Controls[0]
18742			if auxIntToInt32(v_0.AuxInt) != 0 {
18743				break
18744			}
18745			l := v_0.Args[0]
18746			if l.Op != OpARMXORshiftRLreg {
18747				break
18748			}
18749			z := l.Args[2]
18750			x := l.Args[0]
18751			y := l.Args[1]
18752			if !(l.Uses == 1) {
18753				break
18754			}
18755			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRLreg, types.TypeFlags)
18756			v0.AddArg3(x, y, z)
18757			b.resetWithControl(BlockARMGTnoov, v0)
18758			return true
18759		}
18760		// match: (GT (CMPconst [0] l:(XORshiftRAreg x y z)) yes no)
18761		// cond: l.Uses==1
18762		// result: (GTnoov (TEQshiftRAreg x y z) yes no)
18763		for b.Controls[0].Op == OpARMCMPconst {
18764			v_0 := b.Controls[0]
18765			if auxIntToInt32(v_0.AuxInt) != 0 {
18766				break
18767			}
18768			l := v_0.Args[0]
18769			if l.Op != OpARMXORshiftRAreg {
18770				break
18771			}
18772			z := l.Args[2]
18773			x := l.Args[0]
18774			y := l.Args[1]
18775			if !(l.Uses == 1) {
18776				break
18777			}
18778			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRAreg, types.TypeFlags)
18779			v0.AddArg3(x, y, z)
18780			b.resetWithControl(BlockARMGTnoov, v0)
18781			return true
18782		}
18783	case BlockARMGTnoov:
18784		// match: (GTnoov (FlagConstant [fc]) yes no)
18785		// cond: fc.gtNoov()
18786		// result: (First yes no)
18787		for b.Controls[0].Op == OpARMFlagConstant {
18788			v_0 := b.Controls[0]
18789			fc := auxIntToFlagConstant(v_0.AuxInt)
18790			if !(fc.gtNoov()) {
18791				break
18792			}
18793			b.Reset(BlockFirst)
18794			return true
18795		}
18796		// match: (GTnoov (FlagConstant [fc]) yes no)
18797		// cond: !fc.gtNoov()
18798		// result: (First no yes)
18799		for b.Controls[0].Op == OpARMFlagConstant {
18800			v_0 := b.Controls[0]
18801			fc := auxIntToFlagConstant(v_0.AuxInt)
18802			if !(!fc.gtNoov()) {
18803				break
18804			}
18805			b.Reset(BlockFirst)
18806			b.swapSuccessors()
18807			return true
18808		}
18809		// match: (GTnoov (InvertFlags cmp) yes no)
18810		// result: (LTnoov cmp yes no)
18811		for b.Controls[0].Op == OpARMInvertFlags {
18812			v_0 := b.Controls[0]
18813			cmp := v_0.Args[0]
18814			b.resetWithControl(BlockARMLTnoov, cmp)
18815			return true
18816		}
18817	case BlockIf:
18818		// match: (If (Equal cc) yes no)
18819		// result: (EQ cc yes no)
18820		for b.Controls[0].Op == OpARMEqual {
18821			v_0 := b.Controls[0]
18822			cc := v_0.Args[0]
18823			b.resetWithControl(BlockARMEQ, cc)
18824			return true
18825		}
18826		// match: (If (NotEqual cc) yes no)
18827		// result: (NE cc yes no)
18828		for b.Controls[0].Op == OpARMNotEqual {
18829			v_0 := b.Controls[0]
18830			cc := v_0.Args[0]
18831			b.resetWithControl(BlockARMNE, cc)
18832			return true
18833		}
18834		// match: (If (LessThan cc) yes no)
18835		// result: (LT cc yes no)
18836		for b.Controls[0].Op == OpARMLessThan {
18837			v_0 := b.Controls[0]
18838			cc := v_0.Args[0]
18839			b.resetWithControl(BlockARMLT, cc)
18840			return true
18841		}
18842		// match: (If (LessThanU cc) yes no)
18843		// result: (ULT cc yes no)
18844		for b.Controls[0].Op == OpARMLessThanU {
18845			v_0 := b.Controls[0]
18846			cc := v_0.Args[0]
18847			b.resetWithControl(BlockARMULT, cc)
18848			return true
18849		}
18850		// match: (If (LessEqual cc) yes no)
18851		// result: (LE cc yes no)
18852		for b.Controls[0].Op == OpARMLessEqual {
18853			v_0 := b.Controls[0]
18854			cc := v_0.Args[0]
18855			b.resetWithControl(BlockARMLE, cc)
18856			return true
18857		}
18858		// match: (If (LessEqualU cc) yes no)
18859		// result: (ULE cc yes no)
18860		for b.Controls[0].Op == OpARMLessEqualU {
18861			v_0 := b.Controls[0]
18862			cc := v_0.Args[0]
18863			b.resetWithControl(BlockARMULE, cc)
18864			return true
18865		}
18866		// match: (If (GreaterThan cc) yes no)
18867		// result: (GT cc yes no)
18868		for b.Controls[0].Op == OpARMGreaterThan {
18869			v_0 := b.Controls[0]
18870			cc := v_0.Args[0]
18871			b.resetWithControl(BlockARMGT, cc)
18872			return true
18873		}
18874		// match: (If (GreaterThanU cc) yes no)
18875		// result: (UGT cc yes no)
18876		for b.Controls[0].Op == OpARMGreaterThanU {
18877			v_0 := b.Controls[0]
18878			cc := v_0.Args[0]
18879			b.resetWithControl(BlockARMUGT, cc)
18880			return true
18881		}
18882		// match: (If (GreaterEqual cc) yes no)
18883		// result: (GE cc yes no)
18884		for b.Controls[0].Op == OpARMGreaterEqual {
18885			v_0 := b.Controls[0]
18886			cc := v_0.Args[0]
18887			b.resetWithControl(BlockARMGE, cc)
18888			return true
18889		}
18890		// match: (If (GreaterEqualU cc) yes no)
18891		// result: (UGE cc yes no)
18892		for b.Controls[0].Op == OpARMGreaterEqualU {
18893			v_0 := b.Controls[0]
18894			cc := v_0.Args[0]
18895			b.resetWithControl(BlockARMUGE, cc)
18896			return true
18897		}
18898		// match: (If cond yes no)
18899		// result: (NE (CMPconst [0] cond) yes no)
18900		for {
18901			cond := b.Controls[0]
18902			v0 := b.NewValue0(cond.Pos, OpARMCMPconst, types.TypeFlags)
18903			v0.AuxInt = int32ToAuxInt(0)
18904			v0.AddArg(cond)
18905			b.resetWithControl(BlockARMNE, v0)
18906			return true
18907		}
18908	case BlockARMLE:
18909		// match: (LE (FlagConstant [fc]) yes no)
18910		// cond: fc.le()
18911		// result: (First yes no)
18912		for b.Controls[0].Op == OpARMFlagConstant {
18913			v_0 := b.Controls[0]
18914			fc := auxIntToFlagConstant(v_0.AuxInt)
18915			if !(fc.le()) {
18916				break
18917			}
18918			b.Reset(BlockFirst)
18919			return true
18920		}
18921		// match: (LE (FlagConstant [fc]) yes no)
18922		// cond: !fc.le()
18923		// result: (First no yes)
18924		for b.Controls[0].Op == OpARMFlagConstant {
18925			v_0 := b.Controls[0]
18926			fc := auxIntToFlagConstant(v_0.AuxInt)
18927			if !(!fc.le()) {
18928				break
18929			}
18930			b.Reset(BlockFirst)
18931			b.swapSuccessors()
18932			return true
18933		}
18934		// match: (LE (InvertFlags cmp) yes no)
18935		// result: (GE cmp yes no)
18936		for b.Controls[0].Op == OpARMInvertFlags {
18937			v_0 := b.Controls[0]
18938			cmp := v_0.Args[0]
18939			b.resetWithControl(BlockARMGE, cmp)
18940			return true
18941		}
18942		// match: (LE (CMPconst [0] l:(SUB x y)) yes no)
18943		// cond: l.Uses==1
18944		// result: (LEnoov (CMP x y) yes no)
18945		for b.Controls[0].Op == OpARMCMPconst {
18946			v_0 := b.Controls[0]
18947			if auxIntToInt32(v_0.AuxInt) != 0 {
18948				break
18949			}
18950			l := v_0.Args[0]
18951			if l.Op != OpARMSUB {
18952				break
18953			}
18954			y := l.Args[1]
18955			x := l.Args[0]
18956			if !(l.Uses == 1) {
18957				break
18958			}
18959			v0 := b.NewValue0(v_0.Pos, OpARMCMP, types.TypeFlags)
18960			v0.AddArg2(x, y)
18961			b.resetWithControl(BlockARMLEnoov, v0)
18962			return true
18963		}
18964		// match: (LE (CMPconst [0] l:(MULS x y a)) yes no)
18965		// cond: l.Uses==1
18966		// result: (LEnoov (CMP a (MUL <x.Type> x y)) yes no)
18967		for b.Controls[0].Op == OpARMCMPconst {
18968			v_0 := b.Controls[0]
18969			if auxIntToInt32(v_0.AuxInt) != 0 {
18970				break
18971			}
18972			l := v_0.Args[0]
18973			if l.Op != OpARMMULS {
18974				break
18975			}
18976			a := l.Args[2]
18977			x := l.Args[0]
18978			y := l.Args[1]
18979			if !(l.Uses == 1) {
18980				break
18981			}
18982			v0 := b.NewValue0(v_0.Pos, OpARMCMP, types.TypeFlags)
18983			v1 := b.NewValue0(v_0.Pos, OpARMMUL, x.Type)
18984			v1.AddArg2(x, y)
18985			v0.AddArg2(a, v1)
18986			b.resetWithControl(BlockARMLEnoov, v0)
18987			return true
18988		}
18989		// match: (LE (CMPconst [0] l:(SUBconst [c] x)) yes no)
18990		// cond: l.Uses==1
18991		// result: (LEnoov (CMPconst [c] x) yes no)
18992		for b.Controls[0].Op == OpARMCMPconst {
18993			v_0 := b.Controls[0]
18994			if auxIntToInt32(v_0.AuxInt) != 0 {
18995				break
18996			}
18997			l := v_0.Args[0]
18998			if l.Op != OpARMSUBconst {
18999				break
19000			}
19001			c := auxIntToInt32(l.AuxInt)
19002			x := l.Args[0]
19003			if !(l.Uses == 1) {
19004				break
19005			}
19006			v0 := b.NewValue0(v_0.Pos, OpARMCMPconst, types.TypeFlags)
19007			v0.AuxInt = int32ToAuxInt(c)
19008			v0.AddArg(x)
19009			b.resetWithControl(BlockARMLEnoov, v0)
19010			return true
19011		}
19012		// match: (LE (CMPconst [0] l:(SUBshiftLL x y [c])) yes no)
19013		// cond: l.Uses==1
19014		// result: (LEnoov (CMPshiftLL x y [c]) yes no)
19015		for b.Controls[0].Op == OpARMCMPconst {
19016			v_0 := b.Controls[0]
19017			if auxIntToInt32(v_0.AuxInt) != 0 {
19018				break
19019			}
19020			l := v_0.Args[0]
19021			if l.Op != OpARMSUBshiftLL {
19022				break
19023			}
19024			c := auxIntToInt32(l.AuxInt)
19025			y := l.Args[1]
19026			x := l.Args[0]
19027			if !(l.Uses == 1) {
19028				break
19029			}
19030			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftLL, types.TypeFlags)
19031			v0.AuxInt = int32ToAuxInt(c)
19032			v0.AddArg2(x, y)
19033			b.resetWithControl(BlockARMLEnoov, v0)
19034			return true
19035		}
19036		// match: (LE (CMPconst [0] l:(SUBshiftRL x y [c])) yes no)
19037		// cond: l.Uses==1
19038		// result: (LEnoov (CMPshiftRL x y [c]) yes no)
19039		for b.Controls[0].Op == OpARMCMPconst {
19040			v_0 := b.Controls[0]
19041			if auxIntToInt32(v_0.AuxInt) != 0 {
19042				break
19043			}
19044			l := v_0.Args[0]
19045			if l.Op != OpARMSUBshiftRL {
19046				break
19047			}
19048			c := auxIntToInt32(l.AuxInt)
19049			y := l.Args[1]
19050			x := l.Args[0]
19051			if !(l.Uses == 1) {
19052				break
19053			}
19054			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRL, types.TypeFlags)
19055			v0.AuxInt = int32ToAuxInt(c)
19056			v0.AddArg2(x, y)
19057			b.resetWithControl(BlockARMLEnoov, v0)
19058			return true
19059		}
19060		// match: (LE (CMPconst [0] l:(SUBshiftRA x y [c])) yes no)
19061		// cond: l.Uses==1
19062		// result: (LEnoov (CMPshiftRA x y [c]) yes no)
19063		for b.Controls[0].Op == OpARMCMPconst {
19064			v_0 := b.Controls[0]
19065			if auxIntToInt32(v_0.AuxInt) != 0 {
19066				break
19067			}
19068			l := v_0.Args[0]
19069			if l.Op != OpARMSUBshiftRA {
19070				break
19071			}
19072			c := auxIntToInt32(l.AuxInt)
19073			y := l.Args[1]
19074			x := l.Args[0]
19075			if !(l.Uses == 1) {
19076				break
19077			}
19078			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRA, types.TypeFlags)
19079			v0.AuxInt = int32ToAuxInt(c)
19080			v0.AddArg2(x, y)
19081			b.resetWithControl(BlockARMLEnoov, v0)
19082			return true
19083		}
19084		// match: (LE (CMPconst [0] l:(SUBshiftLLreg x y z)) yes no)
19085		// cond: l.Uses==1
19086		// result: (LEnoov (CMPshiftLLreg x y z) yes no)
19087		for b.Controls[0].Op == OpARMCMPconst {
19088			v_0 := b.Controls[0]
19089			if auxIntToInt32(v_0.AuxInt) != 0 {
19090				break
19091			}
19092			l := v_0.Args[0]
19093			if l.Op != OpARMSUBshiftLLreg {
19094				break
19095			}
19096			z := l.Args[2]
19097			x := l.Args[0]
19098			y := l.Args[1]
19099			if !(l.Uses == 1) {
19100				break
19101			}
19102			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftLLreg, types.TypeFlags)
19103			v0.AddArg3(x, y, z)
19104			b.resetWithControl(BlockARMLEnoov, v0)
19105			return true
19106		}
19107		// match: (LE (CMPconst [0] l:(SUBshiftRLreg x y z)) yes no)
19108		// cond: l.Uses==1
19109		// result: (LEnoov (CMPshiftRLreg x y z) yes no)
19110		for b.Controls[0].Op == OpARMCMPconst {
19111			v_0 := b.Controls[0]
19112			if auxIntToInt32(v_0.AuxInt) != 0 {
19113				break
19114			}
19115			l := v_0.Args[0]
19116			if l.Op != OpARMSUBshiftRLreg {
19117				break
19118			}
19119			z := l.Args[2]
19120			x := l.Args[0]
19121			y := l.Args[1]
19122			if !(l.Uses == 1) {
19123				break
19124			}
19125			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRLreg, types.TypeFlags)
19126			v0.AddArg3(x, y, z)
19127			b.resetWithControl(BlockARMLEnoov, v0)
19128			return true
19129		}
19130		// match: (LE (CMPconst [0] l:(SUBshiftRAreg x y z)) yes no)
19131		// cond: l.Uses==1
19132		// result: (LEnoov (CMPshiftRAreg x y z) yes no)
19133		for b.Controls[0].Op == OpARMCMPconst {
19134			v_0 := b.Controls[0]
19135			if auxIntToInt32(v_0.AuxInt) != 0 {
19136				break
19137			}
19138			l := v_0.Args[0]
19139			if l.Op != OpARMSUBshiftRAreg {
19140				break
19141			}
19142			z := l.Args[2]
19143			x := l.Args[0]
19144			y := l.Args[1]
19145			if !(l.Uses == 1) {
19146				break
19147			}
19148			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRAreg, types.TypeFlags)
19149			v0.AddArg3(x, y, z)
19150			b.resetWithControl(BlockARMLEnoov, v0)
19151			return true
19152		}
19153		// match: (LE (CMPconst [0] l:(ADD x y)) yes no)
19154		// cond: l.Uses==1
19155		// result: (LEnoov (CMN x y) yes no)
19156		for b.Controls[0].Op == OpARMCMPconst {
19157			v_0 := b.Controls[0]
19158			if auxIntToInt32(v_0.AuxInt) != 0 {
19159				break
19160			}
19161			l := v_0.Args[0]
19162			if l.Op != OpARMADD {
19163				break
19164			}
19165			_ = l.Args[1]
19166			l_0 := l.Args[0]
19167			l_1 := l.Args[1]
19168			for _i0 := 0; _i0 <= 1; _i0, l_0, l_1 = _i0+1, l_1, l_0 {
19169				x := l_0
19170				y := l_1
19171				if !(l.Uses == 1) {
19172					continue
19173				}
19174				v0 := b.NewValue0(v_0.Pos, OpARMCMN, types.TypeFlags)
19175				v0.AddArg2(x, y)
19176				b.resetWithControl(BlockARMLEnoov, v0)
19177				return true
19178			}
19179			break
19180		}
19181		// match: (LE (CMPconst [0] l:(MULA x y a)) yes no)
19182		// cond: l.Uses==1
19183		// result: (LEnoov (CMN a (MUL <x.Type> x y)) yes no)
19184		for b.Controls[0].Op == OpARMCMPconst {
19185			v_0 := b.Controls[0]
19186			if auxIntToInt32(v_0.AuxInt) != 0 {
19187				break
19188			}
19189			l := v_0.Args[0]
19190			if l.Op != OpARMMULA {
19191				break
19192			}
19193			a := l.Args[2]
19194			x := l.Args[0]
19195			y := l.Args[1]
19196			if !(l.Uses == 1) {
19197				break
19198			}
19199			v0 := b.NewValue0(v_0.Pos, OpARMCMN, types.TypeFlags)
19200			v1 := b.NewValue0(v_0.Pos, OpARMMUL, x.Type)
19201			v1.AddArg2(x, y)
19202			v0.AddArg2(a, v1)
19203			b.resetWithControl(BlockARMLEnoov, v0)
19204			return true
19205		}
19206		// match: (LE (CMPconst [0] l:(ADDconst [c] x)) yes no)
19207		// cond: l.Uses==1
19208		// result: (LEnoov (CMNconst [c] x) yes no)
19209		for b.Controls[0].Op == OpARMCMPconst {
19210			v_0 := b.Controls[0]
19211			if auxIntToInt32(v_0.AuxInt) != 0 {
19212				break
19213			}
19214			l := v_0.Args[0]
19215			if l.Op != OpARMADDconst {
19216				break
19217			}
19218			c := auxIntToInt32(l.AuxInt)
19219			x := l.Args[0]
19220			if !(l.Uses == 1) {
19221				break
19222			}
19223			v0 := b.NewValue0(v_0.Pos, OpARMCMNconst, types.TypeFlags)
19224			v0.AuxInt = int32ToAuxInt(c)
19225			v0.AddArg(x)
19226			b.resetWithControl(BlockARMLEnoov, v0)
19227			return true
19228		}
19229		// match: (LE (CMPconst [0] l:(ADDshiftLL x y [c])) yes no)
19230		// cond: l.Uses==1
19231		// result: (LEnoov (CMNshiftLL x y [c]) yes no)
19232		for b.Controls[0].Op == OpARMCMPconst {
19233			v_0 := b.Controls[0]
19234			if auxIntToInt32(v_0.AuxInt) != 0 {
19235				break
19236			}
19237			l := v_0.Args[0]
19238			if l.Op != OpARMADDshiftLL {
19239				break
19240			}
19241			c := auxIntToInt32(l.AuxInt)
19242			y := l.Args[1]
19243			x := l.Args[0]
19244			if !(l.Uses == 1) {
19245				break
19246			}
19247			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftLL, types.TypeFlags)
19248			v0.AuxInt = int32ToAuxInt(c)
19249			v0.AddArg2(x, y)
19250			b.resetWithControl(BlockARMLEnoov, v0)
19251			return true
19252		}
19253		// match: (LE (CMPconst [0] l:(ADDshiftRL x y [c])) yes no)
19254		// cond: l.Uses==1
19255		// result: (LEnoov (CMNshiftRL x y [c]) yes no)
19256		for b.Controls[0].Op == OpARMCMPconst {
19257			v_0 := b.Controls[0]
19258			if auxIntToInt32(v_0.AuxInt) != 0 {
19259				break
19260			}
19261			l := v_0.Args[0]
19262			if l.Op != OpARMADDshiftRL {
19263				break
19264			}
19265			c := auxIntToInt32(l.AuxInt)
19266			y := l.Args[1]
19267			x := l.Args[0]
19268			if !(l.Uses == 1) {
19269				break
19270			}
19271			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRL, types.TypeFlags)
19272			v0.AuxInt = int32ToAuxInt(c)
19273			v0.AddArg2(x, y)
19274			b.resetWithControl(BlockARMLEnoov, v0)
19275			return true
19276		}
19277		// match: (LE (CMPconst [0] l:(ADDshiftRA x y [c])) yes no)
19278		// cond: l.Uses==1
19279		// result: (LEnoov (CMNshiftRA x y [c]) yes no)
19280		for b.Controls[0].Op == OpARMCMPconst {
19281			v_0 := b.Controls[0]
19282			if auxIntToInt32(v_0.AuxInt) != 0 {
19283				break
19284			}
19285			l := v_0.Args[0]
19286			if l.Op != OpARMADDshiftRA {
19287				break
19288			}
19289			c := auxIntToInt32(l.AuxInt)
19290			y := l.Args[1]
19291			x := l.Args[0]
19292			if !(l.Uses == 1) {
19293				break
19294			}
19295			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRA, types.TypeFlags)
19296			v0.AuxInt = int32ToAuxInt(c)
19297			v0.AddArg2(x, y)
19298			b.resetWithControl(BlockARMLEnoov, v0)
19299			return true
19300		}
19301		// match: (LE (CMPconst [0] l:(ADDshiftLLreg x y z)) yes no)
19302		// cond: l.Uses==1
19303		// result: (LEnoov (CMNshiftLLreg x y z) yes no)
19304		for b.Controls[0].Op == OpARMCMPconst {
19305			v_0 := b.Controls[0]
19306			if auxIntToInt32(v_0.AuxInt) != 0 {
19307				break
19308			}
19309			l := v_0.Args[0]
19310			if l.Op != OpARMADDshiftLLreg {
19311				break
19312			}
19313			z := l.Args[2]
19314			x := l.Args[0]
19315			y := l.Args[1]
19316			if !(l.Uses == 1) {
19317				break
19318			}
19319			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftLLreg, types.TypeFlags)
19320			v0.AddArg3(x, y, z)
19321			b.resetWithControl(BlockARMLEnoov, v0)
19322			return true
19323		}
19324		// match: (LE (CMPconst [0] l:(ADDshiftRLreg x y z)) yes no)
19325		// cond: l.Uses==1
19326		// result: (LEnoov (CMNshiftRLreg x y z) yes no)
19327		for b.Controls[0].Op == OpARMCMPconst {
19328			v_0 := b.Controls[0]
19329			if auxIntToInt32(v_0.AuxInt) != 0 {
19330				break
19331			}
19332			l := v_0.Args[0]
19333			if l.Op != OpARMADDshiftRLreg {
19334				break
19335			}
19336			z := l.Args[2]
19337			x := l.Args[0]
19338			y := l.Args[1]
19339			if !(l.Uses == 1) {
19340				break
19341			}
19342			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRLreg, types.TypeFlags)
19343			v0.AddArg3(x, y, z)
19344			b.resetWithControl(BlockARMLEnoov, v0)
19345			return true
19346		}
19347		// match: (LE (CMPconst [0] l:(ADDshiftRAreg x y z)) yes no)
19348		// cond: l.Uses==1
19349		// result: (LEnoov (CMNshiftRAreg x y z) yes no)
19350		for b.Controls[0].Op == OpARMCMPconst {
19351			v_0 := b.Controls[0]
19352			if auxIntToInt32(v_0.AuxInt) != 0 {
19353				break
19354			}
19355			l := v_0.Args[0]
19356			if l.Op != OpARMADDshiftRAreg {
19357				break
19358			}
19359			z := l.Args[2]
19360			x := l.Args[0]
19361			y := l.Args[1]
19362			if !(l.Uses == 1) {
19363				break
19364			}
19365			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRAreg, types.TypeFlags)
19366			v0.AddArg3(x, y, z)
19367			b.resetWithControl(BlockARMLEnoov, v0)
19368			return true
19369		}
19370		// match: (LE (CMPconst [0] l:(AND x y)) yes no)
19371		// cond: l.Uses==1
19372		// result: (LEnoov (TST x y) yes no)
19373		for b.Controls[0].Op == OpARMCMPconst {
19374			v_0 := b.Controls[0]
19375			if auxIntToInt32(v_0.AuxInt) != 0 {
19376				break
19377			}
19378			l := v_0.Args[0]
19379			if l.Op != OpARMAND {
19380				break
19381			}
19382			_ = l.Args[1]
19383			l_0 := l.Args[0]
19384			l_1 := l.Args[1]
19385			for _i0 := 0; _i0 <= 1; _i0, l_0, l_1 = _i0+1, l_1, l_0 {
19386				x := l_0
19387				y := l_1
19388				if !(l.Uses == 1) {
19389					continue
19390				}
19391				v0 := b.NewValue0(v_0.Pos, OpARMTST, types.TypeFlags)
19392				v0.AddArg2(x, y)
19393				b.resetWithControl(BlockARMLEnoov, v0)
19394				return true
19395			}
19396			break
19397		}
19398		// match: (LE (CMPconst [0] l:(ANDconst [c] x)) yes no)
19399		// cond: l.Uses==1
19400		// result: (LEnoov (TSTconst [c] x) yes no)
19401		for b.Controls[0].Op == OpARMCMPconst {
19402			v_0 := b.Controls[0]
19403			if auxIntToInt32(v_0.AuxInt) != 0 {
19404				break
19405			}
19406			l := v_0.Args[0]
19407			if l.Op != OpARMANDconst {
19408				break
19409			}
19410			c := auxIntToInt32(l.AuxInt)
19411			x := l.Args[0]
19412			if !(l.Uses == 1) {
19413				break
19414			}
19415			v0 := b.NewValue0(v_0.Pos, OpARMTSTconst, types.TypeFlags)
19416			v0.AuxInt = int32ToAuxInt(c)
19417			v0.AddArg(x)
19418			b.resetWithControl(BlockARMLEnoov, v0)
19419			return true
19420		}
19421		// match: (LE (CMPconst [0] l:(ANDshiftLL x y [c])) yes no)
19422		// cond: l.Uses==1
19423		// result: (LEnoov (TSTshiftLL x y [c]) yes no)
19424		for b.Controls[0].Op == OpARMCMPconst {
19425			v_0 := b.Controls[0]
19426			if auxIntToInt32(v_0.AuxInt) != 0 {
19427				break
19428			}
19429			l := v_0.Args[0]
19430			if l.Op != OpARMANDshiftLL {
19431				break
19432			}
19433			c := auxIntToInt32(l.AuxInt)
19434			y := l.Args[1]
19435			x := l.Args[0]
19436			if !(l.Uses == 1) {
19437				break
19438			}
19439			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftLL, types.TypeFlags)
19440			v0.AuxInt = int32ToAuxInt(c)
19441			v0.AddArg2(x, y)
19442			b.resetWithControl(BlockARMLEnoov, v0)
19443			return true
19444		}
19445		// match: (LE (CMPconst [0] l:(ANDshiftRL x y [c])) yes no)
19446		// cond: l.Uses==1
19447		// result: (LEnoov (TSTshiftRL x y [c]) yes no)
19448		for b.Controls[0].Op == OpARMCMPconst {
19449			v_0 := b.Controls[0]
19450			if auxIntToInt32(v_0.AuxInt) != 0 {
19451				break
19452			}
19453			l := v_0.Args[0]
19454			if l.Op != OpARMANDshiftRL {
19455				break
19456			}
19457			c := auxIntToInt32(l.AuxInt)
19458			y := l.Args[1]
19459			x := l.Args[0]
19460			if !(l.Uses == 1) {
19461				break
19462			}
19463			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRL, types.TypeFlags)
19464			v0.AuxInt = int32ToAuxInt(c)
19465			v0.AddArg2(x, y)
19466			b.resetWithControl(BlockARMLEnoov, v0)
19467			return true
19468		}
19469		// match: (LE (CMPconst [0] l:(ANDshiftRA x y [c])) yes no)
19470		// cond: l.Uses==1
19471		// result: (LEnoov (TSTshiftRA x y [c]) yes no)
19472		for b.Controls[0].Op == OpARMCMPconst {
19473			v_0 := b.Controls[0]
19474			if auxIntToInt32(v_0.AuxInt) != 0 {
19475				break
19476			}
19477			l := v_0.Args[0]
19478			if l.Op != OpARMANDshiftRA {
19479				break
19480			}
19481			c := auxIntToInt32(l.AuxInt)
19482			y := l.Args[1]
19483			x := l.Args[0]
19484			if !(l.Uses == 1) {
19485				break
19486			}
19487			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRA, types.TypeFlags)
19488			v0.AuxInt = int32ToAuxInt(c)
19489			v0.AddArg2(x, y)
19490			b.resetWithControl(BlockARMLEnoov, v0)
19491			return true
19492		}
19493		// match: (LE (CMPconst [0] l:(ANDshiftLLreg x y z)) yes no)
19494		// cond: l.Uses==1
19495		// result: (LEnoov (TSTshiftLLreg x y z) yes no)
19496		for b.Controls[0].Op == OpARMCMPconst {
19497			v_0 := b.Controls[0]
19498			if auxIntToInt32(v_0.AuxInt) != 0 {
19499				break
19500			}
19501			l := v_0.Args[0]
19502			if l.Op != OpARMANDshiftLLreg {
19503				break
19504			}
19505			z := l.Args[2]
19506			x := l.Args[0]
19507			y := l.Args[1]
19508			if !(l.Uses == 1) {
19509				break
19510			}
19511			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftLLreg, types.TypeFlags)
19512			v0.AddArg3(x, y, z)
19513			b.resetWithControl(BlockARMLEnoov, v0)
19514			return true
19515		}
19516		// match: (LE (CMPconst [0] l:(ANDshiftRLreg x y z)) yes no)
19517		// cond: l.Uses==1
19518		// result: (LEnoov (TSTshiftRLreg x y z) yes no)
19519		for b.Controls[0].Op == OpARMCMPconst {
19520			v_0 := b.Controls[0]
19521			if auxIntToInt32(v_0.AuxInt) != 0 {
19522				break
19523			}
19524			l := v_0.Args[0]
19525			if l.Op != OpARMANDshiftRLreg {
19526				break
19527			}
19528			z := l.Args[2]
19529			x := l.Args[0]
19530			y := l.Args[1]
19531			if !(l.Uses == 1) {
19532				break
19533			}
19534			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRLreg, types.TypeFlags)
19535			v0.AddArg3(x, y, z)
19536			b.resetWithControl(BlockARMLEnoov, v0)
19537			return true
19538		}
19539		// match: (LE (CMPconst [0] l:(ANDshiftRAreg x y z)) yes no)
19540		// cond: l.Uses==1
19541		// result: (LEnoov (TSTshiftRAreg x y z) yes no)
19542		for b.Controls[0].Op == OpARMCMPconst {
19543			v_0 := b.Controls[0]
19544			if auxIntToInt32(v_0.AuxInt) != 0 {
19545				break
19546			}
19547			l := v_0.Args[0]
19548			if l.Op != OpARMANDshiftRAreg {
19549				break
19550			}
19551			z := l.Args[2]
19552			x := l.Args[0]
19553			y := l.Args[1]
19554			if !(l.Uses == 1) {
19555				break
19556			}
19557			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRAreg, types.TypeFlags)
19558			v0.AddArg3(x, y, z)
19559			b.resetWithControl(BlockARMLEnoov, v0)
19560			return true
19561		}
19562		// match: (LE (CMPconst [0] l:(XOR x y)) yes no)
19563		// cond: l.Uses==1
19564		// result: (LEnoov (TEQ x y) yes no)
19565		for b.Controls[0].Op == OpARMCMPconst {
19566			v_0 := b.Controls[0]
19567			if auxIntToInt32(v_0.AuxInt) != 0 {
19568				break
19569			}
19570			l := v_0.Args[0]
19571			if l.Op != OpARMXOR {
19572				break
19573			}
19574			_ = l.Args[1]
19575			l_0 := l.Args[0]
19576			l_1 := l.Args[1]
19577			for _i0 := 0; _i0 <= 1; _i0, l_0, l_1 = _i0+1, l_1, l_0 {
19578				x := l_0
19579				y := l_1
19580				if !(l.Uses == 1) {
19581					continue
19582				}
19583				v0 := b.NewValue0(v_0.Pos, OpARMTEQ, types.TypeFlags)
19584				v0.AddArg2(x, y)
19585				b.resetWithControl(BlockARMLEnoov, v0)
19586				return true
19587			}
19588			break
19589		}
19590		// match: (LE (CMPconst [0] l:(XORconst [c] x)) yes no)
19591		// cond: l.Uses==1
19592		// result: (LEnoov (TEQconst [c] x) yes no)
19593		for b.Controls[0].Op == OpARMCMPconst {
19594			v_0 := b.Controls[0]
19595			if auxIntToInt32(v_0.AuxInt) != 0 {
19596				break
19597			}
19598			l := v_0.Args[0]
19599			if l.Op != OpARMXORconst {
19600				break
19601			}
19602			c := auxIntToInt32(l.AuxInt)
19603			x := l.Args[0]
19604			if !(l.Uses == 1) {
19605				break
19606			}
19607			v0 := b.NewValue0(v_0.Pos, OpARMTEQconst, types.TypeFlags)
19608			v0.AuxInt = int32ToAuxInt(c)
19609			v0.AddArg(x)
19610			b.resetWithControl(BlockARMLEnoov, v0)
19611			return true
19612		}
19613		// match: (LE (CMPconst [0] l:(XORshiftLL x y [c])) yes no)
19614		// cond: l.Uses==1
19615		// result: (LEnoov (TEQshiftLL x y [c]) yes no)
19616		for b.Controls[0].Op == OpARMCMPconst {
19617			v_0 := b.Controls[0]
19618			if auxIntToInt32(v_0.AuxInt) != 0 {
19619				break
19620			}
19621			l := v_0.Args[0]
19622			if l.Op != OpARMXORshiftLL {
19623				break
19624			}
19625			c := auxIntToInt32(l.AuxInt)
19626			y := l.Args[1]
19627			x := l.Args[0]
19628			if !(l.Uses == 1) {
19629				break
19630			}
19631			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftLL, types.TypeFlags)
19632			v0.AuxInt = int32ToAuxInt(c)
19633			v0.AddArg2(x, y)
19634			b.resetWithControl(BlockARMLEnoov, v0)
19635			return true
19636		}
19637		// match: (LE (CMPconst [0] l:(XORshiftRL x y [c])) yes no)
19638		// cond: l.Uses==1
19639		// result: (LEnoov (TEQshiftRL x y [c]) yes no)
19640		for b.Controls[0].Op == OpARMCMPconst {
19641			v_0 := b.Controls[0]
19642			if auxIntToInt32(v_0.AuxInt) != 0 {
19643				break
19644			}
19645			l := v_0.Args[0]
19646			if l.Op != OpARMXORshiftRL {
19647				break
19648			}
19649			c := auxIntToInt32(l.AuxInt)
19650			y := l.Args[1]
19651			x := l.Args[0]
19652			if !(l.Uses == 1) {
19653				break
19654			}
19655			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRL, types.TypeFlags)
19656			v0.AuxInt = int32ToAuxInt(c)
19657			v0.AddArg2(x, y)
19658			b.resetWithControl(BlockARMLEnoov, v0)
19659			return true
19660		}
19661		// match: (LE (CMPconst [0] l:(XORshiftRA x y [c])) yes no)
19662		// cond: l.Uses==1
19663		// result: (LEnoov (TEQshiftRA x y [c]) yes no)
19664		for b.Controls[0].Op == OpARMCMPconst {
19665			v_0 := b.Controls[0]
19666			if auxIntToInt32(v_0.AuxInt) != 0 {
19667				break
19668			}
19669			l := v_0.Args[0]
19670			if l.Op != OpARMXORshiftRA {
19671				break
19672			}
19673			c := auxIntToInt32(l.AuxInt)
19674			y := l.Args[1]
19675			x := l.Args[0]
19676			if !(l.Uses == 1) {
19677				break
19678			}
19679			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRA, types.TypeFlags)
19680			v0.AuxInt = int32ToAuxInt(c)
19681			v0.AddArg2(x, y)
19682			b.resetWithControl(BlockARMLEnoov, v0)
19683			return true
19684		}
19685		// match: (LE (CMPconst [0] l:(XORshiftLLreg x y z)) yes no)
19686		// cond: l.Uses==1
19687		// result: (LEnoov (TEQshiftLLreg x y z) yes no)
19688		for b.Controls[0].Op == OpARMCMPconst {
19689			v_0 := b.Controls[0]
19690			if auxIntToInt32(v_0.AuxInt) != 0 {
19691				break
19692			}
19693			l := v_0.Args[0]
19694			if l.Op != OpARMXORshiftLLreg {
19695				break
19696			}
19697			z := l.Args[2]
19698			x := l.Args[0]
19699			y := l.Args[1]
19700			if !(l.Uses == 1) {
19701				break
19702			}
19703			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftLLreg, types.TypeFlags)
19704			v0.AddArg3(x, y, z)
19705			b.resetWithControl(BlockARMLEnoov, v0)
19706			return true
19707		}
19708		// match: (LE (CMPconst [0] l:(XORshiftRLreg x y z)) yes no)
19709		// cond: l.Uses==1
19710		// result: (LEnoov (TEQshiftRLreg x y z) yes no)
19711		for b.Controls[0].Op == OpARMCMPconst {
19712			v_0 := b.Controls[0]
19713			if auxIntToInt32(v_0.AuxInt) != 0 {
19714				break
19715			}
19716			l := v_0.Args[0]
19717			if l.Op != OpARMXORshiftRLreg {
19718				break
19719			}
19720			z := l.Args[2]
19721			x := l.Args[0]
19722			y := l.Args[1]
19723			if !(l.Uses == 1) {
19724				break
19725			}
19726			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRLreg, types.TypeFlags)
19727			v0.AddArg3(x, y, z)
19728			b.resetWithControl(BlockARMLEnoov, v0)
19729			return true
19730		}
19731		// match: (LE (CMPconst [0] l:(XORshiftRAreg x y z)) yes no)
19732		// cond: l.Uses==1
19733		// result: (LEnoov (TEQshiftRAreg x y z) yes no)
19734		for b.Controls[0].Op == OpARMCMPconst {
19735			v_0 := b.Controls[0]
19736			if auxIntToInt32(v_0.AuxInt) != 0 {
19737				break
19738			}
19739			l := v_0.Args[0]
19740			if l.Op != OpARMXORshiftRAreg {
19741				break
19742			}
19743			z := l.Args[2]
19744			x := l.Args[0]
19745			y := l.Args[1]
19746			if !(l.Uses == 1) {
19747				break
19748			}
19749			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRAreg, types.TypeFlags)
19750			v0.AddArg3(x, y, z)
19751			b.resetWithControl(BlockARMLEnoov, v0)
19752			return true
19753		}
19754	case BlockARMLEnoov:
19755		// match: (LEnoov (FlagConstant [fc]) yes no)
19756		// cond: fc.leNoov()
19757		// result: (First yes no)
19758		for b.Controls[0].Op == OpARMFlagConstant {
19759			v_0 := b.Controls[0]
19760			fc := auxIntToFlagConstant(v_0.AuxInt)
19761			if !(fc.leNoov()) {
19762				break
19763			}
19764			b.Reset(BlockFirst)
19765			return true
19766		}
19767		// match: (LEnoov (FlagConstant [fc]) yes no)
19768		// cond: !fc.leNoov()
19769		// result: (First no yes)
19770		for b.Controls[0].Op == OpARMFlagConstant {
19771			v_0 := b.Controls[0]
19772			fc := auxIntToFlagConstant(v_0.AuxInt)
19773			if !(!fc.leNoov()) {
19774				break
19775			}
19776			b.Reset(BlockFirst)
19777			b.swapSuccessors()
19778			return true
19779		}
19780		// match: (LEnoov (InvertFlags cmp) yes no)
19781		// result: (GEnoov cmp yes no)
19782		for b.Controls[0].Op == OpARMInvertFlags {
19783			v_0 := b.Controls[0]
19784			cmp := v_0.Args[0]
19785			b.resetWithControl(BlockARMGEnoov, cmp)
19786			return true
19787		}
19788	case BlockARMLT:
19789		// match: (LT (FlagConstant [fc]) yes no)
19790		// cond: fc.lt()
19791		// result: (First yes no)
19792		for b.Controls[0].Op == OpARMFlagConstant {
19793			v_0 := b.Controls[0]
19794			fc := auxIntToFlagConstant(v_0.AuxInt)
19795			if !(fc.lt()) {
19796				break
19797			}
19798			b.Reset(BlockFirst)
19799			return true
19800		}
19801		// match: (LT (FlagConstant [fc]) yes no)
19802		// cond: !fc.lt()
19803		// result: (First no yes)
19804		for b.Controls[0].Op == OpARMFlagConstant {
19805			v_0 := b.Controls[0]
19806			fc := auxIntToFlagConstant(v_0.AuxInt)
19807			if !(!fc.lt()) {
19808				break
19809			}
19810			b.Reset(BlockFirst)
19811			b.swapSuccessors()
19812			return true
19813		}
19814		// match: (LT (InvertFlags cmp) yes no)
19815		// result: (GT cmp yes no)
19816		for b.Controls[0].Op == OpARMInvertFlags {
19817			v_0 := b.Controls[0]
19818			cmp := v_0.Args[0]
19819			b.resetWithControl(BlockARMGT, cmp)
19820			return true
19821		}
19822		// match: (LT (CMPconst [0] l:(SUB x y)) yes no)
19823		// cond: l.Uses==1
19824		// result: (LTnoov (CMP x y) yes no)
19825		for b.Controls[0].Op == OpARMCMPconst {
19826			v_0 := b.Controls[0]
19827			if auxIntToInt32(v_0.AuxInt) != 0 {
19828				break
19829			}
19830			l := v_0.Args[0]
19831			if l.Op != OpARMSUB {
19832				break
19833			}
19834			y := l.Args[1]
19835			x := l.Args[0]
19836			if !(l.Uses == 1) {
19837				break
19838			}
19839			v0 := b.NewValue0(v_0.Pos, OpARMCMP, types.TypeFlags)
19840			v0.AddArg2(x, y)
19841			b.resetWithControl(BlockARMLTnoov, v0)
19842			return true
19843		}
19844		// match: (LT (CMPconst [0] l:(MULS x y a)) yes no)
19845		// cond: l.Uses==1
19846		// result: (LTnoov (CMP a (MUL <x.Type> x y)) yes no)
19847		for b.Controls[0].Op == OpARMCMPconst {
19848			v_0 := b.Controls[0]
19849			if auxIntToInt32(v_0.AuxInt) != 0 {
19850				break
19851			}
19852			l := v_0.Args[0]
19853			if l.Op != OpARMMULS {
19854				break
19855			}
19856			a := l.Args[2]
19857			x := l.Args[0]
19858			y := l.Args[1]
19859			if !(l.Uses == 1) {
19860				break
19861			}
19862			v0 := b.NewValue0(v_0.Pos, OpARMCMP, types.TypeFlags)
19863			v1 := b.NewValue0(v_0.Pos, OpARMMUL, x.Type)
19864			v1.AddArg2(x, y)
19865			v0.AddArg2(a, v1)
19866			b.resetWithControl(BlockARMLTnoov, v0)
19867			return true
19868		}
19869		// match: (LT (CMPconst [0] l:(SUBconst [c] x)) yes no)
19870		// cond: l.Uses==1
19871		// result: (LTnoov (CMPconst [c] x) yes no)
19872		for b.Controls[0].Op == OpARMCMPconst {
19873			v_0 := b.Controls[0]
19874			if auxIntToInt32(v_0.AuxInt) != 0 {
19875				break
19876			}
19877			l := v_0.Args[0]
19878			if l.Op != OpARMSUBconst {
19879				break
19880			}
19881			c := auxIntToInt32(l.AuxInt)
19882			x := l.Args[0]
19883			if !(l.Uses == 1) {
19884				break
19885			}
19886			v0 := b.NewValue0(v_0.Pos, OpARMCMPconst, types.TypeFlags)
19887			v0.AuxInt = int32ToAuxInt(c)
19888			v0.AddArg(x)
19889			b.resetWithControl(BlockARMLTnoov, v0)
19890			return true
19891		}
19892		// match: (LT (CMPconst [0] l:(SUBshiftLL x y [c])) yes no)
19893		// cond: l.Uses==1
19894		// result: (LTnoov (CMPshiftLL x y [c]) yes no)
19895		for b.Controls[0].Op == OpARMCMPconst {
19896			v_0 := b.Controls[0]
19897			if auxIntToInt32(v_0.AuxInt) != 0 {
19898				break
19899			}
19900			l := v_0.Args[0]
19901			if l.Op != OpARMSUBshiftLL {
19902				break
19903			}
19904			c := auxIntToInt32(l.AuxInt)
19905			y := l.Args[1]
19906			x := l.Args[0]
19907			if !(l.Uses == 1) {
19908				break
19909			}
19910			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftLL, types.TypeFlags)
19911			v0.AuxInt = int32ToAuxInt(c)
19912			v0.AddArg2(x, y)
19913			b.resetWithControl(BlockARMLTnoov, v0)
19914			return true
19915		}
19916		// match: (LT (CMPconst [0] l:(SUBshiftRL x y [c])) yes no)
19917		// cond: l.Uses==1
19918		// result: (LTnoov (CMPshiftRL x y [c]) yes no)
19919		for b.Controls[0].Op == OpARMCMPconst {
19920			v_0 := b.Controls[0]
19921			if auxIntToInt32(v_0.AuxInt) != 0 {
19922				break
19923			}
19924			l := v_0.Args[0]
19925			if l.Op != OpARMSUBshiftRL {
19926				break
19927			}
19928			c := auxIntToInt32(l.AuxInt)
19929			y := l.Args[1]
19930			x := l.Args[0]
19931			if !(l.Uses == 1) {
19932				break
19933			}
19934			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRL, types.TypeFlags)
19935			v0.AuxInt = int32ToAuxInt(c)
19936			v0.AddArg2(x, y)
19937			b.resetWithControl(BlockARMLTnoov, v0)
19938			return true
19939		}
19940		// match: (LT (CMPconst [0] l:(SUBshiftRA x y [c])) yes no)
19941		// cond: l.Uses==1
19942		// result: (LTnoov (CMPshiftRA x y [c]) yes no)
19943		for b.Controls[0].Op == OpARMCMPconst {
19944			v_0 := b.Controls[0]
19945			if auxIntToInt32(v_0.AuxInt) != 0 {
19946				break
19947			}
19948			l := v_0.Args[0]
19949			if l.Op != OpARMSUBshiftRA {
19950				break
19951			}
19952			c := auxIntToInt32(l.AuxInt)
19953			y := l.Args[1]
19954			x := l.Args[0]
19955			if !(l.Uses == 1) {
19956				break
19957			}
19958			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRA, types.TypeFlags)
19959			v0.AuxInt = int32ToAuxInt(c)
19960			v0.AddArg2(x, y)
19961			b.resetWithControl(BlockARMLTnoov, v0)
19962			return true
19963		}
19964		// match: (LT (CMPconst [0] l:(SUBshiftLLreg x y z)) yes no)
19965		// cond: l.Uses==1
19966		// result: (LTnoov (CMPshiftLLreg x y z) yes no)
19967		for b.Controls[0].Op == OpARMCMPconst {
19968			v_0 := b.Controls[0]
19969			if auxIntToInt32(v_0.AuxInt) != 0 {
19970				break
19971			}
19972			l := v_0.Args[0]
19973			if l.Op != OpARMSUBshiftLLreg {
19974				break
19975			}
19976			z := l.Args[2]
19977			x := l.Args[0]
19978			y := l.Args[1]
19979			if !(l.Uses == 1) {
19980				break
19981			}
19982			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftLLreg, types.TypeFlags)
19983			v0.AddArg3(x, y, z)
19984			b.resetWithControl(BlockARMLTnoov, v0)
19985			return true
19986		}
19987		// match: (LT (CMPconst [0] l:(SUBshiftRLreg x y z)) yes no)
19988		// cond: l.Uses==1
19989		// result: (LTnoov (CMPshiftRLreg x y z) yes no)
19990		for b.Controls[0].Op == OpARMCMPconst {
19991			v_0 := b.Controls[0]
19992			if auxIntToInt32(v_0.AuxInt) != 0 {
19993				break
19994			}
19995			l := v_0.Args[0]
19996			if l.Op != OpARMSUBshiftRLreg {
19997				break
19998			}
19999			z := l.Args[2]
20000			x := l.Args[0]
20001			y := l.Args[1]
20002			if !(l.Uses == 1) {
20003				break
20004			}
20005			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRLreg, types.TypeFlags)
20006			v0.AddArg3(x, y, z)
20007			b.resetWithControl(BlockARMLTnoov, v0)
20008			return true
20009		}
20010		// match: (LT (CMPconst [0] l:(SUBshiftRAreg x y z)) yes no)
20011		// cond: l.Uses==1
20012		// result: (LTnoov (CMPshiftRAreg x y z) yes no)
20013		for b.Controls[0].Op == OpARMCMPconst {
20014			v_0 := b.Controls[0]
20015			if auxIntToInt32(v_0.AuxInt) != 0 {
20016				break
20017			}
20018			l := v_0.Args[0]
20019			if l.Op != OpARMSUBshiftRAreg {
20020				break
20021			}
20022			z := l.Args[2]
20023			x := l.Args[0]
20024			y := l.Args[1]
20025			if !(l.Uses == 1) {
20026				break
20027			}
20028			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRAreg, types.TypeFlags)
20029			v0.AddArg3(x, y, z)
20030			b.resetWithControl(BlockARMLTnoov, v0)
20031			return true
20032		}
20033		// match: (LT (CMPconst [0] l:(ADD x y)) yes no)
20034		// cond: l.Uses==1
20035		// result: (LTnoov (CMN x y) yes no)
20036		for b.Controls[0].Op == OpARMCMPconst {
20037			v_0 := b.Controls[0]
20038			if auxIntToInt32(v_0.AuxInt) != 0 {
20039				break
20040			}
20041			l := v_0.Args[0]
20042			if l.Op != OpARMADD {
20043				break
20044			}
20045			_ = l.Args[1]
20046			l_0 := l.Args[0]
20047			l_1 := l.Args[1]
20048			for _i0 := 0; _i0 <= 1; _i0, l_0, l_1 = _i0+1, l_1, l_0 {
20049				x := l_0
20050				y := l_1
20051				if !(l.Uses == 1) {
20052					continue
20053				}
20054				v0 := b.NewValue0(v_0.Pos, OpARMCMN, types.TypeFlags)
20055				v0.AddArg2(x, y)
20056				b.resetWithControl(BlockARMLTnoov, v0)
20057				return true
20058			}
20059			break
20060		}
20061		// match: (LT (CMPconst [0] l:(MULA x y a)) yes no)
20062		// cond: l.Uses==1
20063		// result: (LTnoov (CMN a (MUL <x.Type> x y)) yes no)
20064		for b.Controls[0].Op == OpARMCMPconst {
20065			v_0 := b.Controls[0]
20066			if auxIntToInt32(v_0.AuxInt) != 0 {
20067				break
20068			}
20069			l := v_0.Args[0]
20070			if l.Op != OpARMMULA {
20071				break
20072			}
20073			a := l.Args[2]
20074			x := l.Args[0]
20075			y := l.Args[1]
20076			if !(l.Uses == 1) {
20077				break
20078			}
20079			v0 := b.NewValue0(v_0.Pos, OpARMCMN, types.TypeFlags)
20080			v1 := b.NewValue0(v_0.Pos, OpARMMUL, x.Type)
20081			v1.AddArg2(x, y)
20082			v0.AddArg2(a, v1)
20083			b.resetWithControl(BlockARMLTnoov, v0)
20084			return true
20085		}
20086		// match: (LT (CMPconst [0] l:(ADDconst [c] x)) yes no)
20087		// cond: l.Uses==1
20088		// result: (LTnoov (CMNconst [c] x) yes no)
20089		for b.Controls[0].Op == OpARMCMPconst {
20090			v_0 := b.Controls[0]
20091			if auxIntToInt32(v_0.AuxInt) != 0 {
20092				break
20093			}
20094			l := v_0.Args[0]
20095			if l.Op != OpARMADDconst {
20096				break
20097			}
20098			c := auxIntToInt32(l.AuxInt)
20099			x := l.Args[0]
20100			if !(l.Uses == 1) {
20101				break
20102			}
20103			v0 := b.NewValue0(v_0.Pos, OpARMCMNconst, types.TypeFlags)
20104			v0.AuxInt = int32ToAuxInt(c)
20105			v0.AddArg(x)
20106			b.resetWithControl(BlockARMLTnoov, v0)
20107			return true
20108		}
20109		// match: (LT (CMPconst [0] l:(ADDshiftLL x y [c])) yes no)
20110		// cond: l.Uses==1
20111		// result: (LTnoov (CMNshiftLL x y [c]) yes no)
20112		for b.Controls[0].Op == OpARMCMPconst {
20113			v_0 := b.Controls[0]
20114			if auxIntToInt32(v_0.AuxInt) != 0 {
20115				break
20116			}
20117			l := v_0.Args[0]
20118			if l.Op != OpARMADDshiftLL {
20119				break
20120			}
20121			c := auxIntToInt32(l.AuxInt)
20122			y := l.Args[1]
20123			x := l.Args[0]
20124			if !(l.Uses == 1) {
20125				break
20126			}
20127			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftLL, types.TypeFlags)
20128			v0.AuxInt = int32ToAuxInt(c)
20129			v0.AddArg2(x, y)
20130			b.resetWithControl(BlockARMLTnoov, v0)
20131			return true
20132		}
20133		// match: (LT (CMPconst [0] l:(ADDshiftRL x y [c])) yes no)
20134		// cond: l.Uses==1
20135		// result: (LTnoov (CMNshiftRL x y [c]) yes no)
20136		for b.Controls[0].Op == OpARMCMPconst {
20137			v_0 := b.Controls[0]
20138			if auxIntToInt32(v_0.AuxInt) != 0 {
20139				break
20140			}
20141			l := v_0.Args[0]
20142			if l.Op != OpARMADDshiftRL {
20143				break
20144			}
20145			c := auxIntToInt32(l.AuxInt)
20146			y := l.Args[1]
20147			x := l.Args[0]
20148			if !(l.Uses == 1) {
20149				break
20150			}
20151			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRL, types.TypeFlags)
20152			v0.AuxInt = int32ToAuxInt(c)
20153			v0.AddArg2(x, y)
20154			b.resetWithControl(BlockARMLTnoov, v0)
20155			return true
20156		}
20157		// match: (LT (CMPconst [0] l:(ADDshiftRA x y [c])) yes no)
20158		// cond: l.Uses==1
20159		// result: (LTnoov (CMNshiftRA x y [c]) yes no)
20160		for b.Controls[0].Op == OpARMCMPconst {
20161			v_0 := b.Controls[0]
20162			if auxIntToInt32(v_0.AuxInt) != 0 {
20163				break
20164			}
20165			l := v_0.Args[0]
20166			if l.Op != OpARMADDshiftRA {
20167				break
20168			}
20169			c := auxIntToInt32(l.AuxInt)
20170			y := l.Args[1]
20171			x := l.Args[0]
20172			if !(l.Uses == 1) {
20173				break
20174			}
20175			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRA, types.TypeFlags)
20176			v0.AuxInt = int32ToAuxInt(c)
20177			v0.AddArg2(x, y)
20178			b.resetWithControl(BlockARMLTnoov, v0)
20179			return true
20180		}
20181		// match: (LT (CMPconst [0] l:(ADDshiftLLreg x y z)) yes no)
20182		// cond: l.Uses==1
20183		// result: (LTnoov (CMNshiftLLreg x y z) yes no)
20184		for b.Controls[0].Op == OpARMCMPconst {
20185			v_0 := b.Controls[0]
20186			if auxIntToInt32(v_0.AuxInt) != 0 {
20187				break
20188			}
20189			l := v_0.Args[0]
20190			if l.Op != OpARMADDshiftLLreg {
20191				break
20192			}
20193			z := l.Args[2]
20194			x := l.Args[0]
20195			y := l.Args[1]
20196			if !(l.Uses == 1) {
20197				break
20198			}
20199			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftLLreg, types.TypeFlags)
20200			v0.AddArg3(x, y, z)
20201			b.resetWithControl(BlockARMLTnoov, v0)
20202			return true
20203		}
20204		// match: (LT (CMPconst [0] l:(ADDshiftRLreg x y z)) yes no)
20205		// cond: l.Uses==1
20206		// result: (LTnoov (CMNshiftRLreg x y z) yes no)
20207		for b.Controls[0].Op == OpARMCMPconst {
20208			v_0 := b.Controls[0]
20209			if auxIntToInt32(v_0.AuxInt) != 0 {
20210				break
20211			}
20212			l := v_0.Args[0]
20213			if l.Op != OpARMADDshiftRLreg {
20214				break
20215			}
20216			z := l.Args[2]
20217			x := l.Args[0]
20218			y := l.Args[1]
20219			if !(l.Uses == 1) {
20220				break
20221			}
20222			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRLreg, types.TypeFlags)
20223			v0.AddArg3(x, y, z)
20224			b.resetWithControl(BlockARMLTnoov, v0)
20225			return true
20226		}
20227		// match: (LT (CMPconst [0] l:(ADDshiftRAreg x y z)) yes no)
20228		// cond: l.Uses==1
20229		// result: (LTnoov (CMNshiftRAreg x y z) yes no)
20230		for b.Controls[0].Op == OpARMCMPconst {
20231			v_0 := b.Controls[0]
20232			if auxIntToInt32(v_0.AuxInt) != 0 {
20233				break
20234			}
20235			l := v_0.Args[0]
20236			if l.Op != OpARMADDshiftRAreg {
20237				break
20238			}
20239			z := l.Args[2]
20240			x := l.Args[0]
20241			y := l.Args[1]
20242			if !(l.Uses == 1) {
20243				break
20244			}
20245			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRAreg, types.TypeFlags)
20246			v0.AddArg3(x, y, z)
20247			b.resetWithControl(BlockARMLTnoov, v0)
20248			return true
20249		}
20250		// match: (LT (CMPconst [0] l:(AND x y)) yes no)
20251		// cond: l.Uses==1
20252		// result: (LTnoov (TST x y) yes no)
20253		for b.Controls[0].Op == OpARMCMPconst {
20254			v_0 := b.Controls[0]
20255			if auxIntToInt32(v_0.AuxInt) != 0 {
20256				break
20257			}
20258			l := v_0.Args[0]
20259			if l.Op != OpARMAND {
20260				break
20261			}
20262			_ = l.Args[1]
20263			l_0 := l.Args[0]
20264			l_1 := l.Args[1]
20265			for _i0 := 0; _i0 <= 1; _i0, l_0, l_1 = _i0+1, l_1, l_0 {
20266				x := l_0
20267				y := l_1
20268				if !(l.Uses == 1) {
20269					continue
20270				}
20271				v0 := b.NewValue0(v_0.Pos, OpARMTST, types.TypeFlags)
20272				v0.AddArg2(x, y)
20273				b.resetWithControl(BlockARMLTnoov, v0)
20274				return true
20275			}
20276			break
20277		}
20278		// match: (LT (CMPconst [0] l:(ANDconst [c] x)) yes no)
20279		// cond: l.Uses==1
20280		// result: (LTnoov (TSTconst [c] x) yes no)
20281		for b.Controls[0].Op == OpARMCMPconst {
20282			v_0 := b.Controls[0]
20283			if auxIntToInt32(v_0.AuxInt) != 0 {
20284				break
20285			}
20286			l := v_0.Args[0]
20287			if l.Op != OpARMANDconst {
20288				break
20289			}
20290			c := auxIntToInt32(l.AuxInt)
20291			x := l.Args[0]
20292			if !(l.Uses == 1) {
20293				break
20294			}
20295			v0 := b.NewValue0(v_0.Pos, OpARMTSTconst, types.TypeFlags)
20296			v0.AuxInt = int32ToAuxInt(c)
20297			v0.AddArg(x)
20298			b.resetWithControl(BlockARMLTnoov, v0)
20299			return true
20300		}
20301		// match: (LT (CMPconst [0] l:(ANDshiftLL x y [c])) yes no)
20302		// cond: l.Uses==1
20303		// result: (LTnoov (TSTshiftLL x y [c]) yes no)
20304		for b.Controls[0].Op == OpARMCMPconst {
20305			v_0 := b.Controls[0]
20306			if auxIntToInt32(v_0.AuxInt) != 0 {
20307				break
20308			}
20309			l := v_0.Args[0]
20310			if l.Op != OpARMANDshiftLL {
20311				break
20312			}
20313			c := auxIntToInt32(l.AuxInt)
20314			y := l.Args[1]
20315			x := l.Args[0]
20316			if !(l.Uses == 1) {
20317				break
20318			}
20319			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftLL, types.TypeFlags)
20320			v0.AuxInt = int32ToAuxInt(c)
20321			v0.AddArg2(x, y)
20322			b.resetWithControl(BlockARMLTnoov, v0)
20323			return true
20324		}
20325		// match: (LT (CMPconst [0] l:(ANDshiftRL x y [c])) yes no)
20326		// cond: l.Uses==1
20327		// result: (LTnoov (TSTshiftRL x y [c]) yes no)
20328		for b.Controls[0].Op == OpARMCMPconst {
20329			v_0 := b.Controls[0]
20330			if auxIntToInt32(v_0.AuxInt) != 0 {
20331				break
20332			}
20333			l := v_0.Args[0]
20334			if l.Op != OpARMANDshiftRL {
20335				break
20336			}
20337			c := auxIntToInt32(l.AuxInt)
20338			y := l.Args[1]
20339			x := l.Args[0]
20340			if !(l.Uses == 1) {
20341				break
20342			}
20343			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRL, types.TypeFlags)
20344			v0.AuxInt = int32ToAuxInt(c)
20345			v0.AddArg2(x, y)
20346			b.resetWithControl(BlockARMLTnoov, v0)
20347			return true
20348		}
20349		// match: (LT (CMPconst [0] l:(ANDshiftRA x y [c])) yes no)
20350		// cond: l.Uses==1
20351		// result: (LTnoov (TSTshiftRA x y [c]) yes no)
20352		for b.Controls[0].Op == OpARMCMPconst {
20353			v_0 := b.Controls[0]
20354			if auxIntToInt32(v_0.AuxInt) != 0 {
20355				break
20356			}
20357			l := v_0.Args[0]
20358			if l.Op != OpARMANDshiftRA {
20359				break
20360			}
20361			c := auxIntToInt32(l.AuxInt)
20362			y := l.Args[1]
20363			x := l.Args[0]
20364			if !(l.Uses == 1) {
20365				break
20366			}
20367			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRA, types.TypeFlags)
20368			v0.AuxInt = int32ToAuxInt(c)
20369			v0.AddArg2(x, y)
20370			b.resetWithControl(BlockARMLTnoov, v0)
20371			return true
20372		}
20373		// match: (LT (CMPconst [0] l:(ANDshiftLLreg x y z)) yes no)
20374		// cond: l.Uses==1
20375		// result: (LTnoov (TSTshiftLLreg x y z) yes no)
20376		for b.Controls[0].Op == OpARMCMPconst {
20377			v_0 := b.Controls[0]
20378			if auxIntToInt32(v_0.AuxInt) != 0 {
20379				break
20380			}
20381			l := v_0.Args[0]
20382			if l.Op != OpARMANDshiftLLreg {
20383				break
20384			}
20385			z := l.Args[2]
20386			x := l.Args[0]
20387			y := l.Args[1]
20388			if !(l.Uses == 1) {
20389				break
20390			}
20391			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftLLreg, types.TypeFlags)
20392			v0.AddArg3(x, y, z)
20393			b.resetWithControl(BlockARMLTnoov, v0)
20394			return true
20395		}
20396		// match: (LT (CMPconst [0] l:(ANDshiftRLreg x y z)) yes no)
20397		// cond: l.Uses==1
20398		// result: (LTnoov (TSTshiftRLreg x y z) yes no)
20399		for b.Controls[0].Op == OpARMCMPconst {
20400			v_0 := b.Controls[0]
20401			if auxIntToInt32(v_0.AuxInt) != 0 {
20402				break
20403			}
20404			l := v_0.Args[0]
20405			if l.Op != OpARMANDshiftRLreg {
20406				break
20407			}
20408			z := l.Args[2]
20409			x := l.Args[0]
20410			y := l.Args[1]
20411			if !(l.Uses == 1) {
20412				break
20413			}
20414			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRLreg, types.TypeFlags)
20415			v0.AddArg3(x, y, z)
20416			b.resetWithControl(BlockARMLTnoov, v0)
20417			return true
20418		}
20419		// match: (LT (CMPconst [0] l:(ANDshiftRAreg x y z)) yes no)
20420		// cond: l.Uses==1
20421		// result: (LTnoov (TSTshiftRAreg x y z) yes no)
20422		for b.Controls[0].Op == OpARMCMPconst {
20423			v_0 := b.Controls[0]
20424			if auxIntToInt32(v_0.AuxInt) != 0 {
20425				break
20426			}
20427			l := v_0.Args[0]
20428			if l.Op != OpARMANDshiftRAreg {
20429				break
20430			}
20431			z := l.Args[2]
20432			x := l.Args[0]
20433			y := l.Args[1]
20434			if !(l.Uses == 1) {
20435				break
20436			}
20437			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRAreg, types.TypeFlags)
20438			v0.AddArg3(x, y, z)
20439			b.resetWithControl(BlockARMLTnoov, v0)
20440			return true
20441		}
20442		// match: (LT (CMPconst [0] l:(XOR x y)) yes no)
20443		// cond: l.Uses==1
20444		// result: (LTnoov (TEQ x y) yes no)
20445		for b.Controls[0].Op == OpARMCMPconst {
20446			v_0 := b.Controls[0]
20447			if auxIntToInt32(v_0.AuxInt) != 0 {
20448				break
20449			}
20450			l := v_0.Args[0]
20451			if l.Op != OpARMXOR {
20452				break
20453			}
20454			_ = l.Args[1]
20455			l_0 := l.Args[0]
20456			l_1 := l.Args[1]
20457			for _i0 := 0; _i0 <= 1; _i0, l_0, l_1 = _i0+1, l_1, l_0 {
20458				x := l_0
20459				y := l_1
20460				if !(l.Uses == 1) {
20461					continue
20462				}
20463				v0 := b.NewValue0(v_0.Pos, OpARMTEQ, types.TypeFlags)
20464				v0.AddArg2(x, y)
20465				b.resetWithControl(BlockARMLTnoov, v0)
20466				return true
20467			}
20468			break
20469		}
20470		// match: (LT (CMPconst [0] l:(XORconst [c] x)) yes no)
20471		// cond: l.Uses==1
20472		// result: (LTnoov (TEQconst [c] x) yes no)
20473		for b.Controls[0].Op == OpARMCMPconst {
20474			v_0 := b.Controls[0]
20475			if auxIntToInt32(v_0.AuxInt) != 0 {
20476				break
20477			}
20478			l := v_0.Args[0]
20479			if l.Op != OpARMXORconst {
20480				break
20481			}
20482			c := auxIntToInt32(l.AuxInt)
20483			x := l.Args[0]
20484			if !(l.Uses == 1) {
20485				break
20486			}
20487			v0 := b.NewValue0(v_0.Pos, OpARMTEQconst, types.TypeFlags)
20488			v0.AuxInt = int32ToAuxInt(c)
20489			v0.AddArg(x)
20490			b.resetWithControl(BlockARMLTnoov, v0)
20491			return true
20492		}
20493		// match: (LT (CMPconst [0] l:(XORshiftLL x y [c])) yes no)
20494		// cond: l.Uses==1
20495		// result: (LTnoov (TEQshiftLL x y [c]) yes no)
20496		for b.Controls[0].Op == OpARMCMPconst {
20497			v_0 := b.Controls[0]
20498			if auxIntToInt32(v_0.AuxInt) != 0 {
20499				break
20500			}
20501			l := v_0.Args[0]
20502			if l.Op != OpARMXORshiftLL {
20503				break
20504			}
20505			c := auxIntToInt32(l.AuxInt)
20506			y := l.Args[1]
20507			x := l.Args[0]
20508			if !(l.Uses == 1) {
20509				break
20510			}
20511			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftLL, types.TypeFlags)
20512			v0.AuxInt = int32ToAuxInt(c)
20513			v0.AddArg2(x, y)
20514			b.resetWithControl(BlockARMLTnoov, v0)
20515			return true
20516		}
20517		// match: (LT (CMPconst [0] l:(XORshiftRL x y [c])) yes no)
20518		// cond: l.Uses==1
20519		// result: (LTnoov (TEQshiftRL x y [c]) yes no)
20520		for b.Controls[0].Op == OpARMCMPconst {
20521			v_0 := b.Controls[0]
20522			if auxIntToInt32(v_0.AuxInt) != 0 {
20523				break
20524			}
20525			l := v_0.Args[0]
20526			if l.Op != OpARMXORshiftRL {
20527				break
20528			}
20529			c := auxIntToInt32(l.AuxInt)
20530			y := l.Args[1]
20531			x := l.Args[0]
20532			if !(l.Uses == 1) {
20533				break
20534			}
20535			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRL, types.TypeFlags)
20536			v0.AuxInt = int32ToAuxInt(c)
20537			v0.AddArg2(x, y)
20538			b.resetWithControl(BlockARMLTnoov, v0)
20539			return true
20540		}
20541		// match: (LT (CMPconst [0] l:(XORshiftRA x y [c])) yes no)
20542		// cond: l.Uses==1
20543		// result: (LTnoov (TEQshiftRA x y [c]) yes no)
20544		for b.Controls[0].Op == OpARMCMPconst {
20545			v_0 := b.Controls[0]
20546			if auxIntToInt32(v_0.AuxInt) != 0 {
20547				break
20548			}
20549			l := v_0.Args[0]
20550			if l.Op != OpARMXORshiftRA {
20551				break
20552			}
20553			c := auxIntToInt32(l.AuxInt)
20554			y := l.Args[1]
20555			x := l.Args[0]
20556			if !(l.Uses == 1) {
20557				break
20558			}
20559			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRA, types.TypeFlags)
20560			v0.AuxInt = int32ToAuxInt(c)
20561			v0.AddArg2(x, y)
20562			b.resetWithControl(BlockARMLTnoov, v0)
20563			return true
20564		}
20565		// match: (LT (CMPconst [0] l:(XORshiftLLreg x y z)) yes no)
20566		// cond: l.Uses==1
20567		// result: (LTnoov (TEQshiftLLreg x y z) yes no)
20568		for b.Controls[0].Op == OpARMCMPconst {
20569			v_0 := b.Controls[0]
20570			if auxIntToInt32(v_0.AuxInt) != 0 {
20571				break
20572			}
20573			l := v_0.Args[0]
20574			if l.Op != OpARMXORshiftLLreg {
20575				break
20576			}
20577			z := l.Args[2]
20578			x := l.Args[0]
20579			y := l.Args[1]
20580			if !(l.Uses == 1) {
20581				break
20582			}
20583			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftLLreg, types.TypeFlags)
20584			v0.AddArg3(x, y, z)
20585			b.resetWithControl(BlockARMLTnoov, v0)
20586			return true
20587		}
20588		// match: (LT (CMPconst [0] l:(XORshiftRLreg x y z)) yes no)
20589		// cond: l.Uses==1
20590		// result: (LTnoov (TEQshiftRLreg x y z) yes no)
20591		for b.Controls[0].Op == OpARMCMPconst {
20592			v_0 := b.Controls[0]
20593			if auxIntToInt32(v_0.AuxInt) != 0 {
20594				break
20595			}
20596			l := v_0.Args[0]
20597			if l.Op != OpARMXORshiftRLreg {
20598				break
20599			}
20600			z := l.Args[2]
20601			x := l.Args[0]
20602			y := l.Args[1]
20603			if !(l.Uses == 1) {
20604				break
20605			}
20606			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRLreg, types.TypeFlags)
20607			v0.AddArg3(x, y, z)
20608			b.resetWithControl(BlockARMLTnoov, v0)
20609			return true
20610		}
20611		// match: (LT (CMPconst [0] l:(XORshiftRAreg x y z)) yes no)
20612		// cond: l.Uses==1
20613		// result: (LTnoov (TEQshiftRAreg x y z) yes no)
20614		for b.Controls[0].Op == OpARMCMPconst {
20615			v_0 := b.Controls[0]
20616			if auxIntToInt32(v_0.AuxInt) != 0 {
20617				break
20618			}
20619			l := v_0.Args[0]
20620			if l.Op != OpARMXORshiftRAreg {
20621				break
20622			}
20623			z := l.Args[2]
20624			x := l.Args[0]
20625			y := l.Args[1]
20626			if !(l.Uses == 1) {
20627				break
20628			}
20629			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRAreg, types.TypeFlags)
20630			v0.AddArg3(x, y, z)
20631			b.resetWithControl(BlockARMLTnoov, v0)
20632			return true
20633		}
20634	case BlockARMLTnoov:
20635		// match: (LTnoov (FlagConstant [fc]) yes no)
20636		// cond: fc.ltNoov()
20637		// result: (First yes no)
20638		for b.Controls[0].Op == OpARMFlagConstant {
20639			v_0 := b.Controls[0]
20640			fc := auxIntToFlagConstant(v_0.AuxInt)
20641			if !(fc.ltNoov()) {
20642				break
20643			}
20644			b.Reset(BlockFirst)
20645			return true
20646		}
20647		// match: (LTnoov (FlagConstant [fc]) yes no)
20648		// cond: !fc.ltNoov()
20649		// result: (First no yes)
20650		for b.Controls[0].Op == OpARMFlagConstant {
20651			v_0 := b.Controls[0]
20652			fc := auxIntToFlagConstant(v_0.AuxInt)
20653			if !(!fc.ltNoov()) {
20654				break
20655			}
20656			b.Reset(BlockFirst)
20657			b.swapSuccessors()
20658			return true
20659		}
20660		// match: (LTnoov (InvertFlags cmp) yes no)
20661		// result: (GTnoov cmp yes no)
20662		for b.Controls[0].Op == OpARMInvertFlags {
20663			v_0 := b.Controls[0]
20664			cmp := v_0.Args[0]
20665			b.resetWithControl(BlockARMGTnoov, cmp)
20666			return true
20667		}
20668	case BlockARMNE:
20669		// match: (NE (CMPconst [0] (Equal cc)) yes no)
20670		// result: (EQ cc yes no)
20671		for b.Controls[0].Op == OpARMCMPconst {
20672			v_0 := b.Controls[0]
20673			if auxIntToInt32(v_0.AuxInt) != 0 {
20674				break
20675			}
20676			v_0_0 := v_0.Args[0]
20677			if v_0_0.Op != OpARMEqual {
20678				break
20679			}
20680			cc := v_0_0.Args[0]
20681			b.resetWithControl(BlockARMEQ, cc)
20682			return true
20683		}
20684		// match: (NE (CMPconst [0] (NotEqual cc)) yes no)
20685		// result: (NE cc yes no)
20686		for b.Controls[0].Op == OpARMCMPconst {
20687			v_0 := b.Controls[0]
20688			if auxIntToInt32(v_0.AuxInt) != 0 {
20689				break
20690			}
20691			v_0_0 := v_0.Args[0]
20692			if v_0_0.Op != OpARMNotEqual {
20693				break
20694			}
20695			cc := v_0_0.Args[0]
20696			b.resetWithControl(BlockARMNE, cc)
20697			return true
20698		}
20699		// match: (NE (CMPconst [0] (LessThan cc)) yes no)
20700		// result: (LT cc yes no)
20701		for b.Controls[0].Op == OpARMCMPconst {
20702			v_0 := b.Controls[0]
20703			if auxIntToInt32(v_0.AuxInt) != 0 {
20704				break
20705			}
20706			v_0_0 := v_0.Args[0]
20707			if v_0_0.Op != OpARMLessThan {
20708				break
20709			}
20710			cc := v_0_0.Args[0]
20711			b.resetWithControl(BlockARMLT, cc)
20712			return true
20713		}
20714		// match: (NE (CMPconst [0] (LessThanU cc)) yes no)
20715		// result: (ULT cc yes no)
20716		for b.Controls[0].Op == OpARMCMPconst {
20717			v_0 := b.Controls[0]
20718			if auxIntToInt32(v_0.AuxInt) != 0 {
20719				break
20720			}
20721			v_0_0 := v_0.Args[0]
20722			if v_0_0.Op != OpARMLessThanU {
20723				break
20724			}
20725			cc := v_0_0.Args[0]
20726			b.resetWithControl(BlockARMULT, cc)
20727			return true
20728		}
20729		// match: (NE (CMPconst [0] (LessEqual cc)) yes no)
20730		// result: (LE cc yes no)
20731		for b.Controls[0].Op == OpARMCMPconst {
20732			v_0 := b.Controls[0]
20733			if auxIntToInt32(v_0.AuxInt) != 0 {
20734				break
20735			}
20736			v_0_0 := v_0.Args[0]
20737			if v_0_0.Op != OpARMLessEqual {
20738				break
20739			}
20740			cc := v_0_0.Args[0]
20741			b.resetWithControl(BlockARMLE, cc)
20742			return true
20743		}
20744		// match: (NE (CMPconst [0] (LessEqualU cc)) yes no)
20745		// result: (ULE cc yes no)
20746		for b.Controls[0].Op == OpARMCMPconst {
20747			v_0 := b.Controls[0]
20748			if auxIntToInt32(v_0.AuxInt) != 0 {
20749				break
20750			}
20751			v_0_0 := v_0.Args[0]
20752			if v_0_0.Op != OpARMLessEqualU {
20753				break
20754			}
20755			cc := v_0_0.Args[0]
20756			b.resetWithControl(BlockARMULE, cc)
20757			return true
20758		}
20759		// match: (NE (CMPconst [0] (GreaterThan cc)) yes no)
20760		// result: (GT cc yes no)
20761		for b.Controls[0].Op == OpARMCMPconst {
20762			v_0 := b.Controls[0]
20763			if auxIntToInt32(v_0.AuxInt) != 0 {
20764				break
20765			}
20766			v_0_0 := v_0.Args[0]
20767			if v_0_0.Op != OpARMGreaterThan {
20768				break
20769			}
20770			cc := v_0_0.Args[0]
20771			b.resetWithControl(BlockARMGT, cc)
20772			return true
20773		}
20774		// match: (NE (CMPconst [0] (GreaterThanU cc)) yes no)
20775		// result: (UGT cc yes no)
20776		for b.Controls[0].Op == OpARMCMPconst {
20777			v_0 := b.Controls[0]
20778			if auxIntToInt32(v_0.AuxInt) != 0 {
20779				break
20780			}
20781			v_0_0 := v_0.Args[0]
20782			if v_0_0.Op != OpARMGreaterThanU {
20783				break
20784			}
20785			cc := v_0_0.Args[0]
20786			b.resetWithControl(BlockARMUGT, cc)
20787			return true
20788		}
20789		// match: (NE (CMPconst [0] (GreaterEqual cc)) yes no)
20790		// result: (GE cc yes no)
20791		for b.Controls[0].Op == OpARMCMPconst {
20792			v_0 := b.Controls[0]
20793			if auxIntToInt32(v_0.AuxInt) != 0 {
20794				break
20795			}
20796			v_0_0 := v_0.Args[0]
20797			if v_0_0.Op != OpARMGreaterEqual {
20798				break
20799			}
20800			cc := v_0_0.Args[0]
20801			b.resetWithControl(BlockARMGE, cc)
20802			return true
20803		}
20804		// match: (NE (CMPconst [0] (GreaterEqualU cc)) yes no)
20805		// result: (UGE cc yes no)
20806		for b.Controls[0].Op == OpARMCMPconst {
20807			v_0 := b.Controls[0]
20808			if auxIntToInt32(v_0.AuxInt) != 0 {
20809				break
20810			}
20811			v_0_0 := v_0.Args[0]
20812			if v_0_0.Op != OpARMGreaterEqualU {
20813				break
20814			}
20815			cc := v_0_0.Args[0]
20816			b.resetWithControl(BlockARMUGE, cc)
20817			return true
20818		}
20819		// match: (NE (FlagConstant [fc]) yes no)
20820		// cond: fc.ne()
20821		// result: (First yes no)
20822		for b.Controls[0].Op == OpARMFlagConstant {
20823			v_0 := b.Controls[0]
20824			fc := auxIntToFlagConstant(v_0.AuxInt)
20825			if !(fc.ne()) {
20826				break
20827			}
20828			b.Reset(BlockFirst)
20829			return true
20830		}
20831		// match: (NE (FlagConstant [fc]) yes no)
20832		// cond: !fc.ne()
20833		// result: (First no yes)
20834		for b.Controls[0].Op == OpARMFlagConstant {
20835			v_0 := b.Controls[0]
20836			fc := auxIntToFlagConstant(v_0.AuxInt)
20837			if !(!fc.ne()) {
20838				break
20839			}
20840			b.Reset(BlockFirst)
20841			b.swapSuccessors()
20842			return true
20843		}
20844		// match: (NE (InvertFlags cmp) yes no)
20845		// result: (NE cmp yes no)
20846		for b.Controls[0].Op == OpARMInvertFlags {
20847			v_0 := b.Controls[0]
20848			cmp := v_0.Args[0]
20849			b.resetWithControl(BlockARMNE, cmp)
20850			return true
20851		}
20852		// match: (NE (CMP x (RSBconst [0] y)))
20853		// result: (NE (CMN x y))
20854		for b.Controls[0].Op == OpARMCMP {
20855			v_0 := b.Controls[0]
20856			_ = v_0.Args[1]
20857			x := v_0.Args[0]
20858			v_0_1 := v_0.Args[1]
20859			if v_0_1.Op != OpARMRSBconst || auxIntToInt32(v_0_1.AuxInt) != 0 {
20860				break
20861			}
20862			y := v_0_1.Args[0]
20863			v0 := b.NewValue0(v_0.Pos, OpARMCMN, types.TypeFlags)
20864			v0.AddArg2(x, y)
20865			b.resetWithControl(BlockARMNE, v0)
20866			return true
20867		}
20868		// match: (NE (CMN x (RSBconst [0] y)))
20869		// result: (NE (CMP x y))
20870		for b.Controls[0].Op == OpARMCMN {
20871			v_0 := b.Controls[0]
20872			_ = v_0.Args[1]
20873			v_0_0 := v_0.Args[0]
20874			v_0_1 := v_0.Args[1]
20875			for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
20876				x := v_0_0
20877				if v_0_1.Op != OpARMRSBconst || auxIntToInt32(v_0_1.AuxInt) != 0 {
20878					continue
20879				}
20880				y := v_0_1.Args[0]
20881				v0 := b.NewValue0(v_0.Pos, OpARMCMP, types.TypeFlags)
20882				v0.AddArg2(x, y)
20883				b.resetWithControl(BlockARMNE, v0)
20884				return true
20885			}
20886			break
20887		}
20888		// match: (NE (CMPconst [0] l:(SUB x y)) yes no)
20889		// cond: l.Uses==1
20890		// result: (NE (CMP x y) yes no)
20891		for b.Controls[0].Op == OpARMCMPconst {
20892			v_0 := b.Controls[0]
20893			if auxIntToInt32(v_0.AuxInt) != 0 {
20894				break
20895			}
20896			l := v_0.Args[0]
20897			if l.Op != OpARMSUB {
20898				break
20899			}
20900			y := l.Args[1]
20901			x := l.Args[0]
20902			if !(l.Uses == 1) {
20903				break
20904			}
20905			v0 := b.NewValue0(v_0.Pos, OpARMCMP, types.TypeFlags)
20906			v0.AddArg2(x, y)
20907			b.resetWithControl(BlockARMNE, v0)
20908			return true
20909		}
20910		// match: (NE (CMPconst [0] l:(MULS x y a)) yes no)
20911		// cond: l.Uses==1
20912		// result: (NE (CMP a (MUL <x.Type> x y)) yes no)
20913		for b.Controls[0].Op == OpARMCMPconst {
20914			v_0 := b.Controls[0]
20915			if auxIntToInt32(v_0.AuxInt) != 0 {
20916				break
20917			}
20918			l := v_0.Args[0]
20919			if l.Op != OpARMMULS {
20920				break
20921			}
20922			a := l.Args[2]
20923			x := l.Args[0]
20924			y := l.Args[1]
20925			if !(l.Uses == 1) {
20926				break
20927			}
20928			v0 := b.NewValue0(v_0.Pos, OpARMCMP, types.TypeFlags)
20929			v1 := b.NewValue0(v_0.Pos, OpARMMUL, x.Type)
20930			v1.AddArg2(x, y)
20931			v0.AddArg2(a, v1)
20932			b.resetWithControl(BlockARMNE, v0)
20933			return true
20934		}
20935		// match: (NE (CMPconst [0] l:(SUBconst [c] x)) yes no)
20936		// cond: l.Uses==1
20937		// result: (NE (CMPconst [c] x) yes no)
20938		for b.Controls[0].Op == OpARMCMPconst {
20939			v_0 := b.Controls[0]
20940			if auxIntToInt32(v_0.AuxInt) != 0 {
20941				break
20942			}
20943			l := v_0.Args[0]
20944			if l.Op != OpARMSUBconst {
20945				break
20946			}
20947			c := auxIntToInt32(l.AuxInt)
20948			x := l.Args[0]
20949			if !(l.Uses == 1) {
20950				break
20951			}
20952			v0 := b.NewValue0(v_0.Pos, OpARMCMPconst, types.TypeFlags)
20953			v0.AuxInt = int32ToAuxInt(c)
20954			v0.AddArg(x)
20955			b.resetWithControl(BlockARMNE, v0)
20956			return true
20957		}
20958		// match: (NE (CMPconst [0] l:(SUBshiftLL x y [c])) yes no)
20959		// cond: l.Uses==1
20960		// result: (NE (CMPshiftLL x y [c]) yes no)
20961		for b.Controls[0].Op == OpARMCMPconst {
20962			v_0 := b.Controls[0]
20963			if auxIntToInt32(v_0.AuxInt) != 0 {
20964				break
20965			}
20966			l := v_0.Args[0]
20967			if l.Op != OpARMSUBshiftLL {
20968				break
20969			}
20970			c := auxIntToInt32(l.AuxInt)
20971			y := l.Args[1]
20972			x := l.Args[0]
20973			if !(l.Uses == 1) {
20974				break
20975			}
20976			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftLL, types.TypeFlags)
20977			v0.AuxInt = int32ToAuxInt(c)
20978			v0.AddArg2(x, y)
20979			b.resetWithControl(BlockARMNE, v0)
20980			return true
20981		}
20982		// match: (NE (CMPconst [0] l:(SUBshiftRL x y [c])) yes no)
20983		// cond: l.Uses==1
20984		// result: (NE (CMPshiftRL x y [c]) yes no)
20985		for b.Controls[0].Op == OpARMCMPconst {
20986			v_0 := b.Controls[0]
20987			if auxIntToInt32(v_0.AuxInt) != 0 {
20988				break
20989			}
20990			l := v_0.Args[0]
20991			if l.Op != OpARMSUBshiftRL {
20992				break
20993			}
20994			c := auxIntToInt32(l.AuxInt)
20995			y := l.Args[1]
20996			x := l.Args[0]
20997			if !(l.Uses == 1) {
20998				break
20999			}
21000			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRL, types.TypeFlags)
21001			v0.AuxInt = int32ToAuxInt(c)
21002			v0.AddArg2(x, y)
21003			b.resetWithControl(BlockARMNE, v0)
21004			return true
21005		}
21006		// match: (NE (CMPconst [0] l:(SUBshiftRA x y [c])) yes no)
21007		// cond: l.Uses==1
21008		// result: (NE (CMPshiftRA x y [c]) yes no)
21009		for b.Controls[0].Op == OpARMCMPconst {
21010			v_0 := b.Controls[0]
21011			if auxIntToInt32(v_0.AuxInt) != 0 {
21012				break
21013			}
21014			l := v_0.Args[0]
21015			if l.Op != OpARMSUBshiftRA {
21016				break
21017			}
21018			c := auxIntToInt32(l.AuxInt)
21019			y := l.Args[1]
21020			x := l.Args[0]
21021			if !(l.Uses == 1) {
21022				break
21023			}
21024			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRA, types.TypeFlags)
21025			v0.AuxInt = int32ToAuxInt(c)
21026			v0.AddArg2(x, y)
21027			b.resetWithControl(BlockARMNE, v0)
21028			return true
21029		}
21030		// match: (NE (CMPconst [0] l:(SUBshiftLLreg x y z)) yes no)
21031		// cond: l.Uses==1
21032		// result: (NE (CMPshiftLLreg x y z) yes no)
21033		for b.Controls[0].Op == OpARMCMPconst {
21034			v_0 := b.Controls[0]
21035			if auxIntToInt32(v_0.AuxInt) != 0 {
21036				break
21037			}
21038			l := v_0.Args[0]
21039			if l.Op != OpARMSUBshiftLLreg {
21040				break
21041			}
21042			z := l.Args[2]
21043			x := l.Args[0]
21044			y := l.Args[1]
21045			if !(l.Uses == 1) {
21046				break
21047			}
21048			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftLLreg, types.TypeFlags)
21049			v0.AddArg3(x, y, z)
21050			b.resetWithControl(BlockARMNE, v0)
21051			return true
21052		}
21053		// match: (NE (CMPconst [0] l:(SUBshiftRLreg x y z)) yes no)
21054		// cond: l.Uses==1
21055		// result: (NE (CMPshiftRLreg x y z) yes no)
21056		for b.Controls[0].Op == OpARMCMPconst {
21057			v_0 := b.Controls[0]
21058			if auxIntToInt32(v_0.AuxInt) != 0 {
21059				break
21060			}
21061			l := v_0.Args[0]
21062			if l.Op != OpARMSUBshiftRLreg {
21063				break
21064			}
21065			z := l.Args[2]
21066			x := l.Args[0]
21067			y := l.Args[1]
21068			if !(l.Uses == 1) {
21069				break
21070			}
21071			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRLreg, types.TypeFlags)
21072			v0.AddArg3(x, y, z)
21073			b.resetWithControl(BlockARMNE, v0)
21074			return true
21075		}
21076		// match: (NE (CMPconst [0] l:(SUBshiftRAreg x y z)) yes no)
21077		// cond: l.Uses==1
21078		// result: (NE (CMPshiftRAreg x y z) yes no)
21079		for b.Controls[0].Op == OpARMCMPconst {
21080			v_0 := b.Controls[0]
21081			if auxIntToInt32(v_0.AuxInt) != 0 {
21082				break
21083			}
21084			l := v_0.Args[0]
21085			if l.Op != OpARMSUBshiftRAreg {
21086				break
21087			}
21088			z := l.Args[2]
21089			x := l.Args[0]
21090			y := l.Args[1]
21091			if !(l.Uses == 1) {
21092				break
21093			}
21094			v0 := b.NewValue0(v_0.Pos, OpARMCMPshiftRAreg, types.TypeFlags)
21095			v0.AddArg3(x, y, z)
21096			b.resetWithControl(BlockARMNE, v0)
21097			return true
21098		}
21099		// match: (NE (CMPconst [0] l:(ADD x y)) yes no)
21100		// cond: l.Uses==1
21101		// result: (NE (CMN x y) yes no)
21102		for b.Controls[0].Op == OpARMCMPconst {
21103			v_0 := b.Controls[0]
21104			if auxIntToInt32(v_0.AuxInt) != 0 {
21105				break
21106			}
21107			l := v_0.Args[0]
21108			if l.Op != OpARMADD {
21109				break
21110			}
21111			_ = l.Args[1]
21112			l_0 := l.Args[0]
21113			l_1 := l.Args[1]
21114			for _i0 := 0; _i0 <= 1; _i0, l_0, l_1 = _i0+1, l_1, l_0 {
21115				x := l_0
21116				y := l_1
21117				if !(l.Uses == 1) {
21118					continue
21119				}
21120				v0 := b.NewValue0(v_0.Pos, OpARMCMN, types.TypeFlags)
21121				v0.AddArg2(x, y)
21122				b.resetWithControl(BlockARMNE, v0)
21123				return true
21124			}
21125			break
21126		}
21127		// match: (NE (CMPconst [0] l:(MULA x y a)) yes no)
21128		// cond: l.Uses==1
21129		// result: (NE (CMN a (MUL <x.Type> x y)) yes no)
21130		for b.Controls[0].Op == OpARMCMPconst {
21131			v_0 := b.Controls[0]
21132			if auxIntToInt32(v_0.AuxInt) != 0 {
21133				break
21134			}
21135			l := v_0.Args[0]
21136			if l.Op != OpARMMULA {
21137				break
21138			}
21139			a := l.Args[2]
21140			x := l.Args[0]
21141			y := l.Args[1]
21142			if !(l.Uses == 1) {
21143				break
21144			}
21145			v0 := b.NewValue0(v_0.Pos, OpARMCMN, types.TypeFlags)
21146			v1 := b.NewValue0(v_0.Pos, OpARMMUL, x.Type)
21147			v1.AddArg2(x, y)
21148			v0.AddArg2(a, v1)
21149			b.resetWithControl(BlockARMNE, v0)
21150			return true
21151		}
21152		// match: (NE (CMPconst [0] l:(ADDconst [c] x)) yes no)
21153		// cond: l.Uses==1
21154		// result: (NE (CMNconst [c] x) yes no)
21155		for b.Controls[0].Op == OpARMCMPconst {
21156			v_0 := b.Controls[0]
21157			if auxIntToInt32(v_0.AuxInt) != 0 {
21158				break
21159			}
21160			l := v_0.Args[0]
21161			if l.Op != OpARMADDconst {
21162				break
21163			}
21164			c := auxIntToInt32(l.AuxInt)
21165			x := l.Args[0]
21166			if !(l.Uses == 1) {
21167				break
21168			}
21169			v0 := b.NewValue0(v_0.Pos, OpARMCMNconst, types.TypeFlags)
21170			v0.AuxInt = int32ToAuxInt(c)
21171			v0.AddArg(x)
21172			b.resetWithControl(BlockARMNE, v0)
21173			return true
21174		}
21175		// match: (NE (CMPconst [0] l:(ADDshiftLL x y [c])) yes no)
21176		// cond: l.Uses==1
21177		// result: (NE (CMNshiftLL x y [c]) yes no)
21178		for b.Controls[0].Op == OpARMCMPconst {
21179			v_0 := b.Controls[0]
21180			if auxIntToInt32(v_0.AuxInt) != 0 {
21181				break
21182			}
21183			l := v_0.Args[0]
21184			if l.Op != OpARMADDshiftLL {
21185				break
21186			}
21187			c := auxIntToInt32(l.AuxInt)
21188			y := l.Args[1]
21189			x := l.Args[0]
21190			if !(l.Uses == 1) {
21191				break
21192			}
21193			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftLL, types.TypeFlags)
21194			v0.AuxInt = int32ToAuxInt(c)
21195			v0.AddArg2(x, y)
21196			b.resetWithControl(BlockARMNE, v0)
21197			return true
21198		}
21199		// match: (NE (CMPconst [0] l:(ADDshiftRL x y [c])) yes no)
21200		// cond: l.Uses==1
21201		// result: (NE (CMNshiftRL x y [c]) yes no)
21202		for b.Controls[0].Op == OpARMCMPconst {
21203			v_0 := b.Controls[0]
21204			if auxIntToInt32(v_0.AuxInt) != 0 {
21205				break
21206			}
21207			l := v_0.Args[0]
21208			if l.Op != OpARMADDshiftRL {
21209				break
21210			}
21211			c := auxIntToInt32(l.AuxInt)
21212			y := l.Args[1]
21213			x := l.Args[0]
21214			if !(l.Uses == 1) {
21215				break
21216			}
21217			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRL, types.TypeFlags)
21218			v0.AuxInt = int32ToAuxInt(c)
21219			v0.AddArg2(x, y)
21220			b.resetWithControl(BlockARMNE, v0)
21221			return true
21222		}
21223		// match: (NE (CMPconst [0] l:(ADDshiftRA x y [c])) yes no)
21224		// cond: l.Uses==1
21225		// result: (NE (CMNshiftRA x y [c]) yes no)
21226		for b.Controls[0].Op == OpARMCMPconst {
21227			v_0 := b.Controls[0]
21228			if auxIntToInt32(v_0.AuxInt) != 0 {
21229				break
21230			}
21231			l := v_0.Args[0]
21232			if l.Op != OpARMADDshiftRA {
21233				break
21234			}
21235			c := auxIntToInt32(l.AuxInt)
21236			y := l.Args[1]
21237			x := l.Args[0]
21238			if !(l.Uses == 1) {
21239				break
21240			}
21241			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRA, types.TypeFlags)
21242			v0.AuxInt = int32ToAuxInt(c)
21243			v0.AddArg2(x, y)
21244			b.resetWithControl(BlockARMNE, v0)
21245			return true
21246		}
21247		// match: (NE (CMPconst [0] l:(ADDshiftLLreg x y z)) yes no)
21248		// cond: l.Uses==1
21249		// result: (NE (CMNshiftLLreg x y z) yes no)
21250		for b.Controls[0].Op == OpARMCMPconst {
21251			v_0 := b.Controls[0]
21252			if auxIntToInt32(v_0.AuxInt) != 0 {
21253				break
21254			}
21255			l := v_0.Args[0]
21256			if l.Op != OpARMADDshiftLLreg {
21257				break
21258			}
21259			z := l.Args[2]
21260			x := l.Args[0]
21261			y := l.Args[1]
21262			if !(l.Uses == 1) {
21263				break
21264			}
21265			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftLLreg, types.TypeFlags)
21266			v0.AddArg3(x, y, z)
21267			b.resetWithControl(BlockARMNE, v0)
21268			return true
21269		}
21270		// match: (NE (CMPconst [0] l:(ADDshiftRLreg x y z)) yes no)
21271		// cond: l.Uses==1
21272		// result: (NE (CMNshiftRLreg x y z) yes no)
21273		for b.Controls[0].Op == OpARMCMPconst {
21274			v_0 := b.Controls[0]
21275			if auxIntToInt32(v_0.AuxInt) != 0 {
21276				break
21277			}
21278			l := v_0.Args[0]
21279			if l.Op != OpARMADDshiftRLreg {
21280				break
21281			}
21282			z := l.Args[2]
21283			x := l.Args[0]
21284			y := l.Args[1]
21285			if !(l.Uses == 1) {
21286				break
21287			}
21288			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRLreg, types.TypeFlags)
21289			v0.AddArg3(x, y, z)
21290			b.resetWithControl(BlockARMNE, v0)
21291			return true
21292		}
21293		// match: (NE (CMPconst [0] l:(ADDshiftRAreg x y z)) yes no)
21294		// cond: l.Uses==1
21295		// result: (NE (CMNshiftRAreg x y z) yes no)
21296		for b.Controls[0].Op == OpARMCMPconst {
21297			v_0 := b.Controls[0]
21298			if auxIntToInt32(v_0.AuxInt) != 0 {
21299				break
21300			}
21301			l := v_0.Args[0]
21302			if l.Op != OpARMADDshiftRAreg {
21303				break
21304			}
21305			z := l.Args[2]
21306			x := l.Args[0]
21307			y := l.Args[1]
21308			if !(l.Uses == 1) {
21309				break
21310			}
21311			v0 := b.NewValue0(v_0.Pos, OpARMCMNshiftRAreg, types.TypeFlags)
21312			v0.AddArg3(x, y, z)
21313			b.resetWithControl(BlockARMNE, v0)
21314			return true
21315		}
21316		// match: (NE (CMPconst [0] l:(AND x y)) yes no)
21317		// cond: l.Uses==1
21318		// result: (NE (TST x y) yes no)
21319		for b.Controls[0].Op == OpARMCMPconst {
21320			v_0 := b.Controls[0]
21321			if auxIntToInt32(v_0.AuxInt) != 0 {
21322				break
21323			}
21324			l := v_0.Args[0]
21325			if l.Op != OpARMAND {
21326				break
21327			}
21328			_ = l.Args[1]
21329			l_0 := l.Args[0]
21330			l_1 := l.Args[1]
21331			for _i0 := 0; _i0 <= 1; _i0, l_0, l_1 = _i0+1, l_1, l_0 {
21332				x := l_0
21333				y := l_1
21334				if !(l.Uses == 1) {
21335					continue
21336				}
21337				v0 := b.NewValue0(v_0.Pos, OpARMTST, types.TypeFlags)
21338				v0.AddArg2(x, y)
21339				b.resetWithControl(BlockARMNE, v0)
21340				return true
21341			}
21342			break
21343		}
21344		// match: (NE (CMPconst [0] l:(ANDconst [c] x)) yes no)
21345		// cond: l.Uses==1
21346		// result: (NE (TSTconst [c] x) yes no)
21347		for b.Controls[0].Op == OpARMCMPconst {
21348			v_0 := b.Controls[0]
21349			if auxIntToInt32(v_0.AuxInt) != 0 {
21350				break
21351			}
21352			l := v_0.Args[0]
21353			if l.Op != OpARMANDconst {
21354				break
21355			}
21356			c := auxIntToInt32(l.AuxInt)
21357			x := l.Args[0]
21358			if !(l.Uses == 1) {
21359				break
21360			}
21361			v0 := b.NewValue0(v_0.Pos, OpARMTSTconst, types.TypeFlags)
21362			v0.AuxInt = int32ToAuxInt(c)
21363			v0.AddArg(x)
21364			b.resetWithControl(BlockARMNE, v0)
21365			return true
21366		}
21367		// match: (NE (CMPconst [0] l:(ANDshiftLL x y [c])) yes no)
21368		// cond: l.Uses==1
21369		// result: (NE (TSTshiftLL x y [c]) yes no)
21370		for b.Controls[0].Op == OpARMCMPconst {
21371			v_0 := b.Controls[0]
21372			if auxIntToInt32(v_0.AuxInt) != 0 {
21373				break
21374			}
21375			l := v_0.Args[0]
21376			if l.Op != OpARMANDshiftLL {
21377				break
21378			}
21379			c := auxIntToInt32(l.AuxInt)
21380			y := l.Args[1]
21381			x := l.Args[0]
21382			if !(l.Uses == 1) {
21383				break
21384			}
21385			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftLL, types.TypeFlags)
21386			v0.AuxInt = int32ToAuxInt(c)
21387			v0.AddArg2(x, y)
21388			b.resetWithControl(BlockARMNE, v0)
21389			return true
21390		}
21391		// match: (NE (CMPconst [0] l:(ANDshiftRL x y [c])) yes no)
21392		// cond: l.Uses==1
21393		// result: (NE (TSTshiftRL x y [c]) yes no)
21394		for b.Controls[0].Op == OpARMCMPconst {
21395			v_0 := b.Controls[0]
21396			if auxIntToInt32(v_0.AuxInt) != 0 {
21397				break
21398			}
21399			l := v_0.Args[0]
21400			if l.Op != OpARMANDshiftRL {
21401				break
21402			}
21403			c := auxIntToInt32(l.AuxInt)
21404			y := l.Args[1]
21405			x := l.Args[0]
21406			if !(l.Uses == 1) {
21407				break
21408			}
21409			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRL, types.TypeFlags)
21410			v0.AuxInt = int32ToAuxInt(c)
21411			v0.AddArg2(x, y)
21412			b.resetWithControl(BlockARMNE, v0)
21413			return true
21414		}
21415		// match: (NE (CMPconst [0] l:(ANDshiftRA x y [c])) yes no)
21416		// cond: l.Uses==1
21417		// result: (NE (TSTshiftRA x y [c]) yes no)
21418		for b.Controls[0].Op == OpARMCMPconst {
21419			v_0 := b.Controls[0]
21420			if auxIntToInt32(v_0.AuxInt) != 0 {
21421				break
21422			}
21423			l := v_0.Args[0]
21424			if l.Op != OpARMANDshiftRA {
21425				break
21426			}
21427			c := auxIntToInt32(l.AuxInt)
21428			y := l.Args[1]
21429			x := l.Args[0]
21430			if !(l.Uses == 1) {
21431				break
21432			}
21433			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRA, types.TypeFlags)
21434			v0.AuxInt = int32ToAuxInt(c)
21435			v0.AddArg2(x, y)
21436			b.resetWithControl(BlockARMNE, v0)
21437			return true
21438		}
21439		// match: (NE (CMPconst [0] l:(ANDshiftLLreg x y z)) yes no)
21440		// cond: l.Uses==1
21441		// result: (NE (TSTshiftLLreg x y z) yes no)
21442		for b.Controls[0].Op == OpARMCMPconst {
21443			v_0 := b.Controls[0]
21444			if auxIntToInt32(v_0.AuxInt) != 0 {
21445				break
21446			}
21447			l := v_0.Args[0]
21448			if l.Op != OpARMANDshiftLLreg {
21449				break
21450			}
21451			z := l.Args[2]
21452			x := l.Args[0]
21453			y := l.Args[1]
21454			if !(l.Uses == 1) {
21455				break
21456			}
21457			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftLLreg, types.TypeFlags)
21458			v0.AddArg3(x, y, z)
21459			b.resetWithControl(BlockARMNE, v0)
21460			return true
21461		}
21462		// match: (NE (CMPconst [0] l:(ANDshiftRLreg x y z)) yes no)
21463		// cond: l.Uses==1
21464		// result: (NE (TSTshiftRLreg x y z) yes no)
21465		for b.Controls[0].Op == OpARMCMPconst {
21466			v_0 := b.Controls[0]
21467			if auxIntToInt32(v_0.AuxInt) != 0 {
21468				break
21469			}
21470			l := v_0.Args[0]
21471			if l.Op != OpARMANDshiftRLreg {
21472				break
21473			}
21474			z := l.Args[2]
21475			x := l.Args[0]
21476			y := l.Args[1]
21477			if !(l.Uses == 1) {
21478				break
21479			}
21480			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRLreg, types.TypeFlags)
21481			v0.AddArg3(x, y, z)
21482			b.resetWithControl(BlockARMNE, v0)
21483			return true
21484		}
21485		// match: (NE (CMPconst [0] l:(ANDshiftRAreg x y z)) yes no)
21486		// cond: l.Uses==1
21487		// result: (NE (TSTshiftRAreg x y z) yes no)
21488		for b.Controls[0].Op == OpARMCMPconst {
21489			v_0 := b.Controls[0]
21490			if auxIntToInt32(v_0.AuxInt) != 0 {
21491				break
21492			}
21493			l := v_0.Args[0]
21494			if l.Op != OpARMANDshiftRAreg {
21495				break
21496			}
21497			z := l.Args[2]
21498			x := l.Args[0]
21499			y := l.Args[1]
21500			if !(l.Uses == 1) {
21501				break
21502			}
21503			v0 := b.NewValue0(v_0.Pos, OpARMTSTshiftRAreg, types.TypeFlags)
21504			v0.AddArg3(x, y, z)
21505			b.resetWithControl(BlockARMNE, v0)
21506			return true
21507		}
21508		// match: (NE (CMPconst [0] l:(XOR x y)) yes no)
21509		// cond: l.Uses==1
21510		// result: (NE (TEQ x y) yes no)
21511		for b.Controls[0].Op == OpARMCMPconst {
21512			v_0 := b.Controls[0]
21513			if auxIntToInt32(v_0.AuxInt) != 0 {
21514				break
21515			}
21516			l := v_0.Args[0]
21517			if l.Op != OpARMXOR {
21518				break
21519			}
21520			_ = l.Args[1]
21521			l_0 := l.Args[0]
21522			l_1 := l.Args[1]
21523			for _i0 := 0; _i0 <= 1; _i0, l_0, l_1 = _i0+1, l_1, l_0 {
21524				x := l_0
21525				y := l_1
21526				if !(l.Uses == 1) {
21527					continue
21528				}
21529				v0 := b.NewValue0(v_0.Pos, OpARMTEQ, types.TypeFlags)
21530				v0.AddArg2(x, y)
21531				b.resetWithControl(BlockARMNE, v0)
21532				return true
21533			}
21534			break
21535		}
21536		// match: (NE (CMPconst [0] l:(XORconst [c] x)) yes no)
21537		// cond: l.Uses==1
21538		// result: (NE (TEQconst [c] x) yes no)
21539		for b.Controls[0].Op == OpARMCMPconst {
21540			v_0 := b.Controls[0]
21541			if auxIntToInt32(v_0.AuxInt) != 0 {
21542				break
21543			}
21544			l := v_0.Args[0]
21545			if l.Op != OpARMXORconst {
21546				break
21547			}
21548			c := auxIntToInt32(l.AuxInt)
21549			x := l.Args[0]
21550			if !(l.Uses == 1) {
21551				break
21552			}
21553			v0 := b.NewValue0(v_0.Pos, OpARMTEQconst, types.TypeFlags)
21554			v0.AuxInt = int32ToAuxInt(c)
21555			v0.AddArg(x)
21556			b.resetWithControl(BlockARMNE, v0)
21557			return true
21558		}
21559		// match: (NE (CMPconst [0] l:(XORshiftLL x y [c])) yes no)
21560		// cond: l.Uses==1
21561		// result: (NE (TEQshiftLL x y [c]) yes no)
21562		for b.Controls[0].Op == OpARMCMPconst {
21563			v_0 := b.Controls[0]
21564			if auxIntToInt32(v_0.AuxInt) != 0 {
21565				break
21566			}
21567			l := v_0.Args[0]
21568			if l.Op != OpARMXORshiftLL {
21569				break
21570			}
21571			c := auxIntToInt32(l.AuxInt)
21572			y := l.Args[1]
21573			x := l.Args[0]
21574			if !(l.Uses == 1) {
21575				break
21576			}
21577			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftLL, types.TypeFlags)
21578			v0.AuxInt = int32ToAuxInt(c)
21579			v0.AddArg2(x, y)
21580			b.resetWithControl(BlockARMNE, v0)
21581			return true
21582		}
21583		// match: (NE (CMPconst [0] l:(XORshiftRL x y [c])) yes no)
21584		// cond: l.Uses==1
21585		// result: (NE (TEQshiftRL x y [c]) yes no)
21586		for b.Controls[0].Op == OpARMCMPconst {
21587			v_0 := b.Controls[0]
21588			if auxIntToInt32(v_0.AuxInt) != 0 {
21589				break
21590			}
21591			l := v_0.Args[0]
21592			if l.Op != OpARMXORshiftRL {
21593				break
21594			}
21595			c := auxIntToInt32(l.AuxInt)
21596			y := l.Args[1]
21597			x := l.Args[0]
21598			if !(l.Uses == 1) {
21599				break
21600			}
21601			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRL, types.TypeFlags)
21602			v0.AuxInt = int32ToAuxInt(c)
21603			v0.AddArg2(x, y)
21604			b.resetWithControl(BlockARMNE, v0)
21605			return true
21606		}
21607		// match: (NE (CMPconst [0] l:(XORshiftRA x y [c])) yes no)
21608		// cond: l.Uses==1
21609		// result: (NE (TEQshiftRA x y [c]) yes no)
21610		for b.Controls[0].Op == OpARMCMPconst {
21611			v_0 := b.Controls[0]
21612			if auxIntToInt32(v_0.AuxInt) != 0 {
21613				break
21614			}
21615			l := v_0.Args[0]
21616			if l.Op != OpARMXORshiftRA {
21617				break
21618			}
21619			c := auxIntToInt32(l.AuxInt)
21620			y := l.Args[1]
21621			x := l.Args[0]
21622			if !(l.Uses == 1) {
21623				break
21624			}
21625			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRA, types.TypeFlags)
21626			v0.AuxInt = int32ToAuxInt(c)
21627			v0.AddArg2(x, y)
21628			b.resetWithControl(BlockARMNE, v0)
21629			return true
21630		}
21631		// match: (NE (CMPconst [0] l:(XORshiftLLreg x y z)) yes no)
21632		// cond: l.Uses==1
21633		// result: (NE (TEQshiftLLreg x y z) yes no)
21634		for b.Controls[0].Op == OpARMCMPconst {
21635			v_0 := b.Controls[0]
21636			if auxIntToInt32(v_0.AuxInt) != 0 {
21637				break
21638			}
21639			l := v_0.Args[0]
21640			if l.Op != OpARMXORshiftLLreg {
21641				break
21642			}
21643			z := l.Args[2]
21644			x := l.Args[0]
21645			y := l.Args[1]
21646			if !(l.Uses == 1) {
21647				break
21648			}
21649			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftLLreg, types.TypeFlags)
21650			v0.AddArg3(x, y, z)
21651			b.resetWithControl(BlockARMNE, v0)
21652			return true
21653		}
21654		// match: (NE (CMPconst [0] l:(XORshiftRLreg x y z)) yes no)
21655		// cond: l.Uses==1
21656		// result: (NE (TEQshiftRLreg x y z) yes no)
21657		for b.Controls[0].Op == OpARMCMPconst {
21658			v_0 := b.Controls[0]
21659			if auxIntToInt32(v_0.AuxInt) != 0 {
21660				break
21661			}
21662			l := v_0.Args[0]
21663			if l.Op != OpARMXORshiftRLreg {
21664				break
21665			}
21666			z := l.Args[2]
21667			x := l.Args[0]
21668			y := l.Args[1]
21669			if !(l.Uses == 1) {
21670				break
21671			}
21672			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRLreg, types.TypeFlags)
21673			v0.AddArg3(x, y, z)
21674			b.resetWithControl(BlockARMNE, v0)
21675			return true
21676		}
21677		// match: (NE (CMPconst [0] l:(XORshiftRAreg x y z)) yes no)
21678		// cond: l.Uses==1
21679		// result: (NE (TEQshiftRAreg x y z) yes no)
21680		for b.Controls[0].Op == OpARMCMPconst {
21681			v_0 := b.Controls[0]
21682			if auxIntToInt32(v_0.AuxInt) != 0 {
21683				break
21684			}
21685			l := v_0.Args[0]
21686			if l.Op != OpARMXORshiftRAreg {
21687				break
21688			}
21689			z := l.Args[2]
21690			x := l.Args[0]
21691			y := l.Args[1]
21692			if !(l.Uses == 1) {
21693				break
21694			}
21695			v0 := b.NewValue0(v_0.Pos, OpARMTEQshiftRAreg, types.TypeFlags)
21696			v0.AddArg3(x, y, z)
21697			b.resetWithControl(BlockARMNE, v0)
21698			return true
21699		}
21700	case BlockARMUGE:
21701		// match: (UGE (FlagConstant [fc]) yes no)
21702		// cond: fc.uge()
21703		// result: (First yes no)
21704		for b.Controls[0].Op == OpARMFlagConstant {
21705			v_0 := b.Controls[0]
21706			fc := auxIntToFlagConstant(v_0.AuxInt)
21707			if !(fc.uge()) {
21708				break
21709			}
21710			b.Reset(BlockFirst)
21711			return true
21712		}
21713		// match: (UGE (FlagConstant [fc]) yes no)
21714		// cond: !fc.uge()
21715		// result: (First no yes)
21716		for b.Controls[0].Op == OpARMFlagConstant {
21717			v_0 := b.Controls[0]
21718			fc := auxIntToFlagConstant(v_0.AuxInt)
21719			if !(!fc.uge()) {
21720				break
21721			}
21722			b.Reset(BlockFirst)
21723			b.swapSuccessors()
21724			return true
21725		}
21726		// match: (UGE (InvertFlags cmp) yes no)
21727		// result: (ULE cmp yes no)
21728		for b.Controls[0].Op == OpARMInvertFlags {
21729			v_0 := b.Controls[0]
21730			cmp := v_0.Args[0]
21731			b.resetWithControl(BlockARMULE, cmp)
21732			return true
21733		}
21734	case BlockARMUGT:
21735		// match: (UGT (FlagConstant [fc]) yes no)
21736		// cond: fc.ugt()
21737		// result: (First yes no)
21738		for b.Controls[0].Op == OpARMFlagConstant {
21739			v_0 := b.Controls[0]
21740			fc := auxIntToFlagConstant(v_0.AuxInt)
21741			if !(fc.ugt()) {
21742				break
21743			}
21744			b.Reset(BlockFirst)
21745			return true
21746		}
21747		// match: (UGT (FlagConstant [fc]) yes no)
21748		// cond: !fc.ugt()
21749		// result: (First no yes)
21750		for b.Controls[0].Op == OpARMFlagConstant {
21751			v_0 := b.Controls[0]
21752			fc := auxIntToFlagConstant(v_0.AuxInt)
21753			if !(!fc.ugt()) {
21754				break
21755			}
21756			b.Reset(BlockFirst)
21757			b.swapSuccessors()
21758			return true
21759		}
21760		// match: (UGT (InvertFlags cmp) yes no)
21761		// result: (ULT cmp yes no)
21762		for b.Controls[0].Op == OpARMInvertFlags {
21763			v_0 := b.Controls[0]
21764			cmp := v_0.Args[0]
21765			b.resetWithControl(BlockARMULT, cmp)
21766			return true
21767		}
21768	case BlockARMULE:
21769		// match: (ULE (FlagConstant [fc]) yes no)
21770		// cond: fc.ule()
21771		// result: (First yes no)
21772		for b.Controls[0].Op == OpARMFlagConstant {
21773			v_0 := b.Controls[0]
21774			fc := auxIntToFlagConstant(v_0.AuxInt)
21775			if !(fc.ule()) {
21776				break
21777			}
21778			b.Reset(BlockFirst)
21779			return true
21780		}
21781		// match: (ULE (FlagConstant [fc]) yes no)
21782		// cond: !fc.ule()
21783		// result: (First no yes)
21784		for b.Controls[0].Op == OpARMFlagConstant {
21785			v_0 := b.Controls[0]
21786			fc := auxIntToFlagConstant(v_0.AuxInt)
21787			if !(!fc.ule()) {
21788				break
21789			}
21790			b.Reset(BlockFirst)
21791			b.swapSuccessors()
21792			return true
21793		}
21794		// match: (ULE (InvertFlags cmp) yes no)
21795		// result: (UGE cmp yes no)
21796		for b.Controls[0].Op == OpARMInvertFlags {
21797			v_0 := b.Controls[0]
21798			cmp := v_0.Args[0]
21799			b.resetWithControl(BlockARMUGE, cmp)
21800			return true
21801		}
21802	case BlockARMULT:
21803		// match: (ULT (FlagConstant [fc]) yes no)
21804		// cond: fc.ult()
21805		// result: (First yes no)
21806		for b.Controls[0].Op == OpARMFlagConstant {
21807			v_0 := b.Controls[0]
21808			fc := auxIntToFlagConstant(v_0.AuxInt)
21809			if !(fc.ult()) {
21810				break
21811			}
21812			b.Reset(BlockFirst)
21813			return true
21814		}
21815		// match: (ULT (FlagConstant [fc]) yes no)
21816		// cond: !fc.ult()
21817		// result: (First no yes)
21818		for b.Controls[0].Op == OpARMFlagConstant {
21819			v_0 := b.Controls[0]
21820			fc := auxIntToFlagConstant(v_0.AuxInt)
21821			if !(!fc.ult()) {
21822				break
21823			}
21824			b.Reset(BlockFirst)
21825			b.swapSuccessors()
21826			return true
21827		}
21828		// match: (ULT (InvertFlags cmp) yes no)
21829		// result: (UGT cmp yes no)
21830		for b.Controls[0].Op == OpARMInvertFlags {
21831			v_0 := b.Controls[0]
21832			cmp := v_0.Args[0]
21833			b.resetWithControl(BlockARMUGT, cmp)
21834			return true
21835		}
21836	}
21837	return false
21838}
21839