1{ 2 "License": [ 3 "Copyright (C) 2024 The Android Open Source Project", 4 "", 5 "Licensed under the Apache License, Version 2.0 (the “License”);", 6 "you may not use this file except in compliance with the License.", 7 "You may obtain a copy of the License at", 8 "", 9 " http://www.apache.org/licenses/LICENSE-2.0", 10 "", 11 "Unless required by applicable law or agreed to in writing, software", 12 "distributed under the License is distributed on an “AS IS” BASIS,", 13 "WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.", 14 "See the License for the specific language governing permissions and", 15 "limitations under the License." 16 ], 17 "arch": "rv64", 18 "insns": [ 19 { 20 "encodings": { 21 "AddUW": { "opcode": "0800_003b", "type": "R-type" }, 22 "addw": { "opcode": "0000_003b", "type": "R-type" }, 23 "divuw": { "opcode": "0200_503b", "type": "R-type" }, 24 "divw": { "opcode": "0200_403b", "type": "R-type" }, 25 "mulw": { "opcode": "0200_003b", "type": "R-type" }, 26 "remuw": { "opcode": "0200_703b", "type": "R-type" }, 27 "remw": { "opcode": "0200_603b", "type": "R-type" }, 28 "rorw": { "opcode": "6000_503b", "type": "R-type" }, 29 "sllw": { "opcode": "0000_103b", "type": "R-type" }, 30 "subw": { "opcode": "4000_003b", "type": "R-type" } 31 }, 32 "args": [ 33 { "class": "GeneralReg", "usage": "def" }, 34 { "class": "GeneralReg", "usage": "use" }, 35 { "class": "GeneralReg", "usage": "use" } 36 ] 37 }, 38 { 39 "stems": [ "SextW", "ZextW", "negw" ], 40 "args": [ 41 { "class": "GeneralReg", "usage": "def" }, 42 { "class": "GeneralReg", "usage": "use" } 43 ] 44 }, 45 { 46 "encodings": { 47 "addiw": { "opcode": "0000_001b", "type": "I-type" } 48 }, 49 "args": [ 50 { "class": "GeneralReg", "usage": "def" }, 51 { "class": "GeneralReg", "usage": "use" }, 52 { "class": "I-Imm" } 53 ] 54 }, 55 { 56 "encodings": { 57 "bexti": { "opcode": "4800_5013", "type": "I-type" }, 58 "rori": { "opcode": "6000_5013", "type": "I-type" }, 59 "slli": { "opcode": "0000_1013", "type": "I-type" }, 60 "srai": { "opcode": "4000_5013", "type": "I-type" }, 61 "srli": { "opcode": "0000_5013", "type": "I-type" } 62 }, 63 "args": [ 64 { "class": "GeneralReg", "usage": "def" }, 65 { "class": "GeneralReg", "usage": "use" }, 66 { "class": "Shift64-Imm" } 67 ] 68 }, 69 { 70 "encodings": { 71 "fcvt.d.l": { "opcode": "d220_0053", "type": "R-type" }, 72 "fcvt.d.lu": { "opcode": "d230_0053", "type": "R-type" }, 73 "fcvt.s.l": { "opcode": "d020_0053", "type": "R-type" }, 74 "fcvt.s.lu": { "opcode": "d030_0053", "type": "R-type" } 75 }, 76 "args": [ 77 { "class": "FpReg", "usage": "def" }, 78 { "class": "GeneralReg", "usage": "use" }, 79 { "class": "Rm", "usage": "use" } 80 ] 81 }, 82 { 83 "encodings": { 84 "fcvt.l.d": { "opcode": "c220_0053", "type": "R-type" }, 85 "fcvt.l.s": { "opcode": "c020_0053", "type": "R-type" }, 86 "fcvt.lu.d": { "opcode": "c230_0053", "type": "R-type" }, 87 "fcvt.lu.s": { "opcode": "c030_0053", "type": "R-type" } 88 }, 89 "args": [ 90 { "class": "GeneralReg", "usage": "def" }, 91 { "class": "FpReg", "usage": "use" }, 92 { "class": "Rm", "usage": "use" } 93 ] 94 }, 95 { 96 "stems": [ "ld", "lwu" ], 97 "args": [ 98 { "class": "GeneralReg", "usage": "def" }, 99 { "class": "Label" } 100 ] 101 }, 102 { 103 "encodings": { 104 "ld": { "opcode": "0000_3003", "type": "I-type" } 105 }, 106 "args": [ 107 { "class": "GeneralReg", "usage": "def" }, 108 { "class": "Mem64", "usage": "use" } 109 ] 110 }, 111 { 112 "stems": [ "li" ], 113 "args": [ 114 { "class": "GeneralReg", "usage": "def" }, 115 { "class": "Imm64", "usage": "use" } 116 ] 117 }, 118 { 119 "encodings": { 120 "lwu": { "opcode": "0000_6003", "type": "I-type" } 121 }, 122 "args": [ 123 { "class": "GeneralReg", "usage": "def" }, 124 { "class": "Mem32", "usage": "use" } 125 ] 126 }, 127 { 128 "encodings": { 129 "roriw": { "opcode": "6000_501b", "type": "I-type" }, 130 "slliw": { "opcode": "0000_101b", "type": "I-type" }, 131 "sraiw": { "opcode": "4000_501b", "type": "I-type" }, 132 "srliw": { "opcode": "0000_501b", "type": "I-type" } 133 }, 134 "args": [ 135 { "class": "GeneralReg", "usage": "def" }, 136 { "class": "GeneralReg", "usage": "use" }, 137 { "class": "Shift32-Imm" } 138 ] 139 }, 140 { 141 "stems": [ "sd" ], 142 "args": [ 143 { "class": "GeneralReg", "usage": "use" }, 144 { "class": "Label" }, 145 { "class": "GeneralReg", "usage": "def" } 146 ] 147 }, 148 { 149 "encodings": { 150 "sd": { "opcode": "0000_3023", "type": "S-type" } 151 }, 152 "args": [ 153 { "class": "GeneralReg", "usage": "use" }, 154 { "class": "Mem64", "usage": "def" } 155 ] 156 } 157 ] 158} 159