xref: /aosp_15_r20/external/mesa3d/src/gallium/drivers/radeonsi/radeon_uvd.c (revision 6104692788411f58d303aa86923a9ff6ecaded22)
1 /**************************************************************************
2  *
3  * Copyright 2011 Advanced Micro Devices, Inc.
4  *
5  * SPDX-License-Identifier: MIT
6  *
7  **************************************************************************/
8 
9 #include "radeon_uvd.h"
10 
11 #include "pipe/p_video_codec.h"
12 #include "radeon_video.h"
13 #include "radeonsi/si_pipe.h"
14 #include "util/u_memory.h"
15 #include "util/u_video.h"
16 #include "vl/vl_defines.h"
17 #include "vl/vl_mpeg12_decoder.h"
18 #include <sys/types.h>
19 
20 #include <assert.h>
21 #include <errno.h>
22 #include <stdio.h>
23 #include <unistd.h>
24 
25 #define NUM_BUFFERS 4
26 
27 #define NUM_MPEG2_REFS 6
28 #define NUM_H264_REFS  17
29 #define NUM_VC1_REFS   5
30 
31 #define FB_BUFFER_OFFSET         0x1000
32 #define FB_BUFFER_SIZE           2048
33 #define FB_BUFFER_SIZE_TONGA     (2048 * 64)
34 #define IT_SCALING_TABLE_SIZE    992
35 #define UVD_SESSION_CONTEXT_SIZE (128 * 1024)
36 
37 /* UVD decoder representation */
38 struct ruvd_decoder {
39    struct pipe_video_codec base;
40 
41    ruvd_set_dtb set_dtb;
42 
43    unsigned stream_handle;
44    unsigned stream_type;
45    unsigned frame_number;
46 
47    struct pipe_screen *screen;
48    struct radeon_winsys *ws;
49    struct radeon_cmdbuf cs;
50 
51    unsigned cur_buffer;
52 
53    struct rvid_buffer msg_fb_it_buffers[NUM_BUFFERS];
54    struct ruvd_msg *msg;
55    uint32_t *fb;
56    unsigned fb_size;
57    uint8_t *it;
58 
59    struct rvid_buffer bs_buffers[NUM_BUFFERS];
60    void *bs_ptr;
61    unsigned bs_size;
62 
63    struct rvid_buffer dpb;
64    bool use_legacy;
65    struct rvid_buffer ctx;
66    struct rvid_buffer sessionctx;
67    struct {
68       unsigned data0;
69       unsigned data1;
70       unsigned cmd;
71       unsigned cntl;
72    } reg;
73 
74    void *render_pic_list[16];
75 };
76 
77 /* flush IB to the hardware */
flush(struct ruvd_decoder * dec,unsigned flags,struct pipe_fence_handle ** fence)78 static int flush(struct ruvd_decoder *dec, unsigned flags, struct pipe_fence_handle **fence)
79 {
80    return dec->ws->cs_flush(&dec->cs, flags, fence);
81 }
82 
ruvd_dec_get_decoder_fence(struct pipe_video_codec * decoder,struct pipe_fence_handle * fence,uint64_t timeout)83 static int ruvd_dec_get_decoder_fence(struct pipe_video_codec *decoder,
84                                       struct pipe_fence_handle *fence,
85                                       uint64_t timeout) {
86    struct ruvd_decoder *dec = (struct ruvd_decoder *)decoder;
87    return dec->ws->fence_wait(dec->ws, fence, timeout);
88 }
89 
ruvd_dec_destroy_fence(struct pipe_video_codec * decoder,struct pipe_fence_handle * fence)90 static void ruvd_dec_destroy_fence(struct pipe_video_codec *decoder,
91                                    struct pipe_fence_handle *fence)
92 {
93    struct ruvd_decoder *dec = (struct ruvd_decoder *)decoder;
94 
95    dec->ws->fence_reference(dec->ws, &fence, NULL);
96 }
97 
98 /* add a new set register command to the IB */
set_reg(struct ruvd_decoder * dec,unsigned reg,uint32_t val)99 static void set_reg(struct ruvd_decoder *dec, unsigned reg, uint32_t val)
100 {
101    radeon_emit(&dec->cs, RUVD_PKT0(reg >> 2, 0));
102    radeon_emit(&dec->cs, val);
103 }
104 
105 /* send a command to the VCPU through the GPCOM registers */
send_cmd(struct ruvd_decoder * dec,unsigned cmd,struct pb_buffer_lean * buf,uint32_t off,unsigned usage,enum radeon_bo_domain domain)106 static void send_cmd(struct ruvd_decoder *dec, unsigned cmd, struct pb_buffer_lean *buf, uint32_t off,
107                      unsigned usage, enum radeon_bo_domain domain)
108 {
109    int reloc_idx;
110 
111    reloc_idx = dec->ws->cs_add_buffer(&dec->cs, buf, usage | RADEON_USAGE_SYNCHRONIZED, domain);
112    if (!dec->use_legacy) {
113       uint64_t addr;
114       addr = dec->ws->buffer_get_virtual_address(buf);
115       addr = addr + off;
116       set_reg(dec, dec->reg.data0, addr);
117       set_reg(dec, dec->reg.data1, addr >> 32);
118    } else {
119       off += dec->ws->buffer_get_reloc_offset(buf);
120       set_reg(dec, RUVD_GPCOM_VCPU_DATA0, off);
121       set_reg(dec, RUVD_GPCOM_VCPU_DATA1, reloc_idx * 4);
122    }
123    set_reg(dec, dec->reg.cmd, cmd << 1);
124 }
125 
126 /* do the codec needs an IT buffer ?*/
have_it(struct ruvd_decoder * dec)127 static bool have_it(struct ruvd_decoder *dec)
128 {
129    return dec->stream_type == RUVD_CODEC_H264_PERF || dec->stream_type == RUVD_CODEC_H265;
130 }
131 
132 /* map the next available message/feedback/itscaling buffer */
map_msg_fb_it_buf(struct ruvd_decoder * dec)133 static void map_msg_fb_it_buf(struct ruvd_decoder *dec)
134 {
135    struct rvid_buffer *buf;
136    uint8_t *ptr;
137 
138    /* grab the current message/feedback buffer */
139    buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
140 
141    /* and map it for CPU access */
142    ptr =
143       dec->ws->buffer_map(dec->ws, buf->res->buf, &dec->cs, PIPE_MAP_WRITE | RADEON_MAP_TEMPORARY);
144 
145    /* calc buffer offsets */
146    dec->msg = (struct ruvd_msg *)ptr;
147    memset(dec->msg, 0, sizeof(*dec->msg));
148 
149    dec->fb = (uint32_t *)(ptr + FB_BUFFER_OFFSET);
150    if (have_it(dec))
151       dec->it = (uint8_t *)(ptr + FB_BUFFER_OFFSET + dec->fb_size);
152 }
153 
154 /* unmap and send a message command to the VCPU */
send_msg_buf(struct ruvd_decoder * dec)155 static void send_msg_buf(struct ruvd_decoder *dec)
156 {
157    struct rvid_buffer *buf;
158 
159    /* ignore the request if message/feedback buffer isn't mapped */
160    if (!dec->msg || !dec->fb)
161       return;
162 
163    /* grab the current message buffer */
164    buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
165 
166    /* unmap the buffer */
167    dec->ws->buffer_unmap(dec->ws, buf->res->buf);
168    dec->msg = NULL;
169    dec->fb = NULL;
170    dec->it = NULL;
171 
172    if (dec->sessionctx.res)
173       send_cmd(dec, RUVD_CMD_SESSION_CONTEXT_BUFFER, dec->sessionctx.res->buf, 0,
174                RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
175 
176    /* and send it to the hardware */
177    send_cmd(dec, RUVD_CMD_MSG_BUFFER, buf->res->buf, 0, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
178 }
179 
180 /* cycle to the next set of buffers */
next_buffer(struct ruvd_decoder * dec)181 static void next_buffer(struct ruvd_decoder *dec)
182 {
183    ++dec->cur_buffer;
184    dec->cur_buffer %= NUM_BUFFERS;
185 }
186 
187 /* convert the profile into something UVD understands */
profile2stream_type(struct ruvd_decoder * dec,unsigned family)188 static uint32_t profile2stream_type(struct ruvd_decoder *dec, unsigned family)
189 {
190    switch (u_reduce_video_profile(dec->base.profile)) {
191    case PIPE_VIDEO_FORMAT_MPEG4_AVC:
192       return (family >= CHIP_TONGA) ? RUVD_CODEC_H264_PERF : RUVD_CODEC_H264;
193 
194    case PIPE_VIDEO_FORMAT_VC1:
195       return RUVD_CODEC_VC1;
196 
197    case PIPE_VIDEO_FORMAT_MPEG12:
198       return RUVD_CODEC_MPEG2;
199 
200    case PIPE_VIDEO_FORMAT_MPEG4:
201       return RUVD_CODEC_MPEG4;
202 
203    case PIPE_VIDEO_FORMAT_HEVC:
204       return RUVD_CODEC_H265;
205 
206    case PIPE_VIDEO_FORMAT_JPEG:
207       return RUVD_CODEC_MJPEG;
208 
209    default:
210       assert(0);
211       return 0;
212    }
213 }
214 
calc_ctx_size_h264_perf(struct ruvd_decoder * dec)215 static unsigned calc_ctx_size_h264_perf(struct ruvd_decoder *dec)
216 {
217    unsigned width_in_mb, height_in_mb, ctx_size;
218    unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
219    unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
220 
221    unsigned max_references = dec->base.max_references + 1;
222 
223    // picture width & height in 16 pixel units
224    width_in_mb = width / VL_MACROBLOCK_WIDTH;
225    height_in_mb = align(height / VL_MACROBLOCK_HEIGHT, 2);
226 
227    if (!dec->use_legacy) {
228       unsigned fs_in_mb = width_in_mb * height_in_mb;
229       unsigned num_dpb_buffer_lean;
230       switch (dec->base.level) {
231       case 30:
232          num_dpb_buffer_lean = 8100 / fs_in_mb;
233          break;
234       case 31:
235          num_dpb_buffer_lean = 18000 / fs_in_mb;
236          break;
237       case 32:
238          num_dpb_buffer_lean = 20480 / fs_in_mb;
239          break;
240       case 41:
241          num_dpb_buffer_lean = 32768 / fs_in_mb;
242          break;
243       case 42:
244          num_dpb_buffer_lean = 34816 / fs_in_mb;
245          break;
246       case 50:
247          num_dpb_buffer_lean = 110400 / fs_in_mb;
248          break;
249       case 51:
250          num_dpb_buffer_lean = 184320 / fs_in_mb;
251          break;
252       default:
253          num_dpb_buffer_lean = 184320 / fs_in_mb;
254          break;
255       }
256       num_dpb_buffer_lean++;
257       max_references = MAX2(MIN2(NUM_H264_REFS, num_dpb_buffer_lean), max_references);
258       ctx_size = max_references * align(width_in_mb * height_in_mb * 192, 256);
259    } else {
260       // the firmware seems to always assume a minimum of ref frames
261       max_references = MAX2(NUM_H264_REFS, max_references);
262       // macroblock context buffer
263       ctx_size = align(width_in_mb * height_in_mb * max_references * 192, 256);
264    }
265 
266    return ctx_size;
267 }
268 
calc_ctx_size_h265_main(struct ruvd_decoder * dec)269 static unsigned calc_ctx_size_h265_main(struct ruvd_decoder *dec)
270 {
271    unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
272    unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
273 
274    unsigned max_references = dec->base.max_references + 1;
275 
276    if (dec->base.width * dec->base.height >= 4096 * 2000)
277       max_references = MAX2(max_references, 8);
278    else
279       max_references = MAX2(max_references, 17);
280 
281    width = align(width, 16);
282    height = align(height, 16);
283    return ((width + 255) / 16) * ((height + 255) / 16) * 16 * max_references + 52 * 1024;
284 }
285 
calc_ctx_size_h265_main10(struct ruvd_decoder * dec,struct pipe_h265_picture_desc * pic)286 static unsigned calc_ctx_size_h265_main10(struct ruvd_decoder *dec,
287                                           struct pipe_h265_picture_desc *pic)
288 {
289    unsigned log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
290    unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size;
291    unsigned db_left_tile_ctx_size = 4096 / 16 * (32 + 16 * 4);
292 
293    unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
294    unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
295    unsigned coeff_10bit =
296       (pic->pps->sps->bit_depth_luma_minus8 || pic->pps->sps->bit_depth_chroma_minus8) ? 2 : 1;
297 
298    unsigned max_references = dec->base.max_references + 1;
299 
300    if (dec->base.width * dec->base.height >= 4096 * 2000)
301       max_references = MAX2(max_references, 8);
302    else
303       max_references = MAX2(max_references, 17);
304 
305    log2_ctb_size = pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3 +
306                    pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
307 
308    width_in_ctb = (width + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
309    height_in_ctb = (height + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
310 
311    num_16x16_block_per_ctb = ((1 << log2_ctb_size) >> 4) * ((1 << log2_ctb_size) >> 4);
312    context_buffer_size_per_ctb_row = align(width_in_ctb * num_16x16_block_per_ctb * 16, 256);
313    max_mb_address = (unsigned)ceil(height * 8 / 2048.0);
314 
315    cm_buffer_size = max_references * context_buffer_size_per_ctb_row * height_in_ctb;
316    db_left_tile_pxl_size = coeff_10bit * (max_mb_address * 2 * 2048 + 1024);
317 
318    return cm_buffer_size + db_left_tile_ctx_size + db_left_tile_pxl_size;
319 }
320 
get_db_pitch_alignment(struct ruvd_decoder * dec)321 static unsigned get_db_pitch_alignment(struct ruvd_decoder *dec)
322 {
323    if (((struct si_screen *)dec->screen)->info.family < CHIP_VEGA10)
324       return 16;
325    else
326       return 32;
327 }
328 
329 /* calculate size of reference picture buffer */
calc_dpb_size(struct ruvd_decoder * dec)330 static unsigned calc_dpb_size(struct ruvd_decoder *dec)
331 {
332    unsigned width_in_mb, height_in_mb, image_size, dpb_size;
333 
334    // always align them to MB size for dpb calculation
335    unsigned width = align(dec->base.width, VL_MACROBLOCK_WIDTH);
336    unsigned height = align(dec->base.height, VL_MACROBLOCK_HEIGHT);
337 
338    // always one more for currently decoded picture
339    unsigned max_references = dec->base.max_references + 1;
340 
341    // aligned size of a single frame
342    image_size = align(width, get_db_pitch_alignment(dec)) * height;
343    image_size += image_size / 2;
344    image_size = align(image_size, 1024);
345 
346    // picture width & height in 16 pixel units
347    width_in_mb = width / VL_MACROBLOCK_WIDTH;
348    height_in_mb = align(height / VL_MACROBLOCK_HEIGHT, 2);
349 
350    switch (u_reduce_video_profile(dec->base.profile)) {
351    case PIPE_VIDEO_FORMAT_MPEG4_AVC: {
352       if (!dec->use_legacy) {
353          unsigned fs_in_mb = width_in_mb * height_in_mb;
354          unsigned alignment = 64, num_dpb_buffer_lean;
355 
356          if (dec->stream_type == RUVD_CODEC_H264_PERF)
357             alignment = 256;
358          switch (dec->base.level) {
359          case 30:
360             num_dpb_buffer_lean = 8100 / fs_in_mb;
361             break;
362          case 31:
363             num_dpb_buffer_lean = 18000 / fs_in_mb;
364             break;
365          case 32:
366             num_dpb_buffer_lean = 20480 / fs_in_mb;
367             break;
368          case 41:
369             num_dpb_buffer_lean = 32768 / fs_in_mb;
370             break;
371          case 42:
372             num_dpb_buffer_lean = 34816 / fs_in_mb;
373             break;
374          case 50:
375             num_dpb_buffer_lean = 110400 / fs_in_mb;
376             break;
377          case 51:
378             num_dpb_buffer_lean = 184320 / fs_in_mb;
379             break;
380          default:
381             num_dpb_buffer_lean = 184320 / fs_in_mb;
382             break;
383          }
384          num_dpb_buffer_lean++;
385          max_references = MAX2(MIN2(NUM_H264_REFS, num_dpb_buffer_lean), max_references);
386          dpb_size = image_size * max_references;
387          if ((dec->stream_type != RUVD_CODEC_H264_PERF) ||
388              (((struct si_screen *)dec->screen)->info.family < CHIP_POLARIS10)) {
389             dpb_size += max_references * align(width_in_mb * height_in_mb * 192, alignment);
390             dpb_size += align(width_in_mb * height_in_mb * 32, alignment);
391          }
392       } else {
393          // the firmware seems to always assume a minimum of ref frames
394          max_references = MAX2(NUM_H264_REFS, max_references);
395          // reference picture buffer
396          dpb_size = image_size * max_references;
397          if ((dec->stream_type != RUVD_CODEC_H264_PERF) ||
398              (((struct si_screen *)dec->screen)->info.family < CHIP_POLARIS10)) {
399             // macroblock context buffer
400             dpb_size += width_in_mb * height_in_mb * max_references * 192;
401             // IT surface buffer
402             dpb_size += width_in_mb * height_in_mb * 32;
403          }
404       }
405       break;
406    }
407 
408    case PIPE_VIDEO_FORMAT_HEVC:
409       if (dec->base.width * dec->base.height >= 4096 * 2000)
410          max_references = MAX2(max_references, 8);
411       else
412          max_references = MAX2(max_references, 17);
413 
414       width = align(width, 16);
415       height = align(height, 16);
416       if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
417          dpb_size = align((align(width, get_db_pitch_alignment(dec)) * height * 9) / 4, 256) *
418                     max_references;
419       else
420          dpb_size = align((align(width, get_db_pitch_alignment(dec)) * height * 3) / 2, 256) *
421                     max_references;
422       break;
423 
424    case PIPE_VIDEO_FORMAT_VC1:
425       // the firmware seems to always assume a minimum of ref frames
426       max_references = MAX2(NUM_VC1_REFS, max_references);
427 
428       // reference picture buffer
429       dpb_size = image_size * max_references;
430 
431       // CONTEXT_BUFFER
432       dpb_size += width_in_mb * height_in_mb * 128;
433 
434       // IT surface buffer
435       dpb_size += width_in_mb * 64;
436 
437       // DB surface buffer
438       dpb_size += width_in_mb * 128;
439 
440       // BP
441       dpb_size += align(MAX2(width_in_mb, height_in_mb) * 7 * 16, 64);
442       break;
443 
444    case PIPE_VIDEO_FORMAT_MPEG12:
445       // reference picture buffer, must be big enough for all frames
446       dpb_size = image_size * NUM_MPEG2_REFS;
447       break;
448 
449    case PIPE_VIDEO_FORMAT_MPEG4:
450       // reference picture buffer
451       dpb_size = image_size * max_references;
452 
453       // CM
454       dpb_size += width_in_mb * height_in_mb * 64;
455 
456       // IT surface buffer
457       dpb_size += align(width_in_mb * height_in_mb * 32, 64);
458 
459       dpb_size = MAX2(dpb_size, 30 * 1024 * 1024);
460       break;
461 
462    case PIPE_VIDEO_FORMAT_JPEG:
463       dpb_size = 0;
464       break;
465 
466    default:
467       // something is missing here
468       assert(0);
469 
470       // at least use a sane default value
471       dpb_size = 32 * 1024 * 1024;
472       break;
473    }
474    return dpb_size;
475 }
476 
477 /* free associated data in the video buffer callback */
ruvd_destroy_associated_data(void * data)478 static void ruvd_destroy_associated_data(void *data)
479 {
480    /* NOOP, since we only use an intptr */
481 }
482 
483 /* get h264 specific message bits */
get_h264_msg(struct ruvd_decoder * dec,struct pipe_h264_picture_desc * pic)484 static struct ruvd_h264 get_h264_msg(struct ruvd_decoder *dec, struct pipe_h264_picture_desc *pic)
485 {
486    struct ruvd_h264 result;
487 
488    memset(&result, 0, sizeof(result));
489    switch (pic->base.profile) {
490    case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:
491    case PIPE_VIDEO_PROFILE_MPEG4_AVC_CONSTRAINED_BASELINE:
492       result.profile = RUVD_H264_PROFILE_BASELINE;
493       break;
494 
495    case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN:
496       result.profile = RUVD_H264_PROFILE_MAIN;
497       break;
498 
499    case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH:
500       result.profile = RUVD_H264_PROFILE_HIGH;
501       break;
502 
503    default:
504       assert(0);
505       break;
506    }
507 
508    result.level = dec->base.level;
509 
510    result.sps_info_flags = 0;
511    result.sps_info_flags |= pic->pps->sps->direct_8x8_inference_flag << 0;
512    result.sps_info_flags |= pic->pps->sps->mb_adaptive_frame_field_flag << 1;
513    result.sps_info_flags |= pic->pps->sps->frame_mbs_only_flag << 2;
514    result.sps_info_flags |= pic->pps->sps->delta_pic_order_always_zero_flag << 3;
515 
516    result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
517    result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
518    result.log2_max_frame_num_minus4 = pic->pps->sps->log2_max_frame_num_minus4;
519    result.pic_order_cnt_type = pic->pps->sps->pic_order_cnt_type;
520    result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
521 
522    switch (dec->base.chroma_format) {
523    case PIPE_VIDEO_CHROMA_FORMAT_NONE:
524       /* TODO: assert? */
525       break;
526    case PIPE_VIDEO_CHROMA_FORMAT_400:
527       result.chroma_format = 0;
528       break;
529    case PIPE_VIDEO_CHROMA_FORMAT_420:
530       result.chroma_format = 1;
531       break;
532    case PIPE_VIDEO_CHROMA_FORMAT_422:
533       result.chroma_format = 2;
534       break;
535    case PIPE_VIDEO_CHROMA_FORMAT_444:
536       result.chroma_format = 3;
537       break;
538    case PIPE_VIDEO_CHROMA_FORMAT_440:
539       result.chroma_format = 4;
540       break;
541    }
542 
543    result.pps_info_flags = 0;
544    result.pps_info_flags |= pic->pps->transform_8x8_mode_flag << 0;
545    result.pps_info_flags |= pic->pps->redundant_pic_cnt_present_flag << 1;
546    result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 2;
547    result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag << 3;
548    result.pps_info_flags |= pic->pps->weighted_bipred_idc << 4;
549    result.pps_info_flags |= pic->pps->weighted_pred_flag << 6;
550    result.pps_info_flags |= pic->pps->bottom_field_pic_order_in_frame_present_flag << 7;
551    result.pps_info_flags |= pic->pps->entropy_coding_mode_flag << 8;
552 
553    result.num_slice_groups_minus1 = pic->pps->num_slice_groups_minus1;
554    result.slice_group_map_type = pic->pps->slice_group_map_type;
555    result.slice_group_change_rate_minus1 = pic->pps->slice_group_change_rate_minus1;
556    result.pic_init_qp_minus26 = pic->pps->pic_init_qp_minus26;
557    result.chroma_qp_index_offset = pic->pps->chroma_qp_index_offset;
558    result.second_chroma_qp_index_offset = pic->pps->second_chroma_qp_index_offset;
559 
560    memcpy(result.scaling_list_4x4, pic->pps->ScalingList4x4, 6 * 16);
561    memcpy(result.scaling_list_8x8, pic->pps->ScalingList8x8, 2 * 64);
562 
563    if (dec->stream_type == RUVD_CODEC_H264_PERF) {
564       memcpy(dec->it, result.scaling_list_4x4, 6 * 16);
565       memcpy((dec->it + 96), result.scaling_list_8x8, 2 * 64);
566    }
567 
568    result.num_ref_frames = pic->num_ref_frames;
569 
570    result.num_ref_idx_l0_active_minus1 = pic->num_ref_idx_l0_active_minus1;
571    result.num_ref_idx_l1_active_minus1 = pic->num_ref_idx_l1_active_minus1;
572 
573    result.frame_num = pic->frame_num;
574    memcpy(result.frame_num_list, pic->frame_num_list, 4 * 16);
575    result.curr_field_order_cnt_list[0] = pic->field_order_cnt[0];
576    result.curr_field_order_cnt_list[1] = pic->field_order_cnt[1];
577    memcpy(result.field_order_cnt_list, pic->field_order_cnt_list, 4 * 16 * 2);
578 
579    result.decoded_pic_idx = pic->frame_num;
580 
581    return result;
582 }
583 
584 /* get h265 specific message bits */
get_h265_msg(struct ruvd_decoder * dec,struct pipe_video_buffer * target,struct pipe_h265_picture_desc * pic)585 static struct ruvd_h265 get_h265_msg(struct ruvd_decoder *dec, struct pipe_video_buffer *target,
586                                      struct pipe_h265_picture_desc *pic)
587 {
588    struct ruvd_h265 result;
589    unsigned i, j;
590 
591    memset(&result, 0, sizeof(result));
592 
593    result.sps_info_flags = 0;
594    result.sps_info_flags |= pic->pps->sps->scaling_list_enabled_flag << 0;
595    result.sps_info_flags |= pic->pps->sps->amp_enabled_flag << 1;
596    result.sps_info_flags |= pic->pps->sps->sample_adaptive_offset_enabled_flag << 2;
597    result.sps_info_flags |= pic->pps->sps->pcm_enabled_flag << 3;
598    result.sps_info_flags |= pic->pps->sps->pcm_loop_filter_disabled_flag << 4;
599    result.sps_info_flags |= pic->pps->sps->long_term_ref_pics_present_flag << 5;
600    result.sps_info_flags |= pic->pps->sps->sps_temporal_mvp_enabled_flag << 6;
601    result.sps_info_flags |= pic->pps->sps->strong_intra_smoothing_enabled_flag << 7;
602    result.sps_info_flags |= pic->pps->sps->separate_colour_plane_flag << 8;
603    if (((struct si_screen *)dec->screen)->info.family == CHIP_CARRIZO)
604       result.sps_info_flags |= 1 << 9;
605    if (pic->UseRefPicList == true)
606       result.sps_info_flags |= 1 << 10;
607 
608    result.chroma_format = pic->pps->sps->chroma_format_idc;
609    result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
610    result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8;
611    result.log2_max_pic_order_cnt_lsb_minus4 = pic->pps->sps->log2_max_pic_order_cnt_lsb_minus4;
612    result.sps_max_dec_pic_buffering_minus1 = pic->pps->sps->sps_max_dec_pic_buffering_minus1;
613    result.log2_min_luma_coding_block_size_minus3 =
614       pic->pps->sps->log2_min_luma_coding_block_size_minus3;
615    result.log2_diff_max_min_luma_coding_block_size =
616       pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
617    result.log2_min_transform_block_size_minus2 =
618       pic->pps->sps->log2_min_transform_block_size_minus2;
619    result.log2_diff_max_min_transform_block_size =
620       pic->pps->sps->log2_diff_max_min_transform_block_size;
621    result.max_transform_hierarchy_depth_inter = pic->pps->sps->max_transform_hierarchy_depth_inter;
622    result.max_transform_hierarchy_depth_intra = pic->pps->sps->max_transform_hierarchy_depth_intra;
623    result.pcm_sample_bit_depth_luma_minus1 = pic->pps->sps->pcm_sample_bit_depth_luma_minus1;
624    result.pcm_sample_bit_depth_chroma_minus1 = pic->pps->sps->pcm_sample_bit_depth_chroma_minus1;
625    result.log2_min_pcm_luma_coding_block_size_minus3 =
626       pic->pps->sps->log2_min_pcm_luma_coding_block_size_minus3;
627    result.log2_diff_max_min_pcm_luma_coding_block_size =
628       pic->pps->sps->log2_diff_max_min_pcm_luma_coding_block_size;
629    result.num_short_term_ref_pic_sets = pic->pps->sps->num_short_term_ref_pic_sets;
630 
631    result.pps_info_flags = 0;
632    result.pps_info_flags |= pic->pps->dependent_slice_segments_enabled_flag << 0;
633    result.pps_info_flags |= pic->pps->output_flag_present_flag << 1;
634    result.pps_info_flags |= pic->pps->sign_data_hiding_enabled_flag << 2;
635    result.pps_info_flags |= pic->pps->cabac_init_present_flag << 3;
636    result.pps_info_flags |= pic->pps->constrained_intra_pred_flag << 4;
637    result.pps_info_flags |= pic->pps->transform_skip_enabled_flag << 5;
638    result.pps_info_flags |= pic->pps->cu_qp_delta_enabled_flag << 6;
639    result.pps_info_flags |= pic->pps->pps_slice_chroma_qp_offsets_present_flag << 7;
640    result.pps_info_flags |= pic->pps->weighted_pred_flag << 8;
641    result.pps_info_flags |= pic->pps->weighted_bipred_flag << 9;
642    result.pps_info_flags |= pic->pps->transquant_bypass_enabled_flag << 10;
643    result.pps_info_flags |= pic->pps->tiles_enabled_flag << 11;
644    result.pps_info_flags |= pic->pps->entropy_coding_sync_enabled_flag << 12;
645    result.pps_info_flags |= pic->pps->uniform_spacing_flag << 13;
646    result.pps_info_flags |= pic->pps->loop_filter_across_tiles_enabled_flag << 14;
647    result.pps_info_flags |= pic->pps->pps_loop_filter_across_slices_enabled_flag << 15;
648    result.pps_info_flags |= pic->pps->deblocking_filter_override_enabled_flag << 16;
649    result.pps_info_flags |= pic->pps->pps_deblocking_filter_disabled_flag << 17;
650    result.pps_info_flags |= pic->pps->lists_modification_present_flag << 18;
651    result.pps_info_flags |= pic->pps->slice_segment_header_extension_present_flag << 19;
652    // result.pps_info_flags |= pic->pps->deblocking_filter_control_present_flag; ???
653 
654    result.num_extra_slice_header_bits = pic->pps->num_extra_slice_header_bits;
655    result.num_long_term_ref_pic_sps = pic->pps->sps->num_long_term_ref_pics_sps;
656    result.num_ref_idx_l0_default_active_minus1 = pic->pps->num_ref_idx_l0_default_active_minus1;
657    result.num_ref_idx_l1_default_active_minus1 = pic->pps->num_ref_idx_l1_default_active_minus1;
658    result.pps_cb_qp_offset = pic->pps->pps_cb_qp_offset;
659    result.pps_cr_qp_offset = pic->pps->pps_cr_qp_offset;
660    result.pps_beta_offset_div2 = pic->pps->pps_beta_offset_div2;
661    result.pps_tc_offset_div2 = pic->pps->pps_tc_offset_div2;
662    result.diff_cu_qp_delta_depth = pic->pps->diff_cu_qp_delta_depth;
663    result.num_tile_columns_minus1 = pic->pps->num_tile_columns_minus1;
664    result.num_tile_rows_minus1 = pic->pps->num_tile_rows_minus1;
665    result.log2_parallel_merge_level_minus2 = pic->pps->log2_parallel_merge_level_minus2;
666    result.init_qp_minus26 = pic->pps->init_qp_minus26;
667 
668    for (i = 0; i < 19; ++i)
669       result.column_width_minus1[i] = pic->pps->column_width_minus1[i];
670 
671    for (i = 0; i < 21; ++i)
672       result.row_height_minus1[i] = pic->pps->row_height_minus1[i];
673 
674    result.num_delta_pocs_ref_rps_idx = pic->NumDeltaPocsOfRefRpsIdx;
675    result.curr_poc = pic->CurrPicOrderCntVal;
676 
677    for (i = 0; i < 16; i++) {
678       for (j = 0; (pic->ref[j] != NULL) && (j < 16); j++) {
679          if (dec->render_pic_list[i] == pic->ref[j])
680             break;
681          if (j == 15)
682             dec->render_pic_list[i] = NULL;
683          else if (pic->ref[j + 1] == NULL)
684             dec->render_pic_list[i] = NULL;
685       }
686    }
687    for (i = 0; i < 16; i++) {
688       if (dec->render_pic_list[i] == NULL) {
689          dec->render_pic_list[i] = target;
690          result.curr_idx = i;
691          break;
692       }
693    }
694 
695    vl_video_buffer_set_associated_data(target, &dec->base, (void *)(uintptr_t)result.curr_idx,
696                                        &ruvd_destroy_associated_data);
697 
698    for (i = 0; i < 16; ++i) {
699       struct pipe_video_buffer *ref = pic->ref[i];
700       uintptr_t ref_pic = 0;
701 
702       result.poc_list[i] = pic->PicOrderCntVal[i];
703 
704       if (ref)
705          ref_pic = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
706       else
707          ref_pic = 0x7F;
708       result.ref_pic_list[i] = ref_pic;
709    }
710 
711    for (i = 0; i < 8; ++i) {
712       result.ref_pic_set_st_curr_before[i] = 0xFF;
713       result.ref_pic_set_st_curr_after[i] = 0xFF;
714       result.ref_pic_set_lt_curr[i] = 0xFF;
715    }
716 
717    for (i = 0; i < pic->NumPocStCurrBefore; ++i)
718       result.ref_pic_set_st_curr_before[i] = pic->RefPicSetStCurrBefore[i];
719 
720    for (i = 0; i < pic->NumPocStCurrAfter; ++i)
721       result.ref_pic_set_st_curr_after[i] = pic->RefPicSetStCurrAfter[i];
722 
723    for (i = 0; i < pic->NumPocLtCurr; ++i)
724       result.ref_pic_set_lt_curr[i] = pic->RefPicSetLtCurr[i];
725 
726    for (i = 0; i < 6; ++i)
727       result.ucScalingListDCCoefSizeID2[i] = pic->pps->sps->ScalingListDCCoeff16x16[i];
728 
729    for (i = 0; i < 2; ++i)
730       result.ucScalingListDCCoefSizeID3[i] = pic->pps->sps->ScalingListDCCoeff32x32[i];
731 
732    memcpy(dec->it, pic->pps->sps->ScalingList4x4, 6 * 16);
733    memcpy(dec->it + 96, pic->pps->sps->ScalingList8x8, 6 * 64);
734    memcpy(dec->it + 480, pic->pps->sps->ScalingList16x16, 6 * 64);
735    memcpy(dec->it + 864, pic->pps->sps->ScalingList32x32, 2 * 64);
736 
737    for (i = 0; i < 2; i++) {
738       for (j = 0; j < 15; j++)
739          result.direct_reflist[i][j] = pic->RefPicList[0][i][j];
740    }
741 
742    if (pic->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) {
743       if (target->buffer_format == PIPE_FORMAT_P010 || target->buffer_format == PIPE_FORMAT_P016) {
744          result.p010_mode = 1;
745          result.msb_mode = 1;
746       } else {
747          result.luma_10to8 = 5;
748          result.chroma_10to8 = 5;
749          result.sclr_luma10to8 = 4;
750          result.sclr_chroma10to8 = 4;
751       }
752    }
753 
754    /* TODO
755    result.highestTid;
756    result.isNonRef;
757 
758    IDRPicFlag;
759    RAPPicFlag;
760    NumPocTotalCurr;
761    NumShortTermPictureSliceHeaderBits;
762    NumLongTermPictureSliceHeaderBits;
763 
764    IsLongTerm[16];
765    */
766 
767    return result;
768 }
769 
770 /* get vc1 specific message bits */
get_vc1_msg(struct pipe_vc1_picture_desc * pic)771 static struct ruvd_vc1 get_vc1_msg(struct pipe_vc1_picture_desc *pic)
772 {
773    struct ruvd_vc1 result;
774 
775    memset(&result, 0, sizeof(result));
776 
777    switch (pic->base.profile) {
778    case PIPE_VIDEO_PROFILE_VC1_SIMPLE:
779       result.profile = RUVD_VC1_PROFILE_SIMPLE;
780       result.level = 1;
781       break;
782 
783    case PIPE_VIDEO_PROFILE_VC1_MAIN:
784       result.profile = RUVD_VC1_PROFILE_MAIN;
785       result.level = 2;
786       break;
787 
788    case PIPE_VIDEO_PROFILE_VC1_ADVANCED:
789       result.profile = RUVD_VC1_PROFILE_ADVANCED;
790       result.level = 4;
791       break;
792 
793    default:
794       assert(0);
795    }
796 
797    /* fields common for all profiles */
798    result.sps_info_flags |= pic->postprocflag << 7;
799    result.sps_info_flags |= pic->pulldown << 6;
800    result.sps_info_flags |= pic->interlace << 5;
801    result.sps_info_flags |= pic->tfcntrflag << 4;
802    result.sps_info_flags |= pic->finterpflag << 3;
803    result.sps_info_flags |= pic->psf << 1;
804 
805    result.pps_info_flags |= pic->range_mapy_flag << 31;
806    result.pps_info_flags |= pic->range_mapy << 28;
807    result.pps_info_flags |= pic->range_mapuv_flag << 27;
808    result.pps_info_flags |= pic->range_mapuv << 24;
809    result.pps_info_flags |= pic->multires << 21;
810    result.pps_info_flags |= pic->maxbframes << 16;
811    result.pps_info_flags |= pic->overlap << 11;
812    result.pps_info_flags |= pic->quantizer << 9;
813    result.pps_info_flags |= pic->panscan_flag << 7;
814    result.pps_info_flags |= pic->refdist_flag << 6;
815    result.pps_info_flags |= pic->vstransform << 0;
816 
817    /* some fields only apply to main/advanced profile */
818    if (pic->base.profile != PIPE_VIDEO_PROFILE_VC1_SIMPLE) {
819       result.pps_info_flags |= pic->syncmarker << 20;
820       result.pps_info_flags |= pic->rangered << 19;
821       result.pps_info_flags |= pic->loopfilter << 5;
822       result.pps_info_flags |= pic->fastuvmc << 4;
823       result.pps_info_flags |= pic->extended_mv << 3;
824       result.pps_info_flags |= pic->extended_dmv << 8;
825       result.pps_info_flags |= pic->dquant << 1;
826    }
827 
828    result.chroma_format = 1;
829 
830 #if 0
831 //(((unsigned int)(pPicParams->advance.reserved1)) << SPS_INFO_VC1_RESERVED_SHIFT)
832 uint32_t  slice_count
833 uint8_t   picture_type
834 uint8_t   frame_coding_mode
835 uint8_t   deblockEnable
836 uint8_t   pquant
837 #endif
838 
839    return result;
840 }
841 
842 /* extract the frame number from a referenced video buffer */
get_ref_pic_idx(struct ruvd_decoder * dec,struct pipe_video_buffer * ref)843 static uint32_t get_ref_pic_idx(struct ruvd_decoder *dec, struct pipe_video_buffer *ref)
844 {
845    uint32_t min = MAX2(dec->frame_number, NUM_MPEG2_REFS) - NUM_MPEG2_REFS;
846    uint32_t max = MAX2(dec->frame_number, 1) - 1;
847    uintptr_t frame;
848 
849    /* seems to be the most sane fallback */
850    if (!ref)
851       return max;
852 
853    /* get the frame number from the associated data */
854    frame = (uintptr_t)vl_video_buffer_get_associated_data(ref, &dec->base);
855 
856    /* limit the frame number to a valid range */
857    return MAX2(MIN2(frame, max), min);
858 }
859 
860 /* get mpeg2 specific msg bits */
get_mpeg2_msg(struct ruvd_decoder * dec,struct pipe_mpeg12_picture_desc * pic)861 static struct ruvd_mpeg2 get_mpeg2_msg(struct ruvd_decoder *dec,
862                                        struct pipe_mpeg12_picture_desc *pic)
863 {
864    const int *zscan = pic->alternate_scan ? vl_zscan_alternate : vl_zscan_normal;
865    struct ruvd_mpeg2 result;
866    unsigned i;
867 
868    memset(&result, 0, sizeof(result));
869    result.decoded_pic_idx = dec->frame_number;
870    for (i = 0; i < 2; ++i)
871       result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
872 
873    if (pic->intra_matrix) {
874       result.load_intra_quantiser_matrix = 1;
875       for (i = 0; i < 64; ++i) {
876          result.intra_quantiser_matrix[i] = pic->intra_matrix[zscan[i]];
877       }
878    }
879    if (pic->non_intra_matrix) {
880       result.load_nonintra_quantiser_matrix = 1;
881       for (i = 0; i < 64; ++i) {
882          result.nonintra_quantiser_matrix[i] = pic->non_intra_matrix[zscan[i]];
883       }
884    }
885 
886    result.profile_and_level_indication = 0;
887    result.chroma_format = 0x1;
888 
889    result.picture_coding_type = pic->picture_coding_type;
890    result.f_code[0][0] = pic->f_code[0][0] + 1;
891    result.f_code[0][1] = pic->f_code[0][1] + 1;
892    result.f_code[1][0] = pic->f_code[1][0] + 1;
893    result.f_code[1][1] = pic->f_code[1][1] + 1;
894    result.intra_dc_precision = pic->intra_dc_precision;
895    result.pic_structure = pic->picture_structure;
896    result.top_field_first = pic->top_field_first;
897    result.frame_pred_frame_dct = pic->frame_pred_frame_dct;
898    result.concealment_motion_vectors = pic->concealment_motion_vectors;
899    result.q_scale_type = pic->q_scale_type;
900    result.intra_vlc_format = pic->intra_vlc_format;
901    result.alternate_scan = pic->alternate_scan;
902 
903    return result;
904 }
905 
906 /* get mpeg4 specific msg bits */
get_mpeg4_msg(struct ruvd_decoder * dec,struct pipe_mpeg4_picture_desc * pic)907 static struct ruvd_mpeg4 get_mpeg4_msg(struct ruvd_decoder *dec,
908                                        struct pipe_mpeg4_picture_desc *pic)
909 {
910    struct ruvd_mpeg4 result;
911    unsigned i;
912 
913    memset(&result, 0, sizeof(result));
914    result.decoded_pic_idx = dec->frame_number;
915    for (i = 0; i < 2; ++i)
916       result.ref_pic_idx[i] = get_ref_pic_idx(dec, pic->ref[i]);
917 
918    result.variant_type = 0;
919    result.profile_and_level_indication = 0xF0; // ASP Level0
920 
921    result.video_object_layer_verid = 0x5; // advanced simple
922    result.video_object_layer_shape = 0x0; // rectangular
923 
924    result.video_object_layer_width = dec->base.width;
925    result.video_object_layer_height = dec->base.height;
926 
927    result.vop_time_increment_resolution = pic->vop_time_increment_resolution;
928 
929    result.flags |= pic->short_video_header << 0;
930    // result.flags |= obmc_disable << 1;
931    result.flags |= pic->interlaced << 2;
932    result.flags |= 1 << 3; // load_intra_quant_mat
933    result.flags |= 1 << 4; // load_nonintra_quant_mat
934    result.flags |= pic->quarter_sample << 5;
935    result.flags |= 1 << 6; // complexity_estimation_disable
936    result.flags |= pic->resync_marker_disable << 7;
937    // result.flags |= data_partitioned << 8;
938    // result.flags |= reversible_vlc << 9;
939    result.flags |= 0 << 10; // newpred_enable
940    result.flags |= 0 << 11; // reduced_resolution_vop_enable
941    // result.flags |= scalability << 12;
942    // result.flags |= is_object_layer_identifier << 13;
943    // result.flags |= fixed_vop_rate << 14;
944    // result.flags |= newpred_segment_type << 15;
945 
946    result.quant_type = pic->quant_type;
947 
948    for (i = 0; i < 64; ++i) {
949       result.intra_quant_mat[i] = pic->intra_matrix[vl_zscan_normal[i]];
950       result.nonintra_quant_mat[i] = pic->non_intra_matrix[vl_zscan_normal[i]];
951    }
952 
953    /*
954    int32_t    trd [2]
955    int32_t    trb [2]
956    uint8_t    vop_coding_type
957    uint8_t    vop_fcode_forward
958    uint8_t    vop_fcode_backward
959    uint8_t    rounding_control
960    uint8_t    alternate_vertical_scan_flag
961    uint8_t    top_field_first
962    */
963 
964    return result;
965 }
966 
967 /**
968  * destroy this video decoder
969  */
ruvd_destroy(struct pipe_video_codec * decoder)970 static void ruvd_destroy(struct pipe_video_codec *decoder)
971 {
972    struct ruvd_decoder *dec = (struct ruvd_decoder *)decoder;
973    unsigned i;
974 
975    assert(decoder);
976 
977    map_msg_fb_it_buf(dec);
978    dec->msg->size = sizeof(*dec->msg);
979    dec->msg->msg_type = RUVD_MSG_DESTROY;
980    dec->msg->stream_handle = dec->stream_handle;
981    send_msg_buf(dec);
982 
983    flush(dec, 0, NULL);
984 
985    dec->ws->cs_destroy(&dec->cs);
986 
987    for (i = 0; i < NUM_BUFFERS; ++i) {
988       si_vid_destroy_buffer(&dec->msg_fb_it_buffers[i]);
989       si_vid_destroy_buffer(&dec->bs_buffers[i]);
990    }
991 
992    si_vid_destroy_buffer(&dec->dpb);
993    si_vid_destroy_buffer(&dec->ctx);
994    si_vid_destroy_buffer(&dec->sessionctx);
995 
996    FREE(dec);
997 }
998 
999 /**
1000  * start decoding of a new frame
1001  */
ruvd_begin_frame(struct pipe_video_codec * decoder,struct pipe_video_buffer * target,struct pipe_picture_desc * picture)1002 static void ruvd_begin_frame(struct pipe_video_codec *decoder, struct pipe_video_buffer *target,
1003                              struct pipe_picture_desc *picture)
1004 {
1005    struct ruvd_decoder *dec = (struct ruvd_decoder *)decoder;
1006    uintptr_t frame;
1007 
1008    assert(decoder);
1009 
1010    frame = ++dec->frame_number;
1011    vl_video_buffer_set_associated_data(target, decoder, (void *)frame,
1012                                        &ruvd_destroy_associated_data);
1013 
1014    dec->bs_size = 0;
1015    dec->bs_ptr = dec->ws->buffer_map(dec->ws, dec->bs_buffers[dec->cur_buffer].res->buf, &dec->cs,
1016                                      PIPE_MAP_WRITE | RADEON_MAP_TEMPORARY);
1017 }
1018 
1019 /**
1020  * decode a macroblock
1021  */
ruvd_decode_macroblock(struct pipe_video_codec * decoder,struct pipe_video_buffer * target,struct pipe_picture_desc * picture,const struct pipe_macroblock * macroblocks,unsigned num_macroblocks)1022 static void ruvd_decode_macroblock(struct pipe_video_codec *decoder,
1023                                    struct pipe_video_buffer *target,
1024                                    struct pipe_picture_desc *picture,
1025                                    const struct pipe_macroblock *macroblocks,
1026                                    unsigned num_macroblocks)
1027 {
1028    /* not supported (yet) */
1029    assert(0);
1030 }
1031 
1032 /**
1033  * decode a bitstream
1034  */
ruvd_decode_bitstream(struct pipe_video_codec * decoder,struct pipe_video_buffer * target,struct pipe_picture_desc * picture,unsigned num_buffers,const void * const * buffers,const unsigned * sizes)1035 static void ruvd_decode_bitstream(struct pipe_video_codec *decoder,
1036                                   struct pipe_video_buffer *target,
1037                                   struct pipe_picture_desc *picture, unsigned num_buffers,
1038                                   const void *const *buffers, const unsigned *sizes)
1039 {
1040    struct ruvd_decoder *dec = (struct ruvd_decoder *)decoder;
1041    unsigned i;
1042 
1043    assert(decoder);
1044 
1045    if (!dec->bs_ptr)
1046       return;
1047 
1048    for (i = 0; i < num_buffers; ++i) {
1049       struct rvid_buffer *buf = &dec->bs_buffers[dec->cur_buffer];
1050       unsigned new_size = dec->bs_size + sizes[i];
1051 
1052       if (new_size > buf->res->buf->size) {
1053          dec->ws->buffer_unmap(dec->ws, buf->res->buf);
1054          if (!si_vid_resize_buffer(dec->base.context, &dec->cs, buf, new_size, NULL)) {
1055             RVID_ERR("Can't resize bitstream buffer!");
1056             return;
1057          }
1058 
1059          dec->bs_ptr = dec->ws->buffer_map(dec->ws, buf->res->buf, &dec->cs,
1060                                            PIPE_MAP_WRITE | RADEON_MAP_TEMPORARY);
1061          if (!dec->bs_ptr)
1062             return;
1063 
1064          dec->bs_ptr += dec->bs_size;
1065       }
1066 
1067       memcpy(dec->bs_ptr, buffers[i], sizes[i]);
1068       dec->bs_size += sizes[i];
1069       dec->bs_ptr += sizes[i];
1070    }
1071 }
1072 
1073 /**
1074  * end decoding of the current frame
1075  */
ruvd_end_frame(struct pipe_video_codec * decoder,struct pipe_video_buffer * target,struct pipe_picture_desc * picture)1076 static int ruvd_end_frame(struct pipe_video_codec *decoder, struct pipe_video_buffer *target,
1077                            struct pipe_picture_desc *picture)
1078 {
1079    struct ruvd_decoder *dec = (struct ruvd_decoder *)decoder;
1080    struct pb_buffer_lean *dt;
1081    struct rvid_buffer *msg_fb_it_buf, *bs_buf;
1082    unsigned bs_size;
1083 
1084    assert(decoder);
1085 
1086    if (!dec->bs_ptr)
1087       return 1;
1088 
1089    msg_fb_it_buf = &dec->msg_fb_it_buffers[dec->cur_buffer];
1090    bs_buf = &dec->bs_buffers[dec->cur_buffer];
1091 
1092    bs_size = align(dec->bs_size, 128);
1093    memset(dec->bs_ptr, 0, bs_size - dec->bs_size);
1094    dec->ws->buffer_unmap(dec->ws, bs_buf->res->buf);
1095 
1096    map_msg_fb_it_buf(dec);
1097    dec->msg->size = sizeof(*dec->msg);
1098    dec->msg->msg_type = RUVD_MSG_DECODE;
1099    dec->msg->stream_handle = dec->stream_handle;
1100    dec->msg->status_report_feedback_number = dec->frame_number;
1101 
1102    dec->msg->body.decode.stream_type = dec->stream_type;
1103    dec->msg->body.decode.decode_flags = 0x1;
1104    dec->msg->body.decode.width_in_samples = dec->base.width;
1105    dec->msg->body.decode.height_in_samples = dec->base.height;
1106 
1107    if ((picture->profile == PIPE_VIDEO_PROFILE_VC1_SIMPLE) ||
1108        (picture->profile == PIPE_VIDEO_PROFILE_VC1_MAIN)) {
1109       dec->msg->body.decode.width_in_samples =
1110          align(dec->msg->body.decode.width_in_samples, 16) / 16;
1111       dec->msg->body.decode.height_in_samples =
1112          align(dec->msg->body.decode.height_in_samples, 16) / 16;
1113    }
1114 
1115    if (dec->dpb.res)
1116       dec->msg->body.decode.dpb_size = dec->dpb.res->buf->size;
1117    dec->msg->body.decode.bsd_size = bs_size;
1118    dec->msg->body.decode.db_pitch = align(dec->base.width, get_db_pitch_alignment(dec));
1119 
1120    if (dec->stream_type == RUVD_CODEC_H264_PERF &&
1121        ((struct si_screen *)dec->screen)->info.family >= CHIP_POLARIS10)
1122       dec->msg->body.decode.dpb_reserved = dec->ctx.res->buf->size;
1123 
1124    dt = dec->set_dtb(dec->msg, (struct vl_video_buffer *)target);
1125    if (((struct si_screen *)dec->screen)->info.family >= CHIP_STONEY)
1126       dec->msg->body.decode.dt_wa_chroma_top_offset = dec->msg->body.decode.dt_pitch / 2;
1127 
1128    switch (u_reduce_video_profile(picture->profile)) {
1129    case PIPE_VIDEO_FORMAT_MPEG4_AVC:
1130       dec->msg->body.decode.codec.h264 =
1131          get_h264_msg(dec, (struct pipe_h264_picture_desc *)picture);
1132       break;
1133 
1134    case PIPE_VIDEO_FORMAT_HEVC:
1135       dec->msg->body.decode.codec.h265 =
1136          get_h265_msg(dec, target, (struct pipe_h265_picture_desc *)picture);
1137       if (dec->ctx.res == NULL) {
1138          unsigned ctx_size;
1139          if (dec->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
1140             ctx_size = calc_ctx_size_h265_main10(dec, (struct pipe_h265_picture_desc *)picture);
1141          else
1142             ctx_size = calc_ctx_size_h265_main(dec);
1143          if (!si_vid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT)) {
1144             RVID_ERR("Can't allocated context buffer.\n");
1145          }
1146          si_vid_clear_buffer(decoder->context, &dec->ctx);
1147       }
1148 
1149       if (dec->ctx.res)
1150          dec->msg->body.decode.dpb_reserved = dec->ctx.res->buf->size;
1151       break;
1152 
1153    case PIPE_VIDEO_FORMAT_VC1:
1154       dec->msg->body.decode.codec.vc1 = get_vc1_msg((struct pipe_vc1_picture_desc *)picture);
1155       break;
1156 
1157    case PIPE_VIDEO_FORMAT_MPEG12:
1158       dec->msg->body.decode.codec.mpeg2 =
1159          get_mpeg2_msg(dec, (struct pipe_mpeg12_picture_desc *)picture);
1160       break;
1161 
1162    case PIPE_VIDEO_FORMAT_MPEG4:
1163       dec->msg->body.decode.codec.mpeg4 =
1164          get_mpeg4_msg(dec, (struct pipe_mpeg4_picture_desc *)picture);
1165       break;
1166 
1167    case PIPE_VIDEO_FORMAT_JPEG:
1168       break;
1169 
1170    default:
1171       assert(0);
1172       return 1;
1173    }
1174 
1175    dec->msg->body.decode.db_surf_tile_config = dec->msg->body.decode.dt_surf_tile_config;
1176    dec->msg->body.decode.extension_support = 0x1;
1177 
1178    /* set at least the feedback buffer size */
1179    dec->fb[0] = dec->fb_size;
1180 
1181    send_msg_buf(dec);
1182 
1183    if (dec->dpb.res)
1184       send_cmd(dec, RUVD_CMD_DPB_BUFFER, dec->dpb.res->buf, 0, RADEON_USAGE_READWRITE,
1185                RADEON_DOMAIN_VRAM);
1186 
1187    if (dec->ctx.res)
1188       send_cmd(dec, RUVD_CMD_CONTEXT_BUFFER, dec->ctx.res->buf, 0, RADEON_USAGE_READWRITE,
1189                RADEON_DOMAIN_VRAM);
1190    send_cmd(dec, RUVD_CMD_BITSTREAM_BUFFER, bs_buf->res->buf, 0, RADEON_USAGE_READ,
1191             RADEON_DOMAIN_GTT);
1192    send_cmd(dec, RUVD_CMD_DECODING_TARGET_BUFFER, dt, 0, RADEON_USAGE_WRITE, RADEON_DOMAIN_VRAM);
1193    send_cmd(dec, RUVD_CMD_FEEDBACK_BUFFER, msg_fb_it_buf->res->buf, FB_BUFFER_OFFSET,
1194             RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT);
1195    if (have_it(dec))
1196       send_cmd(dec, RUVD_CMD_ITSCALING_TABLE_BUFFER, msg_fb_it_buf->res->buf,
1197                FB_BUFFER_OFFSET + dec->fb_size, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
1198    set_reg(dec, dec->reg.cntl, 1);
1199 
1200    flush(dec, picture->flush_flags, picture->fence);
1201    next_buffer(dec);
1202    return 0;
1203 }
1204 
1205 /**
1206  * flush any outstanding command buffers to the hardware
1207  */
ruvd_flush(struct pipe_video_codec * decoder)1208 static void ruvd_flush(struct pipe_video_codec *decoder)
1209 {
1210 }
1211 
1212 /**
1213  * create and UVD decoder
1214  */
si_common_uvd_create_decoder(struct pipe_context * context,const struct pipe_video_codec * templ,ruvd_set_dtb set_dtb)1215 struct pipe_video_codec *si_common_uvd_create_decoder(struct pipe_context *context,
1216                                                       const struct pipe_video_codec *templ,
1217                                                       ruvd_set_dtb set_dtb)
1218 {
1219    struct si_context *sctx = (struct si_context *)context;
1220    struct radeon_winsys *ws = sctx->ws;
1221    unsigned dpb_size;
1222    unsigned width = templ->width, height = templ->height;
1223    unsigned bs_buf_size;
1224    struct ruvd_decoder *dec;
1225    int r, i;
1226 
1227    switch (u_reduce_video_profile(templ->profile)) {
1228    case PIPE_VIDEO_FORMAT_MPEG12:
1229       if (templ->entrypoint > PIPE_VIDEO_ENTRYPOINT_BITSTREAM)
1230          return vl_create_mpeg12_decoder(context, templ);
1231 
1232       FALLTHROUGH;
1233    case PIPE_VIDEO_FORMAT_MPEG4:
1234       width = align(width, VL_MACROBLOCK_WIDTH);
1235       height = align(height, VL_MACROBLOCK_HEIGHT);
1236       break;
1237    case PIPE_VIDEO_FORMAT_MPEG4_AVC:
1238       width = align(width, VL_MACROBLOCK_WIDTH);
1239       height = align(height, VL_MACROBLOCK_HEIGHT);
1240       break;
1241 
1242    default:
1243       break;
1244    }
1245 
1246    dec = CALLOC_STRUCT(ruvd_decoder);
1247 
1248    if (!dec)
1249       return NULL;
1250 
1251    if (!sctx->screen->info.is_amdgpu)
1252       dec->use_legacy = true;
1253 
1254    dec->base = *templ;
1255    dec->base.context = context;
1256    dec->base.width = width;
1257    dec->base.height = height;
1258 
1259    dec->base.destroy = ruvd_destroy;
1260    dec->base.begin_frame = ruvd_begin_frame;
1261    dec->base.decode_macroblock = ruvd_decode_macroblock;
1262    dec->base.decode_bitstream = ruvd_decode_bitstream;
1263    dec->base.end_frame = ruvd_end_frame;
1264    dec->base.flush = ruvd_flush;
1265    dec->base.get_decoder_fence = ruvd_dec_get_decoder_fence;
1266    dec->base.destroy_fence = ruvd_dec_destroy_fence;
1267 
1268    dec->stream_type = profile2stream_type(dec, sctx->family);
1269    dec->set_dtb = set_dtb;
1270    dec->stream_handle = si_vid_alloc_stream_handle();
1271    dec->screen = context->screen;
1272    dec->ws = ws;
1273 
1274    if (!ws->cs_create(&dec->cs, sctx->ctx, AMD_IP_UVD, NULL, NULL)) {
1275       RVID_ERR("Can't get command submission context.\n");
1276       goto error;
1277    }
1278 
1279    for (i = 0; i < 16; i++)
1280       dec->render_pic_list[i] = NULL;
1281    dec->fb_size = (sctx->family == CHIP_TONGA) ? FB_BUFFER_SIZE_TONGA : FB_BUFFER_SIZE;
1282    bs_buf_size = width * height * (512 / (16 * 16));
1283    for (i = 0; i < NUM_BUFFERS; ++i) {
1284       unsigned msg_fb_it_size = FB_BUFFER_OFFSET + dec->fb_size;
1285       STATIC_ASSERT(sizeof(struct ruvd_msg) <= FB_BUFFER_OFFSET);
1286       if (have_it(dec))
1287          msg_fb_it_size += IT_SCALING_TABLE_SIZE;
1288       if (!si_vid_create_buffer(dec->screen, &dec->msg_fb_it_buffers[i], msg_fb_it_size,
1289                                 PIPE_USAGE_STAGING)) {
1290          RVID_ERR("Can't allocated message buffers.\n");
1291          goto error;
1292       }
1293 
1294       if (!si_vid_create_buffer(dec->screen, &dec->bs_buffers[i], bs_buf_size,
1295                                 PIPE_USAGE_STAGING)) {
1296          RVID_ERR("Can't allocated bitstream buffers.\n");
1297          goto error;
1298       }
1299 
1300       si_vid_clear_buffer(context, &dec->msg_fb_it_buffers[i]);
1301       si_vid_clear_buffer(context, &dec->bs_buffers[i]);
1302    }
1303 
1304    dpb_size = calc_dpb_size(dec);
1305    if (dpb_size) {
1306       if (!si_vid_create_buffer(dec->screen, &dec->dpb, dpb_size, PIPE_USAGE_DEFAULT)) {
1307          RVID_ERR("Can't allocated dpb.\n");
1308          goto error;
1309       }
1310       si_vid_clear_buffer(context, &dec->dpb);
1311    }
1312 
1313    if (dec->stream_type == RUVD_CODEC_H264_PERF && sctx->family >= CHIP_POLARIS10) {
1314       unsigned ctx_size = calc_ctx_size_h264_perf(dec);
1315       if (!si_vid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT)) {
1316          RVID_ERR("Can't allocated context buffer.\n");
1317          goto error;
1318       }
1319       si_vid_clear_buffer(context, &dec->ctx);
1320    }
1321 
1322    if (sctx->family >= CHIP_POLARIS10) {
1323       if (!si_vid_create_buffer(dec->screen, &dec->sessionctx, UVD_SESSION_CONTEXT_SIZE,
1324                                 PIPE_USAGE_DEFAULT)) {
1325          RVID_ERR("Can't allocated session ctx.\n");
1326          goto error;
1327       }
1328       si_vid_clear_buffer(context, &dec->sessionctx);
1329    }
1330 
1331    if (sctx->family >= CHIP_VEGA10) {
1332       dec->reg.data0 = RUVD_GPCOM_VCPU_DATA0_SOC15;
1333       dec->reg.data1 = RUVD_GPCOM_VCPU_DATA1_SOC15;
1334       dec->reg.cmd = RUVD_GPCOM_VCPU_CMD_SOC15;
1335       dec->reg.cntl = RUVD_ENGINE_CNTL_SOC15;
1336    } else {
1337       dec->reg.data0 = RUVD_GPCOM_VCPU_DATA0;
1338       dec->reg.data1 = RUVD_GPCOM_VCPU_DATA1;
1339       dec->reg.cmd = RUVD_GPCOM_VCPU_CMD;
1340       dec->reg.cntl = RUVD_ENGINE_CNTL;
1341    }
1342 
1343    map_msg_fb_it_buf(dec);
1344    dec->msg->size = sizeof(*dec->msg);
1345    dec->msg->msg_type = RUVD_MSG_CREATE;
1346    dec->msg->stream_handle = dec->stream_handle;
1347    dec->msg->body.create.stream_type = dec->stream_type;
1348    dec->msg->body.create.width_in_samples = dec->base.width;
1349    dec->msg->body.create.height_in_samples = dec->base.height;
1350    dec->msg->body.create.dpb_size = dpb_size;
1351    send_msg_buf(dec);
1352    r = flush(dec, 0, NULL);
1353    if (r)
1354       goto error;
1355 
1356    next_buffer(dec);
1357 
1358    return &dec->base;
1359 
1360 error:
1361    dec->ws->cs_destroy(&dec->cs);
1362 
1363    for (i = 0; i < NUM_BUFFERS; ++i) {
1364       si_vid_destroy_buffer(&dec->msg_fb_it_buffers[i]);
1365       si_vid_destroy_buffer(&dec->bs_buffers[i]);
1366    }
1367 
1368    si_vid_destroy_buffer(&dec->dpb);
1369    si_vid_destroy_buffer(&dec->ctx);
1370    si_vid_destroy_buffer(&dec->sessionctx);
1371 
1372    FREE(dec);
1373 
1374    return NULL;
1375 }
1376 
1377 /* calculate top/bottom offset */
texture_offset(struct radeon_surf * surface,unsigned layer,enum ruvd_surface_type type)1378 static unsigned texture_offset(struct radeon_surf *surface, unsigned layer,
1379                                enum ruvd_surface_type type)
1380 {
1381    switch (type) {
1382    default:
1383    case RUVD_SURFACE_TYPE_LEGACY:
1384       return (uint64_t)surface->u.legacy.level[0].offset_256B * 256 +
1385              layer * (uint64_t)surface->u.legacy.level[0].slice_size_dw * 4;
1386       break;
1387    case RUVD_SURFACE_TYPE_GFX9:
1388       return surface->u.gfx9.surf_offset + layer * surface->u.gfx9.surf_slice_size;
1389       break;
1390    }
1391 }
1392 
1393 /* hw encode the aspect of macro tiles */
macro_tile_aspect(unsigned macro_tile_aspect)1394 static unsigned macro_tile_aspect(unsigned macro_tile_aspect)
1395 {
1396    switch (macro_tile_aspect) {
1397    default:
1398    case 1:
1399       macro_tile_aspect = 0;
1400       break;
1401    case 2:
1402       macro_tile_aspect = 1;
1403       break;
1404    case 4:
1405       macro_tile_aspect = 2;
1406       break;
1407    case 8:
1408       macro_tile_aspect = 3;
1409       break;
1410    }
1411    return macro_tile_aspect;
1412 }
1413 
1414 /* hw encode the bank width and height */
bank_wh(unsigned bankwh)1415 static unsigned bank_wh(unsigned bankwh)
1416 {
1417    switch (bankwh) {
1418    default:
1419    case 1:
1420       bankwh = 0;
1421       break;
1422    case 2:
1423       bankwh = 1;
1424       break;
1425    case 4:
1426       bankwh = 2;
1427       break;
1428    case 8:
1429       bankwh = 3;
1430       break;
1431    }
1432    return bankwh;
1433 }
1434 
1435 /**
1436  * fill decoding target field from the luma and chroma surfaces
1437  */
si_uvd_set_dt_surfaces(struct ruvd_msg * msg,struct radeon_surf * luma,struct radeon_surf * chroma,enum ruvd_surface_type type)1438 void si_uvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surf *luma,
1439                             struct radeon_surf *chroma, enum ruvd_surface_type type)
1440 {
1441    switch (type) {
1442    default:
1443    case RUVD_SURFACE_TYPE_LEGACY:
1444       msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x * luma->blk_w;
1445       switch (luma->u.legacy.level[0].mode) {
1446       case RADEON_SURF_MODE_LINEAR_ALIGNED:
1447          msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
1448          msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_LINEAR;
1449          break;
1450       case RADEON_SURF_MODE_1D:
1451          msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1452          msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_1D_THIN;
1453          break;
1454       case RADEON_SURF_MODE_2D:
1455          msg->body.decode.dt_tiling_mode = RUVD_TILE_8X8;
1456          msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_2D_THIN;
1457          break;
1458       default:
1459          assert(0);
1460          break;
1461       }
1462 
1463       msg->body.decode.dt_luma_top_offset = texture_offset(luma, 0, type);
1464       if (chroma)
1465          msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 0, type);
1466       if (msg->body.decode.dt_field_mode) {
1467          msg->body.decode.dt_luma_bottom_offset = texture_offset(luma, 1, type);
1468          if (chroma)
1469             msg->body.decode.dt_chroma_bottom_offset = texture_offset(chroma, 1, type);
1470       } else {
1471          msg->body.decode.dt_luma_bottom_offset = msg->body.decode.dt_luma_top_offset;
1472          msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset;
1473       }
1474 
1475       if (chroma) {
1476          assert(luma->u.legacy.bankw == chroma->u.legacy.bankw);
1477          assert(luma->u.legacy.bankh == chroma->u.legacy.bankh);
1478          assert(luma->u.legacy.mtilea == chroma->u.legacy.mtilea);
1479       }
1480 
1481       msg->body.decode.dt_surf_tile_config |= RUVD_BANK_WIDTH(bank_wh(luma->u.legacy.bankw));
1482       msg->body.decode.dt_surf_tile_config |= RUVD_BANK_HEIGHT(bank_wh(luma->u.legacy.bankh));
1483       msg->body.decode.dt_surf_tile_config |=
1484          RUVD_MACRO_TILE_ASPECT_RATIO(macro_tile_aspect(luma->u.legacy.mtilea));
1485       break;
1486    case RUVD_SURFACE_TYPE_GFX9:
1487       msg->body.decode.dt_pitch = luma->u.gfx9.surf_pitch * luma->blk_w;
1488       /* SWIZZLE LINEAR MODE */
1489       msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
1490       msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_LINEAR;
1491       msg->body.decode.dt_luma_top_offset = texture_offset(luma, 0, type);
1492       msg->body.decode.dt_chroma_top_offset = texture_offset(chroma, 0, type);
1493       if (msg->body.decode.dt_field_mode) {
1494          msg->body.decode.dt_luma_bottom_offset = texture_offset(luma, 1, type);
1495          msg->body.decode.dt_chroma_bottom_offset = texture_offset(chroma, 1, type);
1496       } else {
1497          msg->body.decode.dt_luma_bottom_offset = msg->body.decode.dt_luma_top_offset;
1498          msg->body.decode.dt_chroma_bottom_offset = msg->body.decode.dt_chroma_top_offset;
1499       }
1500       msg->body.decode.dt_surf_tile_config = 0;
1501       break;
1502    }
1503 }
1504