xref: /aosp_15_r20/external/coreboot/src/soc/amd/common/block/spi/fch_spi_util.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c) 
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <amdblocks/lpc.h>
4 #include <amdblocks/spi.h>
5 #include <device/mmio.h>
6 #include <assert.h>
7 #include <stdint.h>
8 
9 /* Global SPI controller mutex */
10 struct thread_mutex spi_hw_mutex;
11 
12 static uintptr_t spi_base;
13 
spi_set_base(void * base)14 void spi_set_base(void *base)
15 {
16 	spi_base = (uintptr_t)base;
17 }
18 
spi_get_bar(void)19 uintptr_t spi_get_bar(void)
20 {
21 	if (ENV_X86 && !spi_base)
22 		spi_set_base((void *)lpc_get_spibase());
23 	ASSERT(spi_base);
24 
25 	return spi_base;
26 }
27 
spi_read8(uint8_t reg)28 uint8_t spi_read8(uint8_t reg)
29 {
30 	return read8p(spi_get_bar() + reg);
31 }
32 
spi_read16(uint8_t reg)33 uint16_t spi_read16(uint8_t reg)
34 {
35 	return read16p(spi_get_bar() + reg);
36 }
37 
spi_read32(uint8_t reg)38 uint32_t spi_read32(uint8_t reg)
39 {
40 	return read32p(spi_get_bar() + reg);
41 }
42 
spi_write8(uint8_t reg,uint8_t val)43 void spi_write8(uint8_t reg, uint8_t val)
44 {
45 	write8p(spi_get_bar() + reg, val);
46 }
47 
spi_write16(uint8_t reg,uint16_t val)48 void spi_write16(uint8_t reg, uint16_t val)
49 {
50 	write16p(spi_get_bar() + reg, val);
51 }
52 
spi_write32(uint8_t reg,uint32_t val)53 void spi_write32(uint8_t reg, uint32_t val)
54 {
55 	write32p(spi_get_bar() + reg, val);
56 }
57