xref: /aosp_15_r20/external/coreboot/src/soc/amd/picasso/psp_verstage/svc.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <assert.h>
4 #include <bl_uapp/bl_syscall_public.h>
5 #include <psp_verstage.h>
6 #include <svc_call.h>
7 
svc_exit(uint32_t status)8 void svc_exit(uint32_t status)
9 {
10 	uint32_t unused = 0;
11 	SVC_CALL0(SVC_EXIT, unused);
12 }
13 
svc_map_user_stack(void * start_addr,void * end_addr,void * stack_va)14 uint32_t svc_map_user_stack(void *start_addr, void *end_addr, void *stack_va)
15 {
16 	uint32_t retval = 0;
17 	SVC_CALL3(SVC_MAP_USER_STACK, (uint32_t)start_addr,
18 			(uint32_t)end_addr, stack_va, retval);
19 	return retval;
20 }
21 
svc_debug_print(const char * string)22 void svc_debug_print(const char *string)
23 {
24 	uint32_t unused = 0;
25 	SVC_CALL1(SVC_DEBUG_PRINT, (uint32_t)string, unused);
26 }
27 
svc_debug_print_ex(uint32_t dword0,uint32_t dword1,uint32_t dword2,uint32_t dword3)28 void svc_debug_print_ex(uint32_t dword0,
29 		uint32_t dword1, uint32_t dword2, uint32_t dword3)
30 {
31 	uint32_t unused = 0;
32 	SVC_CALL4(SVC_DEBUG_PRINT_EX, dword0, dword1, dword2, dword3, unused);
33 }
34 
svc_wait_10ns_multiple(uint32_t multiple)35 uint32_t svc_wait_10ns_multiple(uint32_t multiple)
36 {
37 	uint32_t retval = 0;
38 	SVC_CALL1(SVC_WAIT_10NS_MULTIPLE, multiple, retval);
39 	return retval;
40 }
41 
svc_get_boot_mode(uint32_t * boot_mode)42 uint32_t svc_get_boot_mode(uint32_t *boot_mode)
43 {
44 	uint32_t retval = 0;
45 	SVC_CALL1(SVC_GET_BOOT_MODE, boot_mode, retval);
46 	return retval;
47 }
48 
svc_delay_in_usec(uint32_t delay)49 void svc_delay_in_usec(uint32_t delay)
50 {
51 	uint32_t unused = 0;
52 	SVC_CALL1(SVC_DELAY_IN_MICRO_SECONDS, delay, unused);
53 }
54 
svc_get_spi_rom_info(struct spirom_info * spi_rom_info)55 uint32_t svc_get_spi_rom_info(struct spirom_info *spi_rom_info)
56 {
57 	uint32_t retval = 0;
58 	SVC_CALL1(SVC_GET_SPI_INFO, (uint32_t)spi_rom_info, retval);
59 	return retval;
60 }
61 
svc_map_fch_dev(enum fch_io_device io_device,uint32_t arg1,uint32_t arg2,void ** io_device_axi_addr)62 uint32_t svc_map_fch_dev(enum fch_io_device io_device,
63 		uint32_t arg1, uint32_t arg2, void **io_device_axi_addr)
64 {
65 	uint32_t retval = 0;
66 	assert(io_device < FCH_IO_DEVICE_END);
67 	SVC_CALL4(SVC_MAP_FCH_IO_DEVICE, io_device, arg1, arg2,
68 			(uint32_t)io_device_axi_addr, retval);
69 	return retval;
70 }
71 
svc_unmap_fch_dev(enum fch_io_device io_device,void * io_device_axi_addr)72 uint32_t svc_unmap_fch_dev(enum fch_io_device io_device, void *io_device_axi_addr)
73 {
74 	uint32_t retval = 0;
75 	assert(io_device < FCH_IO_DEVICE_END);
76 	SVC_CALL2(SVC_UNMAP_FCH_IO_DEVICE, (uint32_t)io_device,
77 			(uint32_t)io_device_axi_addr, retval);
78 	return retval;
79 }
80 
svc_map_spi_rom(void * spi_rom_addr,uint32_t size,void ** spi_rom_axi_addr)81 uint32_t svc_map_spi_rom(void *spi_rom_addr,
82 		uint32_t size, void **spi_rom_axi_addr)
83 {
84 	uint32_t retval = 0;
85 	SVC_CALL3(SVC_MAP_SPIROM_DEVICE, spi_rom_addr, size,
86 			(uint32_t)spi_rom_axi_addr, retval);
87 	return retval;
88 }
89 
svc_unmap_spi_rom(void * spi_rom_addr)90 uint32_t svc_unmap_spi_rom(void *spi_rom_addr)
91 {
92 	uint32_t retval = 0;
93 	SVC_CALL1(SVC_UNMAP_SPIROM_DEVICE, (uint32_t)spi_rom_addr, retval);
94 	return retval;
95 }
96 
svc_update_psp_bios_dir(uint32_t * psp_dir_offset,uint32_t * bios_dir_offset,enum dir_offset_operation operation)97 uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset,
98 		uint32_t *bios_dir_offset, enum dir_offset_operation operation)
99 {
100 	uint32_t retval = 0;
101 	assert(operation < DIR_OFFSET_OPERATION_MAX);
102 	SVC_CALL3(SVC_UPDATE_PSP_BIOS_DIR, (uint32_t)psp_dir_offset,
103 			(uint32_t)bios_dir_offset, operation, retval);
104 	return retval;
105 }
106 
svc_save_uapp_data(enum uapp_copybuf type,void * address,uint32_t size)107 uint32_t svc_save_uapp_data(enum uapp_copybuf type, void *address,
108 		uint32_t size)
109 {
110 	uint32_t retval = 0;
111 	assert(type < UAPP_COPYBUF_MAX);
112 	SVC_CALL3(SVC_COPY_DATA_FROM_UAPP, type, (uint32_t)address, size, retval);
113 	return retval;
114 }
115 
svc_read_timer_val(enum psp_timer_type type,uint64_t * counter_value)116 uint32_t svc_read_timer_val(enum psp_timer_type type, uint64_t *counter_value)
117 {
118 	unsigned int retval = 0;
119 	assert(type < PSP_TIMER_TYPE_MAX);
120 	SVC_CALL2(SVC_READ_TIMER_VAL, type, counter_value, retval);
121 	return retval;
122 }
123 
svc_reset_system(enum reset_type reset_type)124 uint32_t svc_reset_system(enum reset_type reset_type)
125 {
126 	unsigned int retval = 0;
127 	assert(reset_type < RESET_TYPE_MAX);
128 	SVC_CALL1(SVC_RESET_SYSTEM, reset_type, retval);
129 	return retval;
130 }
131 
svc_write_postcode(uint32_t postcode)132 uint32_t svc_write_postcode(uint32_t postcode)
133 {
134 	uint32_t retval = 0;
135 	SVC_CALL1(SVC_WRITE_POSTCODE, postcode, retval);
136 	return retval;
137 }
138 
svc_get_max_workbuf_size(uint32_t * size)139 uint32_t svc_get_max_workbuf_size(uint32_t *size)
140 {
141 	uint32_t retval = 0;
142 	SVC_CALL1(SVC_GET_MAX_WORKBUF_SIZE, size, retval);
143 	return retval;
144 }
145 
svc_crypto_sha(struct sha_generic_data * sha_op,enum sha_operation_mode sha_mode)146 uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode sha_mode)
147 {
148 	uint32_t retval = 0;
149 	SVC_CALL2(SVC_SHA, sha_op, sha_mode, retval);
150 	return retval;
151 }
152 
svc_rsa_pkcs_verify(const struct rsapkcs_verify_params * rsa_params)153 uint32_t svc_rsa_pkcs_verify(const struct rsapkcs_verify_params *rsa_params)
154 {
155 	uint32_t retval = 0;
156 	SVC_CALL1(SVC_RSAPKCS_VERIFY, rsa_params, retval);
157 	return retval;
158 }
159 
svc_modexp(struct mod_exp_params * mod_exp_param)160 uint32_t svc_modexp(struct mod_exp_params *mod_exp_param)
161 {
162 	uint32_t retval = 0;
163 	SVC_CALL1(SVC_MODEXP, mod_exp_param, retval);
164 	return retval;
165 }
166