1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3  * Copyright (C) 2008-2014, 2018-2024 Intel Corporation
4  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5  * Copyright (C) 2016-2017 Intel Deutschland GmbH
6  */
7 #ifndef __iwl_fw_file_h__
8 #define __iwl_fw_file_h__
9 
10 #include <linux/netdevice.h>
11 #include <linux/nl80211.h>
12 
13 /* v1/v2 uCode file layout */
14 struct iwl_ucode_header {
15 	__le32 ver;	/* major/minor/API/serial */
16 	union {
17 		struct {
18 			__le32 inst_size;	/* bytes of runtime code */
19 			__le32 data_size;	/* bytes of runtime data */
20 			__le32 init_size;	/* bytes of init code */
21 			__le32 init_data_size;	/* bytes of init data */
22 			__le32 boot_size;	/* bytes of bootstrap code */
23 			u8 data[];		/* in same order as sizes */
24 		} v1;
25 		struct {
26 			__le32 build;		/* build number */
27 			__le32 inst_size;	/* bytes of runtime code */
28 			__le32 data_size;	/* bytes of runtime data */
29 			__le32 init_size;	/* bytes of init code */
30 			__le32 init_data_size;	/* bytes of init data */
31 			__le32 boot_size;	/* bytes of bootstrap code */
32 			u8 data[];		/* in same order as sizes */
33 		} v2;
34 	} u;
35 };
36 
37 #define IWL_UCODE_TLV_DEBUG_BASE	0x1000005
38 #define IWL_UCODE_TLV_CONST_BASE	0x100
39 
40 /*
41  * new TLV uCode file layout
42  *
43  * The new TLV file format contains TLVs, that each specify
44  * some piece of data.
45  */
46 
47 enum iwl_ucode_tlv_type {
48 	IWL_UCODE_TLV_INVALID		= 0, /* unused */
49 	IWL_UCODE_TLV_INST		= 1,
50 	IWL_UCODE_TLV_DATA		= 2,
51 	IWL_UCODE_TLV_INIT		= 3,
52 	IWL_UCODE_TLV_INIT_DATA		= 4,
53 	IWL_UCODE_TLV_BOOT		= 5,
54 	IWL_UCODE_TLV_PROBE_MAX_LEN	= 6, /* a u32 value */
55 	IWL_UCODE_TLV_PAN		= 7, /* deprecated -- only used in DVM */
56 	IWL_UCODE_TLV_MEM_DESC		= 7, /* replaces PAN in non-DVM */
57 	IWL_UCODE_TLV_RUNT_EVTLOG_PTR	= 8,
58 	IWL_UCODE_TLV_RUNT_EVTLOG_SIZE	= 9,
59 	IWL_UCODE_TLV_RUNT_ERRLOG_PTR	= 10,
60 	IWL_UCODE_TLV_INIT_EVTLOG_PTR	= 11,
61 	IWL_UCODE_TLV_INIT_EVTLOG_SIZE	= 12,
62 	IWL_UCODE_TLV_INIT_ERRLOG_PTR	= 13,
63 	IWL_UCODE_TLV_ENHANCE_SENS_TBL	= 14,
64 	IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
65 	IWL_UCODE_TLV_WOWLAN_INST	= 16,
66 	IWL_UCODE_TLV_WOWLAN_DATA	= 17,
67 	IWL_UCODE_TLV_FLAGS		= 18,
68 	IWL_UCODE_TLV_SEC_RT		= 19,
69 	IWL_UCODE_TLV_SEC_INIT		= 20,
70 	IWL_UCODE_TLV_SEC_WOWLAN	= 21,
71 	IWL_UCODE_TLV_DEF_CALIB		= 22,
72 	IWL_UCODE_TLV_PHY_SKU		= 23,
73 	IWL_UCODE_TLV_SECURE_SEC_RT	= 24,
74 	IWL_UCODE_TLV_SECURE_SEC_INIT	= 25,
75 	IWL_UCODE_TLV_SECURE_SEC_WOWLAN	= 26,
76 	IWL_UCODE_TLV_NUM_OF_CPU	= 27,
77 	IWL_UCODE_TLV_CSCHEME		= 28,
78 	IWL_UCODE_TLV_API_CHANGES_SET	= 29,
79 	IWL_UCODE_TLV_ENABLED_CAPABILITIES	= 30,
80 	IWL_UCODE_TLV_N_SCAN_CHANNELS		= 31,
81 	IWL_UCODE_TLV_PAGING		= 32,
82 	IWL_UCODE_TLV_SEC_RT_USNIFFER	= 34,
83 	/* 35 is unused */
84 	IWL_UCODE_TLV_FW_VERSION	= 36,
85 	IWL_UCODE_TLV_FW_DBG_DEST	= 38,
86 	IWL_UCODE_TLV_FW_DBG_CONF	= 39,
87 	IWL_UCODE_TLV_FW_DBG_TRIGGER	= 40,
88 	IWL_UCODE_TLV_CMD_VERSIONS	= 48,
89 	IWL_UCODE_TLV_FW_GSCAN_CAPA	= 50,
90 	IWL_UCODE_TLV_FW_MEM_SEG	= 51,
91 	IWL_UCODE_TLV_IML		= 52,
92 	IWL_UCODE_TLV_UMAC_DEBUG_ADDRS	= 54,
93 	IWL_UCODE_TLV_LMAC_DEBUG_ADDRS	= 55,
94 	IWL_UCODE_TLV_FW_RECOVERY_INFO	= 57,
95 	IWL_UCODE_TLV_HW_TYPE			= 58,
96 	IWL_UCODE_TLV_FW_FSEQ_VERSION		= 60,
97 	IWL_UCODE_TLV_PHY_INTEGRATION_VERSION	= 61,
98 
99 	IWL_UCODE_TLV_PNVM_VERSION		= 62,
100 	IWL_UCODE_TLV_PNVM_SKU			= 64,
101 
102 	IWL_UCODE_TLV_SEC_TABLE_ADDR		= 66,
103 	IWL_UCODE_TLV_D3_KEK_KCK_ADDR		= 67,
104 	IWL_UCODE_TLV_CURRENT_PC		= 68,
105 
106 	IWL_UCODE_TLV_FW_NUM_STATIONS		= IWL_UCODE_TLV_CONST_BASE + 0,
107 	IWL_UCODE_TLV_FW_NUM_LINKS		= IWL_UCODE_TLV_CONST_BASE + 1,
108 	IWL_UCODE_TLV_FW_NUM_BEACONS		= IWL_UCODE_TLV_CONST_BASE + 2,
109 
110 	IWL_UCODE_TLV_TYPE_DEBUG_INFO		= IWL_UCODE_TLV_DEBUG_BASE + 0,
111 	IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION	= IWL_UCODE_TLV_DEBUG_BASE + 1,
112 	IWL_UCODE_TLV_TYPE_HCMD			= IWL_UCODE_TLV_DEBUG_BASE + 2,
113 	IWL_UCODE_TLV_TYPE_REGIONS		= IWL_UCODE_TLV_DEBUG_BASE + 3,
114 	IWL_UCODE_TLV_TYPE_TRIGGERS		= IWL_UCODE_TLV_DEBUG_BASE + 4,
115 	IWL_UCODE_TLV_TYPE_CONF_SET		= IWL_UCODE_TLV_DEBUG_BASE + 5,
116 	IWL_UCODE_TLV_DEBUG_MAX = IWL_UCODE_TLV_TYPE_TRIGGERS,
117 
118 	/* TLVs 0x1000-0x2000 are for internal driver usage */
119 	IWL_UCODE_TLV_FW_DBG_DUMP_LST	= 0x1000,
120 };
121 
122 struct iwl_ucode_tlv {
123 	__le32 type;		/* see above */
124 	__le32 length;		/* not including type/length fields */
125 	u8 data[];
126 };
127 
128 #define IWL_TLV_UCODE_MAGIC		0x0a4c5749
129 #define FW_VER_HUMAN_READABLE_SZ	64
130 
131 struct iwl_tlv_ucode_header {
132 	/*
133 	 * The TLV style ucode header is distinguished from
134 	 * the v1/v2 style header by first four bytes being
135 	 * zero, as such is an invalid combination of
136 	 * major/minor/API/serial versions.
137 	 */
138 	__le32 zero;
139 	__le32 magic;
140 	u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
141 	/* major/minor/API/serial or major in new format */
142 	__le32 ver;
143 	__le32 build;
144 	__le64 ignore;
145 	/*
146 	 * The data contained herein has a TLV layout,
147 	 * see above for the TLV header and types.
148 	 * Note that each TLV is padded to a length
149 	 * that is a multiple of 4 for alignment.
150 	 */
151 	u8 data[];
152 };
153 
154 /*
155  * ucode TLVs
156  *
157  * ability to get extension for: flags & capabilities from ucode binaries files
158  */
159 struct iwl_ucode_api {
160 	__le32 api_index;
161 	__le32 api_flags;
162 } __packed;
163 
164 struct iwl_ucode_capa {
165 	__le32 api_index;
166 	__le32 api_capa;
167 } __packed;
168 
169 /**
170  * enum iwl_ucode_tlv_flag - ucode API flags
171  * @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously
172  *	was a separate TLV but moved here to save space.
173  * @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behavior on hidden SSID,
174  *	treats good CRC threshold as a boolean
175  * @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w).
176  * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: This uCode image supports uAPSD
177  * @IWL_UCODE_TLV_FLAGS_SHORT_BL: 16 entries of block list instead of 64 in scan
178  *	offload profile config command.
179  * @IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS: D3 image supports up to six
180  *	(rather than two) IPv6 addresses
181  * @IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID: not sending a probe with the SSID element
182  *	from the probe request template.
183  * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL: new NS offload (small version)
184  * @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version)
185  * @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD
186  * @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save
187  * @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS.
188  */
189 enum iwl_ucode_tlv_flag {
190 	IWL_UCODE_TLV_FLAGS_PAN			= BIT(0),
191 	IWL_UCODE_TLV_FLAGS_NEWSCAN		= BIT(1),
192 	IWL_UCODE_TLV_FLAGS_MFP			= BIT(2),
193 	IWL_UCODE_TLV_FLAGS_SHORT_BL		= BIT(7),
194 	IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS	= BIT(10),
195 	IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID	= BIT(12),
196 	IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL	= BIT(15),
197 	IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE	= BIT(16),
198 	IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT	= BIT(24),
199 	IWL_UCODE_TLV_FLAGS_EBS_SUPPORT		= BIT(25),
200 	IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD	= BIT(26),
201 };
202 
203 typedef unsigned int __bitwise iwl_ucode_tlv_api_t;
204 
205 /**
206  * enum iwl_ucode_tlv_api - ucode api
207  * @IWL_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time
208  *	longer than the passive one, which is essential for fragmented scan.
209  * @IWL_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source.
210  * @IWL_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params
211  * @IWL_UCODE_TLV_API_NEW_VERSION: new versioning format
212  * @IWL_UCODE_TLV_API_SCAN_TSF_REPORT: Scan start time reported in scan
213  *	iteration complete notification, and the timestamp reported for RX
214  *	received during scan, are reported in TSF of the mac specified in the
215  *	scan request.
216  * @IWL_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of
217  *	ADD_MODIFY_STA_KEY_API_S_VER_2.
218  * @IWL_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement.
219  * @IWL_UCODE_TLV_API_NAN2_VER2: This ucode supports NAN API version 2
220  * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL: support for adaptive dwell in scanning
221  * @IWL_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used
222  * @IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY: Quota command includes a field
223  *	indicating low latency direction.
224  * @IWL_UCODE_TLV_API_DEPRECATE_TTAK: RX status flag TTAK ok (bit 7) is
225  *	deprecated.
226  * @IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2: This ucode supports version 8
227  *	of scan request: SCAN_REQUEST_CMD_UMAC_API_S_VER_8
228  * @IWL_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS
229  * @IWL_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of
230  *	the REDUCE_TX_POWER_CMD.
231  * @IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF: This ucode supports the short
232  *	version of the beacon notification.
233  * @IWL_UCODE_TLV_API_BEACON_FILTER_V4: This ucode supports v4 of
234  *	BEACON_FILTER_CONFIG_API_S_VER_4.
235  * @IWL_UCODE_TLV_API_REGULATORY_NVM_INFO: This ucode supports v4 of
236  *	REGULATORY_NVM_GET_INFO_RSP_API_S.
237  * @IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ: This ucode supports v7 of
238  *	LOCATION_RANGE_REQ_CMD_API_S and v6 of LOCATION_RANGE_RESP_NTFY_API_S.
239  * @IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS: This ucode supports v2 of
240  *	SCAN_OFFLOAD_PROFILE_MATCH_RESULTS_S and v3 of
241  *	SCAN_OFFLOAD_PROFILES_QUERY_RSP_S.
242  * @IWL_UCODE_TLV_API_MBSSID_HE: This ucode supports v2 of
243  *	STA_CONTEXT_DOT11AX_API_S
244  * @IWL_UCODE_TLV_API_FTM_RTT_ACCURACY: version 7 of the range response API
245  *	is supported by FW, this indicates the RTT confidence value
246  * @IWL_UCODE_TLV_API_SAR_TABLE_VER: This ucode supports different sar
247  *	version tables.
248  * @IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG: This ucode supports v3 of
249  *	SCAN_CONFIG_DB_CMD_API_S.
250  * @IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP: support for setting adaptive dwell
251  *	number of APs in the 5 GHz band
252  * @IWL_UCODE_TLV_API_BAND_IN_RX_DATA: FW reports band number in RX notification
253  * @IWL_UCODE_TLV_API_NO_HOST_DISABLE_TX: Firmware offloaded the station disable tx
254  *	logic.
255  * @IWL_UCODE_TLV_API_INT_DBG_BUF_CLEAR: Firmware supports clearing the debug
256  *	internal buffer
257  * @IWL_UCODE_TLV_API_SMART_FIFO_OFFLOAD: Firmware doesn't need the host to
258  *	configure the smart fifo
259  *
260  * @NUM_IWL_UCODE_TLV_API: number of bits used
261  */
262 enum iwl_ucode_tlv_api {
263 	/* API Set 0 */
264 	IWL_UCODE_TLV_API_FRAGMENTED_SCAN	= (__force iwl_ucode_tlv_api_t)8,
265 	IWL_UCODE_TLV_API_WIFI_MCC_UPDATE	= (__force iwl_ucode_tlv_api_t)9,
266 	IWL_UCODE_TLV_API_LQ_SS_PARAMS		= (__force iwl_ucode_tlv_api_t)18,
267 	IWL_UCODE_TLV_API_NEW_VERSION		= (__force iwl_ucode_tlv_api_t)20,
268 	IWL_UCODE_TLV_API_SCAN_TSF_REPORT	= (__force iwl_ucode_tlv_api_t)28,
269 	IWL_UCODE_TLV_API_TKIP_MIC_KEYS		= (__force iwl_ucode_tlv_api_t)29,
270 	IWL_UCODE_TLV_API_STA_TYPE		= (__force iwl_ucode_tlv_api_t)30,
271 	IWL_UCODE_TLV_API_NAN2_VER2		= (__force iwl_ucode_tlv_api_t)31,
272 	/* API Set 1 */
273 	IWL_UCODE_TLV_API_ADAPTIVE_DWELL	= (__force iwl_ucode_tlv_api_t)32,
274 	IWL_UCODE_TLV_API_OCE			= (__force iwl_ucode_tlv_api_t)33,
275 	IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE	= (__force iwl_ucode_tlv_api_t)34,
276 	IWL_UCODE_TLV_API_NEW_RX_STATS		= (__force iwl_ucode_tlv_api_t)35,
277 	IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL	= (__force iwl_ucode_tlv_api_t)36,
278 	IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY	= (__force iwl_ucode_tlv_api_t)38,
279 	IWL_UCODE_TLV_API_DEPRECATE_TTAK	= (__force iwl_ucode_tlv_api_t)41,
280 	IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2	= (__force iwl_ucode_tlv_api_t)42,
281 	IWL_UCODE_TLV_API_FRAG_EBS		= (__force iwl_ucode_tlv_api_t)44,
282 	IWL_UCODE_TLV_API_REDUCE_TX_POWER	= (__force iwl_ucode_tlv_api_t)45,
283 	IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF	= (__force iwl_ucode_tlv_api_t)46,
284 	IWL_UCODE_TLV_API_BEACON_FILTER_V4      = (__force iwl_ucode_tlv_api_t)47,
285 	IWL_UCODE_TLV_API_REGULATORY_NVM_INFO   = (__force iwl_ucode_tlv_api_t)48,
286 	IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ     = (__force iwl_ucode_tlv_api_t)49,
287 	IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS    = (__force iwl_ucode_tlv_api_t)50,
288 	IWL_UCODE_TLV_API_MBSSID_HE		= (__force iwl_ucode_tlv_api_t)52,
289 	IWL_UCODE_TLV_API_WOWLAN_TCP_SYN_WAKE	= (__force iwl_ucode_tlv_api_t)53,
290 	IWL_UCODE_TLV_API_FTM_RTT_ACCURACY      = (__force iwl_ucode_tlv_api_t)54,
291 	IWL_UCODE_TLV_API_SAR_TABLE_VER         = (__force iwl_ucode_tlv_api_t)55,
292 	IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG   = (__force iwl_ucode_tlv_api_t)56,
293 	IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP	= (__force iwl_ucode_tlv_api_t)57,
294 	IWL_UCODE_TLV_API_SCAN_EXT_CHAN_VER	= (__force iwl_ucode_tlv_api_t)58,
295 	IWL_UCODE_TLV_API_BAND_IN_RX_DATA	= (__force iwl_ucode_tlv_api_t)59,
296 	/* API Set 2 */
297 	IWL_UCODE_TLV_API_NO_HOST_DISABLE_TX	= (__force iwl_ucode_tlv_api_t)66,
298 	IWL_UCODE_TLV_API_INT_DBG_BUF_CLEAR     = (__force iwl_ucode_tlv_api_t)67,
299 	IWL_UCODE_TLV_API_SMART_FIFO_OFFLOAD    = (__force iwl_ucode_tlv_api_t)68,
300 
301 	NUM_IWL_UCODE_TLV_API
302 /*
303  * This construction make both sparse (which cannot increment the previous
304  * member due to its bitwise type) and kernel-doc (which doesn't understand
305  * the ifdef/else properly) work.
306  */
307 #ifdef __CHECKER__
308 #define __CHECKER_NUM_IWL_UCODE_TLV_API	128
309 		= (__force iwl_ucode_tlv_api_t)__CHECKER_NUM_IWL_UCODE_TLV_API,
310 #define NUM_IWL_UCODE_TLV_API __CHECKER_NUM_IWL_UCODE_TLV_API
311 #endif
312 };
313 
314 typedef unsigned int __bitwise iwl_ucode_tlv_capa_t;
315 
316 /**
317  * enum iwl_ucode_tlv_capa - ucode capabilities
318  * @IWL_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3
319  * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT: supports Location Aware Regulatory
320  * @IWL_UCODE_TLV_CAPA_UMAC_SCAN: supports UMAC scan.
321  * @IWL_UCODE_TLV_CAPA_BEAMFORMER: supports Beamformer
322  * @IWL_UCODE_TLV_CAPA_TDLS_SUPPORT: support basic TDLS functionality
323  * @IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT: supports insertion of current
324  *	tx power value into TPC Report action frame and Link Measurement Report
325  *	action frame
326  * @IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT: supports updating current
327  *	channel in DS parameter set element in probe requests.
328  * @IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT: supports adding TPC Report IE in
329  *	probe requests.
330  * @IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT: supports Quiet Period requests
331  * @IWL_UCODE_TLV_CAPA_DQA_SUPPORT: supports dynamic queue allocation (DQA),
332  *	which also implies support for the scheduler configuration command
333  * @IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching
334  * @IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image
335  * @IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command
336  * @IWL_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload
337  * @IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics
338  * @IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD: supports U-APSD on p2p interface when it
339  *	is standalone or with a BSS station interface in the same binding.
340  * @IWL_UCODE_TLV_CAPA_BT_COEX_PLCR: enabled BT Coex packet level co-running
341  * @IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different
342  *	sources for the MCC. This TLV bit is a future replacement to
343  *	IWL_UCODE_TLV_API_WIFI_MCC_UPDATE. When either is set, multi-source LAR
344  *	is supported.
345  * @IWL_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC
346  * @IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan (no longer used)
347  * @IWL_UCODE_TLV_CAPA_FRAGMENTED_PNVM_IMG: supports fragmented PNVM image
348  * @IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT: the firmware supports setting
349  *	stabilization latency for SoCs.
350  * @IWL_UCODE_TLV_CAPA_STA_PM_NOTIF: firmware will send STA PM notification
351  * @IWL_UCODE_TLV_CAPA_TLC_OFFLOAD: firmware implements rate scaling algorithm
352  * @IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA: firmware implements quota related
353  * @IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2: firmware implements Coex Schema 2
354  * IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD: firmware supports CSA command
355  * @IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS: firmware supports ultra high band
356  *	(6 GHz).
357  * @IWL_UCODE_TLV_CAPA_CS_MODIFY: firmware supports modify action CSA command
358  * @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement
359  * @IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts
360  * @IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT: supports bt-coex Multi-priority LUT
361  * @IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD: the firmware supports CSA
362  *	countdown offloading. Beacon notifications are not sent to the host.
363  *	The fw also offloads TBTT alignment.
364  * @IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION: firmware will decide on what
365  *	antenna the beacon should be transmitted
366  * @IWL_UCODE_TLV_CAPA_BEACON_STORING: firmware will store the latest beacon
367  *	from AP and will send it upon d0i3 exit.
368  * @IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3: support LAR API V3
369  * @IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW: firmware responsible for CT-kill
370  * @IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT: supports temperature
371  *	thresholds reporting
372  * @IWL_UCODE_TLV_CAPA_CTDP_SUPPORT: supports cTDP command
373  * @IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED: supports usniffer enabled in
374  *	regular image.
375  * @IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG: support getting more shared
376  *	memory addresses from the firmware.
377  * @IWL_UCODE_TLV_CAPA_LQM_SUPPORT: supports Link Quality Measurement
378  * @IWL_UCODE_TLV_CAPA_TX_POWER_ACK: reduced TX power API has larger
379  *	command size (command version 4) that supports toggling ACK TX
380  *	power reduction.
381  * @IWL_UCODE_TLV_CAPA_D3_DEBUG: supports debug recording during D3
382  * @IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT: MCC response support 11ax
383  *	capability.
384  * @IWL_UCODE_TLV_CAPA_CSI_REPORTING: firmware is capable of being configured
385  *	to report the CSI information with (certain) RX frames
386  * @IWL_UCODE_TLV_CAPA_FTM_CALIBRATED: has FTM calibrated and thus supports both
387  *	initiator and responder
388  * @IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_UNII4_US_CA: supports (de)activating UNII-4
389  *	for US/CA/WW from BIOS
390  * @IWL_UCODE_TLV_CAPA_PROTECTED_TWT: Supports protection of TWT action frames
391  * @IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE: Supports the firmware handshake in
392  *	reset flow
393  * @IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN: Support for passive scan on 6GHz PSC
394  *      channels even when these are not enabled.
395  * @IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT: Support for indicating dump collection
396  *	complete to FW.
397  * @IWL_UCODE_TLV_CAPA_SPP_AMSDU_SUPPORT: Support SPP (signaling and payload
398  *	protected) A-MSDU.
399  * @IWL_UCODE_TLV_CAPA_SECURE_LTF_SUPPORT: Support secure LTF measurement.
400  * @IWL_UCODE_TLV_CAPA_MONITOR_PASSIVE_CHANS: Support monitor mode on otherwise
401  *	passive channels
402  * @IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_5G9_FOR_CA: supports (de)activating 5G9
403  *	for CA from BIOS.
404  * @IWL_UCODE_TLV_CAPA_UHB_CANADA_TAS_SUPPORT: supports %TAS_UHB_ALLOWED_CANADA
405  *
406  * @NUM_IWL_UCODE_TLV_CAPA: number of bits used
407  */
408 enum iwl_ucode_tlv_capa {
409 	/* set 0 */
410 	IWL_UCODE_TLV_CAPA_D0I3_SUPPORT			= (__force iwl_ucode_tlv_capa_t)0,
411 	IWL_UCODE_TLV_CAPA_LAR_SUPPORT			= (__force iwl_ucode_tlv_capa_t)1,
412 	IWL_UCODE_TLV_CAPA_UMAC_SCAN			= (__force iwl_ucode_tlv_capa_t)2,
413 	IWL_UCODE_TLV_CAPA_BEAMFORMER			= (__force iwl_ucode_tlv_capa_t)3,
414 	IWL_UCODE_TLV_CAPA_TDLS_SUPPORT			= (__force iwl_ucode_tlv_capa_t)6,
415 	IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT	= (__force iwl_ucode_tlv_capa_t)8,
416 	IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)9,
417 	IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)10,
418 	IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT		= (__force iwl_ucode_tlv_capa_t)11,
419 	IWL_UCODE_TLV_CAPA_DQA_SUPPORT			= (__force iwl_ucode_tlv_capa_t)12,
420 	IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH		= (__force iwl_ucode_tlv_capa_t)13,
421 	IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG		= (__force iwl_ucode_tlv_capa_t)17,
422 	IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT		= (__force iwl_ucode_tlv_capa_t)18,
423 	IWL_UCODE_TLV_CAPA_CSUM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)21,
424 	IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS		= (__force iwl_ucode_tlv_capa_t)22,
425 	IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD		= (__force iwl_ucode_tlv_capa_t)26,
426 	IWL_UCODE_TLV_CAPA_BT_COEX_PLCR			= (__force iwl_ucode_tlv_capa_t)28,
427 	IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC		= (__force iwl_ucode_tlv_capa_t)29,
428 	IWL_UCODE_TLV_CAPA_BT_COEX_RRC			= (__force iwl_ucode_tlv_capa_t)30,
429 	IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT		= (__force iwl_ucode_tlv_capa_t)31,
430 
431 	/* set 1 */
432 	IWL_UCODE_TLV_CAPA_FRAGMENTED_PNVM_IMG		= (__force iwl_ucode_tlv_capa_t)32,
433 	IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT		= (__force iwl_ucode_tlv_capa_t)37,
434 	IWL_UCODE_TLV_CAPA_STA_PM_NOTIF			= (__force iwl_ucode_tlv_capa_t)38,
435 	IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT		= (__force iwl_ucode_tlv_capa_t)39,
436 	IWL_UCODE_TLV_CAPA_CDB_SUPPORT			= (__force iwl_ucode_tlv_capa_t)40,
437 	IWL_UCODE_TLV_CAPA_D0I3_END_FIRST		= (__force iwl_ucode_tlv_capa_t)41,
438 	IWL_UCODE_TLV_CAPA_TLC_OFFLOAD                  = (__force iwl_ucode_tlv_capa_t)43,
439 	IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA                = (__force iwl_ucode_tlv_capa_t)44,
440 	IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2		= (__force iwl_ucode_tlv_capa_t)45,
441 	IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD		= (__force iwl_ucode_tlv_capa_t)46,
442 	IWL_UCODE_TLV_CAPA_FTM_CALIBRATED		= (__force iwl_ucode_tlv_capa_t)47,
443 	IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS		= (__force iwl_ucode_tlv_capa_t)48,
444 	IWL_UCODE_TLV_CAPA_CS_MODIFY			= (__force iwl_ucode_tlv_capa_t)49,
445 	IWL_UCODE_TLV_CAPA_SET_LTR_GEN2			= (__force iwl_ucode_tlv_capa_t)50,
446 	IWL_UCODE_TLV_CAPA_SET_PPAG			= (__force iwl_ucode_tlv_capa_t)52,
447 	IWL_UCODE_TLV_CAPA_TAS_CFG			= (__force iwl_ucode_tlv_capa_t)53,
448 	IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD		= (__force iwl_ucode_tlv_capa_t)54,
449 	IWL_UCODE_TLV_CAPA_PROTECTED_TWT		= (__force iwl_ucode_tlv_capa_t)56,
450 	IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE		= (__force iwl_ucode_tlv_capa_t)57,
451 	IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN		= (__force iwl_ucode_tlv_capa_t)58,
452 	IWL_UCODE_TLV_CAPA_HIDDEN_6GHZ_SCAN		= (__force iwl_ucode_tlv_capa_t)59,
453 	IWL_UCODE_TLV_CAPA_BROADCAST_TWT		= (__force iwl_ucode_tlv_capa_t)60,
454 	IWL_UCODE_TLV_CAPA_COEX_HIGH_PRIO		= (__force iwl_ucode_tlv_capa_t)61,
455 	IWL_UCODE_TLV_CAPA_RFIM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)62,
456 	IWL_UCODE_TLV_CAPA_BAID_ML_SUPPORT		= (__force iwl_ucode_tlv_capa_t)63,
457 
458 	/* set 2 */
459 	IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE		= (__force iwl_ucode_tlv_capa_t)64,
460 	IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS		= (__force iwl_ucode_tlv_capa_t)65,
461 	IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT		= (__force iwl_ucode_tlv_capa_t)67,
462 	IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT	= (__force iwl_ucode_tlv_capa_t)68,
463 	IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD		= (__force iwl_ucode_tlv_capa_t)70,
464 	IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION		= (__force iwl_ucode_tlv_capa_t)71,
465 	IWL_UCODE_TLV_CAPA_BEACON_STORING		= (__force iwl_ucode_tlv_capa_t)72,
466 	IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3		= (__force iwl_ucode_tlv_capa_t)73,
467 	IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW		= (__force iwl_ucode_tlv_capa_t)74,
468 	IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT	= (__force iwl_ucode_tlv_capa_t)75,
469 	IWL_UCODE_TLV_CAPA_CTDP_SUPPORT			= (__force iwl_ucode_tlv_capa_t)76,
470 	IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED		= (__force iwl_ucode_tlv_capa_t)77,
471 	IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG	= (__force iwl_ucode_tlv_capa_t)80,
472 	IWL_UCODE_TLV_CAPA_LQM_SUPPORT			= (__force iwl_ucode_tlv_capa_t)81,
473 	IWL_UCODE_TLV_CAPA_TX_POWER_ACK			= (__force iwl_ucode_tlv_capa_t)84,
474 	IWL_UCODE_TLV_CAPA_D3_DEBUG			= (__force iwl_ucode_tlv_capa_t)87,
475 	IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT		= (__force iwl_ucode_tlv_capa_t)88,
476 	IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT	= (__force iwl_ucode_tlv_capa_t)89,
477 	IWL_UCODE_TLV_CAPA_CSI_REPORTING		= (__force iwl_ucode_tlv_capa_t)90,
478 	IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP	= (__force iwl_ucode_tlv_capa_t)92,
479 	IWL_UCODE_TLV_CAPA_DBG_BUF_ALLOC_CMD_SUPP	= (__force iwl_ucode_tlv_capa_t)93,
480 
481 	/* set 3 */
482 	IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_UNII4_US_CA	= (__force iwl_ucode_tlv_capa_t)96,
483 
484 	/*
485 	 * @IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT: supports PSC channels
486 	 */
487 	IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT		= (__force iwl_ucode_tlv_capa_t)98,
488 
489 	IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT		= (__force iwl_ucode_tlv_capa_t)100,
490 	IWL_UCODE_TLV_CAPA_SPP_AMSDU_SUPPORT		= (__force iwl_ucode_tlv_capa_t)103,
491 	IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT		= (__force iwl_ucode_tlv_capa_t)104,
492 	IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)105,
493 	IWL_UCODE_TLV_CAPA_SYNCED_TIME			= (__force iwl_ucode_tlv_capa_t)106,
494 	IWL_UCODE_TLV_CAPA_TIME_SYNC_BOTH_FTM_TM        = (__force iwl_ucode_tlv_capa_t)108,
495 	IWL_UCODE_TLV_CAPA_BIGTK_TX_SUPPORT		= (__force iwl_ucode_tlv_capa_t)109,
496 	IWL_UCODE_TLV_CAPA_MLD_API_SUPPORT		= (__force iwl_ucode_tlv_capa_t)110,
497 	IWL_UCODE_TLV_CAPA_SCAN_DONT_TOGGLE_ANT         = (__force iwl_ucode_tlv_capa_t)111,
498 	IWL_UCODE_TLV_CAPA_PPAG_CHINA_BIOS_SUPPORT	= (__force iwl_ucode_tlv_capa_t)112,
499 	IWL_UCODE_TLV_CAPA_OFFLOAD_BTM_SUPPORT		= (__force iwl_ucode_tlv_capa_t)113,
500 	IWL_UCODE_TLV_CAPA_STA_EXP_MFP_SUPPORT		= (__force iwl_ucode_tlv_capa_t)114,
501 	IWL_UCODE_TLV_CAPA_SNIFF_VALIDATE_SUPPORT	= (__force iwl_ucode_tlv_capa_t)116,
502 	IWL_UCODE_TLV_CAPA_CHINA_22_REG_SUPPORT		= (__force iwl_ucode_tlv_capa_t)117,
503 	IWL_UCODE_TLV_CAPA_SECURE_LTF_SUPPORT		= (__force iwl_ucode_tlv_capa_t)121,
504 	IWL_UCODE_TLV_CAPA_MONITOR_PASSIVE_CHANS	= (__force iwl_ucode_tlv_capa_t)122,
505 	IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_5G9_FOR_CA	= (__force iwl_ucode_tlv_capa_t)123,
506 	IWL_UCODE_TLV_CAPA_UHB_CANADA_TAS_SUPPORT	= (__force iwl_ucode_tlv_capa_t)124,
507 	NUM_IWL_UCODE_TLV_CAPA
508 /*
509  * This construction make both sparse (which cannot increment the previous
510  * member due to its bitwise type) and kernel-doc (which doesn't understand
511  * the ifdef/else properly) work.
512  */
513 #ifdef __CHECKER__
514 #define __CHECKER_NUM_IWL_UCODE_TLV_CAPA	128
515 		= (__force iwl_ucode_tlv_capa_t)__CHECKER_NUM_IWL_UCODE_TLV_CAPA,
516 #define NUM_IWL_UCODE_TLV_CAPA __CHECKER_NUM_IWL_UCODE_TLV_CAPA
517 #endif
518 };
519 
520 /* The default calibrate table size if not specified by firmware file */
521 #define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE	18
522 #define IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE		19
523 #define IWL_MAX_PHY_CALIBRATE_TBL_SIZE			253
524 
525 /* The default max probe length if not specified by the firmware file */
526 #define IWL_DEFAULT_MAX_PROBE_LENGTH	200
527 
528 /*
529  * For 16.0 uCode and above, there is no differentiation between sections,
530  * just an offset to the HW address.
531  */
532 #define CPU1_CPU2_SEPARATOR_SECTION	0xFFFFCCCC
533 #define PAGING_SEPARATOR_SECTION	0xAAAABBBB
534 
535 /* uCode version contains 4 values: Major/Minor/API/Serial */
536 #define IWL_UCODE_MAJOR(ver)	(((ver) & 0xFF000000) >> 24)
537 #define IWL_UCODE_MINOR(ver)	(((ver) & 0x00FF0000) >> 16)
538 #define IWL_UCODE_API(ver)	(((ver) & 0x0000FF00) >> 8)
539 #define IWL_UCODE_SERIAL(ver)	((ver) & 0x000000FF)
540 
541 /**
542  * struct iwl_tlv_calib_ctrl - Calibration control struct.
543  * Sent as part of the phy configuration command.
544  * @flow_trigger: bitmap for which calibrations to perform according to
545  *		flow triggers.
546  * @event_trigger: bitmap for which calibrations to perform according to
547  *		event triggers.
548  */
549 struct iwl_tlv_calib_ctrl {
550 	__le32 flow_trigger;
551 	__le32 event_trigger;
552 } __packed;
553 
554 enum iwl_fw_phy_cfg {
555 	FW_PHY_CFG_RADIO_TYPE_POS = 0,
556 	FW_PHY_CFG_RADIO_TYPE = 0x3 << FW_PHY_CFG_RADIO_TYPE_POS,
557 	FW_PHY_CFG_RADIO_STEP_POS = 2,
558 	FW_PHY_CFG_RADIO_STEP = 0x3 << FW_PHY_CFG_RADIO_STEP_POS,
559 	FW_PHY_CFG_RADIO_DASH_POS = 4,
560 	FW_PHY_CFG_RADIO_DASH = 0x3 << FW_PHY_CFG_RADIO_DASH_POS,
561 	FW_PHY_CFG_TX_CHAIN_POS = 16,
562 	FW_PHY_CFG_TX_CHAIN = 0xf << FW_PHY_CFG_TX_CHAIN_POS,
563 	FW_PHY_CFG_RX_CHAIN_POS = 20,
564 	FW_PHY_CFG_RX_CHAIN = 0xf << FW_PHY_CFG_RX_CHAIN_POS,
565 	FW_PHY_CFG_CHAIN_SAD_POS = 23,
566 	FW_PHY_CFG_CHAIN_SAD_ENABLED = 0x1 << FW_PHY_CFG_CHAIN_SAD_POS,
567 	FW_PHY_CFG_CHAIN_SAD_ANT_A = 0x2 << FW_PHY_CFG_CHAIN_SAD_POS,
568 	FW_PHY_CFG_CHAIN_SAD_ANT_B = 0x4 << FW_PHY_CFG_CHAIN_SAD_POS,
569 	FW_PHY_CFG_SHARED_CLK = BIT(31),
570 };
571 
572 enum iwl_fw_dbg_reg_operator {
573 	CSR_ASSIGN,
574 	CSR_SETBIT,
575 	CSR_CLEARBIT,
576 
577 	PRPH_ASSIGN,
578 	PRPH_SETBIT,
579 	PRPH_CLEARBIT,
580 
581 	INDIRECT_ASSIGN,
582 	INDIRECT_SETBIT,
583 	INDIRECT_CLEARBIT,
584 
585 	PRPH_BLOCKBIT,
586 };
587 
588 /**
589  * struct iwl_fw_dbg_reg_op - an operation on a register
590  *
591  * @op: &enum iwl_fw_dbg_reg_operator
592  * @reserved: reserved
593  * @addr: offset of the register
594  * @val: value
595  */
596 struct iwl_fw_dbg_reg_op {
597 	u8 op;
598 	u8 reserved[3];
599 	__le32 addr;
600 	__le32 val;
601 } __packed;
602 
603 /**
604  * enum iwl_fw_dbg_monitor_mode - available monitor recording modes
605  *
606  * @SMEM_MODE: monitor stores the data in SMEM
607  * @EXTERNAL_MODE: monitor stores the data in allocated DRAM
608  * @MARBH_MODE: monitor stores the data in MARBH buffer
609  * @MIPI_MODE: monitor outputs the data through the MIPI interface
610  */
611 enum iwl_fw_dbg_monitor_mode {
612 	SMEM_MODE = 0,
613 	EXTERNAL_MODE = 1,
614 	MARBH_MODE = 2,
615 	MIPI_MODE = 3,
616 };
617 
618 /**
619  * struct iwl_fw_dbg_mem_seg_tlv - configures the debug data memory segments
620  *
621  * @data_type: the memory segment type to record
622  * @ofs: the memory segment offset
623  * @len: the memory segment length, in bytes
624  *
625  * This parses IWL_UCODE_TLV_FW_MEM_SEG
626  */
627 struct iwl_fw_dbg_mem_seg_tlv {
628 	__le32 data_type;
629 	__le32 ofs;
630 	__le32 len;
631 } __packed;
632 
633 /**
634  * struct iwl_fw_dbg_dest_tlv_v1 - configures the destination of the debug data
635  *
636  * @version: version of the TLV - currently 0
637  * @monitor_mode: &enum iwl_fw_dbg_monitor_mode
638  * @size_power: buffer size will be 2^(size_power + 11)
639  * @reserved: reserved
640  * @base_reg: addr of the base addr register (PRPH)
641  * @end_reg:  addr of the end addr register (PRPH)
642  * @write_ptr_reg: the addr of the reg of the write pointer
643  * @wrap_count: the addr of the reg of the wrap_count
644  * @base_shift: shift right of the base addr reg
645  * @end_shift: shift right of the end addr reg
646  * @reg_ops: array of registers operations
647  *
648  * This parses IWL_UCODE_TLV_FW_DBG_DEST
649  */
650 struct iwl_fw_dbg_dest_tlv_v1 {
651 	u8 version;
652 	u8 monitor_mode;
653 	u8 size_power;
654 	u8 reserved;
655 	__le32 base_reg;
656 	__le32 end_reg;
657 	__le32 write_ptr_reg;
658 	__le32 wrap_count;
659 	u8 base_shift;
660 	u8 end_shift;
661 	struct iwl_fw_dbg_reg_op reg_ops[];
662 } __packed;
663 
664 /* Mask of the register for defining the LDBG MAC2SMEM buffer SMEM size */
665 #define IWL_LDBG_M2S_BUF_SIZE_MSK	0x0fff0000
666 /* Mask of the register for defining the LDBG MAC2SMEM SMEM base address */
667 #define IWL_LDBG_M2S_BUF_BA_MSK		0x00000fff
668 /* The smem buffer chunks are in units of 256 bits */
669 #define IWL_M2S_UNIT_SIZE			0x100
670 
671 struct iwl_fw_dbg_dest_tlv {
672 	u8 version;
673 	u8 monitor_mode;
674 	u8 size_power;
675 	u8 reserved;
676 	__le32 cfg_reg;
677 	__le32 write_ptr_reg;
678 	__le32 wrap_count;
679 	u8 base_shift;
680 	u8 size_shift;
681 	struct iwl_fw_dbg_reg_op reg_ops[];
682 } __packed;
683 
684 struct iwl_fw_dbg_conf_hcmd {
685 	u8 id;
686 	u8 reserved;
687 	__le16 len;
688 	u8 data[];
689 } __packed;
690 
691 /**
692  * enum iwl_fw_dbg_trigger_mode - triggers functionalities
693  *
694  * @IWL_FW_DBG_TRIGGER_START: when trigger occurs re-conf the dbg mechanism
695  * @IWL_FW_DBG_TRIGGER_STOP: when trigger occurs pull the dbg data
696  * @IWL_FW_DBG_TRIGGER_MONITOR_ONLY: when trigger occurs trigger is set to
697  *	collect only monitor data
698  */
699 enum iwl_fw_dbg_trigger_mode {
700 	IWL_FW_DBG_TRIGGER_START = BIT(0),
701 	IWL_FW_DBG_TRIGGER_STOP = BIT(1),
702 	IWL_FW_DBG_TRIGGER_MONITOR_ONLY = BIT(2),
703 };
704 
705 /**
706  * enum iwl_fw_dbg_trigger_flags - the flags supported by wrt triggers
707  * @IWL_FW_DBG_FORCE_RESTART: force a firmware restart
708  */
709 enum iwl_fw_dbg_trigger_flags {
710 	IWL_FW_DBG_FORCE_RESTART = BIT(0),
711 };
712 
713 /**
714  * enum iwl_fw_dbg_trigger_vif_type - define the VIF type for a trigger
715  * @IWL_FW_DBG_CONF_VIF_ANY: any vif type
716  * @IWL_FW_DBG_CONF_VIF_IBSS: IBSS mode
717  * @IWL_FW_DBG_CONF_VIF_STATION: BSS mode
718  * @IWL_FW_DBG_CONF_VIF_AP: AP mode
719  * @IWL_FW_DBG_CONF_VIF_P2P_CLIENT: P2P Client mode
720  * @IWL_FW_DBG_CONF_VIF_P2P_GO: P2P GO mode
721  * @IWL_FW_DBG_CONF_VIF_P2P_DEVICE: P2P device
722  */
723 enum iwl_fw_dbg_trigger_vif_type {
724 	IWL_FW_DBG_CONF_VIF_ANY = NL80211_IFTYPE_UNSPECIFIED,
725 	IWL_FW_DBG_CONF_VIF_IBSS = NL80211_IFTYPE_ADHOC,
726 	IWL_FW_DBG_CONF_VIF_STATION = NL80211_IFTYPE_STATION,
727 	IWL_FW_DBG_CONF_VIF_AP = NL80211_IFTYPE_AP,
728 	IWL_FW_DBG_CONF_VIF_P2P_CLIENT = NL80211_IFTYPE_P2P_CLIENT,
729 	IWL_FW_DBG_CONF_VIF_P2P_GO = NL80211_IFTYPE_P2P_GO,
730 	IWL_FW_DBG_CONF_VIF_P2P_DEVICE = NL80211_IFTYPE_P2P_DEVICE,
731 };
732 
733 /**
734  * struct iwl_fw_dbg_trigger_tlv - a TLV that describes the trigger
735  * @id: &enum iwl_fw_dbg_trigger
736  * @vif_type: &enum iwl_fw_dbg_trigger_vif_type
737  * @stop_conf_ids: bitmap of configurations this trigger relates to.
738  *	if the mode is %IWL_FW_DBG_TRIGGER_STOP, then if the bit corresponding
739  *	to the currently running configuration is set, the data should be
740  *	collected.
741  * @stop_delay: how many milliseconds to wait before collecting the data
742  *	after the STOP trigger fires.
743  * @mode: &enum iwl_fw_dbg_trigger_mode - can be stop / start of both
744  * @start_conf_id: if mode is %IWL_FW_DBG_TRIGGER_START, this defines what
745  *	configuration should be applied when the triggers kicks in.
746  * @occurrences: number of occurrences. 0 means the trigger will never fire.
747  * @trig_dis_ms: the time, in milliseconds, after an occurrence of this
748  *	trigger in which another occurrence should be ignored.
749  * @flags: &enum iwl_fw_dbg_trigger_flags
750  * @reserved: reserved (for alignment)
751  * @data: trigger data
752  */
753 struct iwl_fw_dbg_trigger_tlv {
754 	__le32 id;
755 	__le32 vif_type;
756 	__le32 stop_conf_ids;
757 	__le32 stop_delay;
758 	u8 mode;
759 	u8 start_conf_id;
760 	__le16 occurrences;
761 	__le16 trig_dis_ms;
762 	u8 flags;
763 	u8 reserved[5];
764 
765 	u8 data[];
766 } __packed;
767 
768 #define FW_DBG_START_FROM_ALIVE	0
769 #define FW_DBG_CONF_MAX		32
770 #define FW_DBG_INVALID		0xff
771 
772 /**
773  * struct iwl_fw_dbg_trigger_missed_bcon - configures trigger for missed beacons
774  * @stop_consec_missed_bcon: stop recording if threshold is crossed.
775  * @stop_consec_missed_bcon_since_rx: stop recording if threshold is crossed.
776  * @start_consec_missed_bcon: start recording if threshold is crossed.
777  * @start_consec_missed_bcon_since_rx: start recording if threshold is crossed.
778  * @reserved1: reserved
779  * @reserved2: reserved
780  */
781 struct iwl_fw_dbg_trigger_missed_bcon {
782 	__le32 stop_consec_missed_bcon;
783 	__le32 stop_consec_missed_bcon_since_rx;
784 	__le32 reserved2[2];
785 	__le32 start_consec_missed_bcon;
786 	__le32 start_consec_missed_bcon_since_rx;
787 	__le32 reserved1[2];
788 } __packed;
789 
790 /**
791  * struct iwl_fw_dbg_trigger_cmd - configures trigger for messages from FW.
792  * @cmds: the list of commands to trigger the collection on
793  */
794 struct iwl_fw_dbg_trigger_cmd {
795 	struct cmd {
796 		u8 cmd_id;
797 		u8 group_id;
798 	} __packed cmds[16];
799 } __packed;
800 
801 /**
802  * struct iwl_fw_dbg_trigger_stats - configures trigger for statistics
803  * @stop_offset: the offset of the value to be monitored
804  * @stop_threshold: the threshold above which to collect
805  * @start_offset: the offset of the value to be monitored
806  * @start_threshold: the threshold above which to start recording
807  */
808 struct iwl_fw_dbg_trigger_stats {
809 	__le32 stop_offset;
810 	__le32 stop_threshold;
811 	__le32 start_offset;
812 	__le32 start_threshold;
813 } __packed;
814 
815 /**
816  * struct iwl_fw_dbg_trigger_low_rssi - trigger for low beacon RSSI
817  * @rssi: RSSI value to trigger at
818  */
819 struct iwl_fw_dbg_trigger_low_rssi {
820 	__le32 rssi;
821 } __packed;
822 
823 /**
824  * struct iwl_fw_dbg_trigger_mlme - configures trigger for mlme events
825  * @stop_auth_denied: number of denied authentication to collect
826  * @stop_auth_timeout: number of authentication timeout to collect
827  * @stop_rx_deauth: number of Rx deauth before to collect
828  * @stop_tx_deauth: number of Tx deauth before to collect
829  * @stop_assoc_denied: number of denied association to collect
830  * @stop_assoc_timeout: number of association timeout to collect
831  * @stop_connection_loss: number of connection loss to collect
832  * @start_auth_denied: number of denied authentication to start recording
833  * @start_auth_timeout: number of authentication timeout to start recording
834  * @start_rx_deauth: number of Rx deauth to start recording
835  * @start_tx_deauth: number of Tx deauth to start recording
836  * @start_assoc_denied: number of denied association to start recording
837  * @start_assoc_timeout: number of association timeout to start recording
838  * @start_connection_loss: number of connection loss to start recording
839  */
840 struct iwl_fw_dbg_trigger_mlme {
841 	u8 stop_auth_denied;
842 	u8 stop_auth_timeout;
843 	u8 stop_rx_deauth;
844 	u8 stop_tx_deauth;
845 
846 	u8 stop_assoc_denied;
847 	u8 stop_assoc_timeout;
848 	u8 stop_connection_loss;
849 	u8 reserved;
850 
851 	u8 start_auth_denied;
852 	u8 start_auth_timeout;
853 	u8 start_rx_deauth;
854 	u8 start_tx_deauth;
855 
856 	u8 start_assoc_denied;
857 	u8 start_assoc_timeout;
858 	u8 start_connection_loss;
859 	u8 reserved2;
860 } __packed;
861 
862 /**
863  * struct iwl_fw_dbg_trigger_txq_timer - configures the Tx queue's timer
864  * @command_queue: timeout for the command queue in ms
865  * @bss: timeout for the queues of a BSS (except for TDLS queues) in ms
866  * @softap: timeout for the queues of a softAP in ms
867  * @p2p_go: timeout for the queues of a P2P GO in ms
868  * @p2p_client: timeout for the queues of a P2P client in ms
869  * @p2p_device: timeout for the queues of a P2P device in ms
870  * @ibss: timeout for the queues of an IBSS in ms
871  * @tdls: timeout for the queues of a TDLS station in ms
872  */
873 struct iwl_fw_dbg_trigger_txq_timer {
874 	__le32 command_queue;
875 	__le32 bss;
876 	__le32 softap;
877 	__le32 p2p_go;
878 	__le32 p2p_client;
879 	__le32 p2p_device;
880 	__le32 ibss;
881 	__le32 tdls;
882 	__le32 reserved[4];
883 } __packed;
884 
885 /**
886  * struct iwl_fw_dbg_trigger_time_event - configures a time event trigger
887  * time_Events: a list of tuples <id, action_bitmap>. The driver will issue a
888  *	trigger each time a time event notification that relates to time event
889  *	id with one of the actions in the bitmap is received and
890  *	BIT(notif->status) is set in status_bitmap.
891  *
892  */
893 struct iwl_fw_dbg_trigger_time_event {
894 	struct {
895 		__le32 id;
896 		__le32 action_bitmap;
897 		__le32 status_bitmap;
898 	} __packed time_events[16];
899 } __packed;
900 
901 /**
902  * struct iwl_fw_dbg_trigger_ba - configures BlockAck related trigger
903  * rx_ba_start: tid bitmap to configure on what tid the trigger should occur
904  *	when an Rx BlockAck session is started.
905  * rx_ba_stop: tid bitmap to configure on what tid the trigger should occur
906  *	when an Rx BlockAck session is stopped.
907  * tx_ba_start: tid bitmap to configure on what tid the trigger should occur
908  *	when a Tx BlockAck session is started.
909  * tx_ba_stop: tid bitmap to configure on what tid the trigger should occur
910  *	when a Tx BlockAck session is stopped.
911  * rx_bar: tid bitmap to configure on what tid the trigger should occur
912  *	when a BAR is received (for a Tx BlockAck session).
913  * tx_bar: tid bitmap to configure on what tid the trigger should occur
914  *	when a BAR is send (for an Rx BlocAck session).
915  * frame_timeout: tid bitmap to configure on what tid the trigger should occur
916  *	when a frame times out in the reordering buffer.
917  */
918 struct iwl_fw_dbg_trigger_ba {
919 	__le16 rx_ba_start;
920 	__le16 rx_ba_stop;
921 	__le16 tx_ba_start;
922 	__le16 tx_ba_stop;
923 	__le16 rx_bar;
924 	__le16 tx_bar;
925 	__le16 frame_timeout;
926 } __packed;
927 
928 /**
929  * struct iwl_fw_dbg_trigger_tdls - configures trigger for TDLS events.
930  * @action_bitmap: the TDLS action to trigger the collection upon
931  * @peer_mode: trigger on specific peer or all
932  * @peer: the TDLS peer to trigger the collection on
933  */
934 struct iwl_fw_dbg_trigger_tdls {
935 	u8 action_bitmap;
936 	u8 peer_mode;
937 	u8 peer[ETH_ALEN];
938 	u8 reserved[4];
939 } __packed;
940 
941 /**
942  * struct iwl_fw_dbg_trigger_tx_status - configures trigger for tx response
943  *  status.
944  * @statuses: the list of statuses to trigger the collection on
945  */
946 struct iwl_fw_dbg_trigger_tx_status {
947 	struct tx_status {
948 		u8 status;
949 		u8 reserved[3];
950 	} __packed statuses[16];
951 	__le32 reserved[2];
952 } __packed;
953 
954 /**
955  * struct iwl_fw_dbg_conf_tlv - a TLV that describes a debug configuration.
956  * @id: conf id
957  * @usniffer: should the uSniffer image be used
958  * @num_of_hcmds: how many HCMDs to send are present here
959  * @hcmd: a variable length host command to be sent to apply the configuration.
960  *	If there is more than one HCMD to send, they will appear one after the
961  *	other and be sent in the order that they appear in.
962  * This parses IWL_UCODE_TLV_FW_DBG_CONF. The user can add up-to
963  * %FW_DBG_CONF_MAX configuration per run.
964  */
965 struct iwl_fw_dbg_conf_tlv {
966 	u8 id;
967 	u8 usniffer;
968 	u8 reserved;
969 	u8 num_of_hcmds;
970 	struct iwl_fw_dbg_conf_hcmd hcmd;
971 } __packed;
972 
973 #define IWL_FW_CMD_VER_UNKNOWN 99
974 
975 /**
976  * struct iwl_fw_cmd_version - firmware command version entry
977  * @cmd: command ID
978  * @group: group ID
979  * @cmd_ver: command version
980  * @notif_ver: notification version
981  */
982 struct iwl_fw_cmd_version {
983 	u8 cmd;
984 	u8 group;
985 	u8 cmd_ver;
986 	u8 notif_ver;
987 } __packed;
988 
989 struct iwl_fw_tcm_error_addr {
990 	__le32 addr;
991 }; /* FW_TLV_TCM_ERROR_INFO_ADDRS_S */
992 
993 struct iwl_fw_dump_exclude {
994 	__le32 addr, size;
995 };
996 
_iwl_tlv_array_len(const struct iwl_ucode_tlv * tlv,size_t fixed_size,size_t var_size)997 static inline size_t _iwl_tlv_array_len(const struct iwl_ucode_tlv *tlv,
998 					size_t fixed_size, size_t var_size)
999 {
1000 	size_t var_len = le32_to_cpu(tlv->length) - fixed_size;
1001 
1002 	if (WARN_ON(var_len % var_size))
1003 		return 0;
1004 
1005 	return var_len / var_size;
1006 }
1007 
1008 #define iwl_tlv_array_len(_tlv_ptr, _struct_ptr, _memb)			\
1009 	_iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)),		\
1010 			   sizeof(_struct_ptr->_memb[0]))
1011 
1012 #define iwl_tlv_array_len_with_size(_tlv_ptr, _struct_ptr, _size)	\
1013 	_iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)), _size)
1014 #endif  /* __iwl_fw_file_h__ */
1015