1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Support for Intel Camera Imaging ISP subsystem.
4  * Copyright (c) 2015, Intel Corporation.
5  */
6 
7 #ifndef __IBUF_CTRL_GLOBAL_H_INCLUDED__
8 #define __IBUF_CTRL_GLOBAL_H_INCLUDED__
9 
10 #include <type_support.h>
11 
12 #include <ibuf_cntrl_defs.h>	/* _IBUF_CNTRL_RECALC_WORDS_STATUS,
13 				 * _IBUF_CNTRL_ARBITERS_STATUS,
14 				 * _IBUF_CNTRL_PROC_REG_ALIGN,
15 				 * etc.
16 				 */
17 
18 /* Definition of contents of main controller state register is lacking
19  * in ibuf_cntrl_defs.h, so define these here:
20  */
21 #define _IBUF_CNTRL_MAIN_CNTRL_FSM_MASK			0xf
22 #define _IBUF_CNTRL_MAIN_CNTRL_FSM_NEXT_COMMAND_CHECK	0x9
23 #define _IBUF_CNTRL_MAIN_CNTRL_MEM_INP_BUF_ALLOC	BIT(8)
24 #define _IBUF_CNTRL_DMA_SYNC_WAIT_FOR_SYNC		1
25 #define _IBUF_CNTRL_DMA_SYNC_FSM_WAIT_FOR_ACK		(0x3 << 1)
26 
27 struct	isp2401_ib_buffer_s {
28 	u32	start_addr;	/* start address of the buffer in the
29 					 * "input-buffer hardware block"
30 					 */
31 
32 	u32	stride;		/* stride per buffer line (in bytes) */
33 	u32	lines;		/* lines in the buffer */
34 };
35 typedef struct isp2401_ib_buffer_s	isp2401_ib_buffer_t;
36 
37 typedef struct ibuf_ctrl_cfg_s ibuf_ctrl_cfg_t;
38 struct ibuf_ctrl_cfg_s {
39 	bool online;
40 
41 	struct {
42 		/* DMA configuration */
43 		u32 channel;
44 		u32 cmd; /* must be _DMA_V2_MOVE_A2B_NO_SYNC_CHK_COMMAND */
45 
46 		/* DMA reconfiguration */
47 		u32 shift_returned_items;
48 		u32 elems_per_word_in_ibuf;
49 		u32 elems_per_word_in_dest;
50 	} dma_cfg;
51 
52 	isp2401_ib_buffer_t ib_buffer;
53 
54 	struct {
55 		u32 stride;
56 		u32 start_addr;
57 		u32 lines;
58 	} dest_buf_cfg;
59 
60 	u32 items_per_store;
61 	u32 stores_per_frame;
62 
63 	struct {
64 		u32 sync_cmd;	/* must be _STREAM2MMIO_CMD_TOKEN_SYNC_FRAME */
65 		u32 store_cmd;	/* must be _STREAM2MMIO_CMD_TOKEN_STORE_PACKETS */
66 	} stream2mmio_cfg;
67 };
68 
69 extern const u32 N_IBUF_CTRL_PROCS[N_IBUF_CTRL_ID];
70 
71 #endif /* __IBUF_CTRL_GLOBAL_H_INCLUDED__ */
72