xref: /aosp_15_r20/external/coreboot/src/southbridge/intel/i82371eb/chip.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #ifndef SOUTHBRIDGE_INTEL_I82371EB_CHIP_H
4 #define SOUTHBRIDGE_INTEL_I82371EB_CHIP_H
5 
6 #include <device/device.h>
7 #include <types.h>
8 
9 struct southbridge_intel_i82371eb_config {
10 	bool ide0_enable;
11 	bool ide0_drive0_udma33_enable;
12 	bool ide0_drive1_udma33_enable;
13 	bool ide1_enable;
14 	bool ide1_drive0_udma33_enable;
15 	bool ide1_drive1_udma33_enable;
16 	bool ide_legacy_enable;
17 	bool usb_enable;
18 	bool gpo22_enable; /* GPO22/GPO23 (1) vs. XDIR#/XOE# (0) */
19 	int gpo22:1;
20 	int gpo23:1;
21 	/* acpi */
22 	u32 gpo; /* gpio output default */
23 	u8 lid_polarity;
24 	u8 thrm_polarity;
25 };
26 
27 #endif /* SOUTHBRIDGE_INTEL_I82371EB_CHIP_H */
28