Home
last modified time | relevance | path

Searched +defs:val +defs:frac (Results 1 – 25 of 43) sorted by relevance

12

/linux-6.14.4/drivers/clk/spear/
Dclk-frac-synth.c44 struct clk_frac *frac = to_clk_frac(hw); in frac_calc_rate() local
58 struct clk_frac *frac = to_clk_frac(hw); in clk_frac_round_rate() local
68 struct clk_frac *frac = to_clk_frac(hw); in clk_frac_recalc_rate() local
70 unsigned int div = 1, val; in clk_frac_recalc_rate() local
95 struct clk_frac *frac = to_clk_frac(hw); in clk_frac_set_rate() local
97 unsigned long flags = 0, val; in clk_frac_set_rate() local
127 struct clk_frac *frac; in clk_register_frac() local
/linux-6.14.4/drivers/clk/at91/
Dclk-sam9x60-pll.c40 u32 frac; member
75 struct sam9x60_frac *frac = to_sam9x60_frac(core); in sam9x60_frac_pll_recalc_rate() local
89 struct sam9x60_frac *frac = to_sam9x60_frac(core); in sam9x60_frac_pll_set() local
91 unsigned int val, cfrac, cmul; in sam9x60_frac_pll_set() local
195 struct sam9x60_frac *frac = to_sam9x60_frac(core); in sam9x60_frac_pll_compute_mul_frac() local
253 struct sam9x60_frac *frac = to_sam9x60_frac(core); in sam9x60_frac_pll_set_rate_chg() local
256 unsigned int val, cfrac, cmul; in sam9x60_frac_pll_set_rate_chg() local
303 struct sam9x60_frac *frac = to_sam9x60_frac(core); in sam9x60_frac_pll_save_context() local
313 struct sam9x60_frac *frac = to_sam9x60_frac(core); in sam9x60_frac_pll_restore_context() local
366 unsigned int val, cdiv; in sam9x60_div_pll_set() local
[all …]
/linux-6.14.4/drivers/clk/imx/
Dclk-pfdv2.c45 u32 val; in clk_pfdv2_wait() local
55 u32 val; in clk_pfdv2_enable() local
70 u32 val; in clk_pfdv2_disable() local
84 u8 frac; in clk_pfdv2_recalc_rate() local
112 u8 frac; in clk_pfdv2_determine_rate() local
158 u32 val; in clk_pfdv2_set_rate() local
159 u8 frac; in clk_pfdv2_set_rate() local
/linux-6.14.4/drivers/clk/mxs/
Dclk-frac.c36 struct clk_frac *frac = to_clk_frac(hw); in clk_frac_recalc_rate() local
50 struct clk_frac *frac = to_clk_frac(hw); in clk_frac_round_rate() local
76 struct clk_frac *frac = to_clk_frac(hw); in clk_frac_set_rate() local
78 u32 div, val; in clk_frac_set_rate() local
113 struct clk_frac *frac; in mxs_clk_frac() local
Dclk-ref.c52 u8 frac = (readl_relaxed(ref->reg) >> (ref->idx * 8)) & 0x3f; in clk_ref_recalc_rate() local
65 u8 frac; in clk_ref_round_rate() local
84 u32 val; in clk_ref_set_rate() local
85 u8 frac, shift = ref->idx * 8; in clk_ref_set_rate() local
/linux-6.14.4/drivers/gpu/drm/meson/
Dmeson_vclk.c242 unsigned int val; in meson_venci_cvbs_clock_config() local
491 unsigned int frac, unsigned int od1, in meson_hdmi_pll_set_params()
494 unsigned int val; in meson_hdmi_pll_set_params() local
643 unsigned int frac; in meson_hdmi_pll_get_frac() local
670 unsigned int frac) in meson_hdmi_pll_validate_params()
699 unsigned int *frac, in meson_hdmi_pll_find_params()
723 unsigned int od, m, frac; in meson_vclk_dmt_supported_freq() local
746 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
814 unsigned int m = 0, frac = 0; in meson_vclk_set() local
/linux-6.14.4/drivers/clk/meson/
Dclk-pll.c56 unsigned int frac, in __pll_params_to_rate()
77 unsigned int m, n, frac; in meson_clk_pll_recalc_rate() local
106 u64 val = (u64)rate * n; in __pll_params_with_frac() local
159 u64 val = (u64)rate * n; in meson_clk_get_pll_range_m() local
251 unsigned int m, n, frac; in meson_clk_pll_determine_rate() local
418 unsigned int enabled, m, n, frac = 0; in meson_clk_pll_set_rate() local
/linux-6.14.4/drivers/net/ethernet/marvell/mvpp2/
Dmvpp2_tai.c68 u32 val; in mvpp2_tai_modify() local
75 static void mvpp2_tai_write(u32 val, void __iomem *reg) in mvpp2_tai_write()
104 static void mvpp2_tai_write_tlv(const struct timespec64 *ts, u32 frac, in mvpp2_tai_write_tlv()
154 u64 val = tai->period * abs_scaled_ppm >> 4; in mvpp22_calc_frac_ppm() local
170 s32 frac; in mvpp22_tai_adjfine() local
171 u64 val; in mvpp22_tai_adjfine() local
314 u32 nano, frac; in mvpp22_tai_set_step() local
/linux-6.14.4/drivers/clk/x86/
Dclk-cgu-pll.c26 unsigned int div, unsigned int frac, unsigned int frac_div) in lgm_pll_calc_rate()
43 unsigned int div, mult, frac; in lgm_pll_recalc_rate() local
68 u32 val; in lgm_pll_enable() local
/linux-6.14.4/drivers/clk/starfive/
Dclk-starfive-jh7110-pll.c82 u32 frac; /* frac value should be decimals multiplied by 2^24 */ member
96 unsigned int frac; member
150 u32 frac; member
282 u32 val; in jh7110_pll_regvals_get() local
303 struct jh7110_pll_regvals val; in jh7110_pll_recalc_rate() local
343 const struct jh7110_pll_preset *val = &info->presets[idx]; in jh7110_pll_determine_rate() local
361 const struct jh7110_pll_preset *val; in jh7110_pll_set_rate() local
398 struct jh7110_pll_regvals val; in jh7110_pll_registers_read() local
/linux-6.14.4/kernel/locking/
Dqspinlock_stat.h70 u64 frac = 0; in lockevent_read() local
120 static inline void __pv_wait(u8 *ptr, u8 val) in __pv_wait()
/linux-6.14.4/drivers/gpu/drm/msm/dsi/phy/
Ddsi_phy_7nm.c119 u32 frac; in dsi_pll_calc_dec_frac() local
174 u64 frac; in dsi_pll_calc_ssc() local
378 static void dsi_pll_cmn_clk_cfg0_write(struct dsi_pll_7nm *pll, u32 val) in dsi_pll_cmn_clk_cfg0_write()
388 u32 val) in dsi_pll_cmn_clk_cfg1_update()
507 u32 frac; in dsi_pll_7nm_vco_recalc_rate() local
590 u32 val; in dsi_7nm_pll_restore_state() local
Ddsi_phy_10nm.c120 u32 frac; in dsi_pll_calc_dec_frac() local
154 u64 frac; in dsi_pll_calc_ssc() local
415 u32 frac; in dsi_pll_10nm_vco_recalc_rate() local
499 u32 val; in dsi_10nm_pll_restore_state() local
/linux-6.14.4/include/math-emu/
Dsingle.h53 unsigned frac : _FP_FRACBITS_S - (_FP_IMPLBIT_S != 0); member
63 #define FP_UNPACK_RAW_S(X,val) _FP_UNPACK_RAW_1(S,X,val) argument
64 #define FP_UNPACK_RAW_SP(X,val) _FP_UNPACK_RAW_1_P(S,X,val) argument
65 #define FP_PACK_RAW_S(val,X) _FP_PACK_RAW_1(S,val,X) argument
66 #define FP_PACK_RAW_SP(val,X) \ argument
72 #define FP_UNPACK_S(X,val) \ argument
78 #define FP_UNPACK_SP(X,val) \ argument
84 #define FP_PACK_S(val,X) \ argument
90 #define FP_PACK_SP(val,X) \ argument
Ddouble.h74 #define FP_UNPACK_RAW_D(X,val) _FP_UNPACK_RAW_2(D,X,val) argument
75 #define FP_UNPACK_RAW_DP(X,val) _FP_UNPACK_RAW_2_P(D,X,val) argument
76 #define FP_PACK_RAW_D(val,X) _FP_PACK_RAW_2(D,val,X) argument
77 #define FP_PACK_RAW_DP(val,X) \ argument
83 #define FP_UNPACK_D(X,val) \ argument
89 #define FP_UNPACK_DP(X,val) \ argument
95 #define FP_PACK_D(val,X) \ argument
101 #define FP_PACK_DP(val,X) \ argument
136 unsigned long frac : _FP_FRACBITS_D - (_FP_IMPLBIT_D != 0); member
146 #define FP_UNPACK_RAW_D(X,val) _FP_UNPACK_RAW_1(D,X,val) argument
[all …]
/linux-6.14.4/drivers/pwm/
Dpwm-sifive.c87 u32 val; in pwm_sifive_update_clock() local
113 u32 duty, val; in pwm_sifive_get_state() local
140 u32 frac; in pwm_sifive_apply() local
230 u32 val; in pwm_sifive_probe() local
/linux-6.14.4/drivers/phy/st/
Dphy-stm32-usbphyc.c133 u16 frac; member
207 unsigned long long fvco, ndiv, frac; in stm32_usbphyc_get_pll_params() local
235 u32 ndiv, frac; in stm32_usbphyc_pll_init() local
468 u32 otpcomp, val; in stm32_usbphyc_phy_tuning() local
/linux-6.14.4/drivers/media/tuners/
Dfc0011.c67 static int fc0011_writereg(struct fc0011_priv *priv, u8 reg, u8 val) in fc0011_writereg()
83 static int fc0011_readreg(struct fc0011_priv *priv, u8 reg, u8 *val) in fc0011_readreg()
171 u32 fvco, xin, frac, xdiv, xdivr; in fc0011_set_params() local
/linux-6.14.4/drivers/hwmon/
Dstts751.c111 static s32 stts751_to_hw(int val) in stts751_to_hw()
150 s32 integer1, integer2, frac; in stts751_update_temp() local
225 int integer, frac; in stts751_read_reg16() local
595 unsigned long val; in interval_store() local
/linux-6.14.4/drivers/iio/dac/
Dadi-axi-dac.c341 int integer, frac, scale; in axi_dac_scale_set() local
384 int integer, frac, phase; in axi_dac_phase_set() local
588 int ret, val; in axi_dac_data_stream_enable() local
641 u32 val, size_t data_size) in __axi_dac_bus_reg_write()
697 u32 val, size_t data_size) in axi_dac_bus_reg_write()
705 static int axi_dac_bus_reg_read(struct iio_backend *back, u32 reg, u32 *val, in axi_dac_bus_reg_read()
897 int val; in axi_dac_probe() local
/linux-6.14.4/drivers/tty/serial/8250/
D8250_pci1xxxx.c145 #define GET_RTS_PIN_STATUS(val) (((val) & TIOCM_RTS) >> 1) argument
146 #define RTS_TOGGLE_STATUS_MASK(val, reg) (GET_MODEM_CTL_RTS_STATUS(reg) \ argument
236 unsigned int baud, unsigned int *frac) in pci1xxxx_get_divisor()
258 unsigned int quot, unsigned int frac) in pci1xxxx_set_divisor()
/linux-6.14.4/drivers/clk/pistachio/
Dclk-pll.c83 static inline void pll_writel(struct pistachio_clk_pll *pll, u32 val, u32 reg) in pll_writel()
108 u32 val; in pll_frac_get_mode() local
117 u32 val; in pll_frac_set_mode() local
160 u32 val; in pll_gf40lp_frac_enable() local
179 u32 val; in pll_gf40lp_frac_disable() local
199 u64 val, vco, old_postdiv1, old_postdiv2; in pll_gf40lp_frac_set_rate() local
273 u64 val, prediv, fbdiv, frac, postdiv1, postdiv2, rate; in pll_gf40lp_frac_recalc_rate() local
317 u32 val; in pll_gf40lp_laint_enable() local
336 u32 val; in pll_gf40lp_laint_disable() local
356 u32 val, vco, old_postdiv1, old_postdiv2; in pll_gf40lp_laint_set_rate() local
[all …]
/linux-6.14.4/drivers/media/dvb-frontends/
Dstv6111.c330 static int write_reg(struct stv *state, u8 reg, u8 val) in write_reg()
337 static int read_reg(struct stv *state, u8 reg, u8 *val) in read_reg()
444 u32 p = 1, psel = 0, fvco, div, frac; in set_lof() local
/linux-6.14.4/drivers/clk/qcom/
Dclk-alpha-pll.c384 u32 val; in wait_for_pll() local
435 unsigned int val) in clk_alpha_pll_write_config()
444 u32 val, mask; in clk_alpha_pll_configure() local
504 u32 val; in clk_alpha_pll_hwfsm_enable() local
529 u32 val; in clk_alpha_pll_hwfsm_disable() local
559 u32 val; in pll_is_enabled() local
582 u32 val, mask; in clk_alpha_pll_enable() local
634 u32 val, mask; in clk_alpha_pll_disable() local
860 u32 val; in clk_huayra_2290_pll_configure() local
1068 u32 val; in clk_trion_pll_enable() local
[all …]
/linux-6.14.4/drivers/clk/
Dclk-axi-clkgen.c188 unsigned int frac; member
233 unsigned int reg, unsigned int val) in axi_clkgen_write()
239 unsigned int reg, unsigned int *val) in axi_clkgen_read()
247 unsigned int val; in axi_clkgen_wait_non_busy() local
260 unsigned int reg, unsigned int *val) in axi_clkgen_mmcm_read()
284 unsigned int reg, unsigned int val, unsigned int mask) in axi_clkgen_mmcm_write()
308 unsigned int val = AXI_CLKGEN_V2_RESET_ENABLE; in axi_clkgen_mmcm_enable() local
442 unsigned int val; in axi_clkgen_recalc_rate() local

12