1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef __INTEL_MIPI_CAMERA_CHIP_H__ 4 #define __INTEL_MIPI_CAMERA_CHIP_H__ 5 6 #include <stdint.h> 7 #include <acpi/acpi_pld.h> 8 #include <uuid.h> 9 10 #define DEFAULT_LINK_FREQ 450000000 11 #define MAX_PWDB_ENTRIES 12 12 #define MAX_PORT_ENTRIES 4 13 #define MAX_LINK_FREQ_ENTRIES 4 14 #define MAX_CLK_CONFIGS 2 15 #define MAX_GPIO_CONFIGS 4 16 #define MAX_PWR_OPS 6 17 #define MAX_GUARDED_RESOURCES 10 18 #define IMGCLKOUT_0 0 19 #define IMGCLKOUT_1 1 20 #define IMGCLKOUT_2 2 21 #define IMGCLKOUT_3 3 22 #define IMGCLKOUT_4 4 23 #define IMGCLKOUT_5 5 24 #define FREQ_24_MHZ 0 25 #define FREQ_19_2_MHZ 1 26 27 #define SEQ_OPS_CLK_ENABLE(ind, delay) \ 28 { .type = IMGCLK, .index = (ind), .action = ENABLE, .delay_ms = (delay) } 29 #define SEQ_OPS_CLK_DISABLE(ind, delay) \ 30 { .type = IMGCLK, .index = (ind), .action = DISABLE, .delay_ms = (delay) } 31 #define SEQ_OPS_GPIO_ENABLE(ind, delay) \ 32 { .type = GPIO, .index = (ind), .action = ENABLE, .delay_ms = (delay) } 33 #define SEQ_OPS_GPIO_DISABLE(ind, delay) \ 34 { .type = GPIO, .index = (ind), .action = DISABLE, .delay_ms = (delay) } 35 36 enum camera_device_type { 37 DEV_TYPE_SENSOR = 0, 38 DEV_TYPE_VCM, 39 DEV_TYPE_ROM 40 }; 41 42 enum intel_camera_platform_type { 43 PLATFORM_SKC = 9, 44 PLATFORM_CNL = 10 45 }; 46 47 enum intel_camera_flash_type { 48 FLASH_DEFAULT = 0, 49 FLASH_DISABLE = 2, 50 FLASH_ENABLE = 3 51 }; 52 53 enum intel_camera_led_type { 54 PRIVACY_LED_DEFAULT = 0, 55 PRIVACY_LED_A_16mA 56 }; 57 58 enum intel_camera_mipi_info { 59 MIPI_INFO_SENSOR_DRIVER = 0, 60 MIPI_INFO_ACPI_DEFINED 61 }; 62 63 #define CLK_FREQ_19_2MHZ 19200000 64 #define CLK_FREQ_24MHZ 24000000 65 #define CLK_FREQ_20MHZ 20000000 66 67 enum intel_camera_device_type { 68 INTEL_ACPI_CAMERA_CIO2, 69 INTEL_ACPI_CAMERA_IMGU, 70 INTEL_ACPI_CAMERA_SENSOR, 71 INTEL_ACPI_CAMERA_VCM, 72 INTEL_ACPI_CAMERA_NVM, 73 INTEL_ACPI_CAMERA_PMIC = 100, 74 }; 75 76 enum intel_power_action_type { 77 INTEL_ACPI_CAMERA_REGULATOR, 78 INTEL_ACPI_CAMERA_CLK, 79 INTEL_ACPI_CAMERA_GPIO, 80 }; 81 82 enum ctrl_type { 83 UNKNOWN_CTRL, 84 IMGCLK, 85 GPIO 86 }; 87 88 enum action_type { 89 UNKNOWN_ACTION, 90 ENABLE, 91 DISABLE 92 }; 93 94 struct camera_resource { 95 uint8_t type; 96 uint8_t id; 97 }; 98 99 struct camera_resource_manager { 100 uint8_t cnt; 101 struct camera_resource resource[MAX_GUARDED_RESOURCES]; 102 }; 103 104 struct resource_config { 105 enum action_type action; 106 enum ctrl_type type; 107 union { 108 const struct clk_config *clk_conf; 109 const struct gpio_config *gpio_conf; 110 }; 111 }; 112 113 struct clk_config { 114 /* IMGCLKOUT_x being used for a port */ 115 uint8_t clknum; 116 /* frequency setting: 0:24MHz, 1:19.2 MHz */ 117 uint8_t freq; 118 }; 119 120 struct gpio_config { 121 uint16_t gpio_num; 122 }; 123 124 struct clock_ctrl_panel { 125 struct clk_config clks[MAX_CLK_CONFIGS]; 126 }; 127 128 struct gpio_ctrl_panel { 129 struct gpio_config gpio[MAX_GPIO_CONFIGS]; 130 }; 131 132 struct operation_type { 133 enum ctrl_type type; 134 uint8_t index; 135 enum action_type action; 136 uint32_t delay_ms; 137 }; 138 139 struct operation_seq { 140 struct operation_type ops[MAX_PWR_OPS]; 141 uint8_t ops_cnt; 142 }; 143 144 struct intel_ssdb { 145 uint8_t version; /* Current version */ 146 uint8_t sensor_card_sku; /* CRD Board type */ 147 guid_t csi2_data_stream_interface; /* CSI2 data stream GUID */ 148 uint16_t bdf_value; /* Bus number of the host 149 controller */ 150 uint32_t dphy_link_en_fuses; /* Host controller's fuses 151 information used to verify if 152 link is fused out or not */ 153 uint32_t lanes_clock_division; /* Lanes/clock divisions per 154 sensor */ 155 uint8_t link_used; /* Link used by this sensor 156 stream */ 157 uint8_t lanes_used; /* Number of lanes connected for 158 the sensor */ 159 uint32_t csi_rx_dly_cnt_termen_clane; /* MIPI timing information */ 160 uint32_t csi_rx_dly_cnt_settle_clane; /* MIPI timing information */ 161 uint32_t csi_rx_dly_cnt_termen_dlane0; /* MIPI timing information */ 162 uint32_t csi_rx_dly_cnt_settle_dlane0; /* MIPI timing information */ 163 uint32_t csi_rx_dly_cnt_termen_dlane1; /* MIPI timing information */ 164 uint32_t csi_rx_dly_cnt_settle_dlane1; /* MIPI timing information */ 165 uint32_t csi_rx_dly_cnt_termen_dlane2; /* MIPI timing information */ 166 uint32_t csi_rx_dly_cnt_settle_dlane2; /* MIPI timing information */ 167 uint32_t csi_rx_dly_cnt_termen_dlane3; /* MIPI timing information */ 168 uint32_t csi_rx_dly_cnt_settle_dlane3; /* MIPI timing information */ 169 uint32_t max_lane_speed; /* Maximum lane speed for 170 the sensor */ 171 uint8_t sensor_cal_file_idx; /* Legacy field for sensor 172 calibration file index */ 173 uint8_t sensor_cal_file_idx_mbz[3]; /* Legacy field for sensor 174 calibration file index */ 175 uint8_t rom_type; /* NVM type of the camera 176 module */ 177 uint8_t vcm_type; /* VCM type of the camera 178 module */ 179 uint8_t platform; /* Platform information */ 180 uint8_t platform_sub; /* Platform sub-categories */ 181 uint8_t flash_support; /* Enable/disable flash 182 support */ 183 uint8_t privacy_led; /* Privacy LED support */ 184 uint8_t degree; /* Camera Orientation */ 185 uint8_t mipi_define; /* MIPI info defined in ACPI or 186 sensor driver */ 187 uint32_t mclk_speed; /* Clock info for sensor */ 188 uint32_t mclk; /* Clock info for sensor */ 189 uint8_t control_logic_id; /* PMIC device node used for 190 the camera sensor */ 191 uint8_t mipi_data_format; /* MIPI data format */ 192 uint8_t silicon_version; /* Silicon version */ 193 uint8_t customer_id; /* Customer ID */ 194 uint8_t mclk_port; 195 uint8_t reserved[13]; /* Pads SSDB out so the binary blob in ACPI is 196 the same size as seen on other firmwares.*/ 197 } __packed; 198 199 struct intel_pwdb { 200 char name[32]; /* Name of the resource required by the power 201 action */ 202 uint32_t value; /* The value to be set for the power action */ 203 uint32_t entry_type; /* The type of the current power action */ 204 uint32_t delay_usec; /* The delay time after which power action is 205 performed and this is in unit of usec */ 206 } __packed; 207 208 struct drivers_intel_mipi_camera_config { 209 struct clock_ctrl_panel clk_panel; 210 struct gpio_ctrl_panel gpio_panel; 211 struct operation_seq on_seq; 212 struct operation_seq off_seq; 213 214 struct intel_ssdb ssdb; 215 struct intel_pwdb pwdb[MAX_PWDB_ENTRIES]; 216 enum intel_camera_device_type device_type; 217 uint8_t num_pwdb_entries; 218 const char *acpi_hid; 219 const char *acpi_name; 220 const char *chip_name; 221 unsigned int acpi_uid; 222 const char *pr0; 223 224 /* Settings specific to CIO2 device */ 225 uint32_t cio2_num_ports; 226 uint32_t cio2_lanes_used[MAX_PORT_ENTRIES]; 227 const char *cio2_lane_endpoint[MAX_PORT_ENTRIES]; 228 uint32_t cio2_prt[MAX_PORT_ENTRIES]; 229 230 /* Settings specific to camera sensor */ 231 bool disable_ssdb_defaults; 232 233 uint8_t num_freq_entries; /* # of elements in link_freq */ 234 uint32_t link_freq[MAX_LINK_FREQ_ENTRIES]; 235 const char *sensor_name; /* default "UNKNOWN" */ 236 const char *remote_name; /* default "\_SB.PCI0.CIO2" */ 237 const char *vcm_name; /* defaults to |vcm_address| device */ 238 bool use_pld; 239 bool disable_pld_defaults; 240 struct acpi_pld pld; 241 uint16_t rom_address; /* I2C to use if ssdb.rom_type != 0 */ 242 uint16_t vcm_address; /* I2C to use if ssdb.vcm_type != 0 */ 243 /* 244 * Settings specific to nvram. Many values, if left as zero, will be assigned a default. 245 * Set disable_nvm_defaults to non-zero if you want to disable the defaulting behavior 246 * so you can use zero for a value. 247 */ 248 bool disable_nvm_defaults; 249 uint32_t nvm_size; 250 uint32_t nvm_pagesize; 251 uint32_t nvm_readonly; 252 uint32_t nvm_width; 253 const char *nvm_compat; 254 255 /* Settings specific to vcm */ 256 const char *vcm_compat; 257 /* Does the device have a power resource entries */ 258 bool has_power_resource; 259 /* Perform low power probe */ 260 bool low_power_probe; 261 /* 262 * This will create a _DSC method in ACPI which returns an integer, to tell the kernel 263 * the highest allowed D state for a device during probe 264 * Number State Description 265 * 0 D0 Device fully powered on 266 * 1 D1 267 * 2 D2 268 * 3 D3hot 269 * 4 D3cold Off 270 */ 271 uint8_t max_dstate_for_probe; 272 }; 273 274 #endif 275