1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef SOC_MEDIATEK_WDT_COMMON_H 4 #define SOC_MEDIATEK_WDT_COMMON_H 5 6 #include <device/mmio.h> 7 #include <stdint.h> 8 #include <soc/addressmap.h> 9 10 struct mtk_wdt_regs { 11 u32 wdt_mode; 12 u32 wdt_length; 13 u32 wdt_restart; 14 u32 wdt_status; 15 u32 wdt_interval; 16 u32 wdt_swrst; 17 u32 wdt_swsysrst; 18 u32 reserved0[5]; 19 u32 wdt_req_mode; 20 u32 wdt_req_irq_en; 21 u32 reserved1[2]; 22 u32 wdt_debug_ctrl; 23 }; 24 25 /* WDT_MODE */ 26 enum { 27 MTK_WDT_MODE_KEY = 0x22000000, 28 MTK_WDT_MODE_DUAL_MODE = 1 << 6, 29 MTK_WDT_MODE_IRQ = 1 << 3, 30 MTK_WDT_MODE_EXTEN = 1 << 2, 31 MTK_WDT_MODE_EXT_POL = 1 << 1, 32 MTK_WDT_MODE_ENABLE = 1 << 0 33 }; 34 35 /* WDT_RESTART */ 36 enum { 37 MTK_WDT_RESTART_KEY = 0x1971 38 }; 39 40 /* WDT_RESET */ 41 enum { 42 MTK_WDT_SWRST_KEY = 0x1209, 43 MTK_WDT_STA_SPM_RST = 1 << 1, 44 MTK_WDT_STA_SW_RST = 1 << 30, 45 MTK_WDT_STA_HW_RST = 1 << 31 46 }; 47 48 /* WDT_REQ */ 49 #define MTK_WDT_REQ_MOD_KEY_VAL 0x33 50 #define MTK_WDT_REQ_IRQ_KEY_VAL 0x44 51 52 DEFINE_BITFIELD(MTK_WDT_REQ_MOD_KEY, 31, 24) 53 DEFINE_BITFIELD(MTK_WDT_REQ_IRQ_KEY, 31, 24) 54 55 static struct mtk_wdt_regs *const mtk_wdt = (void *)RGU_BASE; 56 57 int mtk_wdt_init(void); 58 void mtk_wdt_clr_status(void); 59 void mtk_wdt_set_req(void); 60 61 #endif /* SOC_MEDIATEK_WDT_COMMON_H */ 62