| /aosp_15_r20/external/mesa3d/src/compiler/glsl/ |
| H A D | gl_nir_lower_packed_varyings.c | 378 unsigned writemask) in bitwise_assign_pack()
408 unsigned writemask = 0x3; in bitwise_assign_pack() local
453 nir_def *value, unsigned writemask) in bitwise_assign_unpack()
527 unsigned writemask, bool is_64bit) in create_store_deref()
579 nir_def *rhs_swizzle, unsigned writemask, in lower_arraylike()
643 nir_def *rhs_swizzle, unsigned writemask, in lower_varying()
812 unsigned writemask = ((1 << components) - 1) << location_frac; in lower_varying() local
|
| H A D | gl_nir_lower_xfb_varying.c | 130 unsigned writemask = (1 << components) - 1; in copy_to_new_var() local
|
| /aosp_15_r20/external/mesa3d/src/gallium/frontends/d3d10umd/ |
| H A D | ShaderTGSI.c | 221 uint writemask; member
401 swizzle_reg(struct ureg_src src, uint writemask, in swizzle_reg()
427 unsigned writemask = in dcl_base_output() local
456 unsigned writemask = in dcl_base_input() local
709 unsigned writemask) in translate_operand()
821 unsigned writemask = in translate_dst_operand() local
|
| /aosp_15_r20/external/mesa3d/src/gallium/drivers/r600/sfn/ |
| H A D | sfn_instr_export.cpp | 18 writemask_to_swizzle(int writemask, char *buf) in writemask_to_swizzle()
153 int writemask, in ScratchIOInstr()
175 int writemask, in ScratchIOInstr()
274 int writemask = 0; in from_string() local
|
| H A D | sfn_shader.cpp | 77 ShaderOutput::ShaderOutput(int location, int writemask, gl_varying_slot varying_slot): in ShaderOutput()
1085 int writemask = nir_intrinsic_write_mask(ir); in visit() local
1103 int writemask = nir_intrinsic_write_mask(ir); in visit() local
1169 int writemask = nir_intrinsic_write_mask(intr); in emit_store_scratch() local
|
| H A D | sfn_shader.h | 71 int writemask() const { return m_writemask; } in writemask() function
72 void set_writemask(int writemask) { m_writemask = writemask; } in set_writemask()
|
| /aosp_15_r20/external/mesa3d/src/gallium/drivers/r300/compiler/ |
| H A D | radeon_pair_regalloc.c | 135 unsigned int writemask = rc_variable_writemask_sum(variable); in variable_get_class() local
298 unsigned int chan, writemask = 0; in do_advanced_regalloc() local
346 unsigned int writemask = reg_get_writemask(reg); in do_advanced_regalloc() local
|
| H A D | radeon_variable.c | 280 unsigned int writemask; in get_variable_pair_helper() local
444 unsigned int writemask = 0; in rc_variable_writemask_sum() local
|
| H A D | r3xx_vertprog.c | 653 unsigned int writemask = rc_variable_writemask_sum(var_ptr->Item); in allocate_temporary_registers() local
683 unsigned int writemask = reg_get_writemask(reg); in allocate_temporary_registers() local
|
| H A D | radeon_opcodes.c | 408 unsigned int writemask, in rc_compute_sources_for_writemask()
|
| H A D | radeon_rename_regs.c | 41 unsigned writemask; in rc_rename_regs() local
|
| H A D | radeon_regalloc.c | 230 unsigned int writemask, in rc_find_class()
|
| /aosp_15_r20/external/mesa3d/src/gallium/auxiliary/gallivm/ |
| H A D | lp_bld_nir_aos.c | 146 unsigned writemask, in emit_store_var()
191 unsigned writemask) in swizzle_writemask()
211 unsigned writemask, in emit_store_reg()
|
| H A D | lp_bld_nir.c | 1430 int writemask = instr->const_index[0]; in visit_store_var() local
1526 int writemask = instr->const_index[0]; in visit_store_ssbo() local
1852 int writemask = instr->const_index[1]; in visit_shared_store() local
1945 int writemask = instr->const_index[0]; in visit_store_global() local
2036 int writemask = instr->const_index[2]; in visit_store_scratch() local
2061 int writemask = instr->const_index[1]; in visit_payload_store() local
|
| /aosp_15_r20/external/mesa3d/src/intel/compiler/elk/ |
| H A D | elk_vec4.cpp | 107 unsigned writemask) in dst_reg()
118 unsigned writemask) in dst_reg()
420 unsigned writemask = 0; in opt_vector_float() local
2068 scalarize_predicate(elk_predicate predicate, unsigned writemask) in scalarize_predicate()
|
| H A D | elk_vec4_nir.cpp | 354 unsigned writemask = 1 << i; in nir_emit_load_const() local
473 int writemask = WRITEMASK_X; in nir_emit_intrinsic() local
2036 int writemask = devinfo->ver == 4 ? WRITEMASK_W : WRITEMASK_X; in nir_emit_texture() local
2068 int mrf, writemask; in nir_emit_texture() local
|
| /aosp_15_r20/external/mesa3d/src/gallium/frontends/lavapipe/ |
| H A D | lvp_nir_lower_ray_queries.c | 46 unsigned writemask) in nir_store_array()
72 unsigned writemask) in rq_store_var()
101 nir_def *value, unsigned writemask) in rq_store_array()
|
| /aosp_15_r20/external/mesa3d/src/amd/vulkan/nir/ |
| H A D | radv_nir_lower_ray_queries.c | 50 …tore_array(nir_builder *b, nir_variable *array, nir_def *index, nir_def *value, unsigned writemask) in nir_store_array()
74 rq_store_var(nir_builder *b, nir_def *index, rq_variable *var, nir_def *value, unsigned writemask) in rq_store_var()
101 unsigned writemask) in rq_store_array()
|
| /aosp_15_r20/external/virglrenderer/src/gallium/auxiliary/tgsi/ |
| H A D | tgsi_text.c | 466 uint *writemask ) in parse_opt_writemask()
835 uint writemask; in parse_dst_operand() local
1308 uint writemask; in parse_declaration() local
|
| /aosp_15_r20/external/mesa3d/src/gallium/auxiliary/tgsi/ |
| H A D | tgsi_text.c | 400 unsigned *writemask ) in parse_opt_writemask()
769 unsigned writemask; in parse_dst_operand() local
1246 unsigned writemask; in parse_declaration() local
|
| /aosp_15_r20/external/virglrenderer/src/ |
| H A D | vrend_shader.c | 2258 char writemask[6]; in emit_so_movs() local
2664 const char *writemask) in emit_txq()
2986 const char *writemask) in emit_lodq()
3037 const char *writemask) in translate_tex()
3648 static void emit_store_mem(struct vrend_glsl_strbufs *glsl_strbufs, const char *dst, int writemask, in emit_store_mem()
3760 static void emit_load_mem(struct vrend_glsl_strbufs *glsl_strbufs, const char *dst, int writemask, in emit_load_mem()
3783 const char *writemask) in translate_load()
3952 const char *srcs[4], const char *dst, const char *writemask) in translate_resq()
4105 char *reswizzled, const char *writemask) in reswizzle_dest()
4126 const char *writemask, in get_destination_info_generic()
[all …]
|
| /aosp_15_r20/external/mesa3d/src/gallium/drivers/svga/ |
| H A D | svga_tgsi_vgpu10.c | 797 unsigned writemask, unsigned clip_reg_index) in apply_clip_plane_mask()
1266 unsigned writemask = reg->Register.WriteMask; in emit_dst_register() local
4007 unsigned writemask, in emit_output_declaration()
4221 unsigned index, unsigned writemask, in emit_vertex_output_declaration()
4299 unsigned writemask = 0; in output_writemask_for_stream() local
4350 unsigned writemask; in emit_gs_output_declarations() local
6853 unsigned writemask = VGPU10_OPERAND_4_COMPONENT_MASK_X << comp; in emit_clip_distance_from_vpos() local
6896 unsigned writemask = VGPU10_OPERAND_4_COMPONENT_MASK_X << comp; in emit_clip_vertex_instructions() local
9380 ASSERTED unsigned writemask = inst->Dst[0].Register.WriteMask; in check_double_dst_writemask() local
9789 int writemask = TGSI_WRITEMASK_X; in emit_msb() local
[all …]
|
| /aosp_15_r20/external/mesa3d/src/compiler/nir/ |
| H A D | nir_lower_fragcolor.c | 74 nir_component_mask_t writemask = nir_intrinsic_write_mask(instr); in lower_fragcolor_intrin() local
|
| H A D | nir_builder.h | 1744 nir_def *value, unsigned writemask, in nir_store_deref_with_access()
1754 nir_def *value, unsigned writemask) in nir_store_deref()
1837 unsigned writemask) in nir_store_var()
1867 nir_def *value, unsigned writemask) in nir_store_array_var()
1876 nir_def *value, unsigned writemask) in nir_store_array_var_imm()
|
| /aosp_15_r20/external/igt-gpu-tools/assembler/ |
| H A D | brw_reg.h | 128 unsigned writemask:4; /* dest only, align16 only */ member
188 unsigned writemask) in brw_reg()
|