xref: /aosp_15_r20/external/XNNPACK/src/f32-igemm/gen/4x8s4-relu-wasmsimd.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/f32-igemm/wasmsimd-s4.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <wasm_simd128.h>
13 
14 #include <xnnpack/igemm.h>
15 
16 
xnn_f32_igemm_relu_ukernel_4x8s4__wasmsimd(size_t mr,size_t nc,size_t kc,size_t ks,const float ** restrict a,const float * restrict w,float * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const float * zero,const union xnn_f32_relu_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_f32_igemm_relu_ukernel_4x8s4__wasmsimd(
18     size_t mr,
19     size_t nc,
20     size_t kc,
21     size_t ks,
22     const float**restrict a,
23     const float*restrict w,
24     float*restrict c,
25     size_t cm_stride,
26     size_t cn_stride,
27     size_t a_offset,
28     const float* zero,
29     const union xnn_f32_relu_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
30 {
31   assert(mr != 0);
32   assert(mr <= 4);
33   assert(nc != 0);
34   assert(kc != 0);
35   assert(kc % sizeof(float) == 0);
36   assert(ks != 0);
37   assert(ks % (4 * sizeof(void*)) == 0);
38   assert(a_offset % sizeof(float) == 0);
39   assert(a != NULL);
40   assert(w != NULL);
41   assert(c != NULL);
42 
43   float* c0 = c;
44   float* c1 = (float*) ((uintptr_t) c0 + cm_stride);
45   if XNN_UNPREDICTABLE(mr < 2) {
46     c1 = c0;
47   }
48   float* c2 = (float*) ((uintptr_t) c1 + cm_stride);
49   if XNN_UNPREDICTABLE(mr <= 2) {
50     c2 = c1;
51   }
52   float* c3 = (float*) ((uintptr_t) c2 + cm_stride);
53   if XNN_UNPREDICTABLE(mr != 4) {
54     c3 = c2;
55   }
56 
57   do {
58     v128_t vacc0x0123 = wasm_v128_load(w);
59     v128_t vacc0x4567 = wasm_v128_load(w + 4);
60     v128_t vacc1x0123 = vacc0x0123;
61     v128_t vacc1x4567 = vacc0x4567;
62     v128_t vacc2x0123 = vacc0x0123;
63     v128_t vacc2x4567 = vacc0x4567;
64     v128_t vacc3x0123 = vacc0x0123;
65     v128_t vacc3x4567 = vacc0x4567;
66     w += 8;
67 
68     size_t p = ks;
69     do {
70       const float* restrict a0 = a[0];
71       assert(a0 != NULL);
72       if XNN_UNPREDICTABLE(a0 != zero) {
73         a0 = (const float*) ((uintptr_t) a0 + a_offset);
74       }
75       const float* restrict a1 = a[1];
76       assert(a1 != NULL);
77       if XNN_UNPREDICTABLE(a1 != zero) {
78         a1 = (const float*) ((uintptr_t) a1 + a_offset);
79       }
80       const float* restrict a2 = a[2];
81       assert(a2 != NULL);
82       if XNN_UNPREDICTABLE(a2 != zero) {
83         a2 = (const float*) ((uintptr_t) a2 + a_offset);
84       }
85       const float* restrict a3 = a[3];
86       assert(a3 != NULL);
87       if XNN_UNPREDICTABLE(a3 != zero) {
88         a3 = (const float*) ((uintptr_t) a3 + a_offset);
89       }
90       a += 4;
91 
92       size_t k = kc;
93       while (k >= 4 * sizeof(float)) {
94         v128_t va0 = wasm_v128_load(a0);
95         a0 += 4;
96         v128_t va1 = wasm_v128_load(a1);
97         a1 += 4;
98         v128_t va2 = wasm_v128_load(a2);
99         a2 += 4;
100         v128_t va3 = wasm_v128_load(a3);
101         a3 += 4;
102 
103 
104         const v128_t vb0123c0 = wasm_v128_load(w + 0);
105         const v128_t vb4567c0 = wasm_v128_load(w + 4);
106 
107         vacc0x0123 = wasm_f32x4_add(vacc0x0123, wasm_f32x4_mul(va0, vb0123c0));
108         vacc1x0123 = wasm_f32x4_add(vacc1x0123, wasm_f32x4_mul(va1, vb0123c0));
109         vacc2x0123 = wasm_f32x4_add(vacc2x0123, wasm_f32x4_mul(va2, vb0123c0));
110         vacc3x0123 = wasm_f32x4_add(vacc3x0123, wasm_f32x4_mul(va3, vb0123c0));
111         vacc0x4567 = wasm_f32x4_add(vacc0x4567, wasm_f32x4_mul(va0, vb4567c0));
112         vacc1x4567 = wasm_f32x4_add(vacc1x4567, wasm_f32x4_mul(va1, vb4567c0));
113         vacc2x4567 = wasm_f32x4_add(vacc2x4567, wasm_f32x4_mul(va2, vb4567c0));
114         vacc3x4567 = wasm_f32x4_add(vacc3x4567, wasm_f32x4_mul(va3, vb4567c0));
115 
116         va0 = wasm_v32x4_shuffle(va0, va0, 1, 2, 3, 0);
117         va1 = wasm_v32x4_shuffle(va1, va1, 1, 2, 3, 0);
118         va2 = wasm_v32x4_shuffle(va2, va2, 1, 2, 3, 0);
119         va3 = wasm_v32x4_shuffle(va3, va3, 1, 2, 3, 0);
120 
121         const v128_t vb0123c1 = wasm_v128_load(w + 8);
122         const v128_t vb4567c1 = wasm_v128_load(w + 12);
123 
124         vacc0x0123 = wasm_f32x4_add(vacc0x0123, wasm_f32x4_mul(va0, vb0123c1));
125         vacc1x0123 = wasm_f32x4_add(vacc1x0123, wasm_f32x4_mul(va1, vb0123c1));
126         vacc2x0123 = wasm_f32x4_add(vacc2x0123, wasm_f32x4_mul(va2, vb0123c1));
127         vacc3x0123 = wasm_f32x4_add(vacc3x0123, wasm_f32x4_mul(va3, vb0123c1));
128         vacc0x4567 = wasm_f32x4_add(vacc0x4567, wasm_f32x4_mul(va0, vb4567c1));
129         vacc1x4567 = wasm_f32x4_add(vacc1x4567, wasm_f32x4_mul(va1, vb4567c1));
130         vacc2x4567 = wasm_f32x4_add(vacc2x4567, wasm_f32x4_mul(va2, vb4567c1));
131         vacc3x4567 = wasm_f32x4_add(vacc3x4567, wasm_f32x4_mul(va3, vb4567c1));
132 
133         va0 = wasm_v32x4_shuffle(va0, va0, 1, 2, 3, 0);
134         va1 = wasm_v32x4_shuffle(va1, va1, 1, 2, 3, 0);
135         va2 = wasm_v32x4_shuffle(va2, va2, 1, 2, 3, 0);
136         va3 = wasm_v32x4_shuffle(va3, va3, 1, 2, 3, 0);
137 
138         const v128_t vb0123c2 = wasm_v128_load(w + 16);
139         const v128_t vb4567c2 = wasm_v128_load(w + 20);
140 
141         vacc0x0123 = wasm_f32x4_add(vacc0x0123, wasm_f32x4_mul(va0, vb0123c2));
142         vacc1x0123 = wasm_f32x4_add(vacc1x0123, wasm_f32x4_mul(va1, vb0123c2));
143         vacc2x0123 = wasm_f32x4_add(vacc2x0123, wasm_f32x4_mul(va2, vb0123c2));
144         vacc3x0123 = wasm_f32x4_add(vacc3x0123, wasm_f32x4_mul(va3, vb0123c2));
145         vacc0x4567 = wasm_f32x4_add(vacc0x4567, wasm_f32x4_mul(va0, vb4567c2));
146         vacc1x4567 = wasm_f32x4_add(vacc1x4567, wasm_f32x4_mul(va1, vb4567c2));
147         vacc2x4567 = wasm_f32x4_add(vacc2x4567, wasm_f32x4_mul(va2, vb4567c2));
148         vacc3x4567 = wasm_f32x4_add(vacc3x4567, wasm_f32x4_mul(va3, vb4567c2));
149 
150         va0 = wasm_v32x4_shuffle(va0, va0, 1, 2, 3, 0);
151         va1 = wasm_v32x4_shuffle(va1, va1, 1, 2, 3, 0);
152         va2 = wasm_v32x4_shuffle(va2, va2, 1, 2, 3, 0);
153         va3 = wasm_v32x4_shuffle(va3, va3, 1, 2, 3, 0);
154 
155         const v128_t vb0123c3 = wasm_v128_load(w + 24);
156         const v128_t vb4567c3 = wasm_v128_load(w + 28);
157 
158         vacc0x0123 = wasm_f32x4_add(vacc0x0123, wasm_f32x4_mul(va0, vb0123c3));
159         vacc1x0123 = wasm_f32x4_add(vacc1x0123, wasm_f32x4_mul(va1, vb0123c3));
160         vacc2x0123 = wasm_f32x4_add(vacc2x0123, wasm_f32x4_mul(va2, vb0123c3));
161         vacc3x0123 = wasm_f32x4_add(vacc3x0123, wasm_f32x4_mul(va3, vb0123c3));
162         vacc0x4567 = wasm_f32x4_add(vacc0x4567, wasm_f32x4_mul(va0, vb4567c3));
163         vacc1x4567 = wasm_f32x4_add(vacc1x4567, wasm_f32x4_mul(va1, vb4567c3));
164         vacc2x4567 = wasm_f32x4_add(vacc2x4567, wasm_f32x4_mul(va2, vb4567c3));
165         vacc3x4567 = wasm_f32x4_add(vacc3x4567, wasm_f32x4_mul(va3, vb4567c3));
166 
167 
168         w += 32;
169         k -= 4 * sizeof(float);
170       }
171       if XNN_UNLIKELY(k != 0) {
172         v128_t va0 = wasm_v128_load(a0);
173         a0 = (const float*) ((uintptr_t) a0 + k);
174         v128_t va1 = wasm_v128_load(a1);
175         a1 = (const float*) ((uintptr_t) a1 + k);
176         v128_t va2 = wasm_v128_load(a2);
177         a2 = (const float*) ((uintptr_t) a2 + k);
178         v128_t va3 = wasm_v128_load(a3);
179         a3 = (const float*) ((uintptr_t) a3 + k);
180 
181         const v128_t vzero = wasm_f32x4_const_splat(0.0f);
182 
183         const v128_t vb0123c0 = wasm_v128_load(w + 0);
184         const v128_t vb4567c0 = wasm_v128_load(w + 4);
185 
186         vacc0x0123 = wasm_f32x4_add(vacc0x0123, wasm_f32x4_mul(wasm_v128_andnot(va0, wasm_f32x4_eq(vb0123c0, vzero)), vb0123c0));
187         vacc1x0123 = wasm_f32x4_add(vacc1x0123, wasm_f32x4_mul(wasm_v128_andnot(va1, wasm_f32x4_eq(vb0123c0, vzero)), vb0123c0));
188         vacc2x0123 = wasm_f32x4_add(vacc2x0123, wasm_f32x4_mul(wasm_v128_andnot(va2, wasm_f32x4_eq(vb0123c0, vzero)), vb0123c0));
189         vacc3x0123 = wasm_f32x4_add(vacc3x0123, wasm_f32x4_mul(wasm_v128_andnot(va3, wasm_f32x4_eq(vb0123c0, vzero)), vb0123c0));
190         vacc0x4567 = wasm_f32x4_add(vacc0x4567, wasm_f32x4_mul(wasm_v128_andnot(va0, wasm_f32x4_eq(vb4567c0, vzero)), vb4567c0));
191         vacc1x4567 = wasm_f32x4_add(vacc1x4567, wasm_f32x4_mul(wasm_v128_andnot(va1, wasm_f32x4_eq(vb4567c0, vzero)), vb4567c0));
192         vacc2x4567 = wasm_f32x4_add(vacc2x4567, wasm_f32x4_mul(wasm_v128_andnot(va2, wasm_f32x4_eq(vb4567c0, vzero)), vb4567c0));
193         vacc3x4567 = wasm_f32x4_add(vacc3x4567, wasm_f32x4_mul(wasm_v128_andnot(va3, wasm_f32x4_eq(vb4567c0, vzero)), vb4567c0));
194 
195         va0 = wasm_v32x4_shuffle(va0, va0, 1, 2, 3, 0);
196         va1 = wasm_v32x4_shuffle(va1, va1, 1, 2, 3, 0);
197         va2 = wasm_v32x4_shuffle(va2, va2, 1, 2, 3, 0);
198         va3 = wasm_v32x4_shuffle(va3, va3, 1, 2, 3, 0);
199 
200         const v128_t vb0123c1 = wasm_v128_load(w + 8);
201         const v128_t vb4567c1 = wasm_v128_load(w + 12);
202 
203         vacc0x0123 = wasm_f32x4_add(vacc0x0123, wasm_f32x4_mul(wasm_v128_andnot(va0, wasm_f32x4_eq(vb0123c1, vzero)), vb0123c1));
204         vacc1x0123 = wasm_f32x4_add(vacc1x0123, wasm_f32x4_mul(wasm_v128_andnot(va1, wasm_f32x4_eq(vb0123c1, vzero)), vb0123c1));
205         vacc2x0123 = wasm_f32x4_add(vacc2x0123, wasm_f32x4_mul(wasm_v128_andnot(va2, wasm_f32x4_eq(vb0123c1, vzero)), vb0123c1));
206         vacc3x0123 = wasm_f32x4_add(vacc3x0123, wasm_f32x4_mul(wasm_v128_andnot(va3, wasm_f32x4_eq(vb0123c1, vzero)), vb0123c1));
207         vacc0x4567 = wasm_f32x4_add(vacc0x4567, wasm_f32x4_mul(wasm_v128_andnot(va0, wasm_f32x4_eq(vb4567c1, vzero)), vb4567c1));
208         vacc1x4567 = wasm_f32x4_add(vacc1x4567, wasm_f32x4_mul(wasm_v128_andnot(va1, wasm_f32x4_eq(vb4567c1, vzero)), vb4567c1));
209         vacc2x4567 = wasm_f32x4_add(vacc2x4567, wasm_f32x4_mul(wasm_v128_andnot(va2, wasm_f32x4_eq(vb4567c1, vzero)), vb4567c1));
210         vacc3x4567 = wasm_f32x4_add(vacc3x4567, wasm_f32x4_mul(wasm_v128_andnot(va3, wasm_f32x4_eq(vb4567c1, vzero)), vb4567c1));
211 
212         va0 = wasm_v32x4_shuffle(va0, va0, 1, 2, 3, 0);
213         va1 = wasm_v32x4_shuffle(va1, va1, 1, 2, 3, 0);
214         va2 = wasm_v32x4_shuffle(va2, va2, 1, 2, 3, 0);
215         va3 = wasm_v32x4_shuffle(va3, va3, 1, 2, 3, 0);
216 
217         const v128_t vb0123c2 = wasm_v128_load(w + 16);
218         const v128_t vb4567c2 = wasm_v128_load(w + 20);
219 
220         vacc0x0123 = wasm_f32x4_add(vacc0x0123, wasm_f32x4_mul(wasm_v128_andnot(va0, wasm_f32x4_eq(vb0123c2, vzero)), vb0123c2));
221         vacc1x0123 = wasm_f32x4_add(vacc1x0123, wasm_f32x4_mul(wasm_v128_andnot(va1, wasm_f32x4_eq(vb0123c2, vzero)), vb0123c2));
222         vacc2x0123 = wasm_f32x4_add(vacc2x0123, wasm_f32x4_mul(wasm_v128_andnot(va2, wasm_f32x4_eq(vb0123c2, vzero)), vb0123c2));
223         vacc3x0123 = wasm_f32x4_add(vacc3x0123, wasm_f32x4_mul(wasm_v128_andnot(va3, wasm_f32x4_eq(vb0123c2, vzero)), vb0123c2));
224         vacc0x4567 = wasm_f32x4_add(vacc0x4567, wasm_f32x4_mul(wasm_v128_andnot(va0, wasm_f32x4_eq(vb4567c2, vzero)), vb4567c2));
225         vacc1x4567 = wasm_f32x4_add(vacc1x4567, wasm_f32x4_mul(wasm_v128_andnot(va1, wasm_f32x4_eq(vb4567c2, vzero)), vb4567c2));
226         vacc2x4567 = wasm_f32x4_add(vacc2x4567, wasm_f32x4_mul(wasm_v128_andnot(va2, wasm_f32x4_eq(vb4567c2, vzero)), vb4567c2));
227         vacc3x4567 = wasm_f32x4_add(vacc3x4567, wasm_f32x4_mul(wasm_v128_andnot(va3, wasm_f32x4_eq(vb4567c2, vzero)), vb4567c2));
228 
229         va0 = wasm_v32x4_shuffle(va0, va0, 1, 2, 3, 0);
230         va1 = wasm_v32x4_shuffle(va1, va1, 1, 2, 3, 0);
231         va2 = wasm_v32x4_shuffle(va2, va2, 1, 2, 3, 0);
232         va3 = wasm_v32x4_shuffle(va3, va3, 1, 2, 3, 0);
233 
234         const v128_t vb0123c3 = wasm_v128_load(w + 24);
235         const v128_t vb4567c3 = wasm_v128_load(w + 28);
236 
237         vacc0x0123 = wasm_f32x4_add(vacc0x0123, wasm_f32x4_mul(wasm_v128_andnot(va0, wasm_f32x4_eq(vb0123c3, vzero)), vb0123c3));
238         vacc1x0123 = wasm_f32x4_add(vacc1x0123, wasm_f32x4_mul(wasm_v128_andnot(va1, wasm_f32x4_eq(vb0123c3, vzero)), vb0123c3));
239         vacc2x0123 = wasm_f32x4_add(vacc2x0123, wasm_f32x4_mul(wasm_v128_andnot(va2, wasm_f32x4_eq(vb0123c3, vzero)), vb0123c3));
240         vacc3x0123 = wasm_f32x4_add(vacc3x0123, wasm_f32x4_mul(wasm_v128_andnot(va3, wasm_f32x4_eq(vb0123c3, vzero)), vb0123c3));
241         vacc0x4567 = wasm_f32x4_add(vacc0x4567, wasm_f32x4_mul(wasm_v128_andnot(va0, wasm_f32x4_eq(vb4567c3, vzero)), vb4567c3));
242         vacc1x4567 = wasm_f32x4_add(vacc1x4567, wasm_f32x4_mul(wasm_v128_andnot(va1, wasm_f32x4_eq(vb4567c3, vzero)), vb4567c3));
243         vacc2x4567 = wasm_f32x4_add(vacc2x4567, wasm_f32x4_mul(wasm_v128_andnot(va2, wasm_f32x4_eq(vb4567c3, vzero)), vb4567c3));
244         vacc3x4567 = wasm_f32x4_add(vacc3x4567, wasm_f32x4_mul(wasm_v128_andnot(va3, wasm_f32x4_eq(vb4567c3, vzero)), vb4567c3));
245 
246 
247         w += 32;
248       }
249       p -= 4 * sizeof(void*);
250     } while (p != 0);
251 
252     const v128_t vzero = wasm_i32x4_const_splat(0);
253     vacc0x0123 = wasm_i32x4_max(vacc0x0123, vzero);
254     vacc1x0123 = wasm_i32x4_max(vacc1x0123, vzero);
255     vacc2x0123 = wasm_i32x4_max(vacc2x0123, vzero);
256     vacc3x0123 = wasm_i32x4_max(vacc3x0123, vzero);
257     vacc0x4567 = wasm_i32x4_max(vacc0x4567, vzero);
258     vacc1x4567 = wasm_i32x4_max(vacc1x4567, vzero);
259     vacc2x4567 = wasm_i32x4_max(vacc2x4567, vzero);
260     vacc3x4567 = wasm_i32x4_max(vacc3x4567, vzero);
261 
262     if XNN_LIKELY(nc >= 8) {
263       wasm_v128_store(c3, vacc3x0123);
264       wasm_v128_store(c3 + 4, vacc3x4567);
265       c3 = (float*) ((uintptr_t) c3 + cn_stride);
266       wasm_v128_store(c2, vacc2x0123);
267       wasm_v128_store(c2 + 4, vacc2x4567);
268       c2 = (float*) ((uintptr_t) c2 + cn_stride);
269       wasm_v128_store(c1, vacc1x0123);
270       wasm_v128_store(c1 + 4, vacc1x4567);
271       c1 = (float*) ((uintptr_t) c1 + cn_stride);
272       wasm_v128_store(c0, vacc0x0123);
273       wasm_v128_store(c0 + 4, vacc0x4567);
274       c0 = (float*) ((uintptr_t) c0 + cn_stride);
275 
276       a = (const float**restrict) ((uintptr_t) a - ks);
277       nc -= 8;
278     } else {
279       if (nc & 4) {
280         wasm_v128_store(c3, vacc3x0123);
281         wasm_v128_store(c2, vacc2x0123);
282         wasm_v128_store(c1, vacc1x0123);
283         wasm_v128_store(c0, vacc0x0123);
284 
285         vacc3x0123 = vacc3x4567;
286         vacc2x0123 = vacc2x4567;
287         vacc1x0123 = vacc1x4567;
288         vacc0x0123 = vacc0x4567;
289 
290         c3 += 4;
291         c2 += 4;
292         c1 += 4;
293         c0 += 4;
294       }
295       if (nc & 2) {
296         *((double*) c3) = wasm_f64x2_extract_lane(vacc3x0123, 0);
297         *((double*) c2) = wasm_f64x2_extract_lane(vacc2x0123, 0);
298         *((double*) c1) = wasm_f64x2_extract_lane(vacc1x0123, 0);
299         *((double*) c0) = wasm_f64x2_extract_lane(vacc0x0123, 0);
300 
301         vacc3x0123 = wasm_v32x4_shuffle(vacc3x0123, vacc3x0123, 2, 3, 2, 3);
302         vacc2x0123 = wasm_v32x4_shuffle(vacc2x0123, vacc2x0123, 2, 3, 2, 3);
303         vacc1x0123 = wasm_v32x4_shuffle(vacc1x0123, vacc1x0123, 2, 3, 2, 3);
304         vacc0x0123 = wasm_v32x4_shuffle(vacc0x0123, vacc0x0123, 2, 3, 2, 3);
305 
306         c3 += 2;
307         c2 += 2;
308         c1 += 2;
309         c0 += 2;
310       }
311       if (nc & 1) {
312         *c3 = wasm_f32x4_extract_lane(vacc3x0123, 0);
313         *c2 = wasm_f32x4_extract_lane(vacc2x0123, 0);
314         *c1 = wasm_f32x4_extract_lane(vacc1x0123, 0);
315         *c0 = wasm_f32x4_extract_lane(vacc0x0123, 0);
316       }
317 
318       nc = 0;
319     }
320   } while (nc != 0);
321 }
322