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/linux-6.14.4/drivers/pinctrl/tegra/
Dpinctrl-tegra234.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved.
16 #include "pinctrl-tegra.h"
1382 #define PINGROUP_REG_N(r) -1
1385 #define DRV_PINGROUP_N(r) -1
1388 .drv_reg = -1, \
1389 .drv_bank = -1, \
1390 .drvdn_bit = -1, \
1391 .drvup_bit = -1, \
1392 .slwr_bit = -1, \
[all …]
Dpinctrl-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include "pinctrl-tegra.h"
27 #define TEGRA_PIN_SATA_LED_ACTIVE_PA5 _GPIO(5)
177 /* All non-GPIO pins follow */
181 /* Non-GPIO pins */
187 #define TEGRA_PIN_BATT_BCL _PIN(5)
1269 #define DRV_PINGROUP_REG(r) ((r) - DRV_PINGROUP_REG_A)
1270 #define PINGROUP_REG(r) ((r) - PINGROUP_REG_A)
1273 #define PINGROUP_BIT_N(b) (-1)
1300 .ioreset_bit = -1, \
[all …]
Dpinctrl-tegra194.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
23 #include "pinctrl-tegra.h"
1281 #define PINGROUP_REG_N(r) -1
1284 #define DRV_PINGROUP_N(r) -1
1287 .drv_reg = -1, \
1288 .drv_bank = -1, \
1289 .drvdn_bit = -1, \
1290 .drvup_bit = -1, \
1291 .slwr_bit = -1, \
[all …]
/linux-6.14.4/Documentation/i2c/
Di2c_bus.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Created with Inkscape (http://www.inkscape.org/) -->
3 <!-- Updated to inclusive terminology by Wolfram Sang -->
8 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
11 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
14 inkscape:version="0.92.3 (2405546, 2018-03-11)"
31 inkscape:connector-curvature="0"
33 …d="m -2.5,-1 c 0,2.76 -2.24,5 -5,5 -2.76,0 -5,-2.24 -5,-5 0,-2.76 2.24,-5 5,-5 2.76,0 5,2.24 5,5 z"
34 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
48 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
[all …]
/linux-6.14.4/arch/m68k/lib/
Dchecksum.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * Andreas Schwab, <[email protected]-dortmund.de>
19 * length-counter instead of the length counter
22 * data-registers to hold input values and one tries to
43 * is aligned on either a 2-byte or 4-byte boundary. in csum_partial()
59 "lsrl #5,%1\n\t" /* len/32 */ in csum_partial()
104 "jlt 5f\n\t" in csum_partial()
109 "5:\t" in csum_partial()
159 "lsrl #5,%1\n\t" /* len/32 */ in csum_and_copy_from_user()
164 "movesl %2@+,%5\n\t" in csum_and_copy_from_user()
[all …]
/linux-6.14.4/arch/alpha/lib/
Dfls.c1 // SPDX-License-Identifier: GPL-2.0
9 /* This is fls(x)-1, except zero is held to zero. This allows most
21 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
22 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
Dev6-memset.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memset.S
8 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
13 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
15 * E - either cluster
16 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
17 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
41 .align 5
48 * undertake a major re-write to interleave the constant materialization
49 * with other parts of the fall-through code. This is important, even
[all …]
Dmemmove.S1 /* SPDX-License-Identifier: GPL-2.0 */
7 * This is hand-massaged output from the original memcpy.c. We defer to
25 addq $17,$18,$5
27 cmpule $5,$16,$2 /* dest >= src + n */
34 and $2,7,$2 /* Test for src/dest co-alignment. */
45 lda $4,-1($4)
46 lda $5,-1($5)
50 ldq_u $3,0($5)
52 lda $18,-1($18)
53 extbl $3,$5,$1
[all …]
/linux-6.14.4/arch/arm/mach-rpc/
Dirq.c1 // SPDX-License-Identifier: GPL-2.0
58 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
59 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
62 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
63 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
121 d->mask = mask; in iomd_set_base_mask()
128 unsigned int val, mask = d->mask; in iomd_irq_mask_ack()
138 unsigned int val, mask = d->mask; in iomd_irq_mask()
147 unsigned int val, mask = d->mask; in iomd_irq_unmask()
176 &rpc_default_fiq_end - &rpc_default_fiq_start); in rpc_init_irq()
[all …]
/linux-6.14.4/Documentation/userspace-api/media/v4l/
Dconstraints.svg1 <?xml version="1.0" encoding="UTF-8"?>
2 <!-- SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later -->
3 …-rule="evenodd" stroke-linejoin="round" stroke-width="28.222" preserveAspectRatio="xMidYMid" versi…
4 …-.4 0 0 -.4 -4 0)" d="m0 0 5-5-17.5 5 17.5 5-5-5z" fill="#f00" fill-rule="evenodd" stroke="#f00" s…
5 …-.4 0 0 -.4 -4 0)" d="m0 0 5-5-17.5 5 17.5 5-5-5z" fill="#000080" fill-rule="evenodd" stroke="#000…
6 …-12400v-14200h24800v14200h-12400z" fill="#fff"/><path id="path211" d="m13800 17500h-12400v-14200h2…
7 …-9e3v-1e4h18000v1e4h-9e3z" fill="#fff"/><path id="path230" d="m12050 12250h-9e3v-1e4h18000v1e4h-9e…
8 …-1350,-3250)"><g id="id8"><rect id="rect245" class="BoundingBox" x="7050" y="7950" width="7901" he…
9 …-7e3" fill="none" marker-end="url(#Arrow2Mend)" stroke="#000080" stroke-linejoin="round" stroke-wi…
10 …-end="url(#marker5469)" stroke="#000080" stroke-linejoin="round" stroke-width="100"/><rect id="rec…
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/linux-6.14.4/arch/powerpc/lib/
Dfeature-fixups-test.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 #include <asm/feature-fixups.h>
9 #include <asm/asm-compat.h>
10 #include <asm/ppc-opcode.h>
114 3: or 5,5,5
128 3: or 5,5,5
139 or 5,5,5
183 3: or 5,5,5
200 3: or 5,5,5
291 or 5,5,5; \
[all …]
/linux-6.14.4/drivers/net/wireless/mediatek/mt7601u/
Dinitvals_phy.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * (c) Copyright 2002-2010, Ralink Technology, Inc.
14 /* Bank 0 - for central blocks: BG, PLL, XTAL, LO, ADC/DAC */
20 RF_REG_PAIR(0, 5, 0x20),
74 RF_REG_PAIR(4, 5, 0x08),
136 RF_REG_PAIR(5, 0, 0x47),
137 RF_REG_PAIR(5, 1, 0x00),
138 RF_REG_PAIR(5, 2, 0x00),
139 RF_REG_PAIR(5, 3, 0x08),
140 RF_REG_PAIR(5, 4, 0x04),
[all …]
/linux-6.14.4/arch/mips/include/uapi/asm/
Dinst.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
97 * Bits 10-6 minor opcode for r6 spec mult/div encodings
253 * func field for page table walker (Loongson-3).
655 __BITFIELD_FIELD(unsigned int rs : 5,
656 __BITFIELD_FIELD(unsigned int rt : 5,
663 __BITFIELD_FIELD(unsigned int rs : 5,
664 __BITFIELD_FIELD(unsigned int rt : 5,
671 __BITFIELD_FIELD(unsigned int rs : 5,
680 __BITFIELD_FIELD(unsigned int rs : 5,
681 __BITFIELD_FIELD(unsigned int rt : 5,
[all …]
/linux-6.14.4/arch/powerpc/crypto/
Dpoly1305-p10le_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
10 # Poly1305 - this version mainly using vector/VSX/Scalar
11 # - 26 bits limbs
12 # - Handle multiple 64 byte blcok.
17 # p = 2^130 - 5
25 # 07/22/21 - this revison based on the above sum of products. Setup r^4, r^3, r^2, r and s3, s2, …
35 # vs5 = [r1*5,...]
36 # vs6 = [r2*5,...]
37 # vs7 = [r2*5,...]
[all …]
/linux-6.14.4/Documentation/hwmon/
Ducd9200.rst11 Addresses scanned: -
15 - http://focus.ti.com/lit/ds/symlink/ucd9220.pdf
16 - http://focus.ti.com/lit/ds/symlink/ucd9222.pdf
17 - http://focus.ti.com/lit/ds/symlink/ucd9224.pdf
18 - http://focus.ti.com/lit/ds/symlink/ucd9240.pdf
19 - http://focus.ti.com/lit/ds/symlink/ucd9244.pdf
20 - http://focus.ti.com/lit/ds/symlink/ucd9246.pdf
21 - http://focus.ti.com/lit/ds/symlink/ucd9248.pdf
23 Author: Guenter Roeck <linux@roeck-us.net>
27 -----------
[all …]
/linux-6.14.4/include/dt-bindings/pinctrl/
Dpads-imx8dxl.h1 /* SPDX-License-Identifier: GPL-2.0+ */
15 #define IMX8DXL_USB_SS3_TC1 5
150 … IMX8DXL_PCIE_CTRL0_PERST_B_LSIO_GPIO7_IO00 IMX8DXL_PCIE_CTRL0_PERST_B 5
153 … IMX8DXL_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO7_IO01 IMX8DXL_PCIE_CTRL0_CLKREQ_B 5
156 … IMX8DXL_PCIE_CTRL0_WAKE_B_LSIO_GPIO7_IO02 IMX8DXL_PCIE_CTRL0_WAKE_B 5
161 … IMX8DXL_USB_SS3_TC0_LSIO_GPIO7_IO03 IMX8DXL_USB_SS3_TC0 5
165 … IMX8DXL_USB_SS3_TC1_LSIO_GPIO7_IO04 IMX8DXL_USB_SS3_TC1 5
170 … IMX8DXL_USB_SS3_TC2_LSIO_GPIO7_IO05 IMX8DXL_USB_SS3_TC2 5
174 … IMX8DXL_USB_SS3_TC3_LSIO_GPIO7_IO06 IMX8DXL_USB_SS3_TC3 5
216 … IMX8DXL_USDHC1_RESET_B_LSIO_GPIO7_IO08 IMX8DXL_USDHC1_RESET_B 5
[all …]
/linux-6.14.4/Documentation/input/devices/
Delantech.rst4 Copyright (C) 2007-2008 Arjan Opmeer <[email protected]>
22 5. Hardware version 2
25 5.2.1 Parity checking and packet re-synchronization
58 4 allows tracking up to 5 fingers.
114 non-zero value will turn it ON. For hardware version 1 the default is ON.
145 4 bytes version: (after the arrow is the name given in the Dell-provided driver)
173 ---------
179 echo -n 0x16 > reg_10
183 bit 7 6 5 4 3 2 1 0
197 bit 7 6 5 4 3 2 1 0
[all …]
/linux-6.14.4/drivers/net/wireless/ath/ath9k/
Dar9003_aic.c18 #include "hw-ops.h"
37 5, 5, 4, 4, 3
42 struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci; in ar9003_hw_is_aic_enabled()
46 * HW code and the driver-layer support ready. in ar9003_hw_is_aic_enabled()
50 if (mci_hw->config & ATH_MCI_CONFIG_DISABLE_AIC) in ar9003_hw_is_aic_enabled()
67 for (i = index - 1; i >= 0; i--) { in ar9003_aic_find_valid()
74 i = -1; in ar9003_aic_find_valid()
84 int16_t i = -1; in ar9003_aic_find_index()
87 for (i = ATH_AIC_MAX_AIC_LIN_TABLE - 1; i >= 0; i--) { in ar9003_aic_find_index()
94 i--; in ar9003_aic_find_index()
[all …]
/linux-6.14.4/drivers/net/ipa/
Dipa_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2024 Linaro Ltd.
18 * IPA registers are located within the "ipa-reg" address space defined by
35 * (for parameterized registers) a non-zero stride value. Not all versions
48 * reg_decode(). In addition, for single-bit fields, reg_bit()
53 /* enum ipa_reg_id - IPA register IDs */
65 IPA_BCR, /* Not IPA v4.5+ */
68 COUNTER_CFG, /* Not IPA v4.5+ */
69 IPA_TX_CFG, /* IPA v3.5+ */
[all …]
/linux-6.14.4/lib/
Dutil_macros_kunit.c1 // SPDX-License-Identifier: GPL-2.0+
28 static int array_prog1a[] = { 1, 2, 3, 4, 5 }; in test_find_closest()
29 static u32 array_prog1b[] = { 2, 3, 4, 5, 6 }; in test_find_closest()
30 static int array_prog1mix[] = { -2, -1, 0, 1, 2 }; in test_find_closest()
31 static int array_prog2a[] = { 1, 3, 5, 7 }; in test_find_closest()
34 static u32 array_prog3b[] = { 2, 5, 8, 11 }; in test_find_closest()
35 static int array_prog4a[] = { 1, 5, 9, 13 }; in test_find_closest()
38 FIND_CLOSEST_RANGE_CHECK(-3, 2, ina226_avg_tab, 0); in test_find_closest()
43 FIND_CLOSEST_RANGE_CHECK(193, 384, ina226_avg_tab, 5); in test_find_closest()
48 FIND_CLOSEST_RANGE_CHECK(-3, 1, ad7616_oversampling_avail, 0); in test_find_closest()
[all …]
/linux-6.14.4/drivers/misc/cardreader/
Drts5261.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Driver for Realtek PCI-Express card reader
4 * Copyright(c) 2018-2019 Realtek Semiconductor Corp. All rights reserved.
29 #define RTS5261_AUX_CLK_16M_EN (1 << 5)
70 #define RTS5261_INFORM_RTD3_COLD (0x01<<5)
86 #define RTS5261_PUPDC (0x01<<5)
103 /* CRD6603-433 190319 request changed */
104 #define RTS5261_LDO1_OCP_THD_740 (0x00<<5)
105 #define RTS5261_LDO1_OCP_THD_800 (0x01<<5)
106 #define RTS5261_LDO1_OCP_THD_860 (0x02<<5)
[all …]
/linux-6.14.4/drivers/clk/renesas/
Dr9a09g057-cpg.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/renesas,r9a09g057-cpg.h>
15 #include "rzv2h-cpg.h"
118 DEF_MOD_CRITICAL("icu_0_pclk_i", CLK_PLLCM33_DIV16, 0, 5, 0, 5,
121 BUS_MSTOP(3, BIT(5))),
123 BUS_MSTOP(5, BIT(10))),
125 BUS_MSTOP(5, BIT(11))),
126 DEF_MOD("gtm_2_pclk", CLK_PLLCLN_DIV16, 4, 5, 2, 5,
147 BUS_MSTOP(5, BIT(12))),
[all …]
/linux-6.14.4/drivers/edac/
Dpnd2_edac.h1 /* SPDX-License-Identifier: GPL-2.0-only */
149 /* Apollo Lake d-unit */
158 u32 rsvd13_9 : 5;
173 /* Denverton d-unit */
219 u32 ba0 : 5;
220 u32 ba1 : 5;
221 u32 bg0 : 5; /* if ddr3, ba2 = bg0 */
222 u32 bg1 : 5; /* if ddr3, ba3 = bg1 */
223 u32 rs0 : 5;
224 u32 rs1 : 5;
[all …]
/linux-6.14.4/tools/testing/selftests/powerpc/math/
Dmma.S1 /* SPDX-License-Identifier: GPL-2.0-or-later
11 lxvh8x 5,0,4
17 * X-form (xxmtacc) (not needed due to above zeroing) */
23 /* Deprime the accumulator - xxmfacc 0 */
27 stxvw4x 0,0,5
28 addi 5,5,16
29 stxvw4x 1,0,5
30 addi 5,5,16
31 stxvw4x 2,0,5
32 addi 5,5,16
[all …]
/linux-6.14.4/lib/zstd/compress/
Dclevels.h5 * This source code is licensed under both the BSD-style license (found in the
8 * You may select, at your option, one of the above-listed licenses.
17 /*-===== Pre-defined compression levels =====-*/
24 { /* "default" - for any srcSize > 256 KB */
29 { 21, 16, 17, 1, 5, 0, ZSTD_dfast }, /* level 3 */
30 { 21, 18, 18, 1, 5, 0, ZSTD_dfast }, /* level 4 */
31 { 21, 18, 19, 3, 5, 2, ZSTD_greedy }, /* level 5 */
32 { 21, 18, 19, 3, 5, 4, ZSTD_lazy }, /* level 6 */
33 { 21, 19, 20, 4, 5, 8, ZSTD_lazy }, /* level 7 */
34 { 21, 19, 20, 4, 5, 16, ZSTD_lazy2 }, /* level 8 */
[all …]

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