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Searched +full:0 +full:x001f4200 (Results 1 – 6 of 6) sorted by relevance

/linux-6.14.4/Documentation/devicetree/bindings/clock/
Dqcom,sm4450-gcc.yaml27 - description: UFS Phy Rx symbol 0 clock source
29 - description: UFS Phy Tx symbol 0 clock source
47 reg = <0x00100000 0x001f4200>;
49 <&ufs_mem_phy 0>, <&ufs_mem_phy 1>,
Dqcom,qdu1000-gcc.yaml27 - description: PCIE 0 Pipe clock source
28 - description: PCIE 0 Phy Auxiliary clock source
46 reg = <0x00100000 0x001f4200>;
Dqcom,sm8550-gcc.yaml26 - description: PCIE 0 Pipe clock source
29 - description: UFS Phy Rx symbol 0 clock source
31 - description: UFS Phy Tx symbol 0 clock source
49 reg = <0x00100000 0x001f4200>;
54 <&ufs_mem_phy 0>,
Dqcom,sm8750-gcc.yaml27 - description: PCIE 0 Pipe clock source
28 - description: UFS Phy Rx symbol 0 clock source
30 - description: UFS Phy Tx symbol 0 clock source
48 reg = <0x00100000 0x001f4200>;
53 <&ufs_mem_phy 0>,
Dqcom,sm8650-gcc.yaml27 - description: PCIE 0 Pipe clock source
30 - description: UFS Phy Rx symbol 0 clock source
32 - description: UFS Phy Tx symbol 0 clock source
50 reg = <0x00100000 0x001f4200>;
57 <&ufs_mem_phy 0>,
Dqcom,gcc-sm8450.yaml28 - description: PCIE 0 Pipe clock source (Optional clock)
31 - description: UFS Phy Rx symbol 0 clock source (Optional clock)
33 - description: UFS Phy Tx symbol 0 clock source (Optional clock)
66 reg = <0x00100000 0x001f4200>;