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/linux-6.14.4/arch/arm64/boot/dts/freescale/
Dfsl-lx2160a-rev2.dtsi13 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
14 0x80 0x00000000 0x0 0x00002000>; /* configuration space */
17 ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000
18 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>;
29 reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
30 0x88 0x00000000 0x0 0x00002000>; /* configuration space */
33 ranges = <0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 0x00010000
34 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>;
45 reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
46 0x90 0x00000000 0x0 0x00002000>; /* configuration space */
[all …]
Dfsl-ls2088a.dtsi23 cpu0: cpu@0 {
26 reg = <0x0>;
27 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
36 reg = <0x1>;
37 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
46 reg = <0x100>;
56 reg = <0x101>;
66 reg = <0x200>;
76 reg = <0x201>;
86 reg = <0x300>;
[all …]
Dfsl-ls2080a.dtsi23 cpu0: cpu@0 {
26 reg = <0x0>;
27 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
36 reg = <0x1>;
37 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
46 reg = <0x100>;
56 reg = <0x101>;
66 reg = <0x200>;
76 reg = <0x201>;
86 reg = <0x300>;
[all …]
Dfsl-ls1088a.dtsi27 #size-cells = <0>;
30 cpu0: cpu@0 {
33 reg = <0x0>;
34 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
42 reg = <0x1>;
43 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
51 reg = <0x2>;
52 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
60 reg = <0x3>;
61 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
Dfsl-ls1046a.dtsi38 #size-cells = <0>;
40 cpu0: cpu@0 {
43 reg = <0x0>;
44 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
53 reg = <0x1>;
54 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
63 reg = <0x2>;
64 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
73 reg = <0x3>;
74 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
Dfsl-ls1028a.dtsi23 #size-cells = <0>;
25 cpu0: cpu@0 {
28 reg = <0x0>;
30 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
31 i-cache-size = <0xc000>;
34 d-cache-size = <0x8000>;
45 reg = <0x1>;
47 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
48 i-cache-size = <0xc000>;
51 d-cache-size = <0x8000>;
[all …]
Dfsl-ls1043a.dtsi37 #size-cells = <0>;
45 cpu0: cpu@0 {
48 reg = <0x0>;
49 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
58 reg = <0x1>;
59 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
68 reg = <0x2>;
69 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
78 reg = <0x3>;
79 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
Dfsl-lx2160a.dtsi12 /memreserve/ 0x80000000 0x00010000;
26 #size-cells = <0>;
29 cpu0: cpu@0 {
33 reg = <0x0>;
34 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
35 d-cache-size = <0x8000>;
38 i-cache-size = <0xC000>;
50 reg = <0x1>;
51 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
52 d-cache-size = <0x8000>;
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/pinctrl/
Dqcom,qcs615-tlmm.yaml67 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-9]|12[0-2])$"
108 reg = <0x03100000 0x300000>,
109 <0x03500000 0x300000>,
110 <0x03c00000 0x300000>;
113 gpio-ranges = <&tlmm 0 0 123>;
Dqcom,sm7150-tlmm.yaml67 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-8])$"
115 reg = <0x03500000 0x300000>,
116 <0x03900000 0x300000>,
117 <0x03d00000 0x300000>;
120 gpio-ranges = <&tlmm 0 0 120>;
Dqcom,sc7180-pinctrl.yaml64 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-8])$"
116 reg = <0x03500000 0x300000>,
117 <0x03900000 0x300000>,
118 <0x03d00000 0x300000>;
125 gpio-ranges = <&tlmm 0 0 120>;
Dqcom,sc8180x-tlmm.yaml61 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-8][0-9])$"
108 reg = <0x03100000 0x300000>,
109 <0x03500000 0x700000>,
110 <0x03d00000 0x300000>;
117 gpio-ranges = <&tlmm 0 0 190>;
Dqcom,sm8150-pinctrl.yaml65 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-4])$"
117 reg = <0x03100000 0x300000>,
118 <0x03500000 0x300000>,
119 <0x03900000 0x300000>,
120 <0x03d00000 0x300000>;
123 gpio-ranges = <&tlmm 0 0 176>;
Dqcom,sdm630-pinctrl.yaml69 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-3])$"
133 reg = <0x03100000 0x400000>,
134 <0x03500000 0x400000>,
135 <0x03900000 0x400000>;
139 gpio-ranges = <&tlmm 0 0 114>;
/linux-6.14.4/arch/powerpc/boot/dts/fsl/
Dc293pcie.dts46 reg = <0xf 0xffe1e000 0 0x2000>;
47 ranges = <0x0 0x0 0xf 0xec000000 0x04000000
48 0x1 0x0 0xf 0xff800000 0x00010000
49 0x2 0x0 0xf 0xffdf0000 0x00010000>;
54 ranges = <0x0 0xf 0xffe00000 0x100000>;
58 reg = <0xf 0xffe0a000 0 0x1000>;
59 ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0x80000000
[all …]
/linux-6.14.4/arch/arm/net/
Dbpf_jit_32.h12 #define ARM_R0 0
29 #define ARM_COND_EQ 0x0 /* == */
30 #define ARM_COND_NE 0x1 /* != */
31 #define ARM_COND_CS 0x2 /* unsigned >= */
33 #define ARM_COND_CC 0x3 /* unsigned < */
35 #define ARM_COND_MI 0x4 /* < 0 */
36 #define ARM_COND_PL 0x5 /* >= 0 */
37 #define ARM_COND_VS 0x6 /* Signed Overflow */
38 #define ARM_COND_VC 0x7 /* No Signed Overflow */
39 #define ARM_COND_HI 0x8 /* unsigned > */
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/net/wireless/
Dqcom,ath11k.yaml269 reg = <0xc000000 0x2000000>;
270 interrupts = <0 320 1>,
271 <0 319 1>,
272 <0 318 1>,
273 <0 317 1>,
274 <0 316 1>,
275 <0 315 1>,
276 <0 314 1>,
277 <0 311 1>,
278 <0 310 1>,
[all …]
/linux-6.14.4/arch/arm/boot/dts/nxp/ls/
Dls1021a.dtsi31 #size-cells = <0>;
36 reg = <0xf00>;
37 clocks = <&clockgen 1 0>;
44 reg = <0xf01>;
45 clocks = <&clockgen 1 0>;
50 memory@0 {
52 reg = <0x0 0x0 0x0 0x0>;
57 #clock-cells = <0>;
80 offset = <0xb0>;
81 mask = <0x02>;
[all …]
/linux-6.14.4/arch/arm64/boot/dts/nvidia/
Dtegra186.dtsi20 reg = <0x0 0x00100000 0x0 0xf000>,
21 <0x0 0x0010f000 0x0 0x1000>;
27 reg = <0x0 0x2200000 0x0 0x10000>,
28 <0x0 0x2210000 0x0 0x10000>;
44 reg = <0x0 0x02490000 0x0 0x10000>;
71 snps,burst-map = <0x7>;
78 reg = <0x0 0x2600000 0x0 0x210000>;
116 dma-channel-mask = <0xfffffffe>;
129 ranges = <0x02900000 0x0 0x02900000 0x200000>;
134 reg = <0x02900800 0x800>;
[all …]
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dsdm630.dtsi35 #clock-cells = <0>;
42 #clock-cells = <0>;
50 #size-cells = <0>;
55 reg = <0x0 0x100>;
75 reg = <0x0 0x101>;
90 reg = <0x0 0x102>;
105 reg = <0x0 0x103>;
117 cpu4: cpu@0 {
120 reg = <0x0 0x0>;
140 reg = <0x0 0x1>;
[all …]
Dqcs615.dtsi23 #size-cells = <0>;
25 cpu0: cpu@0 {
28 reg = <0x0 0x0>;
48 reg = <0x0 0x100>;
67 reg = <0x0 0x200>;
86 reg = <0x0 0x300>;
105 reg = <0x0 0x400>;
124 reg = <0x0 0x500>;
143 reg = <0x0 0x600>;
163 reg = <0x0 0x700>;
[all …]
Dsc8180x.dtsi29 #clock-cells = <0>;
35 #clock-cells = <0>;
43 #size-cells = <0>;
45 cpu0: cpu@0 {
48 reg = <0x0 0x0>;
52 qcom,freq-domain = <&cpufreq_hw 0>;
59 clocks = <&cpufreq_hw 0>;
77 reg = <0x0 0x100>;
81 qcom,freq-domain = <&cpufreq_hw 0>;
88 clocks = <&cpufreq_hw 0>;
[all …]
Dsc7180.dtsi66 #clock-cells = <0>;
72 #clock-cells = <0>;
78 #size-cells = <0>;
80 cpu0: cpu@0 {
83 reg = <0x0 0x0>;
84 clocks = <&cpufreq_hw 0>;
95 qcom,freq-domain = <&cpufreq_hw 0>;
112 reg = <0x0 0x100>;
113 clocks = <&cpufreq_hw 0>;
124 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsm8150.dtsi34 #clock-cells = <0>;
41 #clock-cells = <0>;
49 #size-cells = <0>;
51 cpu0: cpu@0 {
54 reg = <0x0 0x0>;
55 clocks = <&cpufreq_hw 0>;
60 qcom,freq-domain = <&cpufreq_hw 0>;
62 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
83 reg = <0x0 0x100>;
84 clocks = <&cpufreq_hw 0>;
[all …]