Home
last modified time | relevance | path

Searched +full:0 +full:xf9000000 (Results 1 – 25 of 38) sorted by relevance

12

/linux-6.14.4/arch/arm64/boot/dts/intel/
Dsocfpga_agilex_n6000.dts26 reg = <0 0x80000000 0 0>;
29 soc@0 {
32 reg = <0x80000000 0x60000000>,
33 <0xf9000000 0x00100000>;
37 ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>;
39 dma-controller@0 {
41 reg = <0x00000000 0x00000000 0x00001000>;
/linux-6.14.4/Documentation/devicetree/bindings/soc/intel/
Dintel,hps-copy-engine.yaml39 reg = <0x80000000 0x60000000>,
40 <0xf9000000 0x00100000>;
44 ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>;
46 dma-controller@0 {
48 reg = <0x00000000 0x00000000 0x00001000>;
/linux-6.14.4/Documentation/devicetree/bindings/pci/
Dpci-armada8k.txt32 reg = <0 0xf2600000 0 0x10000>, <0 0xf6f00000 0 0x80000>;
40 bus-range = <0 0xff>;
41 ranges = <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000 /* downstream I/O */
42 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>; /* non-prefetchable memory */
43 interrupt-map-mask = <0 0 0 0>;
44 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
/linux-6.14.4/arch/arm/mach-footbridge/include/mach/
Dmemory.h22 #define FLUSH_BASE 0xf9000000
24 #define FLUSH_BASE_PHYS 0x50000000
Dhardware.h13 * 0xff800000 0x40000000 1MB X-Bus
14 * 0xff000000 0x7c000000 1MB PCI I/O space
15 * 0xfe000000 0x42000000 1MB CSR
16 * 0xfd000000 0x78000000 1MB Outbound write flush (not supported)
17 * 0xfc000000 0x79000000 1MB PCI IACK/special space
18 * 0xfb000000 0x7a000000 16MB PCI Config type 1
19 * 0xfa000000 0x7b000000 16MB PCI Config type 0
20 * 0xf9000000 0x50000000 1MB Cache flush
21 * 0xf0000000 0x80000000 16MB ISA memory
24 #define XBUS_SIZE 0x00100000
[all …]
/linux-6.14.4/arch/arc/boot/dts/
Dnsimosci.dts18 /* bootargs = "console=tty0 consoleblank=0"; */
20 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 conso…
36 #clock-cells = <0>;
49 reg = <0xf0000000 0x2000>;
59 #clock-cells = <0>;
66 reg = <0xf9000000 0x400>;
73 reg = <0xf9000400 0x14>;
80 reg = <0xf0003000 0x44>;
Dnsimosci_hs.dts18 /* bootargs = "console=tty0 consoleblank=0"; */
20 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 conso…
36 #clock-cells = <0>;
49 reg = <0xf0000000 0x2000>;
59 #clock-cells = <0>;
66 reg = <0xf9000000 0x400>;
73 reg = <0xf9000400 0x14>;
80 reg = <0xf0003000 0x44>;
Dnsimosci_hs_idu.dts18 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 conso…
34 #clock-cells = <0>;
54 reg = <0xf0000000 0x2000>;
56 interrupts = <0>;
65 #clock-cells = <0>;
72 reg = <0xf9000000 0x400>;
79 reg = <0xf9000400 0x14>;
87 reg = <0xf0003000 0x44>;
/linux-6.14.4/arch/arm/mach-spear/
Dspear.h18 #define SPEAR_ICM1_2_BASE UL(0xD0000000)
19 #define VA_SPEAR_ICM1_2_BASE IOMEM(0xFD000000)
20 #define SPEAR_ICM1_UART_BASE UL(0xD0000000)
22 #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000)
25 #define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000)
26 #define VA_SPEAR6XX_ML_CPU_BASE IOMEM(0xF0000000)
29 #define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000)
30 #define VA_SPEAR_ICM3_SMI_CTRL_BASE IOMEM(0xFC000000)
31 #define SPEAR_ICM3_DMA_BASE UL(0xFC400000)
32 #define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
[all …]
Dspear13xx.c39 writel_relaxed(0x06, VA_L2CC_BASE + L310_PREFETCH_CTRL); in spear13xx_l2x0_init()
45 writel_relaxed(0x221, VA_L2CC_BASE + L310_TAG_LATENCY_CTRL); in spear13xx_l2x0_init()
46 writel_relaxed(0x441, VA_L2CC_BASE + L310_DATA_LATENCY_CTRL); in spear13xx_l2x0_init()
47 l2x0_init(VA_L2CC_BASE, 0x30a00001, 0xfe0fffff); in spear13xx_l2x0_init()
53 * 0xB3000000 0xF9000000
54 * 0xE0000000 0xFD000000
55 * 0xEC000000 0xFC000000
56 * 0xED000000 0xFB000000
/linux-6.14.4/drivers/staging/rtl8723bs/hal/
DHalPhyRf_8723B.c11 /* MACRO definition for pRFCalibrateInfo->TxIQC_8723B[0] */
13 #define IDX_0xC94 0
15 #define IDX_0xC14 0
17 #define KEY 0
21 #define PATH_S1 0 /* RF_PATH_A */
30 0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6,
34 0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4,
51 s32 ele_A = 0, ele_D, ele_C = 0, value32; in setIqkMatrix_8723B()
56 ele_D = (OFDMSwingTable_New[OFDM_index] & 0xFFC00000)>>22; in setIqkMatrix_8723B()
59 if (IqkResult_X != 0) { in setIqkMatrix_8723B()
[all …]
/linux-6.14.4/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
Dphy.c91 rtl_write_byte(rtlpriv, 0x04CA, 0x0B); in rtl8723be_phy_mac_config()
106 regval | BIT(13) | BIT(0) | BIT(1)); in rtl8723be_phy_bb_config()
112 tmp = rtl_read_dword(rtlpriv, 0x4c); in rtl8723be_phy_bb_config()
113 rtl_write_dword(rtlpriv, 0x4c, tmp | BIT(23)); in rtl8723be_phy_bb_config()
115 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL + 1, 0x80); in rtl8723be_phy_bb_config()
120 crystalcap = crystalcap & 0x3F; in rtl8723be_phy_bb_config()
121 rtl_set_bbreg(hw, REG_MAC_PHY_CTRL, 0xFFF000, in rtl8723be_phy_bb_config()
140 u32 intf = (rtlhal->interface == INTF_USB ? BIT(1) : BIT(0)); in _rtl8723be_check_positive()
142 u8 board_type = ((rtlhal->board_type & BIT(4)) >> 4) << 0 | /* _GLNA */ in _rtl8723be_check_positive()
150 0 << 20 | /* interface 2/2 */ in _rtl8723be_check_positive()
[all …]
/linux-6.14.4/arch/powerpc/boot/dts/
Dmpc8349emitx.dts27 #size-cells = <0>;
29 PowerPC,8349@0 {
31 reg = <0x0>;
36 timebase-frequency = <0>; // from bootloader
37 bus-frequency = <0>; // from bootloader
38 clock-frequency = <0>; // from bootloader
44 reg = <0x00000000 0x10000000>;
52 ranges = <0x0 0xe0000000 0x00100000>;
53 reg = <0xe0000000 0x00000200>;
54 bus-frequency = <0>; // from bootloader
[all …]
/linux-6.14.4/drivers/net/wireless/realtek/rtl8xxxu/
D8188f.c18 {0x024, 0xDF}, {0x025, 0x07}, {0x02B, 0x1C}, {0x283, 0x20},
19 {0x421, 0x0F}, {0x428, 0x0A}, {0x429, 0x10}, {0x430, 0x00},
20 {0x431, 0x00}, {0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04},
21 {0x435, 0x05}, {0x436, 0x07}, {0x437, 0x08}, {0x43C, 0x04},
22 {0x43D, 0x05}, {0x43E, 0x07}, {0x43F, 0x08}, {0x440, 0x5D},
23 {0x441, 0x01}, {0x442, 0x00}, {0x444, 0x10}, {0x445, 0x00},
24 {0x446, 0x00}, {0x447, 0x00}, {0x448, 0x00}, {0x449, 0xF0},
25 {0x44A, 0x0F}, {0x44B, 0x3E}, {0x44C, 0x10}, {0x44D, 0x00},
26 {0x44E, 0x00}, {0x44F, 0x00}, {0x450, 0x00}, {0x451, 0xF0},
27 {0x452, 0x0F}, {0x453, 0x00}, {0x456, 0x5E}, {0x460, 0x44},
[all …]
D8723b.c20 {0x02f, 0x30}, {0x035, 0x00}, {0x039, 0x08}, {0x04e, 0xe0},
21 {0x064, 0x00}, {0x067, 0x20}, {0x428, 0x0a}, {0x429, 0x10},
22 {0x430, 0x00}, {0x431, 0x00},
23 {0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04}, {0x435, 0x05},
24 {0x436, 0x07}, {0x437, 0x08}, {0x43c, 0x04}, {0x43d, 0x05},
25 {0x43e, 0x07}, {0x43f, 0x08}, {0x440, 0x5d}, {0x441, 0x01},
26 {0x442, 0x00}, {0x444, 0x10}, {0x445, 0x00}, {0x446, 0x00},
27 {0x447, 0x00}, {0x448, 0x00}, {0x449, 0xf0}, {0x44a, 0x0f},
28 {0x44b, 0x3e}, {0x44c, 0x10}, {0x44d, 0x00}, {0x44e, 0x00},
29 {0x44f, 0x00}, {0x450, 0x00}, {0x451, 0xf0}, {0x452, 0x0f},
[all …]
D8192e.c20 {0x011, 0xeb}, {0x012, 0x07}, {0x014, 0x75}, {0x303, 0xa7},
21 {0x428, 0x0a}, {0x429, 0x10}, {0x430, 0x00}, {0x431, 0x00},
22 {0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04}, {0x435, 0x05},
23 {0x436, 0x07}, {0x437, 0x08}, {0x43c, 0x04}, {0x43d, 0x05},
24 {0x43e, 0x07}, {0x43f, 0x08}, {0x440, 0x5d}, {0x441, 0x01},
25 {0x442, 0x00}, {0x444, 0x10}, {0x445, 0x00}, {0x446, 0x00},
26 {0x447, 0x00}, {0x448, 0x00}, {0x449, 0xf0}, {0x44a, 0x0f},
27 {0x44b, 0x3e}, {0x44c, 0x10}, {0x44d, 0x00}, {0x44e, 0x00},
28 {0x44f, 0x00}, {0x450, 0x00}, {0x451, 0xf0}, {0x452, 0x0f},
29 {0x453, 0x00}, {0x456, 0x5e}, {0x460, 0x66}, {0x461, 0x66},
[all …]
D8188e.c20 {0x026, 0x41}, {0x027, 0x35}, {0x040, 0x00}, {0x421, 0x0f},
21 {0x428, 0x0a}, {0x429, 0x10}, {0x430, 0x00}, {0x431, 0x01},
22 {0x432, 0x02}, {0x433, 0x04}, {0x434, 0x05}, {0x435, 0x06},
23 {0x436, 0x07}, {0x437, 0x08}, {0x438, 0x00}, {0x439, 0x00},
24 {0x43a, 0x01}, {0x43b, 0x02}, {0x43c, 0x04}, {0x43d, 0x05},
25 {0x43e, 0x06}, {0x43f, 0x07}, {0x440, 0x5d}, {0x441, 0x01},
26 {0x442, 0x00}, {0x444, 0x15}, {0x445, 0xf0}, {0x446, 0x0f},
27 {0x447, 0x00}, {0x458, 0x41}, {0x459, 0xa8}, {0x45a, 0x72},
28 {0x45b, 0xb9}, {0x460, 0x66}, {0x461, 0x66}, {0x480, 0x08},
29 {0x4c8, 0xff}, {0x4c9, 0x08}, {0x4cc, 0xff}, {0x4cd, 0xff},
[all …]
/linux-6.14.4/drivers/video/fbdev/
Dvalkyriefb.c136 out_8(&valkyrie_regs->status.r, 0); in valkyriefb_set_par()
141 out_8(&valkyrie_regs->mode.r, init->mode | 0x80); in valkyriefb_set_par()
149 return 0; in valkyriefb_set_par()
167 return 0; in valkyriefb_check_var()
171 * Blank the screen if blank_mode != 0, else unblank. If blank_mode == NULL
173 * black. Return 0 if blanking succeeded, != 0 if un-/blanking failed due
203 out_8(&p->valkyrie_regs->mode.r, init->mode | 0x40); in valkyriefb_blank()
206 out_8(&p->valkyrie_regs->mode.r, 0x66); in valkyriefb_blank()
209 return 0; in valkyriefb_blank()
238 return 0; in valkyriefb_setcolreg()
[all …]
/linux-6.14.4/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/
Dphy.c52 "BBR MASK=0x%x Addr[0x%x]=0x%x\n", bitmask, in rtl88e_phy_query_bb_reg()
148 u8 rfpi_enable = 0; in _rtl88e_phy_rf_serial_read()
151 offset &= 0xff; in _rtl88e_phy_rf_serial_read()
155 return 0xFFFFFFFF; in _rtl88e_phy_rf_serial_read()
182 "RFR-%d Addr[0x%x]=0x%x\n", in _rtl88e_phy_rf_serial_read()
201 offset &= 0xff; in _rtl88e_phy_rf_serial_write()
203 data_and_addr = ((newoffset << 20) | (data & 0x000fffff)) & 0x0fffffff; in _rtl88e_phy_rf_serial_write()
206 "RFW-%d Addr[0x%x]=0x%x\n", in _rtl88e_phy_rf_serial_write()
215 rtl_write_byte(rtlpriv, 0x04CA, 0x0B); in rtl88e_phy_mac_config()
229 regval | BIT(13) | BIT(0) | BIT(1)); in rtl88e_phy_bb_config()
[all …]
/linux-6.14.4/arch/arm/boot/dts/qcom/
Dqcom-apq8084.dtsi21 reg = <0xfa00000 0x200000>;
28 #size-cells = <0>;
30 cpu@0 {
33 reg = <0>;
94 reg = <0x0 0x0>;
189 interrupts = <GIC_PPI 7 0xf04>;
195 #clock-cells = <0>;
201 #clock-cells = <0>;
208 interrupts = <GIC_PPI 2 0xf08>,
209 <GIC_PPI 3 0xf08>,
[all …]
/linux-6.14.4/arch/m68k/mac/
Dconfig.c76 int unknown = 0; in mac_parse_bootinfo()
353 * Quadra. Video is at 0xF9000000, via is like a MacII. We label it
772 .id = 0,
805 scc_a_rsrcs[0].start = (resource_size_t)mac_bi_data.sccbase + 2; in mac_identify()
806 scc_a_rsrcs[0].end = scc_a_rsrcs[0].start; in mac_identify()
810 scc_b_rsrcs[0].start = (resource_size_t)mac_bi_data.sccbase; in mac_identify()
811 scc_b_rsrcs[0].end = scc_b_rsrcs[0].start; in mac_identify()
838 printk(KERN_DEBUG " Video: addr 0x%lx row 0x%lx depth %lx dimensions %ld x %ld\n", in mac_identify()
840 mac_bi_data.videodepth, mac_bi_data.dimensions & 0xFFFF, in mac_identify()
842 printk(KERN_DEBUG " Videological 0x%lx phys. 0x%lx, SCC at 0x%lx\n", in mac_identify()
[all …]
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dmsm8994.dtsi29 #clock-cells = <0>;
36 #clock-cells = <0>;
44 #size-cells = <0>;
46 cpu0: cpu@0 {
49 reg = <0x0 0x0>;
62 reg = <0x0 0x1>;
70 reg = <0x0 0x2>;
78 reg = <0x0 0x3>;
86 reg = <0x0 0x100>;
99 reg = <0x0 0x101>;
[all …]
/linux-6.14.4/arch/arm/vfp/
Dvfpmodule.c137 memset(vfp, 0, sizeof(union vfp_state)); in vfp_thread_flush()
248 current->thread.error_code = 0; in vfp_raise_sigfpe()
261 pr_err("VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n", in vfp_panic()
263 for (i = 0; i < 32; i += 2) in vfp_panic()
264 pr_err("VFP: s%2u: 0x%08x s%2u: 0x%08x\n", in vfp_panic()
273 int si_code = 0; in vfp_raise_exceptions()
317 pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr); in vfp_emulate_instruction()
353 int si_code2 = 0; in VFP_bounce()
354 int si_code = 0; in VFP_bounce()
362 * 0 1 x - synchronous exception in VFP_bounce()
[all …]
/linux-6.14.4/crypto/
Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/linux-6.14.4/drivers/net/wireless/realtek/rtw88/
Drtw8723d.c19 #define WLAN_SLOT_TIME 0x09
20 #define WLAN_RL_VAL 0x3030
21 #define WLAN_BAR_VAL 0x0201ffff
22 #define BIT_MASK_TBTT_HOLD 0x00000fff
24 #define BIT_MASK_TBTT_SETUP 0x000000ff
25 #define BIT_SHIFT_TBTT_SETUP 0
30 #define WLAN_TBTT_TIME_NORMAL TBTT_TIME(0x04, 0x80)
31 #define WLAN_TBTT_TIME_STOP_BCN TBTT_TIME(0x04, 0x64)
32 #define WLAN_PIFS_VAL 0
33 #define WLAN_AGG_BRK_TIME 0x16
[all …]

12