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/aosp_15_r20/external/llvm/test/MC/ARM/
H A Dv8_IT_manual.s5 it ge label
9 it ge label
11 @ CHECK: [[@LINE+2]]:1: warning: deprecated instruction in IT block
12 it ge label
14 @ CHECK: [[@LINE+2]]:1: warning: deprecated instruction in IT block
15 it ge label
18 @ CHECK: [[@LINE+2]]:1: warning: deprecated instruction in IT block
19 it ge label
23 it ge label
27 it ge label
[all …]
/aosp_15_r20/external/cronet/third_party/libc++/src/test/libcxx/algorithms/
H A Drobust_against_cpp20_hostile_iterators.compile.pass.cpp67 template <typename It>
69 : IteratorAdaptorBase<Cpp20HostileIterator<It>, It> {
71 Cpp20HostileIterator(It) {} in Cpp20HostileIterator()
81 Cpp20HostileIterator<int*> it; in test() local
85 (void) std::adjacent_find(it, it); in test()
86 (void) std::adjacent_find(it, it, pred); in test()
87 (void) std::all_of(it, it, pred); in test()
88 (void) std::any_of(it, it, pred); in test()
89 (void) std::binary_search(it, it, 0); in test()
90 (void) std::binary_search(it, it, 0, pred); in test()
[all …]
/aosp_15_r20/external/mesa3d/src/intel/vulkan/grl/gpu/libs/
H A Dlsc_intrinsics_fallback.cl10 uint load_uchar_to_uint_L1UC_L3UC(global uchar* it, int offset)
12 return (uint)(it[offset]);
15 uint load_uchar_to_uint_L1UC_L3C(global uchar* it, int offset)
17 return (uint)(it[offset]);
20 uint load_uchar_to_uint_L1C_L3UC(global uchar* it, int offset)
22 return (uint)(it[offset]);
25 uint load_uchar_to_uint_L1C_L3C(global uchar* it, int offset)
27 return (uint)(it[offset]);
30 uint load_uchar_to_uint_L1S_L3UC(global uchar* it, int offset)
32 return (uint)(it[offset]);
[all …]
H A Dlsc_intrinsics.cl143 uint load_uchar_to_uint_L1UC_L3UC(global uchar* it, int offset)
145 return __builtin_IB_lsc_load_global_uchar_to_uint(it, offset, LSC_LDCC_L1UC_L3UC);
148 uint load_uchar_to_uint_L1UC_L3C(global uchar* it, int offset)
150 return __builtin_IB_lsc_load_global_uchar_to_uint(it, offset, LSC_LDCC_L1UC_L3C);
153 uint load_uchar_to_uint_L1C_L3UC(global uchar* it, int offset)
155 return __builtin_IB_lsc_load_global_uchar_to_uint(it, offset, LSC_LDCC_L1C_L3UC);
158 uint load_uchar_to_uint_L1C_L3C(global uchar* it, int offset)
160 return __builtin_IB_lsc_load_global_uchar_to_uint(it, offset, LSC_LDCC_L1C_L3C);
163 uint load_uchar_to_uint_L1S_L3UC(global uchar* it, int offset)
165 return __builtin_IB_lsc_load_global_uchar_to_uint(it, offset, LSC_LDCC_L1S_L3UC);
[all …]
H A Dlsc_intrinsics.h9 uint load_uchar_to_uint_L1UC_L3UC(global uchar* it, int offset);
10 uint load_uchar_to_uint_L1UC_L3C(global uchar* it, int offset);
11 uint load_uchar_to_uint_L1C_L3UC(global uchar* it, int offset);
12 uint load_uchar_to_uint_L1C_L3C(global uchar* it, int offset);
13 uint load_uchar_to_uint_L1S_L3UC(global uchar* it, int offset);
14 uint load_uchar_to_uint_L1S_L3C(global uchar* it, int offset);
15 uint load_uchar_to_uint_L1IAR_L3C(global uchar* it, int offset);
17 uint load_ushort_to_uint_L1UC_L3UC(global ushort* it, int offset);
18 uint load_ushort_to_uint_L1UC_L3C(global ushort* it, int offset);
19 uint load_ushort_to_uint_L1C_L3UC(global ushort* it, int offset);
[all …]
/aosp_15_r20/frameworks/minikin/tests/unittest/
H A DBidiUtilsTest.cpp37 auto it = bidiText.begin(); in TEST() local
38 EXPECT_NE(bidiText.end(), it); in TEST()
39 EXPECT_EQ(Range(0, ltrLength), (*it).range); in TEST()
40 EXPECT_FALSE((*it).isRtl); in TEST()
41 ++it; in TEST()
42 EXPECT_EQ(bidiText.end(), it); in TEST()
46 auto it = bidiText.begin(); in TEST() local
47 EXPECT_NE(bidiText.end(), it); in TEST()
48 EXPECT_EQ(Range(0, ltrLength), (*it).range); in TEST()
49 EXPECT_FALSE((*it).isRtl); in TEST()
[all …]
/aosp_15_r20/external/OpenCSD/decoder/tests/snapshots-ete/002-ack_test_scr/
H A Dtest_TARMAC3 1 clk cpu0 IT (1) 10300000 14004000 O EL3h_s : B 0x10310000
4 2 clk cpu0 IT (2) 10310000 d2b01000 O EL3h_s : MOV x0,#0x80800000
6 3 clk cpu0 IT (3) 10310004 d51e2040 O EL3h_s : MSR TCR_EL3,x0
8 4 clk cpu0 IT (4) 10310008 d5033fdf O EL3h_s : ISB
28 5 clk cpu0 IT (5) 1031000c d2b01000 O EL3h_s : MOV x0,#0x80800000
30 6 clk cpu0 IT (6) 10310010 d51c2040 O EL3h_s : MSR TCR_EL2,x0
32 7 clk cpu0 IT (7) 10310014 d5033fdf O EL3h_s : ISB
35 8 clk cpu0 IT (8) 10310018 d2800040 O EL3h_s : MOV x0,#2
37 9 clk cpu0 IT (9) 1031001c d51c1100 O EL3h_s : MSR HCR_EL2,x0
39 10 clk cpu0 IT (10) 10310020 d5033fdf O EL3h_s : ISB
[all …]
/aosp_15_r20/external/pdfium/core/fxcrt/
H A Dfx_bidi_unittest.cpp168 auto it = bidi.begin(); in TEST() local
169 ASSERT_NE(it, bidi.end()); in TEST()
170 EXPECT_EQ(0, it->start); in TEST()
171 EXPECT_EQ(1, it->count); in TEST()
172 EXPECT_EQ(CFX_BidiChar::Direction::kNeutral, it->direction); in TEST()
173 ++it; in TEST()
174 EXPECT_EQ(it, bidi.end()); in TEST()
181 auto it = bidi.begin(); in TEST() local
182 ASSERT_NE(it, bidi.end()); in TEST()
183 EXPECT_EQ(0, it->start); in TEST()
[all …]
/aosp_15_r20/external/vixl/test/aarch32/traces/
H A Dassembler-cond-rd-operand-rn-in-it-block-cmp-t32.h38 0x08, 0xbf, 0x80, 0x42 // It eq; cmp eq r0 r0
41 0x08, 0xbf, 0x88, 0x42 // It eq; cmp eq r0 r1
44 0x08, 0xbf, 0x90, 0x42 // It eq; cmp eq r0 r2
47 0x08, 0xbf, 0x98, 0x42 // It eq; cmp eq r0 r3
50 0x08, 0xbf, 0xa0, 0x42 // It eq; cmp eq r0 r4
53 0x08, 0xbf, 0xa8, 0x42 // It eq; cmp eq r0 r5
56 0x08, 0xbf, 0xb0, 0x42 // It eq; cmp eq r0 r6
59 0x08, 0xbf, 0xb8, 0x42 // It eq; cmp eq r0 r7
62 0x08, 0xbf, 0x40, 0x45 // It eq; cmp eq r0 r8
65 0x08, 0xbf, 0x48, 0x45 // It eq; cmp eq r0 r9
[all …]
H A Dassembler-cond-rd-operand-rn-in-it-block-mov-t32.h38 0x08, 0xbf, 0x00, 0x46 // It eq; mov eq r0 r0
41 0x08, 0xbf, 0x08, 0x46 // It eq; mov eq r0 r1
44 0x08, 0xbf, 0x10, 0x46 // It eq; mov eq r0 r2
47 0x08, 0xbf, 0x18, 0x46 // It eq; mov eq r0 r3
50 0x08, 0xbf, 0x20, 0x46 // It eq; mov eq r0 r4
53 0x08, 0xbf, 0x28, 0x46 // It eq; mov eq r0 r5
56 0x08, 0xbf, 0x30, 0x46 // It eq; mov eq r0 r6
59 0x08, 0xbf, 0x38, 0x46 // It eq; mov eq r0 r7
62 0x08, 0xbf, 0x40, 0x46 // It eq; mov eq r0 r8
65 0x08, 0xbf, 0x48, 0x46 // It eq; mov eq r0 r9
[all …]
H A Dassembler-cond-rdlow-rnlow-operand-immediate-imm3-in-it-block-add-t32.h38 0x58, 0xbf, 0xc0, 0x1d // It pl; add pl r0 r0 7
41 0x28, 0xbf, 0x50, 0x1d // It cs; add cs r0 r2 5
44 0x98, 0xbf, 0x31, 0x1c // It ls; add ls r1 r6 0
47 0x38, 0xbf, 0x8d, 0x1d // It cc; add cc r5 r1 6
50 0x28, 0xbf, 0x15, 0x1c // It cs; add cs r5 r2 0
53 0x68, 0xbf, 0xf5, 0x1d // It vs; add vs r5 r6 7
56 0x98, 0xbf, 0x42, 0x1d // It ls; add ls r2 r0 5
59 0x08, 0xbf, 0x63, 0x1d // It eq; add eq r3 r4 5
62 0xb8, 0xbf, 0xec, 0x1d // It lt; add lt r4 r5 7
65 0xb8, 0xbf, 0x7e, 0x1c // It lt; add lt r6 r7 1
[all …]
H A Dassembler-cond-rdlow-rnlow-operand-immediate-imm8-in-it-block-sub-t32.h38 0x48, 0xbf, 0x5a, 0x3b // It mi; sub mi r3 r3 90
41 0x78, 0xbf, 0x8a, 0x3e // It vc; sub vc r6 r6 138
44 0x38, 0xbf, 0x48, 0x3d // It cc; sub cc r5 r5 72
47 0xa8, 0xbf, 0xb5, 0x3e // It ge; sub ge r6 r6 181
50 0x38, 0xbf, 0x8f, 0x39 // It cc; sub cc r1 r1 143
53 0x78, 0xbf, 0x72, 0x3d // It vc; sub vc r5 r5 114
56 0xa8, 0xbf, 0xc3, 0x3c // It ge; sub ge r4 r4 195
59 0xb8, 0xbf, 0xcb, 0x38 // It lt; sub lt r0 r0 203
62 0x88, 0xbf, 0x62, 0x39 // It hi; sub hi r1 r1 98
65 0xc8, 0xbf, 0x1b, 0x1e // It gt; sub gt r3 r3 0
[all …]
H A Dassembler-cond-rdlow-operand-imm8-in-it-block-mov-t32.h38 0x78, 0xbf, 0x6f, 0x21 // It vc; mov vc r1 111
41 0x18, 0xbf, 0x86, 0x21 // It ne; mov ne r1 134
44 0x18, 0xbf, 0x15, 0x25 // It ne; mov ne r5 21
47 0x28, 0xbf, 0xdd, 0x26 // It cs; mov cs r6 221
50 0x28, 0xbf, 0x64, 0x23 // It cs; mov cs r3 100
53 0xd8, 0xbf, 0xd1, 0x22 // It le; mov le r2 209
56 0x98, 0xbf, 0x08, 0x27 // It ls; mov ls r7 8
59 0x28, 0xbf, 0xc9, 0x27 // It cs; mov cs r7 201
62 0x18, 0xbf, 0x70, 0x23 // It ne; mov ne r3 112
65 0xb8, 0xbf, 0x98, 0x24 // It lt; mov lt r4 152
[all …]
H A Dassembler-cond-rdlow-rnlow-operand-immediate-imm3-in-it-block-sub-t32.h38 0x58, 0xbf, 0xc0, 0x1f // It pl; sub pl r0 r0 7
41 0x28, 0xbf, 0x50, 0x1f // It cs; sub cs r0 r2 5
44 0x98, 0xbf, 0x31, 0x1e // It ls; sub ls r1 r6 0
47 0x38, 0xbf, 0x8d, 0x1f // It cc; sub cc r5 r1 6
50 0x28, 0xbf, 0x15, 0x1e // It cs; sub cs r5 r2 0
53 0x68, 0xbf, 0xf5, 0x1f // It vs; sub vs r5 r6 7
56 0x98, 0xbf, 0x42, 0x1f // It ls; sub ls r2 r0 5
59 0x08, 0xbf, 0x63, 0x1f // It eq; sub eq r3 r4 5
62 0xb8, 0xbf, 0xec, 0x1f // It lt; sub lt r4 r5 7
65 0xb8, 0xbf, 0x7e, 0x1e // It lt; sub lt r6 r7 1
[all …]
H A Dassembler-cond-rdlow-rnlow-operand-immediate-imm8-in-it-block-add-t32.h38 0x48, 0xbf, 0x5a, 0x33 // It mi; add mi r3 r3 90
41 0x78, 0xbf, 0x8a, 0x36 // It vc; add vc r6 r6 138
44 0x38, 0xbf, 0x48, 0x35 // It cc; add cc r5 r5 72
47 0xa8, 0xbf, 0xb5, 0x36 // It ge; add ge r6 r6 181
50 0x38, 0xbf, 0x8f, 0x31 // It cc; add cc r1 r1 143
53 0x78, 0xbf, 0x72, 0x35 // It vc; add vc r5 r5 114
56 0xa8, 0xbf, 0xc3, 0x34 // It ge; add ge r4 r4 195
59 0xb8, 0xbf, 0xcb, 0x30 // It lt; add lt r0 r0 203
62 0x88, 0xbf, 0x62, 0x31 // It hi; add hi r1 r1 98
65 0xc8, 0xbf, 0x1b, 0x1c // It gt; add gt r3 r3 0
[all …]
H A Dassembler-cond-rdlow-operand-imm8-in-it-block-cmp-t32.h38 0x78, 0xbf, 0x6f, 0x29 // It vc; cmp vc r1 111
41 0x18, 0xbf, 0x86, 0x29 // It ne; cmp ne r1 134
44 0x18, 0xbf, 0x15, 0x2d // It ne; cmp ne r5 21
47 0x28, 0xbf, 0xdd, 0x2e // It cs; cmp cs r6 221
50 0x28, 0xbf, 0x64, 0x2b // It cs; cmp cs r3 100
53 0xd8, 0xbf, 0xd1, 0x2a // It le; cmp le r2 209
56 0x98, 0xbf, 0x08, 0x2f // It ls; cmp ls r7 8
59 0x28, 0xbf, 0xc9, 0x2f // It cs; cmp cs r7 201
62 0x18, 0xbf, 0x70, 0x2b // It ne; cmp ne r3 112
65 0xb8, 0xbf, 0x98, 0x2c // It lt; cmp lt r4 152
[all …]
H A Dassembler-cond-rdlow-rnlow-rmlow-in-it-block-mul-t32.h38 0x08, 0xbf, 0x40, 0x43 // It eq; mul eq r0 r0 r0
41 0x08, 0xbf, 0x48, 0x43 // It eq; mul eq r0 r1 r0
44 0x08, 0xbf, 0x50, 0x43 // It eq; mul eq r0 r2 r0
47 0x08, 0xbf, 0x58, 0x43 // It eq; mul eq r0 r3 r0
50 0x08, 0xbf, 0x60, 0x43 // It eq; mul eq r0 r4 r0
53 0x08, 0xbf, 0x68, 0x43 // It eq; mul eq r0 r5 r0
56 0x08, 0xbf, 0x70, 0x43 // It eq; mul eq r0 r6 r0
59 0x08, 0xbf, 0x78, 0x43 // It eq; mul eq r0 r7 r0
62 0x08, 0xbf, 0x41, 0x43 // It eq; mul eq r1 r0 r1
65 0x08, 0xbf, 0x49, 0x43 // It eq; mul eq r1 r1 r1
[all …]
H A Dassembler-cond-rd-operand-rn-low-registers-in-it-block-cmn-t32.h38 0x08, 0xbf, 0xc0, 0x42 // It eq; cmn eq r0 r0
41 0x08, 0xbf, 0xc8, 0x42 // It eq; cmn eq r0 r1
44 0x08, 0xbf, 0xd0, 0x42 // It eq; cmn eq r0 r2
47 0x08, 0xbf, 0xd8, 0x42 // It eq; cmn eq r0 r3
50 0x08, 0xbf, 0xe0, 0x42 // It eq; cmn eq r0 r4
53 0x08, 0xbf, 0xe8, 0x42 // It eq; cmn eq r0 r5
56 0x08, 0xbf, 0xf0, 0x42 // It eq; cmn eq r0 r6
59 0x08, 0xbf, 0xf8, 0x42 // It eq; cmn eq r0 r7
62 0x08, 0xbf, 0xc1, 0x42 // It eq; cmn eq r1 r0
65 0x08, 0xbf, 0xc9, 0x42 // It eq; cmn eq r1 r1
[all …]
H A Dassembler-cond-rd-operand-rn-low-registers-in-it-block-tst-t32.h38 0x08, 0xbf, 0x00, 0x42 // It eq; tst eq r0 r0
41 0x08, 0xbf, 0x08, 0x42 // It eq; tst eq r0 r1
44 0x08, 0xbf, 0x10, 0x42 // It eq; tst eq r0 r2
47 0x08, 0xbf, 0x18, 0x42 // It eq; tst eq r0 r3
50 0x08, 0xbf, 0x20, 0x42 // It eq; tst eq r0 r4
53 0x08, 0xbf, 0x28, 0x42 // It eq; tst eq r0 r5
56 0x08, 0xbf, 0x30, 0x42 // It eq; tst eq r0 r6
59 0x08, 0xbf, 0x38, 0x42 // It eq; tst eq r0 r7
62 0x08, 0xbf, 0x01, 0x42 // It eq; tst eq r1 r0
65 0x08, 0xbf, 0x09, 0x42 // It eq; tst eq r1 r1
[all …]
H A Dassembler-cond-rdlow-rnlow-operand-immediate-zero-in-it-block-rsb-t32.h38 0x08, 0xbf, 0x40, 0x42 // It eq; rsb eq r0 r0 0
41 0x08, 0xbf, 0x48, 0x42 // It eq; rsb eq r0 r1 0
44 0x08, 0xbf, 0x50, 0x42 // It eq; rsb eq r0 r2 0
47 0x08, 0xbf, 0x58, 0x42 // It eq; rsb eq r0 r3 0
50 0x08, 0xbf, 0x60, 0x42 // It eq; rsb eq r0 r4 0
53 0x08, 0xbf, 0x68, 0x42 // It eq; rsb eq r0 r5 0
56 0x08, 0xbf, 0x70, 0x42 // It eq; rsb eq r0 r6 0
59 0x08, 0xbf, 0x78, 0x42 // It eq; rsb eq r0 r7 0
62 0x08, 0xbf, 0x41, 0x42 // It eq; rsb eq r1 r0 0
65 0x08, 0xbf, 0x49, 0x42 // It eq; rsb eq r1 r1 0
[all …]
H A Dassembler-cond-rd-operand-rn-shift-rs-in-it-block-mov-t32.h38 0xa8, 0xbf, 0xb1, 0x40 // It ge; mov ge r1 r1 LSL r6
41 0x28, 0xbf, 0x97, 0x40 // It cs; mov cs r7 r7 LSL r2
44 0xc8, 0xbf, 0x81, 0x40 // It gt; mov gt r1 r1 LSL r0
47 0x58, 0xbf, 0xdb, 0x41 // It pl; mov pl r3 r3 ROR r3
50 0x78, 0xbf, 0xcc, 0x41 // It vc; mov vc r4 r4 ROR r1
53 0x68, 0xbf, 0x82, 0x40 // It vs; mov vs r2 r2 LSL r0
56 0x78, 0xbf, 0xe4, 0x40 // It vc; mov vc r4 r4 LSR r4
59 0xd8, 0xbf, 0x36, 0x41 // It le; mov le r6 r6 ASR r6
62 0x88, 0xbf, 0xee, 0x41 // It hi; mov hi r6 r6 ROR r5
65 0xd8, 0xbf, 0x33, 0x41 // It le; mov le r3 r3 ASR r6
[all …]
H A Dassembler-cond-rd-operand-rn-shift-amount-1to31-in-it-block-mov-t32.h38 0x88, 0xbf, 0xa2, 0x02 // It hi; mov hi r2 r4 LSL 10
41 0x28, 0xbf, 0x16, 0x02 // It cs; mov cs r6 r2 LSL 8
44 0xb8, 0xbf, 0x5d, 0x05 // It lt; mov lt r5 r3 LSL 21
47 0xa8, 0xbf, 0xc5, 0x00 // It ge; mov ge r5 r0 LSL 3
50 0x48, 0xbf, 0x0c, 0x01 // It mi; mov mi r4 r1 LSL 4
53 0xa8, 0xbf, 0x36, 0x07 // It ge; mov ge r6 r6 LSL 28
56 0xb8, 0xbf, 0xd4, 0x07 // It lt; mov lt r4 r2 LSL 31
59 0x08, 0xbf, 0x58, 0x04 // It eq; mov eq r0 r3 LSL 17
62 0x78, 0xbf, 0x92, 0x05 // It vc; mov vc r2 r2 LSL 22
65 0xa8, 0xbf, 0x88, 0x01 // It ge; mov ge r0 r1 LSL 6
[all …]
H A Dassembler-cond-rd-rn-operand-rm-all-low-rd-is-rn-in-it-block-and-t32.h38 0xc8, 0xbf, 0x03, 0x40 // It gt; and_ gt r3 r3 r0
41 0xa8, 0xbf, 0x0e, 0x40 // It ge; and_ ge r6 r6 r1
44 0xc8, 0xbf, 0x0f, 0x40 // It gt; and_ gt r7 r7 r1
47 0xc8, 0xbf, 0x02, 0x40 // It gt; and_ gt r2 r2 r0
50 0x08, 0xbf, 0x15, 0x40 // It eq; and_ eq r5 r5 r2
53 0xc8, 0xbf, 0x00, 0x40 // It gt; and_ gt r0 r0 r0
56 0xb8, 0xbf, 0x20, 0x40 // It lt; and_ lt r0 r0 r4
59 0x88, 0xbf, 0x1e, 0x40 // It hi; and_ hi r6 r6 r3
62 0xa8, 0xbf, 0x37, 0x40 // It ge; and_ ge r7 r7 r6
65 0x08, 0xbf, 0x2d, 0x40 // It eq; and_ eq r5 r5 r5
[all …]
H A Dassembler-cond-rd-rn-operand-rm-all-low-rd-is-rn-in-it-block-bic-t32.h38 0xc8, 0xbf, 0x83, 0x43 // It gt; bic gt r3 r3 r0
41 0xa8, 0xbf, 0x8e, 0x43 // It ge; bic ge r6 r6 r1
44 0xc8, 0xbf, 0x8f, 0x43 // It gt; bic gt r7 r7 r1
47 0xc8, 0xbf, 0x82, 0x43 // It gt; bic gt r2 r2 r0
50 0x08, 0xbf, 0x95, 0x43 // It eq; bic eq r5 r5 r2
53 0xc8, 0xbf, 0x80, 0x43 // It gt; bic gt r0 r0 r0
56 0xb8, 0xbf, 0xa0, 0x43 // It lt; bic lt r0 r0 r4
59 0x88, 0xbf, 0x9e, 0x43 // It hi; bic hi r6 r6 r3
62 0xa8, 0xbf, 0xb7, 0x43 // It ge; bic ge r7 r7 r6
65 0x08, 0xbf, 0xad, 0x43 // It eq; bic eq r5 r5 r5
[all …]
/aosp_15_r20/external/perfetto/src/trace_processor/
H A Dtrace_database_integrationtest.cc58 auto it = processor->ExecuteQuery( in TEST() local
61 ASSERT_TRUE(it.Next()); in TEST()
62 ASSERT_EQ(it.Get(0).type, SqlValue::kLong); in TEST()
63 ASSERT_EQ(it.Get(0).long_value, 0); in TEST()
66 it = processor->ExecuteQuery( in TEST()
69 ASSERT_TRUE(it.Next()); in TEST()
70 ASSERT_EQ(it.Get(0).type, SqlValue::kLong); in TEST()
71 ASSERT_EQ(it.Get(0).long_value, 1); in TEST()
81 auto it = processor->ExecuteQuery( in TEST() local
84 ASSERT_TRUE(it.Next()); in TEST()
[all …]

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