| /linux-6.14.4/drivers/net/ethernet/mellanox/mlxsw/ |
| D | spectrum_port_range.c | 26 const struct mlxsw_sp_port_range_reg *prr) in mlxsw_sp_port_range_reg_configure() argument
33 mlxsw_reg_pprr_pack(pprr_pl, prr->index); in mlxsw_sp_port_range_reg_configure()
36 mlxsw_reg_pprr_src_set(pprr_pl, prr->range.source); in mlxsw_sp_port_range_reg_configure()
37 mlxsw_reg_pprr_dst_set(pprr_pl, !prr->range.source); in mlxsw_sp_port_range_reg_configure()
40 mlxsw_reg_pprr_port_range_min_set(pprr_pl, prr->range.min); in mlxsw_sp_port_range_reg_configure()
41 mlxsw_reg_pprr_port_range_max_set(pprr_pl, prr->range.max); in mlxsw_sp_port_range_reg_configure()
52 struct mlxsw_sp_port_range_reg *prr; in mlxsw_sp_port_range_reg_create() local
55 prr = kzalloc(sizeof(*prr), GFP_KERNEL); in mlxsw_sp_port_range_reg_create()
56 if (!prr) in mlxsw_sp_port_range_reg_create()
59 prr->range = *range; in mlxsw_sp_port_range_reg_create()
[all …]
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| /linux-6.14.4/Documentation/devicetree/bindings/hwinfo/ |
| D | renesas,prr.yaml | 4 $id: http://devicetree.org/schemas/hwinfo/renesas,prr.yaml#
21 - renesas,prr
34 prr: chipid@ff000044 {
35 compatible = "renesas,prr";
|
| /linux-6.14.4/Documentation/devicetree/bindings/fpga/ |
| D | fpga-region.yaml | 46 Partial Reconfiguration Region (PRR)
48 * A PRR is a specific section of an FPGA reserved for reconfiguration.
49 * A base (or static) FPGA image may create a set of PRR's that later may
51 * The size and specific location of each PRR is fixed.
52 * The connections at the edge of each PRR are fixed. The image that is loaded
53 into a PRR must fit and must use a subset of the region's connections.
59 * An FPGA image that is designed to be loaded into a PRR. There may be
60 any number of personas designed to fit into a PRR, but only one at a time
108 a soft logic bridge (Bridge0-2) in the FPGA. The contents of each PRR can be
159 base FPGA region. The "Full Reconfiguration to add PRR's" example below shows
[all …]
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| /linux-6.14.4/arch/sh/kernel/cpu/sh4/ |
| D | probe.c | 17 unsigned long pvr, prr, cvr; in cpu_probe() local
29 prr = (__raw_readl(CCN_PRR) >> 4) & 0xff; in cpu_probe()
106 if (prr == 0x61) in cpu_probe()
108 else if (prr == 0xa1) in cpu_probe()
129 switch (prr) { in cpu_probe()
145 switch (prr) { in cpu_probe()
180 switch (prr) { in cpu_probe()
|
| /linux-6.14.4/tools/testing/selftests/net/packetdrill/ |
| D | tcp_fast_recovery_prr-ss-30pkt-lost-1_4-11_16.pkt | 2 // Test PRR-slowstart implementation. The sender sends 20 packets. Packet
22 // Receive first DUPACK, entering PRR part
35 // Enter PRR CRB
40 // Enter PRR slow start
|
| D | tcp_fast_recovery_prr-ss-ack-below-snd_una-cubic.pkt | 2 // Test PRR-slowstart implementation.
|
| D | tcp_fast_recovery_prr-ss-30pkt-lost1_4.pkt | 2 // Test PRR-slowstart implementation. The sender sends 20 packets. Packet
|
| D | tcp_fast_recovery_prr-ss-10pkt-lost-1.pkt | 2 // Test PRR-slowstart implementation.
|
| /linux-6.14.4/drivers/soc/renesas/ |
| D | renesas-soc.c | 17 u32 reg; /* CCCR or PRR, if not in DT */
22 .reg = 0xff000044, /* PRR (Product Register) */
27 .reg = 0xff000044, /* PRR (Product Register) */
32 .reg = 0xfff00044, /* PRR (Product Register) */
58 .reg = 0xff000044, /* PRR (Product Register) */
63 .reg = 0xfff00044, /* PRR (Product Register) */
470 { .compatible = "renesas,prr", .data = &id_prr },
503 /* Try hardcoded CCCR/PRR fallback */ in renesas_soc_init()
|
| /linux-6.14.4/include/linux/ |
| D | adreno-smmu-priv.h | 54 * Region (PRR) bit in the ACTLR register.
56 * the physical address of PRR page passed from GPU
|
| /linux-6.14.4/Documentation/spi/ |
| D | butterfly.rst | 43 (a) flash new firmware that disables SPI (set PRR.2, and disable pullups
|
| /linux-6.14.4/arch/arm/boot/dts/renesas/ |
| D | r8a7779.dtsi | 714 prr: chipid@ff000044 { label
715 compatible = "renesas,prr";
|
| D | r8a7792.dtsi | 947 prr: chipid@ff000044 { label
948 compatible = "renesas,prr";
|
| D | r8a73a4.dtsi | 760 prr: chipid@ff000044 { label
761 compatible = "renesas,prr";
|
| D | r8a77470.dtsi | 1020 prr: chipid@ff000044 { label
1021 compatible = "renesas,prr";
|
| D | r8a7794.dtsi | 1440 prr: chipid@ff000044 { label
1441 compatible = "renesas,prr";
|
| D | r8a7793.dtsi | 1454 prr: chipid@ff000044 { label
1455 compatible = "renesas,prr";
|
| D | r8a7745.dtsi | 1594 prr: chipid@ff000044 { label
1595 compatible = "renesas,prr";
|
| D | r8a7743.dtsi | 1784 prr: chipid@ff000044 { label
1785 compatible = "renesas,prr";
|
| D | r8a7744.dtsi | 1770 prr: chipid@ff000044 { label
1771 compatible = "renesas,prr";
|
| /linux-6.14.4/arch/sh/mm/ |
| D | cache-sh4.c | 385 printk("PVR=%08x CVR=%08x PRR=%08x\n", in sh4_cache_init()
|
| /linux-6.14.4/arch/arm64/boot/dts/renesas/ |
| D | r8a77970.dtsi | 1196 prr: chipid@fff00044 { label
1197 compatible = "renesas,prr";
|
| D | r8a779f0.dtsi | 1280 prr: chipid@fff00044 { label
1281 compatible = "renesas,prr";
|
| D | r8a77980.dtsi | 1579 prr: chipid@fff00044 { label
1580 compatible = "renesas,prr";
|
| D | r8a77995.dtsi | 1448 prr: chipid@fff00044 { label
1449 compatible = "renesas,prr";
|