Searched full:ce5 (Results 1 – 13 of 13) sorted by relevance
113 - description: interrupt event for ring CE5167 - const: ce5236 - description: interrupt event for ring CE5331 "ce5",
261 - description: CE5
56 /* CE5: target->host pktlog */161 /* CE5: target->host pktlog */241 /* CE5: target->host pktlog */
1341 /* CE5: target->host Pktlog */1674 /* CE5: target->host Pktlog */1853 /* CE5: target->host Pktlog */2125 /* CE5: target->host Pktlog */
20 "ce5",
57 "ce5",
54 /* CE5: target->host pktlog */188 /* CE5: target->host pktlog */
173 /* CE5: target->host Pktlog */300 /* CE5: target->host Pktlog */
89 "ce5",
166 /* CE5: target->host HTT (HIF->HTT) */279 /* CE5: target->host HTT (HIF->HTT) */1248 /* No need to acquire ce_lock for CE5, since this is the only place CE5 in ath10k_pci_process_htt_rx_cb()1249 * is processed other than init and deinit. Before releasing CE5 in ath10k_pci_process_htt_rx_cb()1250 * buffers, interrupts are disabled. Thus CE5 access is serialized. in ath10k_pci_process_htt_rx_cb()
181 /* CE5: target->host HTT (ipa_uc->target ) */293 /* CE5: target->host HTT (HIF->HTT) */
792 * So update transfer context all CEs except CE5. in _ath10k_ce_completed_recv_next_nolock()841 * So update transfer context all CEs except CE5. in _ath10k_ce_completed_recv_next_nolock_64()
3838 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH /* CE5 */ >,