Home
last modified time | relevance | path

Searched +full:gpio +full:- +full:sck (Results 1 – 25 of 136) sorted by relevance

123456

/linux-6.14.4/Documentation/devicetree/bindings/pinctrl/
Dmarvell,kirkwood-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6180-pinctrl",
8 "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",
9 "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl",
10 "marvell,98dx4122-pinctrl", "marvell,98dx1135-pinctrl"
11 - reg: register specifier of MPP registers
14 It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.
24 mpp0 0 gpio, nand(io2), spi(cs)
26 mpp2 2 gpo, nand(io4), spi(sck)
28 mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk)
[all …]
Dmarvell,armada-39x-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6920-pinctrl", "marvell,88f6925-pinctrl" or
8 "marvell,88f6928-pinctrl" depending on the specific variant of the
10 - reg: register specifier of MPP registers
18 mpp0 0 gpio, ua0(rxd)
19 mpp1 1 gpio, ua0(txd)
20 mpp2 2 gpio, i2c0(sck)
21 mpp3 3 gpio, i2c0(sda)
22 mpp4 4 gpio, ua1(txd), ua0(rts), smi(mdc)
23 mpp5 5 gpio, ua1(rxd), ua0(cts), smi(mdio)
[all …]
Dmarvell,armada-370-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6710-pinctrl"
8 - reg: register specifier of MPP registers
16 mpp0 0 gpio, uart0(rxd)
18 mpp2 2 gpio, i2c0(sck), uart0(txd)
19 mpp3 3 gpio, i2c0(sda), uart0(rxd)
20 mpp4 4 gpio, vdd(cpu-pd)
21 mpp5 5 gpo, ge0(txclkout), uart1(txd), spi1(sck), audio(mclk)
22 mpp6 6 gpio, ge0(txd0), sata0(prsnt), tdm(rst), audio(sdo)
24 mpp8 8 gpio, ge0(txd2), uart0(rts), tdm(drx), audio(bclk)
[all …]
Dmarvell,armada-38x-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6810-pinctrl", "marvell,88f6820-pinctrl" or
8 "marvell,88f6828-pinctrl" depending on the specific variant of the
10 - reg: register specifier of MPP registers
18 mpp0 0 gpio, ua0(rxd)
19 mpp1 1 gpio, ua0(txd)
20 mpp2 2 gpio, i2c0(sck)
21 mpp3 3 gpio, i2c0(sda)
22 mpp4 4 gpio, ge(mdc), ua1(txd), ua0(rts)
23 mpp5 5 gpio, ge(mdio), ua1(rxd), ua0(cts)
[all …]
Dmarvell,armada-375-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6720-pinctrl"
8 - reg: register specifier of MPP registers
16 mpp0 0 gpio, dev(ad2), spi0(cs1), spi1(cs1)
17 mpp1 1 gpio, dev(ad3), spi0(mosi), spi1(mosi)
18 mpp2 2 gpio, dev(ad4), ptp(evreq), led(c0), audio(sdi)
19 mpp3 3 gpio, dev(ad5), ptp(trig), led(p3), audio(mclk)
20 mpp4 4 gpio, dev(ad6), spi0(miso), spi1(miso)
21 mpp5 5 gpio, dev(ad7), spi0(cs2), spi1(cs2)
22 mpp6 6 gpio, dev(ad0), led(p1), audio(lrclk)
[all …]
Dmarvell,dove-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,dove-pinctrl"
8 - clocks: (optional) phandle of pdma clock
9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
18 mpp0 0 gpio, pmu, uart2(rts), sdio0(cd), lcd0(pwm), pmu*
19 mpp1 1 gpio, pmu, uart2(cts), sdio0(wp), lcd1(pwm), pmu*
20 mpp2 2 gpio, pmu, uart2(txd), sdio0(buspwr), sata(prsnt),
22 mpp3 3 gpio, pmu, uart2(rxd), sdio0(ledctrl), sata(act),
23 uart1(cts), lcd-spi(cs1), pmu*
24 mpp4 4 gpio, pmu, uart3(rts), sdio1(cd), spi1(miso), pmu*
[all …]
Dmarvell,armada-98dx3236-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,98dx3236-pinctrl" or "marvell,98dx4251-pinctrl"
8 - reg: register specifier of MPP registers
15 mpp1 1 gpio, spi0(miso), dev(ad9)
16 mpp2 2 gpo, spi0(sck), dev(ad10)
17 mpp3 3 gpio, spi0(cs0), dev(ad11)
18 mpp4 4 gpio, spi0(cs1), smi(mdc), dev(cs0)
19 mpp5 5 gpio, pex(rsto), sd0(cmd), dev(bootcs)
21 mpp7 7 gpio, sd0(d0), dev(ale0)
22 mpp8 8 gpio, sd0(d1), dev(ale1)
[all …]
Dmarvell,armada-xp-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,mv78230-pinctrl", "marvell,mv78260-pinctrl",
8 "marvell,mv78460-pinctrl"
9 - reg: register specifier of MPP registers
21 mpp0 0 gpio, ge0(txclkout), lcd(d0)
22 mpp1 1 gpio, ge0(txd0), lcd(d1)
23 mpp2 2 gpio, ge0(txd1), lcd(d2)
24 mpp3 3 gpio, ge0(txd2), lcd(d3)
25 mpp4 4 gpio, ge0(txd3), lcd(d4)
26 mpp5 5 gpio, ge0(txctl), lcd(d5)
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/spi/
Dspi-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI-GPIO
10 - Rob Herring <[email protected]>
13 This represents a group of 3-n GPIO lines used for bit-banged SPI on
14 dedicated GPIO lines.
17 - $ref: /schemas/spi/spi-controller.yaml#
21 const: spi-gpio
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/iio/adc/
Davia-hx711.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/avia-hx711.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andreas Klinger <ak@it-klinger.de>
13 Bit-banging driver using two GPIOs:
14 - sck-gpio gives a clock to the sensor with 24 cycles for data retrieval
17 - dout-gpio is the sensor data the sensor responds to the clock
25 - avia,hx711
27 sck-gpios:
[all …]
/linux-6.14.4/drivers/pinctrl/mvebu/
Dpinctrl-armada-39x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
18 #include "pinctrl-mvebu.h"
30 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
33 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
36 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
37 MPP_VAR_FUNCTION(1, "i2c0", "sck", V_88F6920_PLUS)),
39 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
42 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
47 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
[all …]
Dpinctrl-armada-375.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
18 #include "pinctrl-mvebu.h"
22 MPP_FUNCTION(0x0, "gpio", NULL),
28 MPP_FUNCTION(0x0, "gpio", NULL),
34 MPP_FUNCTION(0x0, "gpio", NULL),
42 MPP_FUNCTION(0x0, "gpio", NULL),
50 MPP_FUNCTION(0x0, "gpio", NULL),
56 MPP_FUNCTION(0x0, "gpio", NULL),
63 MPP_FUNCTION(0x0, "gpio", NULL),
[all …]
Dpinctrl-armada-370.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
18 #include "pinctrl-mvebu.h"
22 MPP_FUNCTION(0x0, "gpio", NULL),
28 MPP_FUNCTION(0x0, "gpio", NULL),
29 MPP_FUNCTION(0x1, "i2c0", "sck"),
32 MPP_FUNCTION(0x0, "gpio", NULL),
36 MPP_FUNCTION(0x0, "gpio", NULL),
37 MPP_FUNCTION(0x1, "vdd", "cpu-pd")),
42 MPP_FUNCTION(0x4, "spi1", "sck"),
[all …]
Dpinctrl-ac5.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include "pinctrl-mvebu.h"
21 MPP_FUNCTION(0, "gpio", NULL),
25 MPP_FUNCTION(0, "gpio", NULL),
29 MPP_FUNCTION(0, "gpio", NULL),
33 MPP_FUNCTION(0, "gpio", NULL),
37 MPP_FUNCTION(0, "gpio", NULL),
43 MPP_FUNCTION(0, "gpio", NULL),
49 MPP_FUNCTION(0, "gpio", NULL),
52 MPP_FUNCTION(3, "i2c1", "sck")),
[all …]
Dpinctrl-armada-cp110.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include "pinctrl-mvebu.h"
24 * - In Armada7K (single CP) almost all the MPPs are available (except the
26 * - In Armada8K (dual CP) the MPPs are split into 2 parts, MPPs 0-31 from
27 * CPS, and MPPs 32-62 from CPM, the below flags (V_ARMADA_8K_CPM,
42 MPP_FUNCTION(0, "gpio", NULL),
53 MPP_FUNCTION(0, "gpio", NULL),
59 MPP_FUNCTION(7, "mss_i2c", "sck"),
64 MPP_FUNCTION(0, "gpio", NULL),
71 MPP_FUNCTION(7, "i2c1", "sck"),
[all …]
Dpinctrl-armada-38x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
18 #include "pinctrl-mvebu.h"
30 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
33 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
36 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
37 MPP_VAR_FUNCTION(1, "i2c0", "sck", V_88F6810_PLUS)),
39 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
42 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
47 MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/arm/marvell/
Dcp110-system-controller.txt6 giving access to numerous features: clocks, pin-muxing and many other
11 - compatible: must be: "syscon", "simple-mfd";
12 - reg: register area of the CP110 system controller
18 -------
23 - a set of core clocks
24 - a set of gateable clocks
28 - The first cell must be 0 or 1. 0 for the core clocks and 1 for the
30 - The second cell identifies the particular core clock or gateable
34 - Core clocks
35 - 0 0 APLL
[all …]
/linux-6.14.4/arch/arm/mach-sa1100/
Dassabet.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-sa1100/assabet.c
7 * This file contains all Assabet-specific tweaks.
13 #include <linux/gpio/driver.h>
14 #include <linux/gpio/gpio-reg.h>
15 #include <linux/gpio/machine.h>
18 #include <linux/platform_data/sa11x0-serial.h>
34 #include <asm/mach-types.h>
37 #include <asm/pgtable-hwdef.h>
44 #include <linux/platform_data/mfd-mcp-sa11x0.h>
[all …]
/linux-6.14.4/drivers/spi/
Dspi-gpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * SPI host driver using generic bitbanged GPIO
8 #include <linux/gpio/consumer.h>
25 * platform_device->driver_data ... points to spi_gpio
27 * spi->controller_state ... reserved for bitbang framework code
29 * spi->controller->dev.driver_data ... points to spi_gpio->bitbang
34 struct gpio_desc *sck; member
40 /*----------------------------------------------------------------------*/
43 * Because the overhead of going through four GPIO procedure calls
47 * - The slow generic way: set up platform_data to hold the GPIO
[all …]
/linux-6.14.4/drivers/hwmon/
Dsht15.c1 // SPDX-License-Identifier: GPL-2.0
3 * sht15.c - support for the SHT15 Temperature and Humidity Sensor
5 * Portions Copyright (c) 2010-2012 Savoir-faire Linux Inc.
21 #include <linux/hwmon-sysfs.h>
32 #include <linux/gpio/consumer.h>
65 * struct sht15_temppair - elements of voltage dependent temp calc
74 /* Table 9 from datasheet - relates temperature calculation to supply voltage */
76 { 2500000, -39400 },
77 { 3000000, -39600 },
78 { 3500000, -39700 },
[all …]
/linux-6.14.4/Documentation/iio/
Dad4000.rst1 .. SPDX-License-Identifier: GPL-2.0-only
30 ------------------
35 CS mode, 3-wire turbo mode
38 Datasheet "3-wire" mode is what most resembles standard SPI connection which,
41 "CS Mode, 3-Wire Turbo Mode" connection in datasheets.
42 NOTE: The datasheet definition of 3-wire mode for the AD4000 series is NOT the
43 same of standard spi-3wire mode.
47 Omit the ``adi,sdi-pin`` property in device tree to select this mode.
51 +-------------+
52 + ----------------------------------| SDO |
[all …]
/linux-6.14.4/arch/arm/boot/dts/microchip/
Dlan966x-kontron-kswitch-d10-mmt.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "dt-bindings/phy/phy-lan966x-serdes.h"
16 stdout-path = "serial0:115200n8";
19 gpio-restart {
20 compatible = "gpio-restart";
21 pinctrl-0 = <&reset_pins>;
22 pinctrl-names = "default";
23 gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
29 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
[all …]
Dat91-tse850-3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-tse850-3.dts - Device Tree file for the Axentia TSE-850 3.0 board
9 /dts-v1/;
10 #include <dt-bindings/pwm/pwm.h>
11 #include "at91-linea.dtsi"
14 model = "Axentia TSE-850 3.0";
18 sck: oscillator { label
19 compatible = "fixed-clock";
21 #clock-cells = <0>;
22 clock-frequency = <16000000>;
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/fpga/
Dlattice-ice40-fpga-mgr.txt4 - compatible: Should contain "lattice,ice40-fpga-mgr"
5 - reg: SPI chip select
6 - spi-max-frequency: Maximum SPI frequency (>=1000000, <=25000000)
7 - cdone-gpios: GPIO input connected to CDONE pin
8 - reset-gpios: Active-low GPIO output connected to CRESET_B pin. Note
9 that unless the GPIO is held low during startup, the
10 FPGA will enter Master SPI mode and drive SCK with a
16 compatible = "lattice,ice40-fpga-mgr";
18 spi-max-frequency = <1000000>;
19 cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
[all …]
/linux-6.14.4/arch/arm/boot/dts/nxp/vf/
Dvf610-bk4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
15 stdout-path = &uart1;
23 audio_ext: oscillator-audio {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <24576000>;
29 enet_ext: oscillator-ethernet {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
[all …]

123456