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/linux-6.14.4/arch/parisc/kernel/
Dsignal32.c52 /* Load upper half */ in restore_sigcontext32()
66 /* Load upper half */ in restore_sigcontext32()
69 DBG(2,"restore_sigcontext32: upper half of iaoq[0] = %#lx\n", compat_regt); in restore_sigcontext32()
74 /* Load upper half */ in restore_sigcontext32()
77 DBG(2,"restore_sigcontext32: upper half of iaoq[1] = %#lx\n", compat_regt); in restore_sigcontext32()
84 /* Load the upper half for iasq */ in restore_sigcontext32()
87 DBG(2,"restore_sigcontext32: upper half of iasq[0] = %#lx\n", compat_regt); in restore_sigcontext32()
90 /* Load the upper half for iasq */ in restore_sigcontext32()
93 DBG(2,"restore_sigcontext32: upper half of iasq[1] = %#lx\n", compat_regt); in restore_sigcontext32()
98 /* Load the upper half for sar */ in restore_sigcontext32()
[all …]
/linux-6.14.4/include/uapi/linux/
Dmii.h65 #define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
67 #define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
74 #define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
77 #define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */
78 #define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
97 #define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
100 #define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */
101 #define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
125 #define ESTATUS_1000_XHALF 0x4000 /* Can do 1000BaseX Half */
127 #define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */
[all …]
/linux-6.14.4/drivers/gpu/drm/i915/gt/
Dselftest_ring.c79 unsigned int half = 2048; in igt_ring_direction() local
82 ring = mock_ring(2 * half); in igt_ring_direction()
86 GEM_BUG_ON(ring->size != 2 * half); in igt_ring_direction()
89 for (step = 1; step < half; step <<= 1) { in igt_ring_direction()
91 err |= check_ring_offset(ring, half, step); in igt_ring_direction()
93 err |= check_ring_step(ring, 0, half - 64); in igt_ring_direction()
96 err |= check_ring_offset(ring, 0, 2 * half + 64); in igt_ring_direction()
97 err |= check_ring_offset(ring, 3 * half, 1); in igt_ring_direction()
Dintel_breadcrumbs_types.h22 * bottom-half of the user interrupt) to the first client. After
26 * transferring the bottom-half status to the next client in the queue.
29 * bottom-half, we reduce the latency of the first waiter by avoiding
/linux-6.14.4/Documentation/devicetree/bindings/interrupt-controller/
Dcirrus,clps711x-intc.txt24 12: UTXINT1 UART1 transmit FIFO half empty
25 13: URXINT1 UART1 receive FIFO half full
29 17: SS2RX SSI2 receive FIFO half or greater full
30 18: SS2TX SSI2 transmit FIFO less than half empty
31 28: UTXINT2 UART2 transmit FIFO half empty
32 29: URXINT2 UART2 receive FIFO half full
/linux-6.14.4/drivers/media/usb/stk1160/
Dstk1160-reg.h42 * Bit 1 - Decimates Half or More Column
43 * 0 Decimates less than half from original column,
45 * 1 Decimates half or more from original column,
50 * Bit 3 - Vertical Greater or Equal to Half
51 * 0 Decimates less than half from original row,
53 * 1 Decimates half or more from original row,
/linux-6.14.4/drivers/net/ethernet/8390/
Dstnic.c29 #define half unsigned short macro
97 *(vhalf *) (PA_83902 + ((reg) << 1)) = ((half) (val) << 8); in STNIC_WRITE()
186 half buf[2]; in stnic_get_hdr()
222 half val; in stnic_block_input()
244 length -= sizeof (half); in stnic_block_input()
270 *(vhalf *) PA_83902_IF = ((half) buf[1] << 8) | buf[0]; in stnic_block_output()
272 *(vhalf *) PA_83902_IF = ((half) buf[0] << 8) | buf[1]; in stnic_block_output()
275 buf += sizeof (half); in stnic_block_output()
276 length -= sizeof (half); in stnic_block_output()
/linux-6.14.4/drivers/gpu/drm/xe/abi/
Dguc_log_abi.h28 * When any type of log buffer becomes half full, GuC sends a flush interrupt.
29 * GuC firmware expects that while it is writing to 2nd half of the buffer,
30 * first half would get consumed by Host and then get a flush completed
32 * causing loss of logs. So when buffer gets half filled & Xe has requested
56 * the buffer on log buffer half full or state capture notification
/linux-6.14.4/include/uapi/linux/dvb/
Dosd.h138 OSD_BITMAP1HR, /* 1 Bit bitmap half resolution */
139 OSD_BITMAP2HR, /* 2 bit bitmap half resolution */
140 OSD_BITMAP4HR, /* 4 bit bitmap half resolution */
141 OSD_BITMAP8HR, /* 8 bit bitmap half resolution */
144 OSD_YCRCB444HR, /* 4:4:4 YCRCB graphic half resolution */
146 OSD_VIDEOHSIZE, /* MPEG Video Display Half Resolution */
149 OSD_VIDEOTHSIZE, /* True Size MPEG Video Display Half Resolution */
/linux-6.14.4/Documentation/input/devices/
Drotary-encoder.rst16 a stable state with both outputs high (half-period mode) and some have
37 one step (half-period mode)
49 In half-period mode, state a) and c) above are used to determine the
52 (i.e. the rotation was not reversed half-way).
61 meaning that there it has seen half the way of a one-step transition.
68 should have happened, unless it flipped back on half the way. The
/linux-6.14.4/drivers/net/ethernet/atheros/atlx/
Datlx.h228 /* MAC Half-Duplex Control Register */
303 #define MII_CR_FULL_DUPLEX 0x0100 /* FDX =1, half duplex =0 */
327 #define MII_SR_100T2_HD_CAPS 0x0200 /* 100T2 Half Duplex Capable */
329 #define MII_SR_10T_HD_CAPS 0x0800 /* 10T Half Duplex Capable */
331 #define MII_SR_100X_HD_CAPS 0x2000 /* 100X Half Duplex Capable */
337 #define MII_LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
339 #define MII_LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
350 #define MII_AR_10T_HD_CAPS 0x0020 /* 10T Half Duplex Capable */
352 #define MII_AR_100TX_HD_CAPS 0x0080 /* 100TX Half Duplex Capable */
438 #define MII_ATLX_PSSR_DPLX 0x2000 /* 1=Duplex 0=Half Duplex */
[all …]
/linux-6.14.4/drivers/soc/fsl/qe/
Dtsa.c353 resource_size_t half; in tsa_cpm1_init_entries_area() local
356 half = tsa->si_ram_sz / 2; in tsa_cpm1_init_entries_area()
361 /* First half of si_ram */ in tsa_cpm1_init_entries_area()
363 area->entries_next = area->entries_start + half; in tsa_cpm1_init_entries_area()
366 /* Second half of si_ram */ in tsa_cpm1_init_entries_area()
367 area->entries_start = tsa->si_ram + half; in tsa_cpm1_init_entries_area()
368 area->entries_next = area->entries_start + half; in tsa_cpm1_init_entries_area()
375 /* First half of first half of si_ram */ in tsa_cpm1_init_entries_area()
380 /* First half of second half of si_ram */ in tsa_cpm1_init_entries_area()
387 /* Second half of first half of si_ram */ in tsa_cpm1_init_entries_area()
[all …]
/linux-6.14.4/drivers/gpu/drm/sun4i/
Dsun4i_hdmi_tmds_clk.c31 bool *half) in sun4i_tmds_calc_divider() argument
57 if (div && half) { in sun4i_tmds_calc_divider()
59 *half = is_double; in sun4i_tmds_calc_divider()
147 bool half; in sun4i_tmds_set_rate() local
152 &div, &half); in sun4i_tmds_set_rate()
156 if (half) in sun4i_tmds_set_rate()
/linux-6.14.4/drivers/soc/ixp4xx/
Dixp4xx-qmgr.c188 int i, half = (irq == qmgr_irq_1 ? 0 : 1); in qmgr_irq() local
189 u32 req_bitmap = __raw_readl(&qmgr_regs->irqstat[half]); in qmgr_irq()
193 __raw_writel(req_bitmap, &qmgr_regs->irqstat[half]); /* ACK */ in qmgr_irq()
198 i += half * HALF_QUEUES; in qmgr_irq()
208 int half = queue / 32; in qmgr_enable_irq() local
212 __raw_writel(__raw_readl(&qmgr_regs->irqen[half]) | mask, in qmgr_enable_irq()
213 &qmgr_regs->irqen[half]); in qmgr_enable_irq()
220 int half = queue / 32; in qmgr_disable_irq() local
224 __raw_writel(__raw_readl(&qmgr_regs->irqen[half]) & ~mask, in qmgr_disable_irq()
225 &qmgr_regs->irqen[half]); in qmgr_disable_irq()
[all …]
/linux-6.14.4/drivers/clk/sunxi/
Dclk-sun4i-tcon-ch1.c101 bool *half) in tcon_ch1_calc_divider() argument
127 if (div && half) { in tcon_ch1_calc_divider()
129 *half = is_double; in tcon_ch1_calc_divider()
191 bool half; in tcon_ch1_set_rate() local
195 tcon_ch1_calc_divider(rate, parent_rate, &div_m, &half); in tcon_ch1_set_rate()
202 if (half) in tcon_ch1_set_rate()
/linux-6.14.4/arch/parisc/include/asm/
Dchecksum.h68 will carry from the lower half into the upper half, in csum_fold()
69 giving us the correct sum in the upper half. */ in csum_fold()
129 " depdi 0, 31, 32, %0\n"/* clear upper half of incoming checksum */ in csum_ipv6_magic()
139 " extrd,u %0, 31, 32, %4\n"/* copy upper half down */ in csum_ipv6_magic()
140 " depdi 0, 31, 32, %0\n"/* clear upper half */ in csum_ipv6_magic()
/linux-6.14.4/include/clocksource/
Dtimer-davinci.h28 * clock half for both clocksource and clockevent and the compare register
32 * This is only used by da830 the DSP of which uses the top half. The timer
33 * driver still configures the top half to run in free-run mode.
/linux-6.14.4/tools/testing/ktest/
Dconfig-bisect.pl12 # Compares a good config to a bad config, then takes half of the diffs
15 # good config and will try to make half of the differences of between
18 # exactly half of the configs that are different between the two config
31 # The algorithm will run, merging half of the differences between
464 # $phalf: half of the configs names you want to add
467 # $which: The name of which half that is updating (top / bottom)
472 my @half = @{$phalf};
478 doprint "Settings bisect with $which half of $type configs:\n";
479 foreach my $item (@half) {
533 my $half = int($#diff_arr / 2);
[all …]
/linux-6.14.4/drivers/net/can/spi/mcp251xfd/
Dmcp251xfd-ram.c35 * coalescing or only half of FIFO (FIFO Half Full in can_ram_rounddown_pow_of_two()
36 * IRQ) and use remaining half for normal objects. in can_ram_rounddown_pow_of_two()
118 /* use only max half of available objects for coalescing */ in can_ram_get_layout()
141 /* use only max half of available objects for coalescing */ in can_ram_get_layout()
/linux-6.14.4/sound/soc/fsl/
Dlpc3xxx-i2s.h50 #define LPC3XXX_I2S_WS_HP(s) FIELD_PREP(0x7FC0, s) /* Word select half period - 1 */
53 #define LPC3XXX_I2S_WW32_HP 0x1f /* Word select half period for 32bit word width */
54 #define LPC3XXX_I2S_WW16_HP 0x0f /* Word select half period for 16bit word width */
55 #define LPC3XXX_I2S_WW8_HP 0x7 /* Word select half period for 8bit word width */
/linux-6.14.4/tools/testing/selftests/powerpc/tm/
Dtm-signal.S67 /* Get the second half of the array */
74 /* Get the second half of the array */
81 /* Get the second half of the array */
88 /* Get the second half of the array */
/linux-6.14.4/arch/riscv/crypto/
Dchacha-riscv64-zvkb.S202 // Load the first half of the input data for each block into v16-v23.
217 // Load the second half of the input data for each block into v24-v31.
222 // Finalize the first half of the keystream for each block.
232 // Encrypt/decrypt the first half of the data for each block.
242 // Store the first half of the output data for each block.
245 // Finalize the second half of the keystream for each block.
257 // Encrypt/decrypt the second half of the data for each block.
267 // Store the second half of the output data for each block.
/linux-6.14.4/Documentation/arch/arm64/
Darm-cca.rst24 is split into two. The lower half is protected - any memory that is
25 mapped in this half cannot be seen by the Normal World and the RMM
28 guest's cooperation). The upper half is shared, the Normal World is free
55 (specifically earlycon) must be specified in the upper half of IPA.
/linux-6.14.4/arch/x86/math-emu/
Dreg_round.S214 jc LCheck_truncate_24 /* less than half, no increment needed */
216 jne LGreater_Half_24 /* greater than half, increment needed */
218 /* Possibly half, we need to check the ls bits */
220 jnz LGreater_Half_24 /* greater than half, increment needed */
223 jnz LGreater_Half_24 /* greater than half, increment needed */
225 /* Exactly half, increment only if 24th bit is 1 (round to even) */
293 jc LCheck_truncate_53 /* less than half, no increment needed */
295 jnz LGreater_Half_53 /* greater than half, increment needed */
297 /* Possibly half, we need to check the ls bits */
299 jnz LGreater_Half_53 /* greater than half, increment needed */
[all …]
/linux-6.14.4/arch/sh/drivers/dma/
Ddmabrg.c27 * 3 | HAC0/SSI0 | play| half done | DMABRGI2
29 * 5 | HAC0/SSI0 | rec | half done | DMABRGI2
31 * 7 | HAC1/SSI1 | play| half done | DMABRGI2
33 * 9 | HAC1/SSI1 | rec | half done | DMABRGI2
187 "DMABRG Transfer Half", NULL); in dmabrg_init()

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