Searched +full:interconnect +full:- +full:names (Results 1 – 25 of 227) sorted by relevance
12345678910
/linux-6.14.4/Documentation/devicetree/bindings/interconnect/ |
D | interconnect.txt | 1 Interconnect Provider Device Tree Bindings 4 The purpose of this document is to define a common set of generic interconnect 8 = interconnect providers = 10 The interconnect provider binding is intended to represent the interconnect 11 controllers in the system. Each provider registers a set of interconnect 12 nodes, which expose the interconnect related capabilities of the interconnect 14 etc. The consumer drivers set constraints on interconnect path (or endpoints) 15 depending on the use case. Interconnect providers can also be interconnect 16 consumers, such as in the case where two network-on-chip fabrics interface 20 - compatible : contains the interconnect provider compatible string [all …]
|
D | qcom,sm6115.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interconnect/qcom,sm6115.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SM6115 Network-On-Chip interconnect 10 - Konrad Dybcio <[email protected]> 13 The Qualcomm SM6115 interconnect providers support adjusting the 19 - qcom,sm6115-bimc 20 - qcom,sm6115-cnoc 21 - qcom,sm6115-snoc [all …]
|
D | qcom,msm8953.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interconnect/qcom,msm8953.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm MSM8953 Network-On-Chip interconnect 10 - Barnabas Czeman <[email protected]> 13 The Qualcomm MSM8953 interconnect providers support adjusting the 16 See also: include/dt-bindings/interconnect/qcom,msm8953.h 21 - qcom,msm8953-bimc 22 - qcom,msm8953-pcnoc [all …]
|
D | qcom,msm8996.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interconnect/qcom,msm8996.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm MSM8996 Network-On-Chip interconnect 10 - Konrad Dybcio <[email protected]> 13 The Qualcomm MSM8996 interconnect providers support adjusting the 19 - qcom,msm8996-a0noc 20 - qcom,msm8996-a1noc 21 - qcom,msm8996-a2noc [all …]
|
D | qcom,msm8974.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interconnect/qcom,msm8974.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm MSM8974 Network-On-Chip Interconnect 10 - Brian Masney <[email protected]> 13 The Qualcomm MSM8974 interconnect providers support setting system 14 bandwidth requirements between various network-on-chip fabrics. 22 - qcom,msm8974-bimc 23 - qcom,msm8974-cnoc [all …]
|
D | qcom,sdm660.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interconnect/qcom,sdm660.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SDM660 Network-On-Chip interconnect 10 - Konrad Dybcio <[email protected]> 13 The Qualcomm SDM660 interconnect providers support adjusting the 19 - qcom,sdm660-a2noc 20 - qcom,sdm660-bimc 21 - qcom,sdm660-cnoc [all …]
|
D | qcom,osm-l3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interconnect/qcom,osm-l3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Operating State Manager (OSM) L3 Interconnect Provider 10 - Sibi Sankar <[email protected]> 14 The OSM L3 interconnect provider aggregates the L3 bandwidth requests 20 - items: 21 - enum: 22 - qcom,sc7180-osm-l3 [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/bus/ |
D | ti-sysc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/bus/ti-sysc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments interconnect target module 10 - Tony Lindgren <[email protected]> 13 Texas Instruments SoCs can have a generic interconnect target module 14 for devices connected to various interconnects such as L3 interconnect 15 using Arteris NoC, and L4 interconnect using Sonics s3220. This module 18 than that it is mostly independent of the interconnect. [all …]
|
D | baikal,bt1-axi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/bus/baikal,bt1-axi.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Baikal-T1 AXI-bus 11 - Serge Semin <[email protected]> 14 AXI3-bus is the main communication bus of Baikal-T1 SoC connecting all 15 high-speed peripheral IP-cores with RAM controller and with MIPS P5600 16 cores. Traffic arbitration is done by means of DW AXI Interconnect (so 17 called AXI Main Interconnect) routing IO requests from one block to [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/soc/imx/ |
D | fsl,imx8mm-vpu-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8MM VPU blk-ctrl 10 - Lucas Stach <[email protected]> 13 The i.MX8MM VPU blk-ctrl is a top-level peripheral providing access to 20 - const: fsl,imx8mm-vpu-blk-ctrl 21 - const: syscon 26 '#power-domain-cells': [all …]
|
/linux-6.14.4/arch/arm64/boot/dts/qcom/ |
D | sm8750.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,rpmh.h> 7 #include <dt-bindings/clock/qcom,sm8750-gcc.h> 8 #include <dt-bindings/clock/qcom,sm8750-tcsr.h> 9 #include <dt-bindings/dma/qcom-gpi.h> 10 #include <dt-bindings/interconnect/qcom,icc.h> 11 #include <dt-bindings/interconnect/qcom,sm8750-rpmh.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/power/qcom,rpmhpd.h> 14 #include <dt-bindings/power/qcom-rpmpd.h> [all …]
|
D | sc8180x.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2020-2023, Linaro Limited 7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h> 8 #include <dt-bindings/clock/qcom,gcc-sc8180x.h> 9 #include <dt-bindings/clock/qcom,gpucc-sm8150.h> 10 #include <dt-bindings/clock/qcom,rpmh.h> 11 #include <dt-bindings/interconnect/qcom,icc.h> 12 #include <dt-bindings/interconnect/qcom,osm-l3.h> 13 #include <dt-bindings/interconnect/qcom,sc8180x.h> [all …]
|
D | sdm670.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 10 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h> 12 #include <dt-bindings/clock/qcom,rpmh.h> 13 #include <dt-bindings/dma/qcom-gpi.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/interconnect/qcom,osm-l3.h> 16 #include <dt-bindings/interconnect/qcom,sdm670-rpmh.h> 17 #include <dt-bindings/interrupt-controller/arm-gic.h> [all …]
|
D | sar2130p.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,rpmh.h> 7 #include <dt-bindings/clock/qcom,sar2130p-gcc.h> 8 #include <dt-bindings/clock/qcom,sar2130p-gpucc.h> 9 #include <dt-bindings/clock/qcom,sm8550-tcsr.h> 10 #include <dt-bindings/dma/qcom-gpi.h> 11 #include <dt-bindings/interconnect/qcom,icc.h> 12 #include <dt-bindings/interconnect/qcom,sar2130p-rpmh.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/mailbox/qcom-ipcc.h> [all …]
|
D | sdx75.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 9 #include <dt-bindings/clock/qcom,rpmh.h> 10 #include <dt-bindings/clock/qcom,sdx75-gcc.h> 11 #include <dt-bindings/dma/qcom-gpi.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interconnect/qcom,icc.h> 14 #include <dt-bindings/interconnect/qcom,sdx75.h> 15 #include <dt-bindings/interrupt-controller/arm-gic.h> 16 #include <dt-bindings/mailbox/qcom-ipcc.h> 17 #include <dt-bindings/power/qcom,rpmhpd.h> [all …]
|
D | sa8775p.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/interconnect/qcom,icc.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/qcom,rpmh.h> 10 #include <dt-bindings/clock/qcom,sa8775p-dispcc.h> 11 #include <dt-bindings/clock/qcom,sa8775p-gcc.h> 12 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> 13 #include <dt-bindings/dma/qcom-gpi.h> 14 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h> 15 #include <dt-bindings/mailbox/qcom-ipcc.h> [all …]
|
D | sc7180.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 5 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. 8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h> 9 #include <dt-bindings/clock/qcom,gcc-sc7180.h> 10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h> 11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h> 12 #include <dt-bindings/clock/qcom,rpmh.h> 13 #include <dt-bindings/clock/qcom,videocc-sc7180.h> 14 #include <dt-bindings/firmware/qcom,scm.h> 15 #include <dt-bindings/interconnect/qcom,icc.h> [all …]
|
D | qcm2290.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 8 #include <dt-bindings/clock/qcom,dispcc-qcm2290.h> 9 #include <dt-bindings/clock/qcom,gcc-qcm2290.h> 10 #include <dt-bindings/clock/qcom,qcm2290-gpucc.h> 11 #include <dt-bindings/clock/qcom,rpmcc.h> 12 #include <dt-bindings/dma/qcom-gpi.h> 13 #include <dt-bindings/firmware/qcom,scm.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/interrupt-controller/arm-gic.h> 16 #include <dt-bindings/interconnect/qcom,qcm2290.h> [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/arm/sunxi/ |
D | allwinner,sun4i-a10-mbus.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/arm/sunxi/allwinner,sun4i-a10-mbus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <[email protected]> 11 - Maxime Ripard <[email protected]> 20 the interconnects and interconnect-names properties set to the MBUS 21 controller and with "dma-mem" as the interconnect name. 24 "#interconnect-cells": 31 - allwinner,sun5i-a13-mbus [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/devfreq/ |
D | nvidia,tegra30-actmon.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/devfreq/nvidia,tegra30-actmon.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dmitry Osipenko <[email protected]> 11 - Jon Hunter <[email protected]> 12 - Thierry Reding <[email protected]> 23 - nvidia,tegra30-actmon 24 - nvidia,tegra114-actmon 25 - nvidia,tegra124-actmon [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/i2c/ |
D | qcom,i2c-geni-qcom.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/qcom,i2c-geni-qcom.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andy Gross <[email protected]> 11 - Bjorn Andersson <[email protected]> 16 - qcom,geni-i2c 17 - qcom,geni-i2c-master-hub 23 clock-names: 27 clock-frequency: [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/display/tegra/ |
D | nvidia,tegra186-display.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-display.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <[email protected]> 11 - Jon Hunter <[email protected]> 15 pattern: "^display-hub@[0-9a-f]+$" 19 - nvidia,tegra186-display 20 - nvidia,tegra194-display 22 '#address-cells': [all …]
|
D | nvidia,tegra186-dc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-dc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <[email protected]> 11 - Jon Hunter <[email protected]> 15 pattern: "^display@[0-9a-f]+$" 19 - nvidia,tegra186-dc 20 - nvidia,tegra194-dc 30 - description: display controller pixel clock [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/display/msm/ |
D | mdss-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/mdss-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <[email protected]> 11 - Dmitry Baryshkov <[email protected]> 12 - Rob Clark <[email protected]> 16 sub-blocks like DPU display controller, DSI and DP interfaces etc. 25 pattern: "^display-subsystem@[0-9a-f]+$" 30 reg-names: [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/media/ |
D | qcom,sm8250-venus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/qcom,sm8250-venus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stanimir Varbanov <[email protected]> 17 - $ref: qcom,venus-common.yaml# 21 const: qcom,sm8250-venus 23 power-domains: 27 power-domain-names: 30 - const: venus [all …]
|
12345678910