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149 * format with data laid in a single plane163 * format with data laid in two planes (luminance and chrominance)177 * format with data laid in three planes (one for each YUV component)
37 int near_copies; /* number of copies laid out39 int far_copies; /* number of copies laid out
6 data programmed at the factory. The data is laid out in 32bit
16 /* In the hardware, registers are laid out either singly, in arrays
22 other products using this chip, but I've never laid eyes (much less hands)
48 * For simplicity this assumes that current field 'token' is laid out
30 * 32-bit wide logical CSR will be laid out as four 32-bit physical
40 * There are five possibilities for how page->flags get laid out. The first
15 /* The Sparc PSR fields are laid out as the following:
41 * Make sure that all structs defined in this file remain laid out so
47 * Make sure that all structs defined in this file remain laid out so
49 * Make sure that all structs defined in this file remain laid out so
19 /* Treat the FEC bits as a bitmask laid out as follows:
63 or a front merge candidate. Due to the way files are typically laid out,
46 * Parameter structs passed to hypercalls are laid out according to
78 * want MMIO that copies stuff laid out in MMIO
98 * This IRQ mapping is laid out with two things in mind: first, we try to keep
107 * NOTE: fields are laid out in a way that would make compiler add padding
32 * This struct describes how the registers are laid out on the kernel stack
106 /* The registers are laid out in pt_regs for PAL and syscall
68 This describes how the color bits are laid out in the
43 The block group descriptor is laid out in ``struct ext4_group_desc``.
161 * belonging to vmalloc area is now laid out as follows:
22 accessed via an ioport) and laid out with a direct correspondence to the
105 * The bias configuration fields are 2 bits wide and laid down in in adp5585_gpio_set_bias()