Home
last modified time | relevance | path

Searched full:mul (Results 1 – 25 of 9342) sorted by relevance

12345678910>>...374

/aosp_15_r20/external/vixl/test/aarch32/traces/
H A Dassembler-cond-rdlow-rnlow-rmlow-in-it-block-mul-t32.h38 0x08, 0xbf, 0x40, 0x43 // It eq; mul eq r0 r0 r0
41 0x08, 0xbf, 0x48, 0x43 // It eq; mul eq r0 r1 r0
44 0x08, 0xbf, 0x50, 0x43 // It eq; mul eq r0 r2 r0
47 0x08, 0xbf, 0x58, 0x43 // It eq; mul eq r0 r3 r0
50 0x08, 0xbf, 0x60, 0x43 // It eq; mul eq r0 r4 r0
53 0x08, 0xbf, 0x68, 0x43 // It eq; mul eq r0 r5 r0
56 0x08, 0xbf, 0x70, 0x43 // It eq; mul eq r0 r6 r0
59 0x08, 0xbf, 0x78, 0x43 // It eq; mul eq r0 r7 r0
62 0x08, 0xbf, 0x41, 0x43 // It eq; mul eq r1 r0 r1
65 0x08, 0xbf, 0x49, 0x43 // It eq; mul eq r1 r1 r1
[all …]
H A Dassembler-cond-rd-rn-rm-mul-a32.h38 0x99, 0x05, 0x01, 0x80 // mul hi r1 r9 r5
41 0x96, 0x02, 0x08, 0x50 // mul pl r8 r6 r2
44 0x98, 0x02, 0x05, 0x80 // mul hi r5 r8 r2
47 0x92, 0x07, 0x09, 0x70 // mul vc r9 r2 r7
50 0x96, 0x03, 0x04, 0xb0 // mul lt r4 r6 r3
53 0x96, 0x02, 0x0b, 0xd0 // mul le r11 r6 r2
56 0x9e, 0x04, 0x08, 0x30 // mul cc r8 r14 r4
59 0x9e, 0x06, 0x05, 0xd0 // mul le r5 r14 r6
62 0x91, 0x00, 0x06, 0xb0 // mul lt r6 r1 r0
65 0x90, 0x09, 0x05, 0xb0 // mul lt r5 r0 r9
[all …]
H A Dassembler-cond-rd-rn-rm-mul-t32.h38 0x0c, 0xfb, 0x02, 0xf5 // mul al r5 r12 r2
41 0x03, 0xfb, 0x0c, 0xf7 // mul al r7 r3 r12
44 0x02, 0xfb, 0x0a, 0xf1 // mul al r1 r2 r10
47 0x07, 0xfb, 0x01, 0xf2 // mul al r2 r7 r1
50 0x09, 0xfb, 0x00, 0xfb // mul al r11 r9 r0
53 0x09, 0xfb, 0x0a, 0xf6 // mul al r6 r9 r10
56 0x05, 0xfb, 0x00, 0xf0 // mul al r0 r5 r0
59 0x06, 0xfb, 0x06, 0xf4 // mul al r4 r6 r6
62 0x0d, 0xfb, 0x01, 0xf1 // mul al r1 r13 r1
65 0x0e, 0xfb, 0x08, 0xf8 // mul al r8 r14 r8
[all …]
/aosp_15_r20/external/llvm/test/Transforms/Reassociate/
H A Drepeats.ll40 %tmp1 = mul i8 3, 3
41 %tmp2 = mul i8 %tmp1, 3
42 %tmp3 = mul i8 %tmp2, 3
43 %tmp4 = mul i8 %tmp3, 3
51 ; CHECK-NEXT: mul
52 ; CHECK-NEXT: mul
54 %tmp1 = mul i3 %x, %x
55 %tmp2 = mul i3 %tmp1, %x
56 %tmp3 = mul i3 %tmp2, %x
57 %tmp4 = mul i3 %tmp3, %x
[all …]
H A Dmulfactor.ll5 ; CHECK: mul i32 %a, %a
6 ; CHECK-NEXT: mul i32 %a, 2
8 ; CHECK-NEXT: mul
13 %tmp.2 = mul i32 %a, %a
15 %tmp.6 = mul i32 %tmp.5, %b
16 %tmp.10 = mul i32 %b, %b
24 ; CHECK: mul
29 %a = mul i32 %t, 6
30 %b = mul i32 %t, 36
39 ; CHECK: mul
[all …]
/aosp_15_r20/external/ComputeLibrary/src/core/NEON/kernels/arm_gemm/merges/
H A Dsve_merge_s32_3VLx8.hpp67 "incw %[p], all, mul #1\n" in MergeResults()
73 "incw %[p], all, mul #1\n" in MergeResults()
74 "ld1w z3.s, p1/z, [%[outptr0], #1, MUL VL]\n" in MergeResults()
76 "ld1w z11.s, p1/z, [%[inptr], #1, MUL VL]\n" in MergeResults()
80 "ld1w z4.s, p2/z, [%[outptr0], #2, MUL VL]\n" in MergeResults()
81 "ld1w z12.s, p2/z, [%[inptr], #2, MUL VL]\n" in MergeResults()
83 "st1w z11.s, p1, [%[outptr0], #1, MUL VL]\n" in MergeResults()
85 "st1w z12.s, p2, [%[outptr0], #2, MUL VL]\n" in MergeResults()
103 "incw %[p], all, mul #1\n" in MergeResults()
109 "incw %[p], all, mul #1\n" in MergeResults()
[all …]
H A Dsve_merge_u32_3VLx8.hpp67 "incw %[p], all, mul #1\n" in MergeResults()
73 "incw %[p], all, mul #1\n" in MergeResults()
74 "ld1w z3.s, p1/z, [%[outptr0], #1, MUL VL]\n" in MergeResults()
76 "ld1w z11.s, p1/z, [%[inptr], #1, MUL VL]\n" in MergeResults()
80 "ld1w z4.s, p2/z, [%[outptr0], #2, MUL VL]\n" in MergeResults()
81 "ld1w z12.s, p2/z, [%[inptr], #2, MUL VL]\n" in MergeResults()
83 "st1w z11.s, p1, [%[outptr0], #1, MUL VL]\n" in MergeResults()
85 "st1w z12.s, p2, [%[outptr0], #2, MUL VL]\n" in MergeResults()
103 "incw %[p], all, mul #1\n" in MergeResults()
109 "incw %[p], all, mul #1\n" in MergeResults()
[all …]
H A Dsve_merge_fp16_3VLx8.hpp83 "inch %[p], all, mul #1\n" in MergeResults()
89 "inch %[p], all, mul #1\n" in MergeResults()
90 "ld1h z3.h, p1/z, [%[outptr0], #1, MUL VL]\n" in MergeResults()
92 "ld1h z11.h, p1/z, [%[inptr], #1, MUL VL]\n" in MergeResults()
95 "ld1h z4.h, p2/z, [%[outptr0], #2, MUL VL]\n" in MergeResults()
97 "ld1h z12.h, p2/z, [%[inptr], #2, MUL VL]\n" in MergeResults()
105 "st1h z11.h, p1, [%[outptr0], #1, MUL VL]\n" in MergeResults()
107 "st1h z12.h, p2, [%[outptr0], #2, MUL VL]\n" in MergeResults()
127 "inch %[p], all, mul #1\n" in MergeResults()
133 "inch %[p], all, mul #1\n" in MergeResults()
[all …]
H A Dsve_merge_fp32_3VLx8.hpp83 "incw %[p], all, mul #1\n" in MergeResults()
89 "incw %[p], all, mul #1\n" in MergeResults()
90 "ld1w z3.s, p1/z, [%[outptr0], #1, MUL VL]\n" in MergeResults()
92 "ld1w z11.s, p1/z, [%[inptr], #1, MUL VL]\n" in MergeResults()
95 "ld1w z4.s, p2/z, [%[outptr0], #2, MUL VL]\n" in MergeResults()
97 "ld1w z12.s, p2/z, [%[inptr], #2, MUL VL]\n" in MergeResults()
105 "st1w z11.s, p1, [%[outptr0], #1, MUL VL]\n" in MergeResults()
107 "st1w z12.s, p2, [%[outptr0], #2, MUL VL]\n" in MergeResults()
127 "incw %[p], all, mul #1\n" in MergeResults()
133 "incw %[p], all, mul #1\n" in MergeResults()
[all …]
/aosp_15_r20/prebuilts/go/linux-x86/src/cmd/compile/internal/test/testdata/
DarithBoundary_test.go9 add, sub, mul, div, mod uint64 member
13 add, sub, mul, div, mod int64 member
17 add, sub, mul, div, mod uint32 member
21 add, sub, mul, div, mod int32 member
25 add, sub, mul, div, mod uint16 member
29 add, sub, mul, div, mod int16 member
33 add, sub, mul, div, mod uint8 member
37 add, sub, mul, div, mod int8 member
240 var uint64_data []utd64 = []utd64{utd64{a: 0, b: 0, add: 0, sub: 0, mul: 0},
241 utd64{a: 0, b: 1, add: 1, sub: 18446744073709551615, mul: 0, div: 0, mod: 0},
[all …]
/aosp_15_r20/external/libaom/aom_dsp/
H A Dfft_common.h143 #define GEN_FFT_8(ret, suffix, T, T_VEC, load, store, constant, add, sub, mul) \ argument
168 store(output + 1 * stride, add(w1, mul(kWeight2, sub(w8, w10)))); \
170 store(output + 3 * stride, sub(w1, mul(kWeight2, sub(w8, w10)))); \
173 sub(sub(kWeight0, w3), mul(kWeight2, add(w10, w8)))); \
175 store(output + 7 * stride, sub(w3, mul(kWeight2, add(w10, w8)))); \
179 mul) \ argument
215 const T_VEC w16[2] = { add(w1, mul(kWeight2, sub(w8, w10))), \
217 mul(kWeight2, add(w10, w8))) }; \
218 const T_VEC w18[2] = { sub(w1, mul(kWeight2, sub(w8, w10))), \
219 sub(w3, mul(kWeight2, add(w10, w8))) }; \
[all …]
/aosp_15_r20/external/rust/crates/quiche/deps/boringssl/win-x86/crypto/fipsmodule/
Dco-586.asm31 ; mul a[0]*b[0]
32 mul edx
43 ; mul a[1]*b[0]
44 mul edx
50 ; mul a[0]*b[1]
51 mul edx
62 ; mul a[2]*b[0]
63 mul edx
69 ; mul a[1]*b[1]
70 mul edx
[all …]
/aosp_15_r20/external/boringssl/src/gen/bcm/
H A Dco-586-win.asm32 ; mul a[0]*b[0]
33 mul edx
44 ; mul a[1]*b[0]
45 mul edx
51 ; mul a[0]*b[1]
52 mul edx
63 ; mul a[2]*b[0]
64 mul edx
70 ; mul a[1]*b[1]
71 mul edx
[all …]
/aosp_15_r20/external/cronet/third_party/boringssl/src/gen/bcm/
H A Dco-586-win.asm32 ; mul a[0]*b[0]
33 mul edx
44 ; mul a[1]*b[0]
45 mul edx
51 ; mul a[0]*b[1]
52 mul edx
63 ; mul a[2]*b[0]
64 mul edx
70 ; mul a[1]*b[1]
71 mul edx
[all …]
/aosp_15_r20/external/openscreen/third_party/boringssl/win-x86/crypto/fipsmodule/
H A Dco-586.asm31 ; mul a[0]*b[0]
32 mul edx
43 ; mul a[1]*b[0]
44 mul edx
50 ; mul a[0]*b[1]
51 mul edx
62 ; mul a[2]*b[0]
63 mul edx
69 ; mul a[1]*b[1]
70 mul edx
[all …]
/aosp_15_r20/external/rust/android-crates-io/crates/quiche/deps/boringssl/win-x86/crypto/fipsmodule/
Dco-586.asm31 ; mul a[0]*b[0]
32 mul edx
43 ; mul a[1]*b[0]
44 mul edx
50 ; mul a[0]*b[1]
51 mul edx
62 ; mul a[2]*b[0]
63 mul edx
69 ; mul a[1]*b[1]
70 mul edx
[all …]
/aosp_15_r20/external/llvm/test/Transforms/InstCombine/
H A Dvector-mul.ll8 %mul = mul <4 x i8> %InVec, <i8 0, i8 0, i8 0, i8 0>
9 ret <4 x i8> %mul
17 %mul = mul <4 x i8> %InVec, <i8 1, i8 1, i8 1, i8 1>
18 ret <4 x i8> %mul
26 %mul = mul <4 x i8> %InVec, <i8 2, i8 2, i8 2, i8 2>
27 ret <4 x i8> %mul
36 %mul = mul <4 x i8> %InVec, <i8 4, i8 4, i8 4, i8 4>
37 ret <4 x i8> %mul
46 %mul = mul <4 x i8> %InVec, <i8 8, i8 8, i8 8, i8 8>
47 ret <4 x i8> %mul
[all …]
/aosp_15_r20/external/ComputeLibrary/src/core/NEON/kernels/arm_gemm/transforms/
H A Dsve_transpose_interleave_8VL.hpp47 "cntw x21, ALL, MUL #16\n" in sve_transpose_interleave_8VL()
53 "ld1w { z14.s }, p1/Z, [x25, #1, MUL VL]\n" in sve_transpose_interleave_8VL()
55 "ld1w { z13.s }, p1/Z, [x25, #2, MUL VL]\n" in sve_transpose_interleave_8VL()
57 "ld1w { z12.s }, p1/Z, [x25, #3, MUL VL]\n" in sve_transpose_interleave_8VL()
59 "ld1w { z11.s }, p1/Z, [x25, #4, MUL VL]\n" in sve_transpose_interleave_8VL()
61 "ld1w { z10.s }, p1/Z, [x25, #5, MUL VL]\n" in sve_transpose_interleave_8VL()
63 "ld1w { z9.s }, p1/Z, [x25, #6, MUL VL]\n" in sve_transpose_interleave_8VL()
64 "ld1w { z8.s }, p1/Z, [x25, #7, MUL VL]\n" in sve_transpose_interleave_8VL()
67 "ld1w { z6.s }, p1/Z, [x25, #-8, MUL VL]\n" in sve_transpose_interleave_8VL()
68 "ld1w { z5.s }, p1/Z, [x25, #-7, MUL VL]\n" in sve_transpose_interleave_8VL()
[all …]
H A Dsve_transpose_interleave_8VL_2x2.hpp55 "cnth x21, ALL, MUL #8\n" in sve_transpose_interleave_8VL_2x2()
61 "ld1h { z3.h }, p3/Z, [x27, #1, MUL VL]\n" in sve_transpose_interleave_8VL_2x2()
63 "ld1h { z22.h }, p3/Z, [x27, #2, MUL VL]\n" in sve_transpose_interleave_8VL_2x2()
65 "ld1h { z12.h }, p3/Z, [x27, #3, MUL VL]\n" in sve_transpose_interleave_8VL_2x2()
67 "ld1h { z4.h }, p3/Z, [x27, #4, MUL VL]\n" in sve_transpose_interleave_8VL_2x2()
69 "ld1h { z25.h }, p3/Z, [x27, #5, MUL VL]\n" in sve_transpose_interleave_8VL_2x2()
71 "ld1h { z15.h }, p3/Z, [x27, #6, MUL VL]\n" in sve_transpose_interleave_8VL_2x2()
72 "ld1h { z2.h }, p3/Z, [x27, #7, MUL VL]\n" in sve_transpose_interleave_8VL_2x2()
76 "ld1h { z27.h }, p3/Z, [x25, #1, MUL VL]\n" in sve_transpose_interleave_8VL_2x2()
78 "ld1h { z18.h }, p3/Z, [x25, #2, MUL VL]\n" in sve_transpose_interleave_8VL_2x2()
[all …]
H A Dsve_transpose_interleave_8VL_2x4.hpp59 "cnth x21, ALL, MUL #4\n" in sve_transpose_interleave_8VL_2x4()
65 "ld1h { z24.h }, p2/Z, [x11, #1, MUL VL]\n" in sve_transpose_interleave_8VL_2x4()
67 "ld1h { z8.h }, p2/Z, [x11, #2, MUL VL]\n" in sve_transpose_interleave_8VL_2x4()
69 "ld1h { z11.h }, p2/Z, [x11, #3, MUL VL]\n" in sve_transpose_interleave_8VL_2x4()
73 "ld1h { z0.h }, p2/Z, [x9, #1, MUL VL]\n" in sve_transpose_interleave_8VL_2x4()
75 "ld1h { z18.h }, p2/Z, [x9, #2, MUL VL]\n" in sve_transpose_interleave_8VL_2x4()
77 "ld1h { z12.h }, p2/Z, [x9, #3, MUL VL]\n" in sve_transpose_interleave_8VL_2x4()
81 "ld1h { z19.h }, p2/Z, [x28, #1, MUL VL]\n" in sve_transpose_interleave_8VL_2x4()
83 "ld1h { z26.h }, p2/Z, [x28, #2, MUL VL]\n" in sve_transpose_interleave_8VL_2x4()
84 "ld1h { z13.h }, p2/Z, [x28, #3, MUL VL]\n" in sve_transpose_interleave_8VL_2x4()
[all …]
H A Dsve_transpose_interleave_4VL_2x2.hpp59 "cnth x21, ALL, MUL #4\n" in sve_transpose_interleave_4VL_2x2()
65 "ld1h { z19.h }, p2/Z, [x11, #1, MUL VL]\n" in sve_transpose_interleave_4VL_2x2()
67 "ld1h { z23.h }, p2/Z, [x11, #2, MUL VL]\n" in sve_transpose_interleave_4VL_2x2()
69 "ld1h { z31.h }, p2/Z, [x11, #3, MUL VL]\n" in sve_transpose_interleave_4VL_2x2()
73 "ld1h { z17.h }, p2/Z, [x9, #1, MUL VL]\n" in sve_transpose_interleave_4VL_2x2()
76 "ld1h { z15.h }, p2/Z, [x9, #2, MUL VL]\n" in sve_transpose_interleave_4VL_2x2()
79 "ld1h { z6.h }, p2/Z, [x9, #3, MUL VL]\n" in sve_transpose_interleave_4VL_2x2()
85 "ld1h { z1.h }, p2/Z, [x28, #1, MUL VL]\n" in sve_transpose_interleave_4VL_2x2()
87 "ld1h { z19.h }, p2/Z, [x28, #2, MUL VL]\n" in sve_transpose_interleave_4VL_2x2()
89 "ld1h { z11.h }, p2/Z, [x28, #3, MUL VL]\n" in sve_transpose_interleave_4VL_2x2()
[all …]
/aosp_15_r20/external/linux-kselftest/tools/testing/selftests/arm64/abi/
H A Dsyscall-abi-asm.S28 * LDR ZA[\nw, #\offset], [X\nxbase, #\offset, MUL VL]
39 * STR ZA[\nw, #\offset], [X\nxbase, #\offset, MUL VL]
120 ldr z0, [x2, #0, MUL VL]
121 ldr z1, [x2, #1, MUL VL]
122 ldr z2, [x2, #2, MUL VL]
123 ldr z3, [x2, #3, MUL VL]
124 ldr z4, [x2, #4, MUL VL]
125 ldr z5, [x2, #5, MUL VL]
126 ldr z6, [x2, #6, MUL VL]
127 ldr z7, [x2, #7, MUL VL]
[all …]
/aosp_15_r20/external/XNNPACK/test/
H A Df32-vmul-minmax.cc26 ….Test(xnn_f32_vmul_minmax_ukernel__neon_x4, VBinaryMicrokernelTester::OpType::Mul, xnn_init_f32_mi… in TEST()
34 ….Test(xnn_f32_vmul_minmax_ukernel__neon_x4, VBinaryMicrokernelTester::OpType::Mul, xnn_init_f32_mi… in TEST()
43 ….Test(xnn_f32_vmul_minmax_ukernel__neon_x4, VBinaryMicrokernelTester::OpType::Mul, xnn_init_f32_mi… in TEST()
52 ….Test(xnn_f32_vmul_minmax_ukernel__neon_x4, VBinaryMicrokernelTester::OpType::Mul, xnn_init_f32_mi… in TEST()
62 ….Test(xnn_f32_vmul_minmax_ukernel__neon_x4, VBinaryMicrokernelTester::OpType::Mul, xnn_init_f32_mi… in TEST()
72 ….Test(xnn_f32_vmul_minmax_ukernel__neon_x4, VBinaryMicrokernelTester::OpType::Mul, xnn_init_f32_mi… in TEST()
83 ….Test(xnn_f32_vmul_minmax_ukernel__neon_x4, VBinaryMicrokernelTester::OpType::Mul, xnn_init_f32_mi… in TEST()
93 ….Test(xnn_f32_vmul_minmax_ukernel__neon_x4, VBinaryMicrokernelTester::OpType::Mul, xnn_init_f32_mi… in TEST()
103 ….Test(xnn_f32_vmul_minmax_ukernel__neon_x4, VBinaryMicrokernelTester::OpType::Mul, xnn_init_f32_mi… in TEST()
114 ….Test(xnn_f32_vmul_minmax_ukernel__neon_x8, VBinaryMicrokernelTester::OpType::Mul, xnn_init_f32_mi… in TEST()
[all …]
/aosp_15_r20/external/llvm/test/CodeGen/AArch64/
H A Daarch64-fix-cortex-a53-835769.ll26 %mul = mul nsw i64 %0, %b
27 %add = add nsw i64 %mul, %a
45 %mul = mul nsw i32 %0, %b
46 %add = add nsw i32 %mul, %a
60 %mul = mul nsw i64 %0, %b
61 %sub = sub nsw i64 %a, %mul
76 %mul = mul nsw i32 %0, %b
77 %sub = sub nsw i32 %a, %mul
91 %mul = mul nsw i64 %0, %b
92 ret i64 %mul
[all …]
/aosp_15_r20/external/ComputeLibrary/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8u32_mmla_6x4VL/
H A Dgeneric.cpp105 "ld1w { z10.s }, p3/Z, [x28, #1, MUL VL]\n" in sve_hybrid_u8u32_mmla_6x4VL()
107 "ld1w { z11.s }, p2/Z, [x28, #2, MUL VL]\n" in sve_hybrid_u8u32_mmla_6x4VL()
108 "ld1w { z16.s }, p1/Z, [x28, #3, MUL VL]\n" in sve_hybrid_u8u32_mmla_6x4VL()
147 "ld1b { z6.b }, p5/Z, [x9, #1, MUL VL]\n" in sve_hybrid_u8u32_mmla_6x4VL()
155 "ld1b { z7.b }, p5/Z, [x9, #2, MUL VL]\n" in sve_hybrid_u8u32_mmla_6x4VL()
157 "ld1b { z6.b }, p5/Z, [x9, #3, MUL VL]\n" in sve_hybrid_u8u32_mmla_6x4VL()
159 "ld1b { z7.b }, p5/Z, [x9, #4, MUL VL]\n" in sve_hybrid_u8u32_mmla_6x4VL()
161 "ld1b { z6.b }, p5/Z, [x9, #5, MUL VL]\n" in sve_hybrid_u8u32_mmla_6x4VL()
163 "ld1b { z7.b }, p5/Z, [x9, #6, MUL VL]\n" in sve_hybrid_u8u32_mmla_6x4VL()
165 "ld1b { z6.b }, p5/Z, [x9, #7, MUL VL]\n" in sve_hybrid_u8u32_mmla_6x4VL()
[all …]

12345678910>>...374