| /linux-6.14.4/tools/testing/selftests/bpf/prog_tests/ |
| D | btf_endian.c | 1 // SPDX-License-Identifier: GPL-2.0
11 enum btf_endianness endian = BTF_LITTLE_ENDIAN; in test_btf_endian() local
13 enum btf_endianness endian = BTF_BIG_ENDIAN; in test_btf_endian()
17 enum btf_endianness swap_endian = 1 - endian; in test_btf_endian()
25 /* Load BTF in native endianness */ in test_btf_endian()
30 ASSERT_EQ(btf__endianness(btf), endian, "endian"); in test_btf_endian()
32 ASSERT_EQ(btf__endianness(btf), swap_endian, "endian"); in test_btf_endian()
34 /* Get raw BTF data in non-native endianness... */ in test_btf_endian()
44 ASSERT_EQ(btf__endianness(swap_btf), swap_endian, "endian"); in test_btf_endian()
51 /* both raw data should be identical (with non-native endianness) */ in test_btf_endian()
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| /linux-6.14.4/arch/mips/boot/dts/brcm/ |
| D | bcm7346.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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| D | bcm7125.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <202500000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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| D | bcm7358.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
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| D | bcm7435.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <175625000>;
42 cpu_intc: interrupt-controller {
43 #address-cells = <0>;
44 compatible = "mti,cpu-interrupt-controller";
46 interrupt-controller;
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| D | bcm7425.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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| D | bcm7360.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
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| D | bcm7362.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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| D | bcm7420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <93750000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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| /linux-6.14.4/Documentation/devicetree/bindings/ |
| D | common-properties.txt | 5 ----------
13 - big-endian: Boolean; force big endian register accesses
15 know the peripheral always needs to be accessed in big endian (BE) mode.
16 - little-endian: Boolean; force little endian register accesses
18 peripheral always needs to be accessed in little endian (LE) mode.
19 - native-endian: Boolean; always use register accesses matched to the
20 endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
21 BE vmlinux -> ioread32be/iowrite32be). In this case no byte swaps
22 will ever be performed. Use this if the hardware "self-adjusts"
27 In such cases, little-endian is the preferred default, but it is not
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| /linux-6.14.4/Documentation/devicetree/bindings/regmap/ |
| D | regmap.txt | 5 little-endian,
6 big-endian,
7 native-endian: See common-properties.txt for a definition
10 Regmap defaults to little-endian register access on MMIO based
12 architectures that typically run big-endian operating systems
13 (e.g. PowerPC), registers can be defined as big-endian and must
16 On SoCs that can be operated in both big-endian and little-endian
19 chips), "native-endian" is used to allow using the same device tree
23 Scenario 1 : a register set in big-endian mode.
27 big-endian;
|
| /linux-6.14.4/Documentation/devicetree/bindings/memory-controllers/ |
| D | intel,ixp4xx-expansion-bus-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
15 - Linus Walleij <[email protected]>
19 pattern: '^bus@[0-9a-f]+$'
23 - enum:
24 - intel,ixp42x-expansion-bus-controller
25 - intel,ixp43x-expansion-bus-controller
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| /linux-6.14.4/arch/arm/include/asm/ |
| D | bitops.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Big endian support: Copyright 2001, Nicolas Pitre
34 * First, the atomic bitops. These use native endian.
123 #include <asm-generic/bitops/non-atomic.h>
126 * A note about Endian-ness.
127 * -------------------------
129 * When the ARM is put into big endian mode via CR15, the processor
132 * ------------ physical data bus bits -----------
137 * This means that reading a 32-bit word at address 0 returns the same
138 * value irrespective of the endian mode bit.
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| /linux-6.14.4/arch/xtensa/boot/dts/ |
| D | xtfpga.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 compatible = "cdns,xtensa-xtfpga";
4 #address-cells = <1>;
5 #size-cells = <1>;
6 interrupt-parent = <&pic>;
18 #address-cells = <1>;
19 #size-cells = <0>;
21 compatible = "cdns,xtensa-cpu";
28 compatible = "cdns,xtensa-pic";
33 #interrupt-cells = <2>;
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| /linux-6.14.4/tools/testing/selftests/powerpc/tm/ |
| D | tm-trap.c | 1 // SPDX-License-Identifier: GPL-2.0-only
21 * to zero which determines a BE endianness that is the native
27 * endianness "flipped back" to the native endianness (BE).
67 thread_endianness = MSR_LE & ucp->uc_mcontext.gp_regs[PT_MSR]; in trap_signal_handler()
70 * Little-Endian Machine in trap_signal_handler()
95 * the return from the signal handler the endianness in- in trap_signal_handler()
98 * and (4) are executed (tbegin.; trap;) and we get sim- in trap_signal_handler()
109 * a trap caught in non-transactional mode is the very in trap_signal_handler()
116 ucp->uc_mcontext.gp_regs[PT_NIP] += 16; in trap_signal_handler()
123 ucp->uc_mcontext.gp_regs[PT_MSR] |= 1UL; in trap_signal_handler()
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| /linux-6.14.4/Documentation/devicetree/bindings/gpio/ |
| D | gpio-mmio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-mmio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <[email protected]>
11 - Bartosz Golaszewski <[email protected]>
15 of set/clear-bit registers. Such controllers are common for glue logic in
16 FPGAs or ASICs. Commonly, these controllers are accessed over memory-mapped
17 NAND-style parallel busses.
22 - brcm,bcm6345-gpio
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| /linux-6.14.4/arch/m68k/include/asm/ |
| D | io_no.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
12 * The non-MMU m68k and ColdFire IO and memory mapped hardware access
13 * functions have always worked in CPU native endian. We need to define
14 * that behavior here first before we include asm-generic/io.h.
50 return (addr >= IOMEMBASE) && (addr <= IOMEMBASE + IOMEMSIZE - 1); in __cf_internalio()
59 * We need to treat built-in peripherals and bus based address ranges
60 * differently. Local built-in peripherals (and the ColdFire SoC parts
61 * have quite a lot of them) are always native endian - which is big
62 * endian on m68k/ColdFire. Bus based address ranges, like the PCI bus,
63 * are accessed little endian - so we need to byte swap those.
[all …]
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| /linux-6.14.4/tools/objtool/include/objtool/ |
| D | endianness.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 #include <endian.h>
11 * compilation for little endian on big endian and vice versa.
12 * To be used for multi-byte values conversion, which are read from / about
13 * to be written to a target native endianness ELF file.
18 (elf->ehdr.e_ident[EI_DATA] == ELFDATA2LSB); in need_bswap()
|
| /linux-6.14.4/include/uapi/linux/ |
| D | virtio_pcidev.h | 1 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
11 * enum virtio_pcidev_ops - virtual PCI device operations
14 * the @data field should be filled in by the device (in little endian).
16 * the @data field contains the data to write (in little endian).
18 * the @data field should be filled in by the device (in little endian).
20 * the @data field contains the data to write (in little endian).
23 * @VIRTIO_PCIDEV_OP_INT: legacy INTx# pin interrupt, the addr field is 1-4 for
25 * @VIRTIO_PCIDEV_OP_MSI: MSI(-X) interrupt, this message basically transports
26 * the 16- or 32-bit write that would otherwise be done into memory,
44 * struct virtio_pcidev_msg - virtio PCI device operation
[all …]
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| /linux-6.14.4/drivers/mtd/nand/raw/brcmnand/ |
| D | brcmnand.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
16 /* Special register offset constant to intercept a non-MMIO access
40 if (soc && soc->prepare_data_bus) in brcmnand_soc_data_bus_prepare()
41 soc->prepare_data_bus(soc, true, is_param); in brcmnand_soc_data_bus_prepare()
47 if (soc && soc->prepare_data_bus) in brcmnand_soc_data_bus_unprepare()
48 soc->prepare_data_bus(soc, false, is_param); in brcmnand_soc_data_bus_unprepare()
55 * bus endianness (i.e., big-endian CPU + big endian bus ==> native in brcmnand_readl()
56 * endian I/O). in brcmnand_readl()
58 * Other architectures (e.g., ARM) either do not support big endian, or in brcmnand_readl()
59 * else leave I/O in little endian mode. in brcmnand_readl()
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| /linux-6.14.4/Documentation/devicetree/bindings/sound/ |
| D | fsl,spdif.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <[email protected]>
20 - items:
21 - enum:
22 - fsl,imx35-spdif
23 - fsl,imx6sx-spdif
24 - fsl,imx8mm-spdif
25 - fsl,imx8mn-spdif
[all …]
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| D | fsl,esai.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <[email protected]>
11 - Frank Li <[email protected]>
14 The Enhanced Serial Audio Interface (ESAI) provides a full-duplex serial port
22 - enum:
23 - fsl,imx35-esai
24 - fsl,imx6ull-esai
25 - fsl,vf610-esai
[all …]
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| /linux-6.14.4/drivers/video/fbdev/core/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
72 Allow generic frame-buffer functions to work on displays with 1, 2
104 Allow generic frame-buffer to provide get_fb_unmapped_area
112 non-native endianness (e.g. Little-Endian framebuffer on a
113 Big-Endian machine). Most probably you don't have such hardware,
121 bool "Support for Big- and Little-Endian framebuffers"
124 bool "Support for Big-Endian framebuffers only"
127 bool "Support for Little-Endian framebuffers only"
211 terms of number of tiles in the x- and y-axis.
|
| /linux-6.14.4/drivers/phy/broadcom/ |
| D | phy-brcm-usb-init.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2014-2017 Broadcom
84 * bus endianness (i.e., big-endian CPU + big endian bus ==> native in brcm_usb_readl()
85 * endian I/O). in brcm_usb_readl()
87 * Other architectures (e.g., ARM) either do not support big endian, or in brcm_usb_readl()
88 * else leave I/O in little endian mode. in brcm_usb_readl()
117 if (ini->ops->init_ipp) in brcm_usb_init_ipp()
118 ini->ops->init_ipp(ini); in brcm_usb_init_ipp()
123 if (ini->ops->init_common) in brcm_usb_init_common()
124 ini->ops->init_common(ini); in brcm_usb_init_common()
[all …]
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| /linux-6.14.4/arch/arc/include/uapi/asm/ |
| D | swab.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
10 * -Support single cycle endian-swap insn in ARC700 4.10
13 * -Better htonl implementation (5 instead of 9 ALU instructions)
14 * -Hardware assisted single cycle bswap (Use Case of ARC custom instrn)
22 /* Native single cycle endian swap insn */
37 /* Several ways of Endian-Swap Emulation for ARC
|