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/linux-6.14.4/arch/arm/boot/dts/nvidia/
Dtegra30-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 core_opp_table: opp-table-core {
5 compatible = "operating-points-v2";
6 opp-shared;
8 core_opp_950: opp-950000 {
9 opp-microvolt = <950000 950000 1350000>;
10 opp-level = <950000>;
13 core_opp_1000: opp-1000000 {
14 opp-microvolt = <1000000 1000000 1350000>;
15 opp-level = <1000000>;
[all …]
Dtegra124-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 emc_icc_dvfs_opp_table: opp-table-emc {
5 compatible = "operating-points-v2";
7 opp-12750000-800 {
8 opp-microvolt = <800000 800000 1150000>;
9 opp-hz = /bits/ 64 <12750000>;
10 opp-supported-hw = <0x0003>;
13 opp-12750000-950 {
14 opp-microvolt = <950000 950000 1150000>;
15 opp-hz = /bits/ 64 <12750000>;
[all …]
Dtegra20-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 core_opp_table: opp-table-core {
5 compatible = "operating-points-v2";
6 opp-shared;
8 core_opp_950: opp-950000 {
9 opp-microvolt = <950000 950000 1300000>;
10 opp-level = <950000>;
13 core_opp_1000: opp-1000000 {
14 opp-microvolt = <1000000 1000000 1300000>;
15 opp-level = <1000000>;
[all …]
Dtegra30-cpu-opp-microvolt.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 cpu0_opp_table: opp-table-cpu0 {
5 opp-51000000-800 {
6 opp-microvolt = <800000 800000 1250000>;
9 opp-51000000-850 {
10 opp-microvolt = <850000 850000 1250000>;
13 opp-51000000-912 {
14 opp-microvolt = <912000 912000 1250000>;
17 opp-102000000-800 {
18 opp-microvolt = <800000 800000 1250000>;
[all …]
Dtegra20-cpu-opp-microvolt.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 cpu0_opp_table: opp-table-cpu0 {
5 opp-216000000-750 {
6 opp-microvolt = <750000 750000 1125000>;
9 opp-216000000-800 {
10 opp-microvolt = <800000 800000 1125000>;
13 opp-312000000-750 {
14 opp-microvolt = <750000 750000 1125000>;
17 opp-312000000-800 {
18 opp-microvolt = <800000 800000 1125000>;
[all …]
Dtegra30-cpu-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 cpu0_opp_table: opp-table-cpu0 {
5 compatible = "operating-points-v2";
6 opp-shared;
8 opp-51000000-800 {
9 clock-latency-ns = <100000>;
10 opp-supported-hw = <0x1F 0x31FE>;
11 opp-hz = /bits/ 64 <51000000>;
14 opp-51000000-850 {
15 clock-latency-ns = <100000>;
[all …]
Dtegra20-cpu-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 cpu0_opp_table: opp-table-cpu0 {
5 compatible = "operating-points-v2";
6 opp-shared;
8 opp-216000000-750 {
9 clock-latency-ns = <400000>;
10 opp-supported-hw = <0x0F 0x0003>;
11 opp-hz = /bits/ 64 <216000000>;
12 opp-suspend;
15 opp-216000000-800 {
[all …]
/linux-6.14.4/arch/arm64/boot/dts/nvidia/
Dtegra132-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 /* EMC DVFS OPP table */
5 emc_icc_dvfs_opp_table: opp-table-dvfs0 {
6 compatible = "operating-points-v2";
8 opp-12750000-800 {
9 opp-microvolt = <800000 800000 1150000>;
10 opp-hz = /bits/ 64 <12750000>;
11 opp-supported-hw = <0x0003>;
14 opp-12750000-950 {
15 opp-microvolt = <950000 950000 1150000>;
[all …]
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dmsm8996pro.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /delete-node/ opp-table-cluster0;
10 /delete-node/ opp-table-cluster1;
18 cluster0_opp: opp-table-cluster0 {
19 compatible = "operating-points-v2-kryo-cpu";
20 nvmem-cells = <&speedbin_efuse>;
21 opp-shared;
23 opp-307200000 {
24 opp-hz = /bits/ 64 <307200000>;
25 opp-supported-hw = <0x70>;
[all …]
Dsa8540p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /delete-node/ &cpu0_opp_table;
10 /delete-node/ &cpu4_opp_table;
13 cpu0_opp_table: opp-table-cpu0 {
14 compatible = "operating-points-v2";
15 opp-shared;
17 opp-300000000 {
18 opp-hz = /bits/ 64 <300000000>;
19 opp-peak-kBps = <(300000 * 32)>;
21 opp-403200000 {
[all …]
/linux-6.14.4/arch/arm64/boot/dts/rockchip/
Drk3588-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 cluster0_opp_table: opp-table-cluster0 {
5 compatible = "operating-points-v2";
6 opp-shared;
8 opp-1008000000 {
9 opp-hz = /bits/ 64 <1008000000>;
10 opp-microvolt = <675000 675000 950000>;
11 clock-latency-ns = <40000>;
13 opp-1200000000 {
14 opp-hz = /bits/ 64 <1200000000>;
[all …]
Drk3588j.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "rk3588-extra.dtsi"
10 cluster0_opp_table: opp-table-cluster0 {
11 compatible = "operating-points-v2";
12 opp-shared;
14 opp-1416000000 {
15 opp-hz = /bits/ 64 <1416000000>;
16 opp-microvolt = <750000 750000 950000>;
17 clock-latency-ns = <40000>;
18 opp-suspend;
[all …]
Drk3399-op1.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
9 cluster0_opp: opp-table-0 {
10 compatible = "operating-points-v2";
11 opp-shared;
14 opp-hz = /bits/ 64 <408000000>;
15 opp-microvolt = <800000 800000 1150000>;
16 clock-latency-ns = <40000>;
19 opp-hz = /bits/ 64 <600000000>;
20 opp-microvolt = <825000 825000 1150000>;
[all …]
Drk3566.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include "rk3566-base.dtsi"
6 cpu0_opp_table: opp-table-0 {
7 compatible = "operating-points-v2";
8 opp-shared;
10 opp-408000000 {
11 opp-hz = /bits/ 64 <408000000>;
12 opp-microvolt = <850000 850000 1150000>;
13 clock-latency-ns = <40000>;
16 opp-600000000 {
[all …]
/linux-6.14.4/arch/arm/boot/dts/samsung/
Dexynos5800.dtsi1 // SPDX-License-Identifier: GPL-2.0
20 compatible = "samsung,exynos5800-clock", "syscon";
24 opp-2000000000 {
25 opp-hz = /bits/ 64 <2000000000>;
26 opp-microvolt = <1312500 1312500 1500000>;
27 clock-latency-ns = <140000>;
29 opp-1900000000 {
30 opp-hz = /bits/ 64 <1900000000>;
31 opp-microvolt = <1262500 1262500 1500000>;
32 clock-latency-ns = <140000>;
[all …]
/linux-6.14.4/arch/arm64/boot/dts/amlogic/
Dmeson-g12b-a311d.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-g12b.dtsi"
10 cpu_opp_table_0: opp-table-0 {
11 compatible = "operating-points-v2";
12 opp-shared;
14 opp-1000000000 {
15 opp-hz = /bits/ 64 <1000000000>;
16 opp-microvolt = <761000>;
19 opp-1200000000 {
20 opp-hz = /bits/ 64 <1200000000>;
[all …]
Dmeson-g12b-s922x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-g12b.dtsi"
10 cpu_opp_table_0: opp-table-0 {
11 compatible = "operating-points-v2";
12 opp-shared;
14 opp-1000000000 {
15 opp-hz = /bits/ 64 <1000000000>;
16 opp-microvolt = <731000>;
19 opp-1200000000 {
20 opp-hz = /bits/ 64 <1200000000>;
[all …]
/linux-6.14.4/arch/arm64/boot/dts/allwinner/
Dsun50i-h616-cpu-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 cpu_opp_table: opp-table-cpu {
6 compatible = "allwinner,sun50i-h616-operating-points";
7 nvmem-cells = <&cpu_speed_grade>;
8 opp-shared;
10 opp-480000000 {
11 opp-hz = /bits/ 64 <480000000>;
12 opp-microvolt = <900000>;
13 clock-latency-ns = <244144>; /* 8 32k periods */
14 opp-supported-hw = <0x3f>;
[all …]
Dsun50i-h6-gpu-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 gpu_opp_table: opp-table-gpu {
6 compatible = "operating-points-v2";
8 opp-216000000 {
9 opp-hz = /bits/ 64 <216000000>;
10 opp-microvolt = <810000 810000 1200000>;
13 opp-264000000 {
14 opp-hz = /bits/ 64 <264000000>;
15 opp-microvolt = <810000 810000 1200000>;
18 opp-312000000 {
[all …]
Dsun50i-h6-cpu-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 cpu_opp_table: opp-table-cpu {
7 compatible = "allwinner,sun50i-h6-operating-points";
8 nvmem-cells = <&cpu_speed_grade>;
9 opp-shared;
11 opp-480000000 {
12 clock-latency-ns = <244144>; /* 8 32k periods */
13 opp-hz = /bits/ 64 <480000000>;
15 opp-microvolt-speed0 = <880000 880000 1200000>;
16 opp-microvolt-speed1 = <820000 820000 1200000>;
[all …]
/linux-6.14.4/arch/arm64/boot/dts/exynos/
Dexynos5433-bus.dtsi1 // SPDX-License-Identifier: GPL-2.0
11 compatible = "samsung,exynos-bus";
13 clock-names = "bus";
14 operating-points-v2 = <&bus_g2d_400_opp_table>;
19 compatible = "samsung,exynos-bus";
21 clock-names = "bus";
22 operating-points-v2 = <&bus_g2d_266_opp_table>;
27 compatible = "samsung,exynos-bus";
29 clock-names = "bus";
30 operating-points-v2 = <&bus_gscl_opp_table>;
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/opp/
Dopp-v2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic OPP (Operating Performance Points)
10 - Viresh Kumar <[email protected]>
13 - $ref: opp-v2-base.yaml#
17 const: operating-points-v2
22 - |
24 * Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states
[all …]
/linux-6.14.4/arch/powerpc/kvm/
Dmpic.c63 #define OPENPIC_CPU_REG_SIZE (0x100 + ((MAX_CPU - 1) * 0x1000))
116 struct kvm_vcpu *vcpu = current->thread.kvm_vcpu; in get_current_cpu()
117 return vcpu ? vcpu->arch.irq_cpu_id : -1; in get_current_cpu()
120 return -1; in get_current_cpu()
128 static inline void write_IRQreg_idr(struct openpic *opp, int n_IRQ,
133 IRQ_TYPE_FSLINT, /* FSL internal interrupt -- level only */
154 bool level:1; /* level-triggered */
171 #define IVPR_VECTOR(opp, _ivprr_) ((_ivprr_) & (opp)->vector_mask) argument
184 /* Count of IRQ sources asserting on non-INT outputs */
241 static void mpic_irq_raise(struct openpic *opp, struct irq_dest *dst, in mpic_irq_raise() argument
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/cpufreq/
Dcpufreq-mediatek.txt5 - clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock names.
6 - clock-names: Should contain the following:
7 "cpu" - The multiplexer for clock input of CPU cluster.
8 "intermediate" - A parent of "cpu" clock which is used as "intermediate" clock
11 Please refer to Documentation/devicetree/bindings/clock/clock-bindings.txt for
13 - operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp-v2.yaml
15 - proc-supply: Regulator for Vproc of CPU cluster.
18 - sram-supply: Regulator for Vsram of CPU cluster. When present, the cpufreq driver
23 - mediatek,cci:
30 - #cooling-cells:
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/interconnect/
Dmediatek,cci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jia-Wei Chang <jia-[email protected]>
11 - Johnson Wang <[email protected]>
21 - mediatek,mt8183-cci
22 - mediatek,mt8186-cci
26 - description:
28 - description:
33 clock-names:
[all …]

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