| /linux-6.14.4/Documentation/devicetree/bindings/memory-controllers/ |
| D | mc-peripheral-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/mc-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a Memory Controller bus.
10 Many Memory Controllers need to add properties to peripheral devices.
13 to be defined in the peripheral node because they are per-peripheral
20 - Marek Vasut <[email protected]>
26 bank-width:
32 - reg
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| /linux-6.14.4/Documentation/devicetree/bindings/serial/ |
| D | fsl-imx-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabio Estevam <[email protected]>
15 - const: fsl,imx1-uart
16 - const: fsl,imx21-uart
17 - items:
18 - enum:
19 - fsl,imx25-uart
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| /linux-6.14.4/Documentation/devicetree/bindings/spi/ |
| D | spi-peripheral-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
10 Many SPI controllers need to add properties to peripheral devices. They could
11 be common properties like spi-max-frequency, spi-cpha, etc. or they could be
13 need to be defined in the peripheral node because they are per-peripheral and
19 - Mark Brown <[email protected]>
27 - minimum: 0
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| /linux-6.14.4/include/linux/dma/ |
| D | imx-dma.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
14 * This enumerates peripheral types. Used for SDMA.
29 IMX_DMATYPE_EXT, /* External peripheral */
62 return !strcmp(dev_name(chan->device->dev), "ipu-core"); in imx_dma_is_ipu()
67 return !strcmp(chan->device->dev->driver->name, "imx-sdma") || in imx_dma_is_general_purpose()
68 !strcmp(chan->device->dev->driver->name, "imx-dma"); in imx_dma_is_general_purpose()
72 * struct sdma_peripheral_config - SDMA config for audio
79 * @words_per_fifo: numbers of words per FIFO fetch/fill, 1 means
80 * one channel per FIFO, 2 means 2 channels per FIFO..
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| /linux-6.14.4/Documentation/driver-api/ |
| D | spi.rst | 1 Serial Peripheral Interface (SPI)
4 SPI is the "Serial Peripheral Interface", widely used with embedded
7 often in the range of 1-20 MHz), a "Master Out, Slave In" (MOSI) data
9 duplex protocol; for each bit shifted out the MOSI line (one per clock)
12 additional chipselect line is usually active-low (nCS); four signals are
13 normally used for each peripheral, plus sometimes an interrupt.
19 peripherals and does not implement such a peripheral itself. (Interfaces
33 board-specific initialization code. A :c:type:`struct spi_driver
46 .. kernel-doc:: include/linux/spi/spi.h
49 .. kernel-doc:: drivers/spi/spi.c
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| D | sm501.rst | 15 ----
27 peripheral set as platform devices for the specific drivers.
29 The core re-uses the platform device system as the platform device
31 need to create a new bus-type and the associated code to go with it.
35 ---------
37 Each peripheral has a view of the device which is implicitly narrowed to
38 the specific set of resources that peripheral requires in order to
43 as this is by-far the most resource-sensitive of the on-chip functions.
59 -------------
66 The PCI driver assumes that the PCI card behaves as per the Silicon
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| /linux-6.14.4/drivers/spi/ |
| D | spi-geni-qcom.c | 1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2017-2018, The Linux foundation. All rights reserved.
6 #include <linux/dma-mapping.h>
7 #include <linux/dma/qcom-gpi-dma.h>
16 #include <linux/soc/qcom/geni-se.h>
108 struct geni_se *se = &mas->se; in spi_slv_setup()
110 writel(SPI_SLAVE_EN, se->base + SE_SPI_SLAVE_EN); in spi_slv_setup()
111 writel(GENI_IO_MUX_0_EN, se->base + GENI_OUTPUT_CTRL); in spi_slv_setup()
112 writel(START_TRIGGER, se->base + SE_GENI_CFG_SEQ_START); in spi_slv_setup()
113 dev_dbg(mas->dev, "spi slave setup done\n"); in spi_slv_setup()
[all …]
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| /linux-6.14.4/Documentation/devicetree/bindings/pinctrl/ |
| D | atmel,at91rm9200-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/atmel,at91rm9200-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manikandan Muralidharan <[email protected]>
22 - items:
23 - enum:
24 - atmel,at91rm9200-pinctrl
25 - atmel,at91sam9x5-pinctrl
26 - atmel,sama5d3-pinctrl
[all …]
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| /linux-6.14.4/Documentation/devicetree/bindings/spmi/ |
| D | qcom,spmi-pmic-arb.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/spmi/qcom,spmi-pmic-arb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <[email protected]>
14 controller with wrapping arbitration logic to allow for multiple on-chip
21 - $ref: spmi.yaml
25 const: qcom,spmi-pmic-arb
29 - items: # V1
30 - description: core registers
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| D | qcom,x1e80100-spmi-pmic-arb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spmi/qcom,x1e80100-spmi-pmic-arb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <[email protected]>
14 controller with wrapping arbitration logic to allow for multiple on-chip
23 - items:
24 - const: qcom,sar2130p-spmi-pmic-arb
25 - const: qcom,x1e80100-spmi-pmic-arb
26 - const: qcom,x1e80100-spmi-pmic-arb
[all …]
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| /linux-6.14.4/Documentation/devicetree/bindings/phy/ |
| D | nvidia,tegra186-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <[email protected]>
11 - Jon Hunter <[email protected]>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
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| D | nvidia,tegra194-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <[email protected]>
11 - Jon Hunter <[email protected]>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
|
| D | nvidia,tegra124-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <[email protected]>
11 - Jon Hunter <[email protected]>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
|
| D | nvidia,tegra210-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <[email protected]>
11 - Jon Hunter <[email protected]>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
|
| /linux-6.14.4/Documentation/devicetree/bindings/sound/ |
| D | apple,mca.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 MCA is an I2S transceiver peripheral found on M1 and other Apple chips. It is
15 - Martin Povišer <[email protected]>
18 - $ref: dai-common.yaml#
23 - enum:
24 - apple,t6000-mca
25 - apple,t8103-mca
26 - apple,t8112-mca
[all …]
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| /linux-6.14.4/include/drm/ |
| D | drm_mipi_dsi.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
19 /* request ACK from peripheral */
25 * struct mipi_dsi_msg - read/write DSI buffer
50 * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format
68 * struct mipi_dsi_host_ops - DSI bus operations
100 * struct mipi_dsi_host - DSI host device
125 /* enable hsync-end packets in vsync-pulse and v-porch area */
127 /* disable hfront-porch area */
129 /* disable hback-porch area */
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| /linux-6.14.4/Documentation/driver-api/usb/ |
| D | gadget.rst | 11 This document presents a Linux-USB "Gadget" kernel mode API, for use
17 - Supports USB 2.0, for high speed devices which can stream data at
18 several dozen megabytes per second.
20 - Handles devices with dozens of endpoints just as well as ones with
21 just two fixed-function ones. Gadget drivers can be written so
24 - Flexible enough to expose more complex USB device capabilities such
28 - USB "On-The-Go" (OTG) support, in conjunction with updates to the
29 Linux-USB host side.
31 - Sharing data structures and API models with the Linux-USB host side
32 API. This helps the OTG support, and looks forward to more-symmetric
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| /linux-6.14.4/drivers/gpio/ |
| D | gpio-realtek-otto.c | 1 // SPDX-License-Identifier: GPL-2.0-only
19 * Pin select: (0) "normal", (1) "dedicate peripheral"
20 * Not used on RTL8380/RTL8390, peripheral selection is managed by control bits
21 * in the peripheral registers.
29 /* Two bits per GPIO in IMR registers */
42 * realtek_gpio_ctrl - Realtek Otto GPIO driver data
49 * @bank_read: Read a bank setting as a single 32-bit value
50 * @bank_write: Write a bank setting as a single 32-bit value
53 * The DIR, DATA, and ISR registers consist of four 8-bit port values, packed
54 * into a single 32-bit register. Use @bank_read (@bank_write) to get (assign)
[all …]
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| /linux-6.14.4/Documentation/devicetree/bindings/dma/stm32/ |
| D | st,stm32-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 DMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a four-cell specifier for each
19 -bit 9: Peripheral Increment Address
22 -bit 10: Memory Increment Address
25 -bit 15: Peripheral Increment Offset Size
26 0x0: offset size is linked to the peripheral bus width
[all …]
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| /linux-6.14.4/sound/soc/codecs/ |
| D | cs35l56-sdw.c | 1 // SPDX-License-Identifier: GPL-2.0-only
37 static int cs35l56_sdw_poll_mem_status(struct sdw_slave *peripheral, in cs35l56_sdw_poll_mem_status() argument
46 false, peripheral, CS35L56_SDW_MEM_ACCESS_STATUS); in cs35l56_sdw_poll_mem_status()
56 static int cs35l56_sdw_slow_read(struct sdw_slave *peripheral, unsigned int reg, in cs35l56_sdw_slow_read() argument
65 ret = cs35l56_sdw_poll_mem_status(peripheral, in cs35l56_sdw_slow_read()
69 dev_err(&peripheral->dev, "!CMD_IN_PROGRESS fail: %d\n", ret); in cs35l56_sdw_slow_read()
74 sdw_read_no_pm(peripheral, reg + i); in cs35l56_sdw_slow_read()
77 ret = cs35l56_sdw_poll_mem_status(peripheral, in cs35l56_sdw_slow_read()
81 dev_err(&peripheral->dev, "RDATA_RDY fail: %d\n", ret); in cs35l56_sdw_slow_read()
86 ret = sdw_nread_no_pm(peripheral, CS35L56_SDW_MEM_READ_DATA, in cs35l56_sdw_slow_read()
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| /linux-6.14.4/Documentation/devicetree/bindings/dma/ |
| D | img-mdc-dma.txt | 1 * IMG Multi-threaded DMA Controller (MDC)
4 - compatible: Must be "img,pistachio-mdc-dma".
5 - reg: Must contain the base address and length of the MDC registers.
6 - interrupts: Must contain all the per-channel DMA interrupts.
7 - clocks: Must contain an entry for each entry in clock-names.
8 See ../clock/clock-bindings.txt for details.
9 - clock-names: Must include the following entries:
10 - sys: MDC system interface clock.
11 - img,cr-periph: Must contain a phandle to the peripheral control syscon
13 - img,max-burst-multiplier: Must be the maximum supported burst size multiplier.
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| /linux-6.14.4/Documentation/driver-api/dmaengine/ |
| D | client.rst | 8 ``Documentation/crypto/async-tx-api.rst``
11 Below is a guide to device driver writers on how to use the Slave-DMA API of the
19 - Allocate a DMA slave channel
21 - Set slave and controller specific parameters
23 - Get a descriptor for transaction
25 - Submit the transaction
27 - Issue pending requests and wait for callback notification
40 .. code-block:: c
57 for the peripheral.
66 .. code-block:: c
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| /linux-6.14.4/Documentation/devicetree/bindings/interrupt-controller/ |
| D | brcm,bcm2836-l1-intc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2836-l1-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: BCM2836 per-CPU interrupt controller
10 - Stefan Wahren <[email protected]>
11 - Raspberry Pi Kernel Maintenance <kernel-[email protected]>
14 The BCM2836 has a per-cpu interrupt controller for the timer, PMU
16 peripheral (GPU) events, which chain to the BCM2835-style interrupt
20 - $ref: /schemas/interrupt-controller.yaml#
[all …]
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| /linux-6.14.4/include/linux/platform_data/ |
| D | dma-dw.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (C) 2010-2011 ST Microelectronics
22 * struct dw_dma_slave - Controller-specific information about a slave
28 * @p_master: peripheral master for transfers on allocated channel
43 * struct dw_dma_platform_data - Controller configuration parameters
49 * @data_width: Maximum data width supported by hardware per AHB master
51 * @multi_block: Multi block transfers supported by hardware per channel.
53 * per channel (in units of CTL.SRC_TR_WIDTH/CTL.DST_TR_WIDTH).
54 * @protctl: Protection control signals setting per channel.
|
| /linux-6.14.4/drivers/bus/ |
| D | stm32_rifsc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
81 void __iomem *addr = stm32_firewall_controller->mmio + RIFSC_RISC_PER0_SEMCR + 0x8 * id; in stm32_rif_acquire_semaphore()
88 return -EACCES; in stm32_rif_acquire_semaphore()
96 void __iomem *addr = stm32_firewall_controller->mmio + RIFSC_RISC_PER0_SEMCR + 0x8 * id; in stm32_rif_release_semaphore()
114 if (firewall_id >= rifsc_controller->max_entries) { in stm32_rifsc_grant_access()
115 dev_err(rifsc_controller->dev, "Invalid sys bus ID %u", firewall_id); in stm32_rifsc_grant_access()
116 return -EINVAL; in stm32_rifsc_grant_access()
122 * per peripheral in stm32_rifsc_grant_access()
126 sec_reg_value = readl(rifsc_controller->mmio + RIFSC_RISC_SECCFGR0 + 0x4 * reg_id); in stm32_rifsc_grant_access()
[all …]
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