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/linux-6.14.4/arch/arm/crypto/
Dcurve25519-core.S77 vshr.u64 q6, q6, #3
85 vand q6, q6, q2
109 vadd.i64 q6, q6, q12
111 vadd.i64 q14, q6, q1
122 vsub.i64 q6, q6, q12
143 vshl.i64 q6, q13, #4
146 vadd.i64 q4, q4, q6
147 vadd.i64 q6, q10, q0
149 vadd.i64 q8, q6, q1
166 vsub.i64 q3, q6, q7
[all …]
Daes-neonbs-core.S451 vmov.i8 q6, #0x40
460 vtst.8 q6, q7, q6
466 vmvn q6, q6
472 vst1.8 {q6-q7}, [r0, :256]!
499 veor q10, q6, q9
502 __tbl q6, q10, q8
505 bitslice q0, q1, q2, q3, q4, q5, q6, q7, q8, q9, q10, q11
517 shift_rows q0, q1, q2, q3, q4, q5, q6, q7, q8, q9, q10, q11, q12
519 sbox q0, q1, q2, q3, q4, q5, q6, q7, q8, q9, q10, q11, q12, \
524 mix_cols q0, q1, q4, q6, q3, q7, q2, q5, q8, q9, q10, q11, q12, \
[all …]
Dchacha-neon-core.S160 vld1.8 {q6-q7}, [ip]
172 veor q2, q2, q6
245 vdup.32 q6, d3[0]
265 vadd.i32 q2, q2, q6
296 veor q8, q6, q10
298 vshl.u32 q6, q8, #12
300 vsri.u32 q6, q8, #20
310 vadd.i32 q2, q2, q6
347 veor q8, q6, q10
349 vshl.u32 q6, q8, #7
[all …]
Daes-ce-core.S260 vmov q6, q2
266 veor q3, q3, q6
274 vmov q6, q14 @ preserve last round key
277 veor q14, q15, q6 @ combine prev ct with last key
307 vld1.8 {q6}, [lr]
345 vld1.8 {q6}, [lr]
416 vld1.8 {q6}, [r1]!
421 veor q2, q2, q6
521 next_tweak q6, q5, q15, q10
523 next_tweak q7, q6, q15, q10
[all …]
Dblake2b-neon-core.S85 veor q6, q6, q0
87 vrev64.32 q6, q6
91 vadd.u64 q4, q4, q6
120 veor q6, q6, q0
128 vadd.u64 q4, q4, q6
266 vld1.64 {q6-q7}, [r10] // Load IV[4..7]
285 veor q6, q6, q14 // v[12..13] = IV[4..5] ^ t[0..1]
318 veor q2, q2, q6 // v[4..5] ^= v[12..13]
Dnh-neon-core.S34 K2 .req q6
/linux-6.14.4/Documentation/devicetree/bindings/remoteproc/
Dqcom,qcs404-cdsp-pil.yaml51 - description: Q6 AXIM clock
84 offset within syscon for q6 halt register.
88 - description: offset to the Q6 halt register
Dqcom,sdm845-adsp-pil.yaml84 offset within syscon for q6 halt register.
88 - description: offset to the Q6 halt register
Dqcom,sc7280-adsp-pil.yaml80 four offsets within syscon for q6, modem, nc and qv6 halt registers.
84 - description: offset to the Q6 halt register
Dqcom,sc7280-wpss-pil.yaml92 offset within syscon for q6 halt register.
96 - description: offset to the Q6 halt register
Dqcom,q6v5.txt91 by the three offsets within syscon for q6, wcss and nc
/linux-6.14.4/arch/arm/lib/
Dcrc-t10dif-core.S235 vld1.64 {q6-q7}, [buf]!
242 CPU_LE( vrev64.8 q6, q6 )
271 fold_32_bytes q6, q7, \p
275 // Now fold the 112 bytes in q0-q6 into the 16 bytes in q7.
281 fold_16_bytes q2, q6, \p
284 fold_16_bytes q4, q6, \p
287 fold_16_bytes q6, q7, \p
Dcrc32-core.S151 vmull.p64 q6, d5, dCONSTANTh
162 veor.8 q2, q2, q6
163 vld1.8 {q6}, [BUF, :128]!
170 veor.8 q2, q2, q6
/linux-6.14.4/drivers/remoteproc/
Dqcom_q6v5_wcss.c190 /* Deassert Q6 compiler memory clamp */ in q6v5_wcss_reset()
246 /* Release Q6 and WCSS reset */ in q6v5_wcss_start()
365 /* Enable the Enable the Q6 AXI clock, GCC_WDSP_Q6SS_AXIM_CBCR*/ in q6v5_wcss_qcs404_power_on()
400 /* Enable the Q6 core clock at the GFM, Q6SSTOP_QDSP6SS_GFMUX_CTL */ in q6v5_wcss_qcs404_power_on()
600 /* 1 - Assert WCSS/Q6 HALTREQ */ in q6v5_wcss_powerdown()
635 /* 8 - De-assert WCSS/Q6 HALTREQ */ in q6v5_wcss_powerdown()
647 /* 1 - Halt Q6 bus interface */ in q6v5_q6_powerdown()
650 /* 2 - Disable Q6 Core clock */ in q6v5_q6_powerdown()
672 /* 7 - turn off Q6 memory foot/head switch one bank at a time */ in q6v5_q6_powerdown()
702 /* 12 - Assert Q6 reset */ in q6v5_q6_powerdown()
[all …]
Dqcom_q6v5_mss.c498 * When the AXI pipeline is being reset with the Q6 modem partly in q6v5_reset_assert()
500 * glitch, leading to spurious transactions and Q6 hangs. A work in q6v5_reset_assert()
502 * BIT before triggering Q6 MSS reset. AXI_GATING_VALID_OVERRIDE in q6v5_reset_assert()
677 /* Configure Q6 core CBCR to auto-enable after reset sequence */ in q6v5proc_reset()
682 /* De-assert the Q6 stop core signal */ in q6v5proc_reset()
688 /* Trigger the boot FSM to start the Q6 out-of-reset sequence */ in q6v5proc_reset()
1027 "assigning Q6 access to metadata failed: %d\n", ret); in q6v5_mpss_init_image()
1143 * the Q6 access to this region. in q6v5_mba_load()
1148 dev_err(qproc->dev, "assigning Q6 access to mpss memory failed: %d\n", ret); in q6v5_mba_load()
1152 /* Assign MBA image access in DDR to q6 */ in q6v5_mba_load()
[all …]
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dqcs8550.dtsi92 q6_mpss_dtb_mem: q6-mpss-dtb-region@9b000000 {
142 q6_cdsp_dtb_mem: q6-cdsp-dtb-region@9e900000 {
147 q6_adsp_dtb_mem: q6-adsp-dtb-region@9e980000 {
Dqru1000.dtsi22 tenx_q6_buffer_mem: tenx-q6-buffer@b4e00000 {
/linux-6.14.4/Documentation/devicetree/bindings/gpio/
Dgpio-latch.yaml25 OUT6 ----+-|-|-|-|-|-|--|-----------|D6 Q6|-----|<
38 | `--------------------------|D6 Q6|-----|<
/linux-6.14.4/Documentation/devicetree/bindings/sound/
Dqcom,q6usb.yaml13 The USB port is a supported AFE path on the Q6 DSP. This ASoC DPCM
/linux-6.14.4/Documentation/devicetree/bindings/net/wireless/
Dqcom,ath10k.yaml41 running on the Q6 core.
137 description: State bits used by the AP to signal the WLAN Q6.
/linux-6.14.4/sound/soc/qcom/qdsp6/
Dq6prm-clocks.c93 MODULE_DESCRIPTION("Q6 Proxy Resource Manager LPASS clock driver");
Dq6afe-clocks.c119 MODULE_DESCRIPTION("Q6 Audio Frontend clock driver");
/linux-6.14.4/arch/arm64/include/asm/
Dfpsimdmacros.h15 stp q6, q7, [\state, #16 * 6]
51 ldp q6, q7, [\state, #16 * 6]
/linux-6.14.4/tools/testing/selftests/arm64/fp/
Dfp-ptrace-asm.S29 ldp q6, q7, [x7, #16 * 6]
160 stp q6, q7, [x7, #16 * 6]
/linux-6.14.4/drivers/gpio/
Dgpio-latch.c19 * OUT6 ----+-|-|-|-|-|-|--|-----------|D6 Q6|-----|<
32 * | `--------------------------|D6 Q6|-----|<

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