Searched full:reprogrammable (Results 1 – 4 of 4) sorted by relevance
12 an FPGA Manager and a bridge (or bridges) with a reprogrammable region of an
172 reprogrammable clock event device per-CPU is utilized.
76 * An FPGA image may create a set of reprogrammable regions, each having its
239 is based upon reprogrammable logic, a sudden disappearance from the bus is