/linux-6.14.4/Documentation/devicetree/bindings/power/reset/ |
D | syscon-reboot-mode.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/power/reset/syscon-reboot-mode.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic SYSCON reboot mode driver 10 - Sebastian Reichel <[email protected]> 13 This driver gets reboot mode magic value from reboot-mode driver 14 and stores it in a SYSCON mapped register. Then the bootloader 16 value stored. The SYSCON mapped register is retrieved from the 17 parental dt-node plus the offset. So the SYSCON reboot-mode node [all …]
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D | syscon-reboot.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/reset/syscon-reboot.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic SYSCON mapped register reset driver 10 - Sebastian Reichel <[email protected]> 13 This is a generic reset driver using syscon to map the reset register. 15 defined by the SYSCON register map base plus the offset with the value and 16 mask defined in the reboot node. Default will be little endian mode, 32 bit 17 access only. The SYSCON registers map is normally retrieved from the [all …]
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/linux-6.14.4/drivers/power/reset/ |
D | syscon-reboot-mode.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 11 #include <linux/reboot.h> 13 #include <linux/mfd/syscon.h> 14 #include <linux/reboot-mode.h> 18 struct reboot_mode_driver reboot; member 23 static int syscon_reboot_mode_write(struct reboot_mode_driver *reboot, in syscon_reboot_mode_write() argument 29 syscon_rbm = container_of(reboot, struct syscon_reboot_mode, reboot); in syscon_reboot_mode_write() 31 ret = regmap_update_bits(syscon_rbm->map, syscon_rbm->offset, in syscon_reboot_mode_write() 32 syscon_rbm->mask, magic); in syscon_reboot_mode_write() 34 dev_err(reboot->dev, "update reboot mode bits failed\n"); in syscon_reboot_mode_write() [all …]
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D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 13 bool "ams AS3722 power-off driver" 16 This driver supports turning off board via a ams AS3722 power-off. 35 tristate "Atmel AT91 SAMA5D2-Compatible shutdown controller driver" 43 tristate "Actions Semi ATC260x PMIC power-off driver" 46 This driver provides power-off and restart support for a system 64 Say Y here if you have a Broadcom Kona-based board and you wish 90 bool "Cortina Gemini power-off driver" 99 bool "GPIO power-off driver" 115 bool "Hisilicon power-off driver" [all …]
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D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_POWER_RESET_AS3722) += as3722-poweroff.o 3 obj-$(CONFIG_POWER_RESET_AT91_POWEROFF) += at91-poweroff.o 4 obj-$(CONFIG_POWER_RESET_AT91_RESET) += at91-reset.o 5 obj-$(CONFIG_POWER_RESET_AT91_SAMA5D2_SHDWC) += at91-sama5d2_shdwc.o 6 obj-$(CONFIG_POWER_RESET_ATC260X) += atc260x-poweroff.o 7 obj-$(CONFIG_POWER_RESET_AXXIA) += axxia-reset.o 8 obj-$(CONFIG_POWER_RESET_BRCMKONA) += brcm-kona-reset.o 9 obj-$(CONFIG_POWER_RESET_BRCMSTB) += brcmstb-reboot.o 10 obj-$(CONFIG_POWER_RESET_EP93XX) += ep93xx-restart.o [all …]
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D | syscon-reboot.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Generic Syscon Reboot Driver 11 #include <linux/mfd/syscon.h> 14 #include <linux/reboot.h> 26 unsigned long mode, void *cmd) in syscon_restart_handle() argument 32 /* Issue the reboot */ in syscon_restart_handle() 33 regmap_update_bits(ctx->map, ctx->offset, ctx->mask, ctx->value); in syscon_restart_handle() 44 struct device *dev = &pdev->dev; in syscon_reboot_probe() 49 ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); in syscon_reboot_probe() 51 return -ENOMEM; in syscon_reboot_probe() [all …]
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D | arm-versatile-reboot.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <linux/mfd/syscon.h> 9 #include <linux/reboot.h> 24 * We detect the different syscon types from the compatible strings. 42 .compatible = "arm,core-module-integrator", 46 .compatible = "arm,core-module-versatile", 50 .compatible = "arm,realview-eb-syscon", 54 .compatible = "arm,realview-pb1176-syscon", 58 .compatible = "arm,realview-pb11mp-syscon", 62 .compatible = "arm,realview-pba8-syscon", [all …]
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D | ocelot-reset.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 12 #include <linux/mfd/syscon.h> 15 #include <linux/reboot.h> 19 const char *syscon; member 43 unsigned long mode, void *cmd) in ocelot_restart_handle() argument 48 u32 if_si_owner_bit = ctx->props->if_si_owner_bit; in ocelot_restart_handle() 51 regmap_update_bits(ctx->cpu_ctrl, ctx->props->protect_reg, in ocelot_restart_handle() 52 ctx->props->vcore_protect, 0); in ocelot_restart_handle() 54 /* Make the SI back to boot mode */ in ocelot_restart_handle() 56 regmap_update_bits(ctx->cpu_ctrl, in ocelot_restart_handle() [all …]
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D | keystone-reset.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * TI keystone reboot driver 14 #include <linux/reboot.h> 16 #include <linux/mfd/syscon.h> 41 * rsctrl_enable_rspll_write - enable access to RSCTRL, RSCFG 52 unsigned long mode, void *cmd) in rsctrl_restart_handler() argument 70 {.compatible = "ti,keystone-reset", }, 83 struct device *dev = &pdev->dev; in rsctrl_probe() 84 struct device_node *np = dev->of_node; in rsctrl_probe() 87 return -ENODEV; in rsctrl_probe() [all …]
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D | ep93xx-restart.c | 1 // SPDX-License-Identifier: GPL-2.0+ 12 #include <linux/mfd/syscon.h> 16 #include <linux/reboot.h> 30 unsigned long mode, void *cmd) in ep93xx_restart_handle() argument 34 struct ep93xx_regmap_adev *aux = priv->aux_dev; in ep93xx_restart_handle() 36 /* Issue the reboot */ in ep93xx_restart_handle() 37 aux->update_bits(aux->map, aux->lock, EP93XX_SYSCON_DEVCFG, in ep93xx_restart_handle() 39 aux->update_bits(aux->map, aux->lock, EP93XX_SYSCON_DEVCFG, in ep93xx_restart_handle() 49 struct device *dev = &adev->dev; in ep93xx_reboot_probe() 53 if (!rdev->update_bits) in ep93xx_reboot_probe() [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/soc/samsung/ |
D | exynos-pmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/soc/samsung/exynos-pmu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <[email protected]> 12 # Custom select to avoid matching all nodes with 'syscon' 18 - google,gs101-pmu 19 - samsung,exynos3250-pmu 20 - samsung,exynos4210-pmu 21 - samsung,exynos4212-pmu [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/sram/ |
D | qcom,imem.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <[email protected]> 19 - enum: 20 - qcom,apq8064-imem 21 - qcom,msm8226-imem 22 - qcom,msm8974-imem 23 - qcom,msm8976-imem 24 - qcom,qcs404-imem [all …]
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/linux-6.14.4/arch/powerpc/boot/dts/ |
D | turris1x.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * Copyright 2013 - 2022 CZ.NIC z.s.p.o. (http://www.nic.cz/) 8 * and available at: https://docs.turris.cz/hw/turris-1x/turris-1x/ 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/leds/common.h> 14 /include/ "fsl/p2020si-pre.dtsi" 41 gpio-controller@18 { 45 #gpio-cells = <2>; 46 gpio-controller; [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/soc/rockchip/ |
D | grf.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <[email protected]> 15 - items: 16 - enum: 17 - rockchip,rk3288-sgrf 18 - rockchip,rk3566-pipe-grf 19 - rockchip,rk3568-pcie3-phy-grf 20 - rockchip,rk3568-pipe-grf [all …]
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/linux-6.14.4/arch/arm/boot/dts/rockchip/ |
D | rk3xxx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/soc/rockchip,boot-mode.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 interrupt-parent = <&gic>; 37 compatible = "fixed-clock"; 38 clock-frequency = <24000000>; 39 #clock-cells = <0>; [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/arm/rockchip/ |
D | pmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <[email protected]> 22 - rockchip,px30-pmu 23 - rockchip,rk3066-pmu 24 - rockchip,rk3128-pmu 25 - rockchip,rk3288-pmu 26 - rockchip,rk3368-pmu [all …]
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/linux-6.14.4/arch/arm64/boot/dts/hisilicon/ |
D | hi6220-hikey.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 11 #include "hikey-pinctrl.dtsi" 12 #include <dt-bindings/gpio/gpio.h> 16 compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220"; 26 stdout-path = "serial3:115200n8"; 32 * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using 33 * 0x05f0,1000 - 0x05f0,1fff: Reboot reason 34 * 0x06df,f000 - 0x06df,ffff: Mailbox message data 35 * 0x0740,f000 - 0x0740,ffff: MCU firmware section [all …]
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D | hi3660-hikey960.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 12 #include "hikey960-pinctrl.dtsi" 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/input/input.h> 15 #include <dt-bindings/interrupt-controller/irq.h> 16 #include <dt-bindings/usb/pd.h> 20 compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660"; 35 stdout-path = "serial6:115200n8"; 44 reserved-memory { [all …]
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/linux-6.14.4/arch/arm/boot/dts/gemini/ |
D | gemini.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/clock/cortina,gemini-clock.h> 8 #include <dt-bindings/reset/cortina,gemini-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 16 compatible = "simple-bus"; 17 interrupt-parent = <&intcon>; 20 compatible = "cortina,gemini-flash", "cfi-flash"; [all …]
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/linux-6.14.4/arch/mips/boot/dts/mti/ |
D | sead3.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/mips-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 13 compatible = "mti,sead-3"; 14 model = "MIPS SEAD-3"; 17 stdout-path = "serial1:115200"; 36 cpu_intc: interrupt-controller { 37 compatible = "mti,cpu-interrupt-controller"; [all …]
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/linux-6.14.4/arch/arm/boot/dts/qcom/ |
D | qcom-apq8064-asus-nexus7-flo.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/gpio/gpio.h> 3 #include <dt-bindings/input/input.h> 4 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 6 #include "qcom-apq8064-v2.0.dtsi" 12 compatible = "asus,nexus7-flo", "qcom,apq8064"; 13 chassis-type = "tablet"; 21 stdout-path = "serial0:115200n8"; 24 reserved-memory { 25 #address-cells = <1>; [all …]
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/linux-6.14.4/arch/arm/mach-zynq/ |
D | slcr.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (c) 2011-2013 Xilinx Inc. 9 #include <linux/reboot.h> 10 #include <linux/mfd/syscon.h> 19 #define SLCR_REBOOT_STATUS_OFFSET 0x258 /* PS Reboot Status */ 33 * zynq_slcr_write - Write to a register in SLCR block 46 * zynq_slcr_read - Read a register in SLCR block 59 * zynq_slcr_unlock - Unlock SLCR registers 71 * zynq_slcr_get_device_id - Read device code id 87 * zynq_slcr_system_restart - Restart the entire system. [all …]
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/linux-6.14.4/arch/arm64/boot/dts/exynos/ |
D | exynosautov9.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/clock/samsung,exynosautov9.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/soc/samsung,boot-mode.h> 12 #include <dt-bindings/soc/samsung,exynos-usi.h> 16 #address-cells = <2>; 17 #size-cells = <1>; 19 interrupt-parent = <&gic>; 31 arm-pmu { 32 compatible = "arm,cortex-a76-pmu"; [all …]
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D | exynos850.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 13 #include <dt-bindings/clock/exynos850.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 #include <dt-bindings/soc/samsung,exynos-usi.h> 20 #address-cells = <2>; 21 #size-cells = <1>; 23 interrupt-parent = <&gic>; 34 arm-pmu { 35 compatible = "arm,cortex-a55-pmu"; 44 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>, [all …]
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/linux-6.14.4/arch/arm/boot/dts/ti/davinci/ |
D | da850-lego-ev3.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 8 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/linux-event-codes.h> 11 #include <dt-bindings/pwm/pwm.h> 32 compatible = "gpio-keys"; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&button_bias>; 75 * The EV3 has two built-in bi-color LEDs behind the buttons. 78 compatible = "gpio-leds"; [all …]
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