xref: /aosp_15_r20/external/coreboot/src/soc/mediatek/common/bl31.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c) 
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <bl31.h>
4 #include <gpio.h>
5 #include <soc/bl31.h>
6 
7 #include <arm-trusted-firmware/include/export/plat/mediatek/common/plat_params_exp.h>
8 
register_reset_to_bl31(int gpio_index,bool active_high)9 void register_reset_to_bl31(int gpio_index, bool active_high)
10 {
11 	static struct bl_aux_param_gpio param_reset = {
12 		.h = { .type = BL_AUX_PARAM_MTK_RESET_GPIO },
13 	};
14 
15 	if (active_high)
16 		param_reset.gpio.polarity = ARM_TF_GPIO_LEVEL_HIGH;
17 	else
18 		param_reset.gpio.polarity = ARM_TF_GPIO_LEVEL_LOW;
19 
20 	param_reset.gpio.index = gpio_index;
21 	register_bl31_aux_param(&param_reset.h);
22 }
23