1 /*
2  * Copyright 2023 The Android Open Source Project
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #pragma once
18 
19 #include <aidl/android/hardware/power/Boost.h>
20 #include <aidl/android/hardware/power/ChannelConfig.h>
21 #include <aidl/android/hardware/power/ChannelMessage.h>
22 #include <aidl/android/hardware/power/IPower.h>
23 #include <aidl/android/hardware/power/IPowerHintSession.h>
24 #include <aidl/android/hardware/power/Mode.h>
25 #include <aidl/android/hardware/power/SessionConfig.h>
26 #include <aidl/android/hardware/power/SessionTag.h>
27 #include <aidl/android/hardware/power/SupportInfo.h>
28 #include <aidl/android/hardware/power/WorkDuration.h>
29 #include <android-base/thread_annotations.h>
30 #include <fmq/AidlMessageQueue.h>
31 #include <fmq/EventFlag.h>
32 
33 #include <cstdint>
34 
35 namespace aidl::google::hardware::power::impl::pixel {
36 
37 using namespace android::hardware::power;
38 
39 template <class T>
enum_size()40 constexpr size_t enum_size() {
41     return static_cast<size_t>(*(ndk::enum_range<T>().end() - 1)) + 1;
42 }
43 
44 template <class E>
supportFromBitset(int64_t & supportInt,E type)45 bool supportFromBitset(int64_t &supportInt, E type) {
46     return (supportInt >> static_cast<int>(type)) % 2;
47 }
48 
49 using ::android::AidlMessageQueue;
50 using ::android::hardware::EventFlag;
51 using android::hardware::common::fmq::MQDescriptor;
52 using android::hardware::common::fmq::SynchronizedReadWrite;
53 
54 using ChannelQueueDesc = MQDescriptor<ChannelMessage, SynchronizedReadWrite>;
55 using ChannelQueue = AidlMessageQueue<ChannelMessage, SynchronizedReadWrite>;
56 using FlagQueueDesc = MQDescriptor<int8_t, SynchronizedReadWrite>;
57 using FlagQueue = AidlMessageQueue<int8_t, SynchronizedReadWrite>;
58 
59 using ::android::AidlMessageQueue;
60 using ::android::hardware::EventFlag;
61 using android::hardware::common::fmq::MQDescriptor;
62 using android::hardware::common::fmq::SynchronizedReadWrite;
63 
64 using ChannelQueueDesc = MQDescriptor<ChannelMessage, SynchronizedReadWrite>;
65 using ChannelQueue = AidlMessageQueue<ChannelMessage, SynchronizedReadWrite>;
66 using FlagQueueDesc = MQDescriptor<int8_t, SynchronizedReadWrite>;
67 using FlagQueue = AidlMessageQueue<int8_t, SynchronizedReadWrite>;
68 
69 enum class AdpfErrorCode : int32_t { ERR_OK = 0, ERR_BAD_STATE = -1, ERR_BAD_ARG = -2 };
70 
71 enum class SessionJankyLevel : int32_t {
72     /**
73      * Small number of jank frames in the monitoring window.
74      * No extra heuristic boost will be applied.
75      */
76     LIGHT = 0,
77     /**
78      * Moderate number of jank frames in the monitoring window.
79      * Heuristic boost applied.
80      */
81     MODERATE,
82     /**
83      * Significant number of jank frames in the monitoring window.
84      * Heuristic boost applied.
85      */
86     SEVERE,
87 };
88 
89 enum class AdpfVoteType : int32_t {
90     CPU_VOTE_DEFAULT = 0,
91     CPU_LOAD_UP,
92     CPU_LOAD_RESET,
93     CPU_LOAD_RESUME,
94     VOTE_POWER_EFFICIENCY,
95     GPU_LOAD_UP,
96     GPU_LOAD_DOWN,
97     GPU_LOAD_RESET,
98     GPU_CAPACITY,
99     VOTE_TYPE_SIZE
100 };
101 
AdpfVoteTypeToStr(AdpfVoteType voteType)102 constexpr const char *AdpfVoteTypeToStr(AdpfVoteType voteType) {
103     switch (voteType) {
104         case AdpfVoteType::CPU_VOTE_DEFAULT:
105             return "CPU_VOTE_DEFAULT";
106         case AdpfVoteType::CPU_LOAD_UP:
107             return "CPU_LOAD_UP";
108         case AdpfVoteType::CPU_LOAD_RESET:
109             return "CPU_LOAD_RESET";
110         case AdpfVoteType::CPU_LOAD_RESUME:
111             return "CPU_LOAD_RESUME";
112         case AdpfVoteType::VOTE_POWER_EFFICIENCY:
113             return "VOTE_POWER_EFFICIENCY";
114         case AdpfVoteType::GPU_LOAD_UP:
115             return "GPU_LOAD_UP";
116         case AdpfVoteType::GPU_LOAD_DOWN:
117             return "GPU_LOAD_DOWN";
118         case AdpfVoteType::GPU_LOAD_RESET:
119             return "GPU_LOAD_RESET";
120         case AdpfVoteType::GPU_CAPACITY:
121             return "GPU_CAPACITY";
122         default:
123             return "INVALID_VOTE";
124     }
125 }
126 
127 enum class ProcessTag : int32_t {
128     DEFAULT = 0,
129     // System UI related processes, e.g. sysui, nexuslauncher.
130     SYSTEM_UI
131 };
132 
toString(ProcessTag procTag)133 constexpr const char *toString(ProcessTag procTag) {
134     switch (procTag) {
135         case ProcessTag::DEFAULT:
136             return "DEFAULT";
137         case ProcessTag::SYSTEM_UI:
138             return "SYSTEM_UI";
139         default:
140             return "INVALID_PROC_TAG";
141     }
142 }
143 
144 class Immobile {
145   public:
Immobile()146     Immobile() {}
147     Immobile(const Immobile &) = delete;
148     Immobile(Immobile &&) = delete;
149     Immobile &operator=(const Immobile &) = delete;
150     Immobile &operator=(Immobile &) = delete;
151 };
152 
153 constexpr int kUclampMin = 0;
154 constexpr int kUclampMax = 1024;
155 
156 // For this FMQ, the first 2 bytes are write bytes, and the last 2 are
157 // read bytes. There are 32 bits total per flag, and this is split between read
158 // and write, allowing for 16 channels total. The first read bit corresponds to
159 // the same buffer as the first write bit, so bit 0 (write) and bit 16 (read)
160 // correspond to the same buffer, bit 1 (write) and bit 17 (read) are the same buffer,
161 // all the way to bit 15 (write) and bit 31 (read). These read/write masks allow for
162 // selectively picking only the read or write bits in a flag integer.
163 
164 constexpr uint32_t kWriteBits = 0x0000ffff;
165 constexpr uint32_t kReadBits = 0xffff0000;
166 
167 // ADPF FMQ configuration is dictated by the vendor, and the size of the queue is decided
168 // by the HAL and passed to the framework. 32 is a reasonable upper bound, as it can handle
169 // even 2 different sessions reporting all of their cached durations at the same time into one
170 // buffer. If the buffer ever runs out of space, the client will just use a binder instead,
171 // so there is not a real risk of data loss.
172 constexpr size_t kFMQQueueSize = 32;
173 
174 // The maximum number of channels that can be assigned to a ChannelGroup
175 constexpr size_t kMaxChannels = 16;
176 
177 }  // namespace aidl::google::hardware::power::impl::pixel
178