1 /**
2 ******************************************************************************
3 * @file stm32l0xx_hal_pwr.c
4 * @author MCD Application Team
5 * @brief PWR HAL module driver.
6 *
7 * This file provides firmware functions to manage the following
8 * functionalities of the Power Controller (PWR) peripheral:
9 * + Initialization/de-initialization functions
10 * + Peripheral Control functions
11 *
12 ******************************************************************************
13 * @attention
14 *
15 * <h2><center>© Copyright(c) 2016 STMicroelectronics.
16 * All rights reserved.</center></h2>
17 *
18 * This software component is licensed by ST under BSD 3-Clause license,
19 * the "License"; You may not use this file except in compliance with the
20 * License. You may obtain a copy of the License at:
21 * opensource.org/licenses/BSD-3-Clause
22 *
23 ******************************************************************************
24 */
25
26 /* Includes ------------------------------------------------------------------*/
27 #include "stm32l0xx_hal.h"
28
29 #ifdef HAL_PWR_MODULE_ENABLED
30 /** @addtogroup STM32L0xx_HAL_Driver
31 * @{
32 */
33
34 /** @addtogroup PWR
35 * @{
36 */
37
38 /** @addtogroup PWR_Private
39 * @{
40 */
41
42 #if defined(PWR_PVD_SUPPORT)
43 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
44 * @{
45 */
46 #define PVD_MODE_IT ((uint32_t)0x00010000U)
47 #define PVD_MODE_EVT ((uint32_t)0x00020000U)
48 #define PVD_RISING_EDGE ((uint32_t)0x00000001U)
49 #define PVD_FALLING_EDGE ((uint32_t)0x00000002U)
50 /**
51 * @}
52 */
53 #endif
54
55 /**
56 * @}
57 */
58
59
60 /** @addtogroup PWR_Exported_Functions
61 * @{
62 */
63
64 /** @addtogroup PWR_Exported_Functions_Group1
65 * @brief Initialization and de-initialization functions
66 *
67 @verbatim
68 ===============================================================================
69 ##### Initialization and de-initialization functions #####
70 ===============================================================================
71
72 @endverbatim
73 * @{
74 */
75
76 /**
77 * @brief Deinitializes the HAL PWR peripheral registers to their default reset values.
78 * @retval None
79 */
HAL_PWR_DeInit(void)80 void HAL_PWR_DeInit(void)
81 {
82 __HAL_RCC_PWR_FORCE_RESET();
83 __HAL_RCC_PWR_RELEASE_RESET();
84 }
85
86 /**
87 * @}
88 */
89
90 /** @addtogroup PWR_Exported_Functions_Group2
91 * @brief Low Power modes configuration functions
92 *
93 @verbatim
94
95 ===============================================================================
96 ##### Peripheral Control functions #####
97 ===============================================================================
98
99 *** Backup domain ***
100 =========================
101 [..]
102 After reset, the backup domain (RTC registers, RTC backup data
103 registers) is protected against possible unwanted
104 write accesses.
105 To enable access to the RTC Domain and RTC registers, proceed as follows:
106 (+) Enable the Power Controller (PWR) APB1 interface clock using the
107 __HAL_RCC_PWR_CLK_ENABLE() macro.
108 (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
109
110 *** PVD configuration ***
111 =========================
112 [..]
113 (+) The PVD is used to monitor the VDD power supply by comparing it to a
114 threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
115 (+) The PVD can use an external input analog voltage (PVD_IN) which is compared
116 internally to VREFINT. The PVD_IN (PB7) has to be configured in Analog mode
117 when PWR_PVDLevel_7 is selected (PLS[2:0] = 111).
118
119 (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
120 than the PVD threshold. This event is internally connected to the EXTI
121 line16 and can generate an interrupt if enabled. This is done through
122 __HAL_PWR_PVD_EXTI_ENABLE_IT() macro.
123 (+) The PVD is stopped in Standby mode.
124 (+) The PVD feature is not supported on L0 Value line.
125
126 *** WakeUp pin configuration ***
127 ================================
128 [..]
129 (+) WakeUp pin is used to wake up the system from Standby mode. This pin is
130 forced in input pull-down configuration and is active on rising edges.
131 (+) There are two WakeUp pins:
132 WakeUp Pin 1 on PA.00.
133 WakeUp Pin 2 on PC.13.
134 WakeUp Pin 3 on PE.06 .
135
136
137 [..]
138 *** Main and Backup Regulators configuration ***
139 ================================================
140
141 (+) The main internal regulator can be configured to have a tradeoff between
142 performance and power consumption when the device does not operate at
143 the maximum frequency. This is done through __HAL_PWR_VOLTAGESCALING_CONFIG()
144 macro which configures the two VOS bits in PWR_CR register:
145 (++) PWR_REGULATOR_VOLTAGE_SCALE1 (VOS bits = 01), the regulator voltage output Scale 1 mode selected and
146 the System frequency can go up to 32 MHz.
147 (++) PWR_REGULATOR_VOLTAGE_SCALE2 (VOS bits = 10), the regulator voltage output Scale 2 mode selected and
148 the System frequency can go up to 16 MHz.
149 (++) PWR_REGULATOR_VOLTAGE_SCALE3 (VOS bits = 11), the regulator voltage output Scale 3 mode selected and
150 the System frequency can go up to 4.2 MHz.
151
152 Refer to the datasheets for more details.
153
154 *** Low Power modes configuration ***
155 =====================================
156 [..]
157 The device features 5 low-power modes:
158 (+) Low power run mode: regulator in low power mode, limited clock frequency,
159 limited number of peripherals running.
160 (+) Sleep mode: Cortex-M0+ core stopped, peripherals kept running.
161 (+) Low power sleep mode: Cortex-M0+ core stopped, limited clock frequency,
162 limited number of peripherals running, regulator in low power mode.
163 (+) Stop mode: All clocks are stopped, regulator running, regulator in low power mode.
164 (+) Standby mode: VCORE domain powered off
165
166 *** Low power run mode ***
167 =========================
168 [..]
169 To further reduce the consumption when the system is in Run mode, the regulator can be
170 configured in low power mode. In this mode, the system frequency should not exceed
171 MSI frequency range1.
172 In Low power run mode, all I/O pins keep the same state as in Run mode.
173
174 (+) Entry:
175 (++) VCORE in range2
176 (++) Decrease the system frequency not to exceed the frequency of MSI frequency range1.
177 (++) The regulator is forced in low power mode using the HAL_PWREx_EnableLowPowerRunMode()
178 function.
179 (+) Exit:
180 (++) The regulator is forced in Main regulator mode using the HAL_PWREx_DisableLowPowerRunMode()
181 function.
182 (++) Increase the system frequency if needed.
183
184 *** Sleep mode ***
185 ==================
186 [..]
187 (+) Entry:
188 The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFx)
189 functions with
190 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
191 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
192
193 (+) Exit:
194 (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
195 controller (NVIC) can wake up the device from Sleep mode. If the WFE instruction was used to enter sleep mode,
196 the MCU exits Sleep mode as soon as an event occurs.
197
198 *** Low power sleep mode ***
199 ============================
200 [..]
201 (+) Entry:
202 The Low power sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFx)
203 functions with
204 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
205 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
206 (+) The Flash memory can be switched off by using the control bits (SLEEP_PD in the FLASH_ACR register.
207 This reduces power consumption but increases the wake-up time.
208
209 (+) Exit:
210 (++) If the WFI instruction was used to enter Low power sleep mode, any peripheral interrupt
211 acknowledged by the nested vectored interrupt controller (NVIC) can wake up the device
212 from Low power sleep mode. If the WFE instruction was used to enter Low power sleep mode,
213 the MCU exits Sleep mode as soon as an event occurs.
214
215 *** Stop mode ***
216 =================
217 [..]
218 The Stop mode is based on the Cortex-M0+ deepsleep mode combined with peripheral
219 clock gating. The voltage regulator can be configured either in normal or low-power mode.
220 In Stop mode, all clocks in the VCORE domain are stopped, the PLL, the MSI, the HSI and
221 the HSE RC oscillators are disabled. Internal SRAM and register contents are preserved.
222 To get the lowest consumption in Stop mode, the internal Flash memory also enters low
223 power mode. When the Flash memory is in power-down mode, an additional startup delay is
224 incurred when waking up from Stop mode.
225 To minimize the consumption In Stop mode, VREFINT, the BOR, PVD, and temperature
226 sensor can be switched off before entering Stop mode. They can be switched on again by
227 software after exiting Stop mode using the ULP bit in the PWR_CR register.
228 In Stop mode, all I/O pins keep the same state as in Run mode.
229
230 (+) Entry:
231 The Stop mode is entered using the HAL_PWR_EnterSTOPMode
232 function with:
233 (++) Main regulator ON.
234 (++) Low Power regulator ON.
235 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
236 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
237 (+) Exit:
238 (++) By issuing an interrupt or a wakeup event, the MSI or HSI16 RC
239 oscillator is selected as system clock depending the bit STOPWUCK in the RCC_CFGR
240 register
241
242 *** Standby mode ***
243 ====================
244 [..]
245 The Standby mode allows to achieve the lowest power consumption. It is based on the
246 Cortex-M0+ deepsleep mode, with the voltage regulator disabled. The VCORE domain is
247 consequently powered off. The PLL, the MSI, the HSI oscillator and the HSE oscillator are
248 also switched off. SRAM and register contents are lost except for the RTC registers, RTC
249 backup registers and Standby circuitry.
250
251 To minimize the consumption In Standby mode, VREFINT, the BOR, PVD, and temperature
252 sensor can be switched off before entering the Standby mode. They can be switched
253 on again by software after exiting the Standby mode.
254 function.
255
256 (+) Entry:
257 (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
258 (+) Exit:
259 (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
260 tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
261
262 *** Auto-wakeup (AWU) from low-power mode ***
263 =============================================
264 [..]
265 The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
266 Wakeup event, a tamper event, a time-stamp event, or a comparator event,
267 without depending on an external interrupt (Auto-wakeup mode).
268
269 (+) RTC auto-wakeup (AWU) from the Stop mode
270 (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to:
271 (+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt
272 or Event modes) using the EXTI_Init() function.
273 (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function
274 (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
275 and RTC_AlarmCmd() functions.
276 (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
277 is necessary to:
278 (+++) Configure the EXTI Line 19 to be sensitive to rising edges (Interrupt
279 or Event modes) using the EXTI_Init() function.
280 (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
281 function.
282 (+++) Configure the RTC to detect the tamper or time stamp event using the
283 RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
284 functions.
285 (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to:
286 (+++) Configure the EXTI Line 20 to be sensitive to rising edges (Interrupt
287 or Event modes) using the EXTI_Init() function.
288 (+++) Enable the RTC WakeUp Interrupt using the RTC_ITConfig() function.
289 (+++) Configure the RTC to generate the RTC WakeUp event using the RTC_WakeUpClockConfig(),
290 RTC_SetWakeUpCounter() and RTC_WakeUpCmd() functions.
291
292 (+) RTC auto-wakeup (AWU) from the Standby mode
293 (++) To wake up from the Standby mode with an RTC alarm event, it is necessary to:
294 (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function.
295 (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
296 and RTC_AlarmCmd() functions.
297 (++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it
298 is necessary to:
299 (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
300 function.
301 (+++) Configure the RTC to detect the tamper or time stamp event using the
302 RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
303 functions.
304 (++) To wake up from the Standby mode with an RTC WakeUp event, it is necessary to:
305 (+++) Enable the RTC WakeUp Interrupt using the RTC_ITConfig() function
306 (+++) Configure the RTC to generate the RTC WakeUp event using the RTC_WakeUpClockConfig(),
307 RTC_SetWakeUpCounter() and RTC_WakeUpCmd() functions.
308
309 (+) Comparator auto-wakeup (AWU) from the Stop mode
310 (++) To wake up from the Stop mode with an comparator 1 or comparator 2 wakeup
311 event, it is necessary to:
312 (+++) Configure the EXTI Line 21 for comparator 1 or EXTI Line 22 for comparator 2
313 to be sensitive to to the selected edges (falling, rising or falling
314 and rising) (Interrupt or Event modes) using the EXTI_Init() function.
315 (+++) Configure the comparator to generate the event.
316 @endverbatim
317 * @{
318 */
319
320 /**
321 * @brief Enables access to the backup domain (RTC registers, RTC
322 * backup data registers ).
323 * @note If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
324 * Backup Domain Access should be kept enabled.
325 * @retval None
326 */
HAL_PWR_EnableBkUpAccess(void)327 void HAL_PWR_EnableBkUpAccess(void)
328 {
329 /* Enable access to RTC and backup registers */
330 SET_BIT(PWR->CR, PWR_CR_DBP);
331 }
332
333 /**
334 * @brief Disables access to the backup domain
335 * @note Applies to RTC registers, RTC backup data registers.
336 * @note If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
337 * Backup Domain Access should be kept enabled.
338 * @retval None
339 */
HAL_PWR_DisableBkUpAccess(void)340 void HAL_PWR_DisableBkUpAccess(void)
341 {
342 /* Disable access to RTC and backup registers */
343 CLEAR_BIT(PWR->CR, PWR_CR_DBP);
344 }
345
346 #if defined(PWR_PVD_SUPPORT)
347 /**
348 * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
349 * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration
350 * information for the PVD.
351 * @note Refer to the electrical characteristics of your device datasheet for
352 * more details about the voltage threshold corresponding to each
353 * detection level.
354 * @retval None
355 */
HAL_PWR_ConfigPVD(PWR_PVDTypeDef * sConfigPVD)356 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
357 {
358 /* Check the parameters */
359 assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
360 assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
361
362 /* Set PLS[7:5] bits according to PVDLevel value */
363 MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
364
365 /* Clear any previous config. Keep it clear if no event or IT mode is selected */
366 __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
367 __HAL_PWR_PVD_EXTI_DISABLE_IT();
368 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
369 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
370
371 /* Configure interrupt mode */
372 if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
373 {
374 __HAL_PWR_PVD_EXTI_ENABLE_IT();
375 }
376
377 /* Configure event mode */
378 if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
379 {
380 __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
381 }
382
383 /* Configure the edge */
384 if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
385 {
386 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
387 }
388
389 if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
390 {
391 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
392 }
393 }
394
395 /**
396 * @brief Enables the Power Voltage Detector(PVD).
397 * @retval None
398 */
HAL_PWR_EnablePVD(void)399 void HAL_PWR_EnablePVD(void)
400 {
401 /* Enable the power voltage detector */
402 SET_BIT(PWR->CR, PWR_CR_PVDE);
403 }
404
405 /**
406 * @brief Disables the Power Voltage Detector(PVD).
407 * @retval None
408 */
HAL_PWR_DisablePVD(void)409 void HAL_PWR_DisablePVD(void)
410 {
411 /* Disable the power voltage detector */
412 CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
413 }
414 #endif /* PWR_PVD_SUPPORT */
415
416 /**
417 * @brief Enables the WakeUp PINx functionality.
418 * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable.
419 * This parameter can be one of the following values:
420 * @arg PWR_WAKEUP_PIN1
421 * @arg PWR_WAKEUP_PIN2
422 * @arg PWR_WAKEUP_PIN3 for stm32l07xxx and stm32l08xxx devices only.
423 * @retval None
424 */
HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)425 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
426 {
427 /* Check the parameter */
428 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
429 /* Enable the EWUPx pin */
430 SET_BIT(PWR->CSR, WakeUpPinx);
431 }
432
433 /**
434 * @brief Disables the WakeUp PINx functionality.
435 * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
436 * This parameter can be one of the following values:
437 * @arg PWR_WAKEUP_PIN1
438 * @arg PWR_WAKEUP_PIN2
439 * @arg PWR_WAKEUP_PIN3 for stm32l07xxx and stm32l08xxx devices only.
440 * @retval None
441 */
HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)442 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
443 {
444 /* Check the parameter */
445 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
446 /* Disable the EWUPx pin */
447 CLEAR_BIT(PWR->CSR, WakeUpPinx);
448 }
449
450 /**
451 * @brief Enters Sleep mode.
452 * @note In Sleep mode, all I/O pins keep the same state as in Run mode.
453 * @param Regulator: Specifies the regulator state in SLEEP mode.
454 * This parameter can be one of the following values:
455 * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
456 * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
457 * @param SLEEPEntry: Specifies if SLEEP mode is entered with WFI or WFE instruction.
458 * When WFI entry is used, tick interrupt have to be disabled if not desired as
459 * the interrupt wake up source.
460 * This parameter can be one of the following values:
461 * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
462 * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
463 * @retval None
464 */
HAL_PWR_EnterSLEEPMode(uint32_t Regulator,uint8_t SLEEPEntry)465 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
466 {
467 uint32_t tmpreg = 0U;
468 /* Check the parameters */
469 assert_param(IS_PWR_REGULATOR(Regulator));
470 assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
471
472 /* Select the regulator state in Sleep mode ---------------------------------*/
473 tmpreg = PWR->CR;
474
475 /* Clear PDDS and LPDS bits */
476 CLEAR_BIT(tmpreg, (PWR_CR_PDDS | PWR_CR_LPSDSR));
477
478 /* Set LPSDSR bit according to PWR_Regulator value */
479 SET_BIT(tmpreg, Regulator);
480
481 /* Store the new value */
482 PWR->CR = tmpreg;
483
484 /* Clear SLEEPDEEP bit of Cortex System Control Register */
485 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
486
487 /* Select SLEEP mode entry -------------------------------------------------*/
488 if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
489 {
490 /* Request Wait For Interrupt */
491 __WFI();
492 }
493 else
494 {
495 /* Request Wait For Event */
496 __SEV();
497 __WFE();
498 __WFE();
499 }
500
501 /* Additional NOP to ensure all pending instructions are flushed before entering low power mode */
502 __NOP();
503
504 }
505
506 /**
507 * @brief Enters Stop mode.
508 * @note In Stop mode, all I/O pins keep the same state as in Run mode.
509 * @note When exiting Stop mode by issuing an interrupt or a wakeup event,
510 * MSI or HSI16 RCoscillator is selected as system clock depending
511 * the bit STOPWUCK in the RCC_CFGR register.
512 * @note When the voltage regulator operates in low power mode, an additional
513 * startup delay is incurred when waking up from Stop mode.
514 * By keeping the internal regulator ON during Stop mode, the consumption
515 * is higher although the startup time is reduced.
516 * @note Before entering in this function, it is important to ensure that the WUF
517 * wakeup flag is cleared. To perform this action, it is possible to call the
518 * following macro : __HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU)
519 *
520 * @param Regulator: Specifies the regulator state in Stop mode.
521 * This parameter can be one of the following values:
522 * @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
523 * @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
524 * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction.
525 * This parameter can be one of the following values:
526 * @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
527 * @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction
528 * @retval None
529 */
HAL_PWR_EnterSTOPMode(uint32_t Regulator,uint8_t STOPEntry)530 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
531 {
532 uint32_t tmpreg = 0U;
533
534 /* Check the parameters */
535 assert_param(IS_PWR_REGULATOR(Regulator));
536 assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
537
538 /* Select the regulator state in Stop mode ---------------------------------*/
539 tmpreg = PWR->CR;
540
541 /* Clear PDDS and LPDS bits */
542 CLEAR_BIT(tmpreg, (PWR_CR_PDDS | PWR_CR_LPSDSR));
543
544 /* Set LPSDSR bit according to PWR_Regulator value */
545 SET_BIT(tmpreg, Regulator);
546
547 /* Store the new value */
548 PWR->CR = tmpreg;
549
550 /* Set SLEEPDEEP bit of Cortex System Control Register */
551 SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
552
553 /* Select Stop mode entry --------------------------------------------------*/
554 if(STOPEntry == PWR_STOPENTRY_WFI)
555 {
556 /* Request Wait For Interrupt */
557 __WFI();
558 }
559 else
560 {
561 /* Request Wait For Event */
562 __SEV();
563 __WFE();
564 __WFE();
565 }
566
567 /* Reset SLEEPDEEP bit of Cortex System Control Register */
568 CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
569
570 }
571
572 /**
573 * @brief Enters Standby mode.
574 * @note In Standby mode, all I/O pins are high impedance except for:
575 * - Reset pad (still available)
576 * - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC
577 * Alarm out, or RTC clock calibration out.
578 * - RTC_AF2 pin (PC13) if configured for tamper.
579 * - WKUP pin 1 (PA00) if enabled.
580 * - WKUP pin 2 (PC13) if enabled.
581 * - WKUP pin 3 (PE06) if enabled, for stm32l07xxx and stm32l08xxx devices only.
582 * - WKUP pin 3 (PA02) if enabled, for stm32l031xx devices only.
583 * @retval None
584 */
HAL_PWR_EnterSTANDBYMode(void)585 void HAL_PWR_EnterSTANDBYMode(void)
586 {
587 /* Select Standby mode */
588 SET_BIT(PWR->CR, PWR_CR_PDDS);
589
590 /* Set SLEEPDEEP bit of Cortex System Control Register */
591 SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
592
593 /* This option is used to ensure that store operations are completed */
594 #if defined ( __CC_ARM)
595 __force_stores();
596 #endif
597 /* Request Wait For Interrupt */
598 __WFI();
599 }
600
601 /**
602 * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode.
603 * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
604 * re-enters SLEEP mode when an interruption handling is over.
605 * Setting this bit is useful when the processor is expected to run only on
606 * interruptions handling.
607 * @retval None
608 */
HAL_PWR_EnableSleepOnExit(void)609 void HAL_PWR_EnableSleepOnExit(void)
610 {
611 /* Set SLEEPONEXIT bit of Cortex System Control Register */
612 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
613 }
614
615
616 /**
617 * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode.
618 * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
619 * re-enters SLEEP mode when an interruption handling is over.
620 * @retval None
621 */
HAL_PWR_DisableSleepOnExit(void)622 void HAL_PWR_DisableSleepOnExit(void)
623 {
624 /* Clear SLEEPONEXIT bit of Cortex System Control Register */
625 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
626 }
627
628
629 /**
630 * @brief Enables CORTEX M0+ SEVONPEND bit.
631 * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes
632 * WFE to wake up when an interrupt moves from inactive to pended.
633 * @retval None
634 */
HAL_PWR_EnableSEVOnPend(void)635 void HAL_PWR_EnableSEVOnPend(void)
636 {
637 /* Set SEVONPEND bit of Cortex System Control Register */
638 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
639 }
640
641
642 /**
643 * @brief Disables CORTEX M0+ SEVONPEND bit.
644 * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
645 * WFE to wake up when an interrupt moves from inactive to pended.
646 * @retval None
647 */
HAL_PWR_DisableSEVOnPend(void)648 void HAL_PWR_DisableSEVOnPend(void)
649 {
650 /* Clear SEVONPEND bit of Cortex System Control Register */
651 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
652 }
653
654 #if defined(PWR_PVD_SUPPORT)
655 /**
656 * @brief This function handles the PWR PVD interrupt request.
657 * @note This API should be called under the PVD_IRQHandler().
658 * @retval None
659 */
HAL_PWR_PVD_IRQHandler(void)660 void HAL_PWR_PVD_IRQHandler(void)
661 {
662 /* Check PWR exti flag */
663 if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
664 {
665 /* PWR PVD interrupt user callback */
666 HAL_PWR_PVDCallback();
667
668 /* Clear PWR Exti pending bit */
669 __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
670 }
671 }
672
673 /**
674 * @brief PWR PVD interrupt callback
675 * @retval None
676 */
HAL_PWR_PVDCallback(void)677 __weak void HAL_PWR_PVDCallback(void)
678 {
679 /* NOTE : This function Should not be modified, when the callback is needed,
680 the HAL_PWR_PVDCallback could be implemented in the user file
681 */
682 }
683 #endif /* PWR_PVD_SUPPORT */
684
685 /**
686 * @}
687 */
688
689 /**
690 * @}
691 */
692
693 #endif /* HAL_PWR_MODULE_ENABLED */
694 /**
695 * @}
696 */
697
698 /**
699 * @}
700 */
701
702 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
703
704